[PATCH 0/3] net: phy: nxp-c45-tja11xx: add support for TJA1121 and errata

[PATCH 0/3] net: phy: nxp-c45-tja11xx: add support for TJA1121 and errata

[Andrei Botila]

This patch series adds support for TJA1121 and two errata for latest
silicon version of TJA1120 and TJA1121.
Support for TJA1121 consists of naming changes since TJA1121 is based
on TJA1120 hardware with additional MACsec IP.

Andrei Botila (3):
  net: phy: nxp-c45-tja11xx: add support for TJA1121
  net: phy: nxp-c45-tja11xx: add TJA112X PHY configuration errata
  net: phy: nxp-c45-tja11xx: add TJA112XB SGMII PCS restart errata

 drivers/net/phy/Kconfig           |  2 +-
 drivers/net/phy/nxp-c45-tja11xx.c | 76 +++++++++++++++++++++++++++++--
 2 files changed, 74 insertions(+), 4 deletions(-)

-- 
2.48.1

[PATCH 1/3] net: phy: nxp-c45-tja11xx: add support for TJA1121

[Andrei Botila]

Add naming for TJA1121 since TJA1121 is based on TJA1120 but with
additional MACsec IP.
Same applies for TJA1103 which shares the same hardware as TJA1104 with
the latter having MACsec IP enabled.

Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
---
 drivers/net/phy/Kconfig           | 2 +-
 drivers/net/phy/nxp-c45-tja11xx.c | 8 +++++---
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 41c15a2c2037..d29f9f7fd2e1 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -328,7 +328,7 @@ config NXP_C45_TJA11XX_PHY
 	depends on MACSEC || !MACSEC
 	help
 	  Enable support for NXP C45 TJA11XX PHYs.
-	  Currently supports the TJA1103, TJA1104 and TJA1120 PHYs.
+	  Currently supports the TJA1103, TJA1104, TJA1120 and TJA1121 PHYs.
 
 config NXP_TJA11XX_PHY
 	tristate "NXP TJA11xx PHYs support"
diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
index 34231b5b9175..244b5889e805 100644
--- a/drivers/net/phy/nxp-c45-tja11xx.c
+++ b/drivers/net/phy/nxp-c45-tja11xx.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /* NXP C45 PHY driver
- * Copyright 2021-2023 NXP
+ * Copyright 2021-2025 NXP
  * Author: Radu Pirea <radu-nicolae.pirea@oss.nxp.com>
  */
 
@@ -19,7 +19,9 @@
 
 #include "nxp-c45-tja11xx.h"
 
+/* Same id: TJA1103, TJA1104 */
 #define PHY_ID_TJA_1103			0x001BB010
+/* Same id: TJA1120, TJA1121 */
 #define PHY_ID_TJA_1120			0x001BB031
 
 #define VEND1_DEVICE_CONTROL		0x0040
@@ -1959,7 +1961,7 @@ static const struct nxp_c45_phy_data tja1120_phy_data = {
 static struct phy_driver nxp_c45_driver[] = {
 	{
 		PHY_ID_MATCH_MODEL(PHY_ID_TJA_1103),
-		.name			= "NXP C45 TJA1103",
+		.name			= "NXP C45 TJA1103 or TJA1104",
 		.get_features		= nxp_c45_get_features,
 		.driver_data		= &tja1103_phy_data,
 		.probe			= nxp_c45_probe,
@@ -1983,7 +1985,7 @@ static struct phy_driver nxp_c45_driver[] = {
 	},
 	{
 		PHY_ID_MATCH_MODEL(PHY_ID_TJA_1120),
-		.name			= "NXP C45 TJA1120",
+		.name			= "NXP C45 TJA1120 or TJA1121",
 		.get_features		= nxp_c45_get_features,
 		.driver_data		= &tja1120_phy_data,
 		.probe			= nxp_c45_probe,
-- 
2.48.1

[PATCH 2/3] net: phy: nxp-c45-tja11xx: add TJA112X PHY configuration errata

[Andrei Botila]

The most recent sillicon versions of TJA1120 and TJA1121 can achieve
full silicon performance by putting the PHY in managed mode.

It is necessary to apply this SMI write sequence before link
gets established. Application of this fix is required after restart
of device and wakeup from sleep.

Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
---
 drivers/net/phy/nxp-c45-tja11xx.c | 52 +++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
index 244b5889e805..2607289b4cd3 100644
--- a/drivers/net/phy/nxp-c45-tja11xx.c
+++ b/drivers/net/phy/nxp-c45-tja11xx.c
@@ -24,6 +24,11 @@
 /* Same id: TJA1120, TJA1121 */
 #define PHY_ID_TJA_1120			0x001BB031
 
+#define VEND1_DEVICE_ID3		0x0004
+#define TJA1120_DEV_ID3_SILICON_VERSION	GENMASK(15, 12)
+#define TJA1120_DEV_ID3_SAMPLE_TYPE	GENMASK(11, 8)
+#define DEVICE_ID3_SAMPLE_TYPE_R	0x9
+
 #define VEND1_DEVICE_CONTROL		0x0040
 #define DEVICE_CONTROL_RESET		BIT(15)
 #define DEVICE_CONTROL_CONFIG_GLOBAL_EN	BIT(14)
@@ -1595,6 +1600,50 @@ static int nxp_c45_set_phy_mode(struct phy_device *phydev)
 	return 0;
 }
 
+/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 */
+static void nxp_c45_tja1120_errata(struct phy_device *phydev)
+{
+	int silicon_version, sample_type;
+	bool macsec_ability;
+	int phy_abilities;
+	int ret = 0;
+
+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_DEVICE_ID3);
+	if (ret < 0)
+		return;
+
+	sample_type = FIELD_GET(TJA1120_DEV_ID3_SAMPLE_TYPE, ret);
+	if (sample_type != DEVICE_ID3_SAMPLE_TYPE_R)
+		return;
+
+	silicon_version = FIELD_GET(TJA1120_DEV_ID3_SILICON_VERSION, ret);
+
+	phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1,
+				     VEND1_PORT_ABILITIES);
+	macsec_ability = !!(phy_abilities & MACSEC_ABILITY);
+	if ((!macsec_ability && silicon_version == 2) ||
+	    (macsec_ability && silicon_version == 1)) {
+		/* TJA1120/TJA1121 PHY configuration errata workaround.
+		 * Apply SMI sequence before link up.
+		 */
+		if (!macsec_ability) {
+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x4b95);
+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0xf3cd);
+		} else {
+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x89c7);
+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0x0893);
+		}
+
+		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x0476, 0x58a0);
+
+		phy_write_mmd(phydev, MDIO_MMD_PMAPMD, 0x8921, 0xa3a);
+		phy_write_mmd(phydev, MDIO_MMD_PMAPMD, 0x89F1, 0x16c1);
+
+		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x0);
+		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0x0);
+	}
+}
+
 static int nxp_c45_config_init(struct phy_device *phydev)
 {
 	int ret;
@@ -1611,6 +1660,9 @@ static int nxp_c45_config_init(struct phy_device *phydev)
 	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 1);
 	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 2);
 
+	if (phydev->drv->phy_id == PHY_ID_TJA_1120)
+		nxp_c45_tja1120_errata(phydev);
+
 	phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_CONFIG,
 			 PHY_CONFIG_AUTO);
 
-- 
2.48.1

[PATCH 3/3] net: phy: nxp-c45-tja11xx: add TJA112XB SGMII PCS restart errata

[Andrei Botila]

TJA1120B/TJA1121B can achieve a stable operation of SGMII after
a startup event by putting the SGMII PCS into power down mode and
restart afterwards.

It is necessary to put the SGMII PCS into power down mode and back up.

Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
---
 drivers/net/phy/nxp-c45-tja11xx.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
index 2607289b4cd3..d1de99bb3954 100644
--- a/drivers/net/phy/nxp-c45-tja11xx.c
+++ b/drivers/net/phy/nxp-c45-tja11xx.c
@@ -116,6 +116,9 @@
 #define MII_BASIC_CONFIG_RMII		0x5
 #define MII_BASIC_CONFIG_MII		0x4
 
+#define VEND1_SGMII_BASIC_CONTROL	0xB000
+#define SGMII_LPM			BIT(11)
+
 #define VEND1_SYMBOL_ERROR_CNT_XTD	0x8351
 #define EXTENDED_CNT_EN			BIT(15)
 #define VEND1_MONITOR_STATUS		0xAC80
@@ -1600,11 +1603,11 @@ static int nxp_c45_set_phy_mode(struct phy_device *phydev)
 	return 0;
 }
 
-/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 */
+/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 & 3.2 */
 static void nxp_c45_tja1120_errata(struct phy_device *phydev)
 {
+	bool macsec_ability, sgmii_ability;
 	int silicon_version, sample_type;
-	bool macsec_ability;
 	int phy_abilities;
 	int ret = 0;
 
@@ -1621,6 +1624,7 @@ static void nxp_c45_tja1120_errata(struct phy_device *phydev)
 	phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1,
 				     VEND1_PORT_ABILITIES);
 	macsec_ability = !!(phy_abilities & MACSEC_ABILITY);
+	sgmii_ability = !!(phy_abilities & SGMII_ABILITY);
 	if ((!macsec_ability && silicon_version == 2) ||
 	    (macsec_ability && silicon_version == 1)) {
 		/* TJA1120/TJA1121 PHY configuration errata workaround.
@@ -1641,6 +1645,18 @@ static void nxp_c45_tja1120_errata(struct phy_device *phydev)
 
 		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x0);
 		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0x0);
+
+		if (sgmii_ability) {
+			/* TJA1120B/TJA1121B SGMII PCS restart errata workaround.
+			 * Put SGMII PCS into power down mode and back up.
+			 */
+			phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
+					 VEND1_SGMII_BASIC_CONTROL,
+					 SGMII_LPM);
+			phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+					   VEND1_SGMII_BASIC_CONTROL,
+					   SGMII_LPM);
+		}
 	}
 }
 
-- 
2.48.1

Re: [PATCH 0/3] net: phy: nxp-c45-tja11xx: add support for TJA1121 and errata

[Andrew Lunn]

On Thu, Feb 27, 2025 at 06:00:53PM +0200, Andrei Botila wrote:
> This patch series adds support for TJA1121 and two errata for latest
> silicon version of TJA1120 and TJA1121.

Should the errata fixes be back ported to stable for the TJA1120? If
so, you need to base them on net, and include a Fixes: tag. Adding the
new device is however net-next material.

	Andrew

Re: [PATCH 1/3] net: phy: nxp-c45-tja11xx: add support for TJA1121

[Andrew Lunn]

On Thu, Feb 27, 2025 at 06:00:54PM +0200, Andrei Botila wrote:
> Add naming for TJA1121 since TJA1121 is based on TJA1120 but with
> additional MACsec IP.
> Same applies for TJA1103 which shares the same hardware as TJA1104 with
> the latter having MACsec IP enabled.
> 
> Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
> ---
>  drivers/net/phy/Kconfig           | 2 +-
>  drivers/net/phy/nxp-c45-tja11xx.c | 8 +++++---
>  2 files changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> index 41c15a2c2037..d29f9f7fd2e1 100644
> --- a/drivers/net/phy/Kconfig
> +++ b/drivers/net/phy/Kconfig
> @@ -328,7 +328,7 @@ config NXP_C45_TJA11XX_PHY
>  	depends on MACSEC || !MACSEC
>  	help
>  	  Enable support for NXP C45 TJA11XX PHYs.
> -	  Currently supports the TJA1103, TJA1104 and TJA1120 PHYs.
> +	  Currently supports the TJA1103, TJA1104, TJA1120 and TJA1121 PHYs.
>  
>  config NXP_TJA11XX_PHY
>  	tristate "NXP TJA11xx PHYs support"
> diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
> index 34231b5b9175..244b5889e805 100644
> --- a/drivers/net/phy/nxp-c45-tja11xx.c
> +++ b/drivers/net/phy/nxp-c45-tja11xx.c
> @@ -1,6 +1,6 @@
>  // SPDX-License-Identifier: GPL-2.0
>  /* NXP C45 PHY driver
> - * Copyright 2021-2023 NXP
> + * Copyright 2021-2025 NXP
>   * Author: Radu Pirea <radu-nicolae.pirea@oss.nxp.com>
>   */
>  
> @@ -19,7 +19,9 @@
>  
>  #include "nxp-c45-tja11xx.h"
>  
> +/* Same id: TJA1103, TJA1104 */
>  #define PHY_ID_TJA_1103			0x001BB010
> +/* Same id: TJA1120, TJA1121 */
>  #define PHY_ID_TJA_1120			0x001BB031

Is there a way to tell them apart? Another register somewhere?

	Andrew

Re: [PATCH 1/3] net: phy: nxp-c45-tja11xx: add support for TJA1121

[Andrei Botila]

On 2/27/2025 6:14 PM, Andrew Lunn wrote:
> On Thu, Feb 27, 2025 at 06:00:54PM +0200, Andrei Botila wrote:
>> Add naming for TJA1121 since TJA1121 is based on TJA1120 but with
>> additional MACsec IP.
>> Same applies for TJA1103 which shares the same hardware as TJA1104 with
>> the latter having MACsec IP enabled.
>>
>> Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
>> ---
>>   drivers/net/phy/Kconfig           | 2 +-
>>   drivers/net/phy/nxp-c45-tja11xx.c | 8 +++++---
>>   2 files changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
>> index 41c15a2c2037..d29f9f7fd2e1 100644
>> --- a/drivers/net/phy/Kconfig
>> +++ b/drivers/net/phy/Kconfig
>> @@ -328,7 +328,7 @@ config NXP_C45_TJA11XX_PHY
>>   	depends on MACSEC || !MACSEC
>>   	help
>>   	  Enable support for NXP C45 TJA11XX PHYs.
>> -	  Currently supports the TJA1103, TJA1104 and TJA1120 PHYs.
>> +	  Currently supports the TJA1103, TJA1104, TJA1120 and TJA1121 PHYs.
>>   
>>   config NXP_TJA11XX_PHY
>>   	tristate "NXP TJA11xx PHYs support"
>> diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
>> index 34231b5b9175..244b5889e805 100644
>> --- a/drivers/net/phy/nxp-c45-tja11xx.c
>> +++ b/drivers/net/phy/nxp-c45-tja11xx.c
>> @@ -1,6 +1,6 @@
>>   // SPDX-License-Identifier: GPL-2.0
>>   /* NXP C45 PHY driver
>> - * Copyright 2021-2023 NXP
>> + * Copyright 2021-2025 NXP
>>    * Author: Radu Pirea <radu-nicolae.pirea@oss.nxp.com>
>>    */
>>   
>> @@ -19,7 +19,9 @@
>>   
>>   #include "nxp-c45-tja11xx.h"
>>   
>> +/* Same id: TJA1103, TJA1104 */
>>   #define PHY_ID_TJA_1103			0x001BB010
>> +/* Same id: TJA1120, TJA1121 */
>>   #define PHY_ID_TJA_1120			0x001BB031
> 
> Is there a way to tell them apart? Another register somewhere?

Unfortunately no, TJA1120 and TJA1121 share the same hardware the only 
difference being that TJA1121 has MACsec support while TJA1120 does not.
It is the same for TJA1103 and TJA1104.

Best regards,
Andrei

> 
> 	Andrew

Re: [PATCH 0/3] net: phy: nxp-c45-tja11xx: add support for TJA1121 and errata

[Andrei Botila]

On 2/27/2025 6:11 PM, Andrew Lunn wrote:
> On Thu, Feb 27, 2025 at 06:00:53PM +0200, Andrei Botila wrote:
>> This patch series adds support for TJA1121 and two errata for latest
>> silicon version of TJA1120 and TJA1121.
> 
> Should the errata fixes be back ported to stable for the TJA1120? If
> so, you need to base them on net, and include a Fixes: tag. Adding the
> new device is however net-next material.

The errata fixes don't have to be ported to stable. I've made a mistake 
by not putting 'net-next'. The entire patch series targets net-next.

Best regards,
Andrei

> 
> 	Andrew

Re: [PATCH 1/3] net: phy: nxp-c45-tja11xx: add support for TJA1121

[Andrew Lunn]

> > Is there a way to tell them apart? Another register somewhere?
> 
> Unfortunately no, TJA1120 and TJA1121 share the same hardware the only
> difference being that TJA1121 has MACsec support while TJA1120 does not.
> It is the same for TJA1103 and TJA1104.

So the hardware can do MACsec, but it is disabled in firmware? Golden
screw driver could be used?

So you can tell them apart, otherwise you would offer MACsec on both.
It might be worth adding a .match_phy_device to the driver, so you can
have an entry per device. Just watch out for the semantics of
.match_phy_device, it gets called before the IDs are looked at.

	Andrew

Re: [PATCH 0/3] net: phy: nxp-c45-tja11xx: add support for TJA1121 and errata

[Andrew Lunn]

On Thu, Feb 27, 2025 at 06:33:31PM +0200, Andrei Botila wrote:
> On 2/27/2025 6:11 PM, Andrew Lunn wrote:
> > On Thu, Feb 27, 2025 at 06:00:53PM +0200, Andrei Botila wrote:
> > > This patch series adds support for TJA1121 and two errata for latest
> > > silicon version of TJA1120 and TJA1121.
> > 
> > Should the errata fixes be back ported to stable for the TJA1120? If
> > so, you need to base them on net, and include a Fixes: tag. Adding the
> > new device is however net-next material.
> 
> The errata fixes don't have to be ported to stable.

An explanation why would be nice.

	Andrew