Re: [RFC PATCH net-next v2 5/5] net: phy: qca83xx: disable SmartSpeed before resetting CPU PHYs

[Andrew Lunn <andrew@lunn.ch>]

On Wed, Sep 23, 2026 at 11:57:35PM +0200, Yongzhao Chen wrote:
> Hi Andrew,
> 
> Yes. In the RA74 trace, generic config_aneg() returned successfully with
> CTRL1000 at 0x0600. A later read found 0x0400, so 1000BASE-T full-duplex
> advertisement had been cleared by then. I did not capture when it
> changed. The instrumented Clause 22 BMCR/CTRL1000 path showed no
> intervening write; other paths were not ruled out.
> 
> SmartSpeed is the downshift feature. I have no evidence of a broken pair
> or a successful fallback to 100 Mb/s. The 0x0400 value describes
> advertised capability, not the negotiated speed. Clearing SmartSpeed
> before the initial reset kept the internal link at 1 Gb/s during the
> tested RA74 boot sequence. The trigger remains unknown.

It is operating different to most devices implementing downshift.

All the other PHYs don't change the contents of the standard
registers, LPA still indicates the link partner can do 1G, BMSR
indicate the link is running at 1G because that is what the
negotiation resolved to, but a vendor register indicates the link is
actually running at 100Mbps.

Now, downshift is not part of 802.3, so vendors are free to implement
it however they want.

But back to this patchset. We have to consider, is downshift in
general broken? If so, we can just disable it in the PHY driver, and
add a comment it is broken. The flag is not needed. We could also
implement the tuning API, but have it disabled by default. Again the
flag is not needed.

I would prefer not to add the flag, but we can if we must. I suggest
you reach out to the vendor and see if there is any errata.

    Andrew