From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiner Kallweit Subject: Re: [PATCH net-next 01/10] r8169: add basic phylib support Date: Tue, 3 Jul 2018 21:48:46 +0200 Message-ID: References: <096a5326-963c-9bef-6218-29fcde004111@gmail.com> <60049e7e-b86d-1968-cdfd-7e0f91a25b88@gmail.com> <20180702210239.GA12564@lunn.ch> <238e0c62-7e95-df62-3837-5e8d1b7248f0@gmail.com> <143f31fa-e8ea-7e79-46a7-b9a6d3ac68ef@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Cc: David Miller , Realtek linux nic maintainers , "netdev@vger.kernel.org" To: Florian Fainelli , Andrew Lunn Return-path: Received: from mail-wr0-f194.google.com ([209.85.128.194]:35605 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752401AbeGCTyt (ORCPT ); Tue, 3 Jul 2018 15:54:49 -0400 Received: by mail-wr0-f194.google.com with SMTP id h40-v6so3117860wrh.2 for ; Tue, 03 Jul 2018 12:54:48 -0700 (PDT) In-Reply-To: <143f31fa-e8ea-7e79-46a7-b9a6d3ac68ef@gmail.com> Content-Language: en-US Sender: netdev-owner@vger.kernel.org List-ID: On 03.07.2018 18:42, Florian Fainelli wrote: > > > On 07/02/2018 02:15 PM, Heiner Kallweit wrote: >> On 02.07.2018 23:02, Andrew Lunn wrote: >>>> +static int r8169_mdio_read_reg(struct mii_bus *mii_bus, int phyaddr, int phyreg) >>>> +{ >>>> + struct rtl8169_private *tp = mii_bus->priv; >>>> + >>>> + return rtl_readphy(tp, phyreg); >>> >>> So there is no support for phyaddr? >>> >> Right, the chip can access only the one internal PHY, therefore it >> doesn't support phyaddr. > > Then you might also want to set mii_bus->phy_mask accordingly such that > only the internal PHY address bit is cleared there? > That's something I'm doing already, see following line in r8169_mdio_register(): new_bus->phy_mask = ~1; But thanks for the hint anyway.