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[90.182.211.1]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a1822af9d5sm37187375e9.15.2026.10.07.05.35.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 07 Oct 2026 05:35:46 -0700 (PDT) Message-ID: Date: Wed, 7 Oct 2026 14:35:43 +0200 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: Neil Armstrong Subject: Re: [RFC PATCH v2 3/7] dt-bindings: net: amlogic,meson-dwmac: add amlogic,t7-dwmac To: Lucas Tanure , xianwei.zhao@amlogic.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org References: <20261007082627.63807-1-tanure@linux.com> <20261007082627.63807-4-tanure@linux.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20261007082627.63807-4-tanure@linux.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/7/26 10:26, Lucas Tanure wrote: > The T7 has the same ethernet glue as the G12A, but the controller > reaches memory through a pipeline stage that this SoC inserts in the > bus path. That stage has a gate of its own, which no other member of > the family has, and nothing else in Linux claims it. It is therefore > switched off as unused, and the port can then no longer finish a > transfer. > > Describing it needs a fourth clock, and the fourth clock of the > existing list drives the timing adjustment logic, which the T7 never > uses. So the T7 gets a list of its own with the gate in that place, > under the name the SD and eMMC controllers already use. > > Assisted-by: LLM > Signed-off-by: Lucas Tanure > --- > .../bindings/net/amlogic,meson-dwmac.yaml | 47 +++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml > index 90ef79161ab1..96118b4d1560 100644 > --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml > +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml > @@ -23,6 +23,7 @@ select: > - amlogic,meson-gxbb-dwmac > - amlogic,meson-axg-dwmac > - amlogic,meson-g12a-dwmac > + - amlogic,t7-dwmac > required: > - compatible > > @@ -57,6 +58,47 @@ allOf: > - const: clkin1 > - const: timing-adjustment > > + # The T7 applies the RGMII RX delay through PRG_ETH1 and never enables the > + # timing adjustment logic, so it has no timing-adjustment clock. What it does > + # need is the gate of the pipeline stage the controller reaches DRAM through. > + - if: > + properties: > + compatible: > + contains: > + const: amlogic,t7-dwmac > + then: > + properties: > + clocks: > + items: > + - description: GMAC main clock > + - description: First parent clock of the internal mux > + - description: Second parent clock of the internal mux > + - description: > + clock of the pipeline stage inserted in the bus path between > + the controller and the DRAM. Without it, the controller cannot > + complete DMA transfers. > + > + clock-names: > + items: > + - const: stmmaceth > + - const: clkin0 > + - const: clkin1 > + - const: pipeline > + > + # Delay definitions for Meson8b and newer (including T7) > + - if: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8b-dwmac > + - amlogic,meson8m2-dwmac > + - amlogic,meson-gxbb-dwmac > + - amlogic,meson-axg-dwmac > + - amlogic,meson-g12a-dwmac > + - amlogic,t7-dwmac > + then: > + properties: > amlogic,tx-delay-ns: Do we still want to support the vendor property on t7 ? Neil > enum: [0, 2, 4, 6] > default: 2 > @@ -106,6 +148,7 @@ allOf: > contains: > enum: > - amlogic,meson-g12a-dwmac > + - amlogic,t7-dwmac > then: > properties: > rx-internal-delay-ps: > @@ -143,6 +186,10 @@ properties: > - amlogic,meson6-dwmac > - amlogic,meson8m2-dwmac > - const: snps,dwmac > + - items: > + - const: amlogic,t7-dwmac > + - const: snps,dwmac-5.10a > + - const: snps,dwmac > > reg: > items: