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From: Andrew Lunn <andrew@lunn.ch>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: s.shtylyov@omp.ru, davem@davemloft.net, edumazet@google.com,
	kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Tam Nguyen <tam.nguyen.xa@renesas.com>,
	Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Subject: Re: [PATCH net v3] rswitch: Fix PHY station management clock setting
Date: Wed, 27 Sep 2023 14:43:46 +0200	[thread overview]
Message-ID: <c88ebcd5-614d-41ce-9f13-bc3c0e4920d7@lunn.ch> (raw)
In-Reply-To: <20230926123054.3976752-1-yoshihiro.shimoda.uh@renesas.com>

> +
> +	/* MPIC.PSMCS = (clk [MHz] / (MDC frequency [MHz] * 2) - 1.
> +	 * Calculating PSMCS value as MDC frequency = 2.5MHz. So, multiply
> +	 * both the numerator and the denominator by 10.
> +	 */
> +	etha->psmcs = clk_get_rate(priv->clk) / 100000 / (25 * 2) - 1;
>  }
>  
>  static int rswitch_device_alloc(struct rswitch_private *priv, int index)
> @@ -1900,6 +1907,10 @@ static int renesas_eth_sw_probe(struct platform_device *pdev)
>  		return -ENOMEM;
>  	spin_lock_init(&priv->lock);
>  
> +	priv->clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(priv->clk))
> +		return PTR_ERR(priv->clk);
> +

/**
 * clk_get_rate - obtain the current clock rate (in Hz) for a clock source.
 *		  This is only valid once the clock source has been enabled.
 * @clk: clock source
 */
unsigned long clk_get_rate(struct clk *clk);

I don't see the clock being enabled anywhere.

Also, is the clock documented in the device tree binding?

      Andrew

  reply	other threads:[~2023-09-27 12:43 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-26 12:30 [PATCH net v3] rswitch: Fix PHY station management clock setting Yoshihiro Shimoda
2023-09-27 12:43 ` Andrew Lunn [this message]
2023-09-28  2:13   ` Yoshihiro Shimoda
2023-09-28  7:32     ` Geert Uytterhoeven
2023-09-28  9:06       ` Yoshihiro Shimoda
2023-09-28 14:15 ` Andrew Lunn
2023-10-04  0:40 ` patchwork-bot+netdevbpf

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