From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org
Cc: Petr Oros <poros@redhat.com>,
Chris du Quesnay <Chris.duQuesnay@microchip.com>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jakub Kicinski <kuba@kernel.org>, Jiri Pirko <jiri@resnulli.us>,
Paolo Abeni <pabeni@redhat.com>,
Prathosh Satish <Prathosh.Satish@microchip.com>,
Richard Cochran <richardcochran@gmail.com>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v4 1/2] dpll: zl3073x: add channel ToD, phase step and TIE operations
Date: Thu, 6 Aug 2026 16:16:43 +0200 [thread overview]
Message-ID: <c8af201a-c610-42fe-8941-b90da2d13664@redhat.com> (raw)
In-Reply-To: <20260803140637.102339-2-ivecera@redhat.com>
Sashiko findings with replies...
> zl3073x_poll_zero_u8() hard-codes the interval:
>
> #define ZL_POLL_SLEEP_US 10
>
> so the new timeouts [...] all wait at a 10 us cadence. [...] giving on
> the order of 10^5 bus reads while waiting out a WR_NEXT_1HZ command
> [...]
> Would a millisecond-scale interval variant be preferable for these
> three cases, so the shared bus and the driver's monitor kworker are not
> starved for up to a second?
Good catch. I did some testing and found that even the existing
registers typically clear within low hundreds of iterations, so the
fixed 10 us sleep is already unnecessarily aggressive for all callers.
I will add a prep patch that replaces the fixed ZL_POLL_SLEEP_US with
timeout_us / 50 in zl3073x_poll_zero_u8(). This scales the sleep
interval proportionally to the timeout, targeting ~50 iterations
regardless of timeout magnitude:
- existing 30-50 ms timeouts: 600-1000 us sleep
- new 1000-3000 ms PTP timeouts: 20-60 ms sleep
> Can the tick-crossed branch skip the 20 ms rollover guard and shift the
> applied time by one second?
>
> The margin test is gated on !diff.tv_sec, so when the 1 Hz tick crossed
> between the two zl3073x_chan_tod_read() calls only the seconds get
fixed up
> and the remaining margin is never compared against threshold_ns [...]
Good point. Although this requires ~1 s delay between two consecutive
register reads (practically unreachable), the fix is clean and costs
nothing. I will restructure the guard to separate the tick-crossing
fixup from the margin check so both apply independently:
diff = timespec64_sub(ts_next, ts_cur);
if (diff.tv_sec < 0)
ts_next.tv_sec -= diff.tv_sec;
if (diff.tv_sec <= 0 && diff.tv_nsec < threshold_ns) {
fsleep((unsigned long)diff.tv_nsec / NSEC_PER_USEC + 1);
ts_next.tv_sec++;
}
Thanks,
Ivan
next prev parent reply other threads:[~2026-08-06 14:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 14:06 [PATCH net-next v4 0/2] dpll: zl3073x: add PTP clock support Ivan Vecera
2026-08-03 14:06 ` [PATCH net-next v4 1/2] dpll: zl3073x: add channel ToD, phase step and TIE operations Ivan Vecera
2026-08-04 23:07 ` Vadim Fedorenko
2026-08-05 9:48 ` Ivan Vecera
2026-08-05 10:03 ` Vadim Fedorenko
2026-08-05 10:46 ` Ivan Vecera
2026-08-06 14:16 ` Ivan Vecera [this message]
2026-08-03 14:06 ` [PATCH net-next v4 2/2] dpll: zl3073x: add PTP clock support Ivan Vecera
2026-08-06 14:26 ` Ivan Vecera
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