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Thu, 30 May 2024 07:13:48 -0700 Message-ID: Date: Thu, 30 May 2024 17:13:45 +0300 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v5 0/2] Introduce auxiliary bus IRQs sysfs From: Shay Drori To: Greg KH CC: , , , , , , , , , , References: <20240528091144.112829-1-shayd@nvidia.com> <2024052806-armadillo-mournful-6b23@gregkh> <3860d55b-d1d5-44b3-8089-aba93027dda5@nvidia.com> Content-Language: en-US In-Reply-To: <3860d55b-d1d5-44b3-8089-aba93027dda5@nvidia.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBD:EE_|SA1PR12MB8598:EE_ X-MS-Office365-Filtering-Correlation-Id: a1537940-7a6e-477b-0b8c-08dc80b2c8d8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|1800799015|376005|36860700004|7416005|82310400017; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 May 2024 14:14:13.9872 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a1537940-7a6e-477b-0b8c-08dc80b2c8d8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBD.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8598 Hi Greg, Did you get a chance to see my reply? Is it ok with you? I would like to submit the fixes that Parav/Przemek suggested if no further inputs. Thanks On 29/05/2024 9:19, Shay Drori wrote: > > > On 28/05/2024 20:57, Greg KH wrote: >> External email: Use caution opening links or attachments >> >> >> On Tue, May 28, 2024 at 12:11:42PM +0300, Shay Drory wrote: >>> Today, PCI PFs and VFs, which are anchored on the PCI bus, display their >>> IRQ information in the /msi_irqs/ sysfs files. PCI >>> subfunctions (SFs) are similar to PFs and VFs and these SFs are anchored >>> on the auxiliary bus. However, these PCI SFs lack such IRQ information >>> on the auxiliary bus, leaving users without visibility into which IRQs >>> are used by the SFs. This absence makes it impossible to debug >>> situations and to understand the source of interrupts/SFs for >>> performance tuning and debug. >> >> Wait, again, this feels wrong.  You should be able to walk back up the >> tree see the irq for the device, and vf, right?  Why would the value be >> different down in the aux device? > > > you are correct, the IRQs of the aux device are subset of the IRQs of > the parent device. more detailed answer bellow. > > >> Does the msi irq somehow not actually show anywhere for the real pci >> device in sysfs at all today? >> >> What does sysfs look like today exactly for this information? > > > The IRQ information of all the children SFs of a PF is found in the PF > device as one single list. > There is no sane way to distinguish which IRQ is used by which SFs. > For example, in a machine with a single child SF of the PF 00:0b.0 we > currently have the bellow: > $ ls /sys/bus/pci/devices/0000:00:0b.0/msi_irqs/ > 41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58 > > the above are IRQs of both the PF and its child SF. from here we cannot > tell which IRQ is used by the child SF. > > >> >> And what about /proc/irq/ and /proc/interrupts/ doesn't that show you >> the needed information?  Why are aux devices somehow "special" here? > > > /proc/interrupts interrupt name is some random driver choice. There is > no sane naming convention and some small few bytes of upper limit of > what the IRQ name. > >> >>> Additionally, the SFs are multifunctional devices supporting RDMA, >>> network devices, clocks, and more, similar to their peer PCI PFs and >>> VFs. Therefore, it is desirable to have SFs' IRQ information available >>> at the bus/device level. >> >> But it should be as part of the pci device, as that's where that >> information lives and is "bound" to, not the aux device on its own. > > > Auxiliary bus level SF device is using that IRQ too. So it is > additionally shown at auxiliary device level too. > > >> >>> To overcome the above limitations, this short series extends the >>> auxiliary bus to display IRQ information in sysfs, similar to that of >>> PFs and VFs. >> >> Again, examples of what it looks like today, and what it will look like >> with this patch set is needed in order to justify why this really is >> needed as it seems that the information should already be there for you. > > > full example: > in a machine with a single child SF of the PF 00:0b.0 we currently have > the bellow: > $ ls /sys/bus/pci/devices/0000:00:0b.0/msi_irqs/ > 41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58 > > with this patch-set we will also have: > $ ls /sys/bus/pci/devices/0000\:00\:0b.0/mlx5_core.sf.1/irqs/ > 50  51  52  53  54  55  56  57  58 > > which means that IRQs 50-58, which are shown on the PF "msi_irqs" are > used by the child SF. > > >> >>> It adds an 'irqs' directory under the auxiliary device and includes an >>> sysfs file within it. Sometimes, the PCI SF auxiliary devices >>> share the IRQ with other SFs, a detail that is also not available to the >>> users. Consequently, this file indicates whether the IRQ is >>> 'exclusive' or 'shared'.  This 'irqs' directory extenstion is optional, >>> i.e. only for PCI SFs the sysfs irq information is optionally exposed. >> >> Why does userspace care about "shared" or not?  What can they do with >> that, and why? > > > If IRQ is shared, userspace needs to take it into account when looking > at IRQ data and counters such as interrupts/sec. > Also, If IRQ is shared, user better not mess with the irq affinity of > such irq it as it can affect multiple SFs. > > >> >>> For example: >>> $ ls /sys/bus/auxiliary/devices/mlx5_core.sf.1/irqs/ >>> 50  51  52  53  54  55  56  57  58 >>> $ cat /sys/bus/auxiliary/devices/mlx5_core.sf.1/irqs/52 >>> exclusive >> >> "exclusive" for now, but again, why?  Who cares?  These are msi irqs it >> shouldn't matter if they are shared or not. > > hope I explained the current limitation and the proposed solution above > >> >> thanks, >> >> greg k-h >