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From: Jeremy Kerr <jk@codeconstruct.com.au>
To: David Laight <David.Laight@ACULAB.COM>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>,
	Matt Johnston <matt@codeconstruct.com.au>,
	Eugene Syromiatnikov <esyr@redhat.com>
Subject: Re: [PATCH net-next v6] mctp: Implement extended addressing
Date: Tue, 26 Oct 2021 19:34:16 +0800	[thread overview]
Message-ID: <cbf0fd9611c76e557b759ecbecf6bcf712b44f55.camel@codeconstruct.com.au> (raw)
In-Reply-To: <f5b11b52cf0644088a919fb2a1a07c18@AcuMS.aculab.com>

Hi David,

> > +struct sockaddr_mctp_ext {
> > +       struct sockaddr_mctp    smctp_base;
> > +       int                     smctp_ifindex;
> > +       __u8                    smctp_halen;
> > +       __u8                    __smctp_pad0[3];
> > +       __u8                    smctp_haddr[MAX_ADDR_LEN];
> > +};
> 
> You'd be better off 8-byte aligning smctp_haddr.
> I also suspect that always copying the 32 bytes will be faster
> and generate less code than the memset() + memcpy().

The padding here is more to avoid layout variations between ABIs
rather than performance.

The largest current hardware address size that we need (for the i2c
transport) is... 1 byte. If we were to implement the PCIe VDM binding
for MCTP that'd then be the largest, now at 2 bytes. If anyone's crazy
enough to do MCTP over ethernet, we're still only at 6.

So, we'll be a long way off needing to optimise for 8-byte aligned
accesses here; I don't think the extra padding would be worth it.

Cheers,


Jeremy


  reply	other threads:[~2021-10-26 11:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-26  1:57 [PATCH net-next v6] mctp: Implement extended addressing Jeremy Kerr
2021-10-26 10:45 ` David Laight
2021-10-26 11:34   ` Jeremy Kerr [this message]
2021-10-26 12:19   ` Eugene Syromiatnikov
2021-10-26 14:10 ` patchwork-bot+netdevbpf

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