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From: Florian Fainelli <f.fainelli@gmail.com>
To: "Daniel González Cabanelas" <dgcbueu@gmail.com>,
	"Heiner Kallweit" <hkallweit1@gmail.com>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	"Jakub Kicinski" <kuba@kernel.org>,
	gregkh@linuxfoundation.org, netdev@vger.kernel.org,
	"Álvaro Fernández Rojas" <noltari@gmail.com>
Subject: Re: [PATCH v2] bcm63xx_enet: fix internal phy IRQ assignment
Date: Fri, 26 Feb 2021 08:55:06 -0800	[thread overview]
Message-ID: <ccf012a3-9ab7-39d9-ed2a-465fe12e2233@gmail.com> (raw)
In-Reply-To: <CABwr4_s_w-0-rNVmjoHMy-b=vWcJSzSFOyvuJfu7TziBneOHBg@mail.gmail.com>



On 2/26/2021 8:14 AM, Daniel González Cabanelas wrote:
> I could update the BCM5365 phy_id in the downstream B53 driver to fix
> it and avoid any kind of future conflicts if the driver is upstreamed.
> Accordingly to documentation the whole BCM5365 UID (not masked) is
> 0x00406370.
> PHYID HIGH[15:0] = OUI[21:6]
> PHYID LOW[15:0] = OUI[5:0] + MODEL[5:0] + REV[3:0]
> 
> Right now the used mask is 0x1ffffc00. But if I understood correctly
> it is only required to mask the last 3 bits. This would reflect in the
> B53 driver:
> ---snip---
> /* BCM5365 */
> static struct phy_driver b53_phy_driver_id3 = {
> .phy_id = 0x00406370,
> .name = "Broadcom B53 (3)",
> .phy_id_mask = 0xfffffff8,,
> ----snip---
> 
> For the tested board, BCM6348, the UID is 0x00406240 (read by the
> kernel). But in this case its driver involves more SoCs/PHYs, maybe
> with different UIDs.

Or another way to solve this entirely is to move to the upstream DSA
driver for b53 under drivers/net/dsa/b53 and register the switch as a
mdio_device instead of as a phy_device.
-- 
Florian

  reply	other threads:[~2021-02-26 16:55 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-24 15:44 [PATCH v2] bcm63xx_enet: fix internal phy IRQ assignment Daniel González Cabanelas
2021-02-24 21:44 ` Heiner Kallweit
2021-02-24 22:01   ` Florian Fainelli
2021-02-24 23:54     ` Daniel González Cabanelas
2021-02-25  7:22       ` Heiner Kallweit
2021-02-25 16:36         ` Daniel González Cabanelas
2021-02-25 20:05           ` Heiner Kallweit
2021-02-25 22:28             ` Daniel González Cabanelas
2021-02-25 22:56               ` Heiner Kallweit
2021-02-26  4:12                 ` Florian Fainelli
2021-02-26  7:13               ` Heiner Kallweit
2021-02-26  9:10                 ` Daniel González Cabanelas
2021-02-26  9:32                   ` Heiner Kallweit
2021-02-26  9:38                     ` Heiner Kallweit
2021-02-26  9:49                     ` Daniel González Cabanelas
2021-02-26 10:08                       ` Heiner Kallweit
2021-02-26 10:19                         ` Daniel González Cabanelas
2021-02-26 14:16                           ` Andrew Lunn
2021-02-26 14:28                             ` Heiner Kallweit
2021-02-26 16:14                               ` Daniel González Cabanelas
2021-02-26 16:55                                 ` Florian Fainelli [this message]
2021-02-25 13:53 ` Andrew Lunn

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