From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F312B2FE592; Sat, 25 Oct 2025 14:47:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761403678; cv=none; b=O1Kcus1mEs5Yri5uJ/rvj+0N2D1FLS6BuLfkVTpmngCzeZgk8B3eLO5u3e2RXAC15OuMGvYnzMN1jQgzAZq9zbXdVjm+/Ksg8Z96lN6LOTy/HUqS1aEQ9q0YFKN/fx4wMshL9PzikMyKIW5IroC1YPn+vm9EuGkUC27diEstJ+E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761403678; c=relaxed/simple; bh=Z2U+UlJmcFRU7N0IWZTqK8xFrk6nySA5rXuF3XVbOUM=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=YkDaazy6fu1P0vboTfAl5ufLkBLWyMnn4XuGq2+6hwElPJZwf4X524yqThqgPC18VpJouNREZrja17/mNkvNIo/zFdG4okrfmVseOYVf8XtfHKil7Z7nRXMNdwsstVBJZVuhshTWGkVXw7GJcB7+9LUjcfAt0atggqx5POZ1ktY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98.2) (envelope-from ) id 1vCfYX-000000001ZZ-3rtP; Sat, 25 Oct 2025 14:47:46 +0000 Date: Sat, 25 Oct 2025 15:47:35 +0100 From: Daniel Golle To: Hauke Mehrtens , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Simon Horman , Russell King , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andreas Schirm , Lukas Stockmann , Alexander Sverdlin , Peter Christen , Avinash Jayaraman , Bing tao Xu , Liang Xu , Juraj Povazanec , "Fanni (Fang-Yi) Chan" , "Benny (Ying-Tsan) Weng" , "Livia M. Rosu" , John Crispin Subject: [PATCH net-next v2 00/13] net: dsa: lantiq_gswip: Add support for MaxLinear GSW1xx switch family Message-ID: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline This patch series extends the existing lantiq_gswip DSA driver to support the MaxLinear GSW1xx family of dedicated Ethernet switch ICs. These switches are based on the same IP as the Lantiq/Intel GSWIP found in VR9 and xRX MIPS router SoCs, but are connected via MDIO instead of memory-mapped I/O. The series includes several improvements and refactoring to prepare for the new hardware support. The GSW1xx family includes several variants: - GSW120: 4 ports, 2 PHYs, RGMII & SGMII/2500Base-X - GSW125: 4 ports, 2 PHYs, RGMII & SGMII/2500Base-X, industrial temperature - GSW140: 6 ports, 4 PHYs, RGMII & SGMII/2500Base-X - GSW141: 6 ports, 4 PHYs, RGMII & SGMII - GSW145: 6 ports, 4 PHYs, RGMII & SGMII/2500Base-X, industrial temperature Key features implemented: - MDIO-based register access using regmap - Support for SGMII/1000Base-X/2500Base-X SerDes interfaces - Configurable RGMII delays via device tree properties - Configurable RMII clock direction - Energy Efficient Ethernet (EEE) support - enabling/disabling learning Daniel Golle (13): net: dsa: lantiq_gswip: split into common and MMIO parts net: dsa: lantiq_gswip: support enable/disable learning net: dsa: lantiq_gswip: support Energy Efficient Ethernet net: dsa: lantiq_gswip: set link parameters also for CPU port net: dsa: lantiq_gswip: define and use GSWIP_TABLE_MAC_BRIDGE_VAL1_VALID dt-bindings: net: dsa: lantiq,gswip: add support for MII delay properties net: dsa: lantiq_gswip: allow adjusting MII delays dt-bindings: net: dsa: lantiq,gswip: add MaxLinear RMII refclk output property net: dsa: lantiq_gswip: add vendor property to setup MII refclk output dt-bindings: net: dsa: lantiq,gswip: add support for MaxLinear GSW1xx switches net: dsa: add tagging driver for MaxLinear GSW1xx switch family net: dsa: lantiq_gswip: add registers specific for MaxLinear GSW1xx net: dsa: add driver for MaxLinear GSW1xx switch family .../bindings/net/dsa/lantiq,gswip.yaml | 291 ++- MAINTAINERS | 3 +- drivers/net/dsa/lantiq/Kconfig | 18 +- drivers/net/dsa/lantiq/Makefile | 2 + drivers/net/dsa/lantiq/lantiq_gswip.c | 1617 +-------------- drivers/net/dsa/lantiq/lantiq_gswip.h | 128 ++ drivers/net/dsa/lantiq/lantiq_gswip_common.c | 1748 +++++++++++++++++ drivers/net/dsa/lantiq/mxl-gsw1xx.c | 680 +++++++ drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h | 154 ++ include/net/dsa.h | 2 + net/dsa/Kconfig | 8 + net/dsa/Makefile | 1 + net/dsa/tag_mxl-gsw1xx.c | 141 ++ 13 files changed, 3127 insertions(+), 1666 deletions(-) create mode 100644 drivers/net/dsa/lantiq/lantiq_gswip_common.c create mode 100644 drivers/net/dsa/lantiq/mxl-gsw1xx.c create mode 100644 drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h create mode 100644 net/dsa/tag_mxl-gsw1xx.c -- 2.51.0