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From: Heiner Kallweit <hkallweit1@gmail.com>
To: Markus Stockhausen <markus.stockhausen@gmx.de>,
	andrew@lunn.ch, linux@armlinux.org.uk, davem@davemloft.net,
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
	michael@fossekall.de, daniel@makrotopia.org,
	netdev@vger.kernel.org, jan@3e8.eu
Subject: Re: [PATCH v2] net: phy: realtek: convert RTL8226-CG to c45 only
Date: Thu, 31 Jul 2025 12:25:17 +0200	[thread overview]
Message-ID: <d0e1c087-f701-402e-b842-3444fbce7f27@gmail.com> (raw)
In-Reply-To: <20250731054445.580474-1-markus.stockhausen@gmx.de>

On 31.07.2025 07:44, Markus Stockhausen wrote:
> The RTL8226-CG can be found on devices like the Zyxel XGS1210-12. These
> are driven by a Realtek RTL9302B SoC that has phy hardware polling
> in the background. One must decide if a port is polled via c22 or c45.
> Additionally the hardware disables MMD access in c22 mode. For reference

For my understanding: Which hardware disables c22 MMD access on RTL8226 how?
RTL930x configures RTL8226 in a way that is doesn't accept c45 over c22
any longer?

> see mdio-realtek-rtl9300 driver. As this PHY is mostly used in Realtek
> switches Convert the phy to a c45-only function set.
> 
> Because of these limitations the RTL8226 is not working at all in the
> current switches. A "hacked" bus that toggles the mode for each c22/c45
> access was used to get a "before status". But that is slow and producec
> wrong results in the MAC polling status registers.
> 
> The RTL8226 seems to support proper MDIO_PMA_EXTABLE flags. So
> genphy_c45_pma_read_abilities() can conveniently call
> genphy_c45_pma_read_ext_abilities() and 10/100/1000 is populated right.
> 
> Outputs before:
> 
> Settings for lan9:
>         Supported ports: [ TP MII ]
>         Supported link modes:   10baseT/Half 10baseT/Full
>                                 100baseT/Half 100baseT/Full
>                                 1000baseT/Full
>                                 2500baseT/Full
>         Supported pause frame use: Symmetric Receive-only
>         Supports auto-negotiation: Yes
>         Supported FEC modes: Not reported
>         Advertised link modes:  10baseT/Half 10baseT/Full
>                                 100baseT/Half 100baseT/Full
>                                 1000baseT/Full
>                                 2500baseT/Full
>         Advertised pause frame use: Symmetric Receive-only
>         Advertised auto-negotiation: Yes
>         Advertised FEC modes: Not reported
>         Speed: Unknown!
>         Duplex: Unknown! (255)
>         Port: Twisted Pair
>         PHYAD: 24
>         Transceiver: external
>         Auto-negotiation: on
>         MDI-X: Unknown
>         Supports Wake-on: d
>         Wake-on: d
>         Link detected: no
> 
> Outputs with this commit:
> 
> Settings for lan9:
>         Supported ports: [ TP ]
>         Supported link modes:   10baseT/Half 10baseT/Full
>                                 100baseT/Half 100baseT/Full
>                                 1000baseT/Full
>                                 2500baseT/Full
>         Supported pause frame use: Symmetric Receive-only
>         Supports auto-negotiation: Yes
>         Supported FEC modes: Not reported
>         Advertised link modes:  10baseT/Half 10baseT/Full
>                                 100baseT/Half 100baseT/Full
>                                 1000baseT/Full
>                                 2500baseT/Full
>         Advertised pause frame use: Symmetric Receive-only
>         Advertised auto-negotiation: Yes
>         Advertised FEC modes: Not reported
>         Speed: Unknown!
>         Duplex: Unknown! (255)
>         Port: Twisted Pair
>         PHYAD: 24
>         Transceiver: external
>         Auto-negotiation: on
>         MDI-X: Unknown
>         Supports Wake-on: d
>         Wake-on: d
>         Link detected: no
> 
> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
> ---
> Changes in v2:
> - Added before/after status in commit message
> 
> ---
>  drivers/net/phy/realtek/realtek_main.c | 26 +++++++++++++++++++++-----
>  1 file changed, 21 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
> index dd0d675149ad..8bc68b31cd31 100644
> --- a/drivers/net/phy/realtek/realtek_main.c
> +++ b/drivers/net/phy/realtek/realtek_main.c
> @@ -1280,6 +1280,21 @@ static int rtl822x_c45_read_status(struct phy_device *phydev)
>  	return 0;
>  }
>  
> +static int rtl822x_c45_soft_reset(struct phy_device *phydev)
> +{
> +	int ret, val;
> +
> +	ret = phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1,
> +			     MDIO_CTRL1_RESET, MDIO_CTRL1_RESET);
> +	if (ret < 0)
> +		return ret;
> +
> +	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PMAPMD,
> +					 MDIO_CTRL1, val,
> +					 !(val & MDIO_CTRL1_RESET),
> +					 5000, 100000, true);
> +}
> +
>  static int rtl822xb_c45_read_status(struct phy_device *phydev)
>  {
>  	int ret;
> @@ -1675,11 +1690,12 @@ static struct phy_driver realtek_drvs[] = {
>  	}, {
>  		PHY_ID_MATCH_EXACT(0x001cc838),
>  		.name           = "RTL8226-CG 2.5Gbps PHY",
> -		.get_features   = rtl822x_get_features,
> -		.config_aneg    = rtl822x_config_aneg,
> -		.read_status    = rtl822x_read_status,
> -		.suspend        = genphy_suspend,
> -		.resume         = rtlgen_resume,
> +		.soft_reset     = rtl822x_c45_soft_reset,
> +		.get_features   = rtl822x_c45_get_features,
> +		.config_aneg    = rtl822x_c45_config_aneg,
> +		.read_status    = rtl822x_c45_read_status,
> +		.suspend        = genphy_c45_pma_suspend,
> +		.resume         = rtlgen_c45_resume,
>  		.read_page      = rtl821x_read_page,
>  		.write_page     = rtl821x_write_page,
>  	}, {


  parent reply	other threads:[~2025-07-31 10:23 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-31  5:44 [PATCH v2] net: phy: realtek: convert RTL8226-CG to c45 only Markus Stockhausen
2025-07-31  9:23 ` Daniel Golle
2025-07-31  9:58   ` AW: " markus.stockhausen
2025-07-31 10:25 ` Heiner Kallweit [this message]
2025-07-31 10:55   ` markus.stockhausen
2025-07-31 13:50     ` Andrew Lunn
2025-07-31 14:01     ` AW: " Russell King (Oracle)
2025-07-31 14:33       ` Daniel Golle

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