From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB41633B970; Fri, 1 May 2026 21:10:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777669810; cv=none; b=W4l3g98BZhpFsuZkCWSC9pIsq5h4lNVtd8XzJxun9loMx9P+T2wKfwbQjSe7CVfDp5/YP6XjWhsr0IUvA3h6h6gO6en9c3arfJLPz22UrRUW/C4+3Z6CS1wzlUqtC/HYbq7bn3G9qYx1KxqcKRg6FLYG6CK7CD3uFGYLCm7wFME= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777669810; c=relaxed/simple; bh=8vwhmEj1ds+lvlhOHDsrNte2bc84Sf4Msd33m0CUbiw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=nfsHYlbgEmUNQtDgZybhyNB7OSCeAQvVuEnFJ2IHoUDzoCMNwyZ3ybz+EdJrCKMZ7PpWos4QrJK8YNGqZU4hDwVpPwurxIJHaCKczhkuYczD5bbcp0t6NqE5io3tk0LF5Y3r1mh0Hk868C2cJLUJxEdaIu5VYCVPgK+oLfzNc+0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=xUyVgyn+; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="xUyVgyn+" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=Q1WDNy2/9CAn7cujUmO6Y0Cm1ZRbbJKZpfwhDTyXnnc=; b=xUyVgyn+KFmigzgExPt9syGNg2 j1OpZX2LVuu8qEROEXUxzbPv3wyWz3bnrsKHQIFyuE351Hu4MtghbJzcRUw6smI/8XbTrpe/Hr+1e H1NT4RvmdKXIK49XiS3zywAlhH119165VqO3SnxWD15RJ4We4KMUkyIjjlReH68UdZz4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1wIv7G-000sqS-0z; Fri, 01 May 2026 23:09:42 +0200 Date: Fri, 1 May 2026 23:09:42 +0200 From: Andrew Lunn To: Alex Elder Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, maxime.chevallier@bootlin.com, rmk+kernel@armlinux.org.uk, andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linusw@kernel.org, brgl@kernel.org, arnd@arndb.de, gregkh@linuxfoundation.org, Daniel Thompson , mohd.anwar@oss.qualcomm.com, a0987203069@gmail.com, alexandre.torgue@foss.st.com, ast@kernel.org, boon.khai.ng@altera.com, chenchuangyu@xiaomi.com, chenhuacai@kernel.org, daniel@iogearbox.net, hawk@kernel.org, hkallweit1@gmail.com, inochiama@gmail.com, john.fastabend@gmail.com, julianbraha@gmail.com, livelycarpet87@gmail.com, matthew.gerlach@altera.com, mcoquelin.stm32@gmail.com, me@ziyao.cc, prabhakar.mahadev-lad.rj@bp.renesas.com, richardcochran@gmail.com, rohan.g.thomas@altera.com, sdf@fomichev.me, siyanteng@cqsoftware.com.cn, weishangjuan@eswincomputing.com, wens@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 12/12] arm64: dts: qcom: qcs6490-rb3gen2: enable TC9564 with a single QCS8081 phy Message-ID: References: <20260501155421.3329862-1-elder@riscstar.com> <20260501155421.3329862-13-elder@riscstar.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260501155421.3329862-13-elder@riscstar.com> > + tc956x_emac1_phy: ethernet-phy@1c { > + compatible = "ethernet-phy-id004d.d101"; > + reg = <0x1c>; > + reset-gpios = <&tc956x_emac0 1 GPIO_ACTIVE_LOW>; > + reset-assert-us = <20>; > + reset-deassert-us = <20>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&qep_irq_pin>; > + interrupts-extended = <&tlmm 101 IRQ_TYPE_EDGE_FALLING>; What is probably wrong. PHY interrupts are level, not edge. Andrew