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[124.218.201.66]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29498cf359asm153773295ad.12.2025.10.29.08.41.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Oct 2025 08:41:22 -0700 (PDT) Message-ID: Date: Wed, 29 Oct 2025 23:41:14 +0800 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 12/15] arm64: dts: mediatek: mt7981b-openwrt-one: Enable Ethernet To: Sjoerd Simons , Eric Woudstra , Andrew Lunn Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Lee Jones , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lorenzo Bianconi , Felix Fietkau , kernel@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, netdev@vger.kernel.org, Daniel Golle , Bryan Hinton , albert-al.lee@airoha.com References: <20251016-openwrt-one-network-v1-0-de259719b6f2@collabora.com> <20251016-openwrt-one-network-v1-12-de259719b6f2@collabora.com> <4f82aa17-1bf8-4d72-bc1f-b32f364e1cf6@lunn.ch> <8f5335a703905dea9d8d0c1840862a3478da1ca7.camel@collabora.com> <05610ae5-4a8a-47e9-808b-7ff98fade78e@gmail.com> <408842eda1caa53247ff759cd9ea75dcab624594.camel@collabora.com> Content-Language: en-US From: "Lucien.Jheng" In-Reply-To: <408842eda1caa53247ff759cd9ea75dcab624594.camel@collabora.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Sjoerd Simons 於 2025/10/28 下午 09:24 寫道: > On Tue, 2025-10-28 at 12:14 +0100, Eric Woudstra wrote: >> >> On 10/21/25 10:21 PM, Sjoerd Simons wrote: >>> On Fri, 2025-10-17 at 19:31 +0200, Andrew Lunn wrote: >>>>> +&mdio_bus { >>>>> + phy15: ethernet-phy@f { >>>>> + compatible = "ethernet-phy-id03a2.a411"; >>>>> + reg = <0xf>; >>>>> + interrupt-parent = <&pio>; >>>>> + interrupts = <38 IRQ_TYPE_EDGE_FALLING>; >>>> This is probably wrong. PHY interrupts are generally level, not edge. >>> Sadly i can't find a datasheet for the PHY, so can't really validate that >>> easily. Maybe Eric can >>> comment here as the author of the relevant PHY driver. >>> >>> I'd note that the mt7986a-bananapi-bpi-r3-mini dts has the same setup for >>> this PHY, however that's >>> ofcourse not authoritative. >>> >> Lucien would have access to the correct information about the interrupt. > Thanks! For what it's worth i got around to putting a scope on the line last > night. It looks like the interrupt line is pulled down until cleared, so it > appears it's indeed a Level interrupt as Andrew guessed. But would be great to > have this confirmed based on the documentation :) The Airoha EN8811H Interrupt behavior is as follows: When the line side link changes (up→ down or down → up), GPIO 8 will output low. After you clear the interrupt, GPIO 8 will go high. Regarding the documentation, let me check where I can put it. If you have any questions about the EN8811H, please feel free to discuss with me.