From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Steven J. Hill" <shill@caviumnetworks.com>
Subject: Re: [PATCH v12 01/10] dt-bindings: Add Cavium Octeon Common Ethernet
 Interface.
Date: Fri, 6 Jul 2018 17:10:39 -0500
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        Chandrakala Chavva <cchavva@caviumnetworks.com>
To: Andrew Lunn <andrew@lunn.ch>
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On 06/28/2018 03:35 AM, Andrew Lunn wrote:
> 
>> +- cavium,rx-clk-delay-bypass: Set to <1> to bypass the rx clock delay setting.
>> +  Needed by the Micrel PHY.
> 
> Could you explain this some more. Is it anything to do with RGMII delays?
> 
Andrew,

One of my colleagues tracked this down for me. This device tree option is in place
because there are several different ways to do the clock and data with respect to
RGMII. This controls the delay introduced for the RX clock with respect to the data.
Without this, RX will not work with Micrel PHYs. Thanks.

Steve