From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiner Kallweit Subject: r8169: changed rx buffer alignment requirement Date: Sun, 21 Oct 2018 11:02:58 +0200 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Cc: "netdev@vger.kernel.org" To: Eric Dumazet Return-path: Received: from mail-wr1-f50.google.com ([209.85.221.50]:33654 "EHLO mail-wr1-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726980AbeJURQp (ORCPT ); Sun, 21 Oct 2018 13:16:45 -0400 Received: by mail-wr1-f50.google.com with SMTP id u1-v6so5838268wrn.0 for ; Sun, 21 Oct 2018 02:03:07 -0700 (PDT) Content-Language: en-US Sender: netdev-owner@vger.kernel.org List-ID: Hi Eric, when working on the r8169 driver I came across an old patch from you: 6f0333b8fde4 ("r8169: use 50% less ram for RX ring") As part of this patch the alignment requirement for rx buffers was silently changed from 8 to 16 bytes. Can you remember (well, after eight years) why you did this? In the chip datasheet I find only 8 bytes mentioned as requirement. Regards, Heiner