From: Andrew Lunn <andrew@lunn.ch>
To: lizhi2@eswincomputing.com
Cc: devicetree@vger.kernel.org, andrew+netdev@lunn.ch,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
netdev@vger.kernel.org, pabeni@redhat.com,
mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
rmk+kernel@armlinux.org.uk, pjw@kernel.org, palmer@dabbelt.com,
aou@eecs.berkeley.edu, alex@ghiti.fr,
linux-riscv@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, maxime.chevallier@bootlin.com,
ningyu@eswincomputing.com, linmin@eswincomputing.com,
pinkesh.vaghela@einfochips.com, pritesh.patel@einfochips.com,
weishangjuan@eswincomputing.com, horms@kernel.org
Subject: Re: [PATCH net-next v7 4/4] riscv: dts: eswin: eic7700-hifive-premier-p550: enable Ethernet controller
Date: Wed, 29 Apr 2026 03:41:53 +0200 [thread overview]
Message-ID: <d662fa07-cd0f-48c4-a6e4-03c5fd390e92@lunn.ch> (raw)
In-Reply-To: <20260427072603.1191-1-lizhi2@eswincomputing.com>
> +&gmac1 {
> + phy-handle = <&gmac1_phy0>;
> + /*
> + * For the TX path of gmac1, there is a skew between the TX clock
> + * and data on the MAC controller inside the silicon. This skew happens
> + * to be approximately 2 ns. Therefore, it can be considered that the
> + * 2 ns delay of TX is provided by the MAC.
> + * No delay configuration for tx is needed in software via PHY driver.
> + */
> + phy-mode = "rgmii-rxid";
This is wrong. Take a read of
https://elixir.bootlin.com/linux/v6.15/source/Documentation/devicetree/bindings/net/ethernet-controller.yaml#L287
phy-mode describes the board. If the board provides the 2ns delay, you
use rgmii. If the MAC/PHY pair needs to provide the delay, you using
rgmii-id.
If rgmii-id is used, it is up to the MAC/PHY to decide which will add
the delay. If the MAC adds the delay, it needs to mask the value of
phy-mode it passes to the PHY so it does not also add the delay.
Your broken hardware means you cannot support 'rgmii' or 'rgmii-rx',
since you cannot turn off this 2ns delay, so you end up with double
delays if anybody designs a board with 2ns TX delay on the board
itself. So please validate the PHY modes and return -EINVAL if these
modes are used.
Andrew
---
pw-bot: cr
next prev parent reply other threads:[~2026-04-29 1:42 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-27 7:23 [PATCH net-next v7 0/4] net: stmmac: eic7700: fix EIC7700 eth1 RX sampling timing lizhi2
2026-04-27 7:24 ` [PATCH net-next v7 1/4] dt-bindings: ethernet: eswin: add clock sampling control lizhi2
2026-04-29 1:28 ` Andrew Lunn
2026-04-27 7:25 ` [PATCH net-next v7 2/4] net: stmmac: eic7700: enable clocks before syscon access and correct RX sampling timing lizhi2
2026-04-29 1:06 ` Jakub Kicinski
2026-04-30 6:43 ` 李志
2026-04-27 7:25 ` [PATCH net-next v7 3/4] dt-bindings: mfd: syscon: add ESWIN EIC7700 compatible lizhi2
2026-04-27 19:05 ` Conor Dooley
2026-04-27 7:26 ` [PATCH net-next v7 4/4] riscv: dts: eswin: eic7700-hifive-premier-p550: enable Ethernet controller lizhi2
2026-04-29 1:41 ` Andrew Lunn [this message]
2026-04-30 7:05 ` 李志
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