From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B414E36B; Wed, 23 Oct 2024 01:09:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729645753; cv=none; b=kPAz/0ShztyyubLHxEIiP/N/gOVwenzDMOrL3YQos6LD4sZpo01opfE5PmHtjWuJLJWyOZSHPqmDtIsWS7+WP9xUi9FDQ0/F4dbHh9vsE9Uqzmm/4POPj3Gk38hM2wwDqJkerm6zW2mkzw9arq2HrOwQQsKkOKwwqKm8x2UAaxc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729645753; c=relaxed/simple; bh=eUyRW2nq2PM2+wK4ivE581lNhZuoS/1YaFjB9OcUsR0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=eB+nL9Z5rdqLT/GMRKnyCOn+8LJ6WrSAOgfc/2xdwsC2ZkSjiaQXbSSlEPMd2SdxKNb0PpG268/F9tho/zVDUO8k56OC+yDos+f4fMfgIEVmwghtk7Z3b06FCZvKJ/qwpeusB+EnZHhU0EeY7VUzqSYnLSD5LQSmWPN6DBYBlRo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=aEgBdFd7; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="aEgBdFd7" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=Luc414sqlYd9r0hDusrFOUlGPmShpMBsFYhEzzPbPG8=; b=aEgBdFd7EvMykDpVG1QVfh49KR 5u9QFtmR4J7sflyt1GIeWIFboSZRFtINEdsb08ZeGtSJbNlinAimtn8fpFRuP3MWjkp38q1HWNocG h8ynoSuwrb9LfOGoX/pw869W4udzciX9gh/6NHwhIGv5REsP6umt77XbQWTKsum6FfR8=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1t3Pro-00AtuF-B7; Wed, 23 Oct 2024 03:08:52 +0200 Date: Wed, 23 Oct 2024 03:08:52 +0200 From: Andrew Lunn To: Inochi Amaoto Cc: Chen Wang , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Inochi Amaoto , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Paul Walmsley , Palmer Dabbelt , Albert Ou , Giuseppe Cavallaro , Yixun Lan , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH 4/4] net: stmmac: Add glue layer for Sophgo SG2044 SoC Message-ID: References: <20241021103617.653386-1-inochiama@gmail.com> <20241021103617.653386-5-inochiama@gmail.com> <227daa87-1924-4b0b-80db-77507fc20f19@lunn.ch> <65720a16-d165-4379-a01f-54340fb907df@lunn.ch> <424erlm55tuorjvs2xgmanzpximvey22ufhzf3fli7trpimxih@st4yz53hpzzr> <66f35d1b-fd26-429b-bbf9-d03ed0c1edaf@lunn.ch> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Oct 23, 2024 at 08:41:36AM +0800, Inochi Amaoto wrote: > On Tue, Oct 22, 2024 at 03:51:08PM +0200, Andrew Lunn wrote: > > On Tue, Oct 22, 2024 at 06:21:49PM +0800, Inochi Amaoto wrote: > > > On Mon, Oct 21, 2024 at 03:27:18PM +0200, Andrew Lunn wrote: > > > > > It is related to the RGMII delay. On sg2044, when the phy > > > > > sets rx-delay, the interal mac is not set the same delay, > > > > > so this is needed to be set. > > > > > > > > This is the wrong way to do it. Please look at how phy-mode should be > > > > used, the four different "rgmii" values. Nearly everybody gets this > > > > wrong, so there are plenty of emails from me in the netdev list about > > > > how it should be done. > > > > > > > > > > The phy-mode is alreay set to the "rgmii-id" and a rx delay is already > > > set (a default tx delay is set by the phy driver). In the scenario > > > the extra bit is used to fix 2ns difference between the sampling clock > > > and data. It is more like an extra setting and the kernel can not handle > > > it by only setting the phy-mode. > > > > This sounds wrong. > > > > So in DT you have rgmii-id? You say the PHY is doing TX delay. So you > > pass PHY_INTERFACE_MODE_RGMII_TXID to the PHY? It is not clear from > > this patch, i don't see any code mentioning > > PHY_INTERFACE_MODE_RGMII_TXID. Could you point me at that code. > > > > Andrew > > The phy on the board I have is YT8531, The config code is here: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/motorcomm.c#n868 This PHY should be able to do rgmii-id, so there is no need for the MAC to add delays. We encourage that setup in linux, so all RGMII MAC/PHY pairs are the same, the PHY add the delays. Andrew