From: Tariq Toukan <ttoukan.linux@gmail.com>
To: Paolo Abeni <pabeni@redhat.com>,
Will Mortensen <will@extrahop.com>,
netdev@vger.kernel.org
Cc: Charlotte Tan <charlotte@extrahop.com>,
Adham Faris <afaris@nvidia.com>, Aya Levin <ayal@nvidia.com>,
Tariq Toukan <tariqt@nvidia.com>,
Moshe Shemesh <moshe@nvidia.com>,
Saeed Mahameed <saeedm@nvidia.com>
Subject: Re: [PATCH] net/mlx5e: Again mutually exclude RX-FCS and RX-port-timestamp
Date: Tue, 10 Oct 2023 13:50:05 +0300 [thread overview]
Message-ID: <d9eea2bd-2f82-42b5-995e-931ef3edd0b8@gmail.com> (raw)
In-Reply-To: <c1ef9288a88a6354292fa04dc713a5d5cd2d6936.camel@redhat.com>
On 10/10/2023 11:52, Paolo Abeni wrote:
> On Tue, 2023-10-10 at 09:31 +0300, Tariq Toukan wrote:
>>
>> On 06/10/2023 8:37, Will Mortensen wrote:
>>> Commit 1e66220948df8 ("net/mlx5e: Update rx ring hw mtu upon each rx-fcs
>>> flag change") seems to have accidentally inverted the logic added in
>>> commit 0bc73ad46a76 ("net/mlx5e: Mutually exclude RX-FCS and
>>> RX-port-timestamp").
>>>
>>> The impact of this is a little unclear since it seems the FCS scattered
>>> with RX-FCS is (usually?) correct regardless.
>>>
>>
>> Thanks for your patch.
>>
>>> Fixes: 1e66220948df8 ("net/mlx5e: Update rx ring hw mtu upon each rx-fcs flag change")
>>> Tested-by: Charlotte Tan <charlotte@extrahop.com>
>>> Reviewed-by: Charlotte Tan <charlotte@extrahop.com>
>>> Cc: Adham Faris <afaris@nvidia.com>
>>> Cc: Aya Levin <ayal@nvidia.com>
>>> Cc: Tariq Toukan <tariqt@nvidia.com>
>>> Cc: Moshe Shemesh <moshe@nvidia.com>
>>> Cc: Saeed Mahameed <saeedm@nvidia.com>
>>> Signed-off-by: Will Mortensen <will@extrahop.com>
>>> ---
>>> For what it's worth, regardless of this change the PCMR register behaves
>>> unexpectedly in our testing on NICs where rx_ts_over_crc_cap is 1 (i.e.
>>> where rx_ts_over_crc is supported), such as ConnectX-7 running firmware
>>> 28.37.1014. For example, fcs_chk is always 0, and rx_ts_over_crc can
>>> never be set to 1 after being set to 0. On ConnectX-5, where
>>> rx_ts_over_crc_cap is 0, fcs_chk behaves as expected.
>>>
>>> We'll probably be opening a support case about that after we test more,
>>> but I mention it here because it makes FCS-related testing confusing.
>>>
>>
>> Please open the case and we'll analyze.
>>
>>> drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
>>> index a2ae791538ed..acb40770cf0c 100644
>>> --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
>>> +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
>>> @@ -3952,13 +3952,14 @@ static int set_feature_rx_fcs(struct net_device *netdev, bool enable)
>>> struct mlx5e_channels *chs = &priv->channels;
>>> struct mlx5e_params new_params;
>>> int err;
>>> + bool rx_ts_over_crc = !enable;
>>
>> nit: Please maintain the reserved Christmas tree.
>>
>>>
>>> mutex_lock(&priv->state_lock);
>>>
>>> new_params = chs->params;
>>> new_params.scatter_fcs_en = enable;
>>> err = mlx5e_safe_switch_params(priv, &new_params, mlx5e_set_rx_port_ts_wrap,
>>> - &new_params.scatter_fcs_en, true);
>>> + &rx_ts_over_crc, true);
>>> mutex_unlock(&priv->state_lock);
>>> return err;
>>> }
>>
>> Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
>
> @Tariq: do you prefer we will take this patch directly, or do you
> prefer send it with a later PR?
>
> Thanks,
>
> Paolo
>
Please take it.
Thanks,
Tariq
next prev parent reply other threads:[~2023-10-10 10:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-06 5:37 [PATCH] net/mlx5e: Again mutually exclude RX-FCS and RX-port-timestamp Will Mortensen
2023-10-10 6:31 ` Tariq Toukan
2023-10-10 8:52 ` Paolo Abeni
2023-10-10 10:50 ` Tariq Toukan [this message]
2023-10-10 13:30 ` patchwork-bot+netdevbpf
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