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From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Gavin Gao <attinagaoxu@gmail.com>,
	andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
	kuba@kernel.org, pabeni@redhat.com, heiko@sntech.de
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
	richardcochran@gmail.com, nicolas.frattaroli@collabora.com,
	sebastian.reichel@collabora.com, sashal@kernel.org,
	alchark@gmail.com, chaoyi.chen@rock-chips.com,
	amadeus@jmu.edu.cn, rmk+kernel@armlinux.org.uk, horms@kernel.org,
	alok.a.tiwari@oracle.com, david.wu@rock-chips.com,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH net-next 0/3] net: stmmac: dwmac-rk: add RK3576 GMAC 25M refout support
Date: Mon, 27 Jul 2026 09:10:55 +0200	[thread overview]
Message-ID: <dae67c46-62b6-4233-92fc-69a09944baa5@bootlin.com> (raw)
In-Reply-To: <20260727021048.3375444-1-attinagaoxu@gmail.com>

Hi,

On 7/27/26 04:10, Gavin Gao wrote:
> Hi,
> 
> Some Rockchip GMAC instances can provide a 25 MHz reference clock output
> for an external RGMII PHY. Boards already describe the MAC clock direction
> with clock_in_out = "output", but the dwmac-rk driver does not currently
> request or enable the corresponding 25 MHz reference output clock.
> 
> On RK3576, this means the REFCLKO25M_GMACx_OUT clock may be disabled by
> the common clock framework as unused, even though the board expects the
> GMAC block to provide the PHY reference clock.
> 
> This series adds an optional "clk_mac_25m_refout" clock name to the
> Rockchip DWMAC binding, wires it up for RK3576 GMAC0/GMAC1, and enables
> it from the dwmac-rk driver when the MAC is configured for RGMII output
> clock mode.
> 
> The clock remains optional, so existing device trees and SoCs are not
> affected.
> 
> Tested on a PicoCOM RK3576 ACP board with a Motorcomm YT8521 PHY.
> The GMAC 25 MHz reference clock output remains active and Ethernet works.

I have a feeling this is using the common clock framework backwards. The
MAC in this case is a clock provider yet it uses the consumer API.

Shouldn't the MAC instead register a new clock, as a provider, for the ref
out ? The PHY device would then need to get/prepare/enable that clock.

I know we don't have a lot of clock providers in drivers/net/ethernet, but
I think we should have more...

Maxime

  parent reply	other threads:[~2026-07-27  7:11 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-27  2:10 [PATCH net-next 0/3] net: stmmac: dwmac-rk: add RK3576 GMAC 25M refout support Gavin Gao
2026-07-27  2:10 ` [PATCH net-next 1/3] dt-bindings: net: rockchip-dwmac: Add 25M refout clock Gavin Gao
2026-07-27  2:10 ` [PATCH net-next 2/3] arm64: dts: rockchip: Add RK3576 GMAC 25M refout clocks Gavin Gao
2026-07-27  2:10 ` [PATCH net-next 3/3] net: stmmac: dwmac-rk: Enable RGMII 25M refout clock Gavin Gao
2026-07-27  7:10 ` Maxime Chevallier [this message]
2026-07-27  7:19   ` [PATCH net-next 0/3] net: stmmac: dwmac-rk: add RK3576 GMAC 25M refout support Alexey Charkov
2026-07-27  7:14 ` Alexey Charkov
2026-07-27  7:21   ` Chaoyi Chen
2026-07-27  7:41 ` Jiaxing Hu

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