From: Jacob Keller <jacob.e.keller@intel.com>
To: Przemyslaw Korba <przemyslaw.korba@intel.com>,
<intel-wired-lan@lists.osuosl.org>
Cc: <netdev@vger.kernel.org>, <anthony.l.nguyen@intel.com>,
<przemyslaw.kitszel@intel.com>
Subject: Re: [Intel-wired-lan] [PATCH iwl-net v2] ice: fix posted write support for sideband queue operations
Date: Wed, 25 Mar 2026 16:42:17 -0700 [thread overview]
Message-ID: <dbe4af5f-b8c6-4abe-bd55-8f970e18add9@intel.com> (raw)
In-Reply-To: <20260319111659.551039-1-przemyslaw.korba@intel.com>
On 3/19/2026 4:13 AM, Przemyslaw Korba wrote:
> On E830, PTP time adjustment commands sent via
> SBQ don't generate completion responses, causing the driver to
> timeout waiting and return -EIO, when trying:
>
Hm. Is this really for E830? I didn't realize that device actually
sends SBQ commands for PTP?
According to ice_ptp_adj_clock for E830, it says "E830 sync PHYs
automatically after setting GLTSYN_SHADJ".
Did you mean E825-C here? Can you confirm the device type affected? Or
am I missing something?
> phc_ctl eth8 get adj 2 get
> dmesg: ice 0000:1a:00.0: PTP failed to adjust time, err -5
>
> Add support for posted mode not to wait for completion response.
>
> Fixes: 8f5ee3c477a8 ("ice: add support for sideband messages")
> Signed-off-by: Przemyslaw Korba <przemyslaw.korba@intel.com>
> ---
> v2:
> - change "postpone" to "posted"
> - init struct with {} instead of {0}
> v1:
> https://lore.kernel.org/intel-wired-lan/20260310110700.345904-1-przemyslaw.korba@intel.com/
>
> drivers/net/ethernet/intel/ice/ice_common.c | 7 ++++++-
> drivers/net/ethernet/intel/ice/ice_controlq.c | 4 ++++
> drivers/net/ethernet/intel/ice/ice_controlq.h | 1 +
> 3 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c
> index 8866902efb91..c89c6ca1281b 100644
> --- a/drivers/net/ethernet/intel/ice/ice_common.c
> +++ b/drivers/net/ethernet/intel/ice/ice_common.c
> @@ -1765,6 +1765,7 @@ int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in, u16 flags)
> {
This affects the ice_sbq_rw_reg function which is used by several
variants including the E822 devices, E825-C with ETH56G, and even E810
devices.
Do all these devices not provide completion? Or do we simply not care
about waiting?
I don't see a single call to ice_sbq_rw_reg for E830, so I suspect this
is correct but for a different device, and the commit message is just a
typo?
> struct ice_sbq_cmd_desc desc = {0};
> struct ice_sbq_msg_req msg = {0};
> + struct ice_sq_cd cd = {};
> u16 msg_len;
> int status;
>
> @@ -1785,10 +1786,14 @@ int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in, u16 flags)
> */
> msg_len -= sizeof(msg.data);
>
> + if (in->opcode == ice_sbq_msg_wr)
> + cd.posted = 1;
> +
> desc.flags = cpu_to_le16(flags);
> desc.opcode = cpu_to_le16(ice_sbq_opc_neigh_dev_req);
> desc.param0.cmd_len = cpu_to_le16(msg_len);
> - status = ice_sbq_send_cmd(hw, &desc, &msg, msg_len, NULL);
> + status = ice_sbq_send_cmd(hw, &desc, &msg, msg_len, &cd);
> +
> if (!status && !in->opcode)
> in->data = le32_to_cpu
> (((struct ice_sbq_msg_cmpl *)&msg)->data);
> diff --git a/drivers/net/ethernet/intel/ice/ice_controlq.c b/drivers/net/ethernet/intel/ice/ice_controlq.c
> index dcb837cadd18..a6008dc77fa4 100644
> --- a/drivers/net/ethernet/intel/ice/ice_controlq.c
> +++ b/drivers/net/ethernet/intel/ice/ice_controlq.c
> @@ -1086,6 +1086,10 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
> wr32(hw, cq->sq.tail, cq->sq.next_to_use);
> ice_flush(hw);
>
> + /* If the message is posted, don't wait for completion. */
> + if (cd && cd->posted)
> + goto sq_send_command_error;
> +
> /* Wait for the command to complete. If it finishes within the
> * timeout, copy the descriptor back to temp.
> */
> diff --git a/drivers/net/ethernet/intel/ice/ice_controlq.h b/drivers/net/ethernet/intel/ice/ice_controlq.h
> index 788040dd662e..c50d6fcbacba 100644
> --- a/drivers/net/ethernet/intel/ice/ice_controlq.h
> +++ b/drivers/net/ethernet/intel/ice/ice_controlq.h
> @@ -77,6 +77,7 @@ struct ice_ctl_q_ring {
> /* sq transaction details */
> struct ice_sq_cd {
> struct libie_aq_desc *wb_desc;
> + u8 posted : 1;
> };
>
> /* rq event information */
>
> base-commit: acd2abc52dea91c3bc3d1b6dd8a92b9631d48bbf
prev parent reply other threads:[~2026-03-25 23:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-19 11:13 [PATCH iwl-net v2] ice: fix posted write support for sideband queue operations Przemyslaw Korba
2026-03-19 11:25 ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-03-20 16:44 ` Simon Horman
2026-03-25 3:09 ` [Intel-wired-lan] " Rinitha, SX
2026-03-25 23:42 ` Jacob Keller [this message]
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