Re: [PATCH v2 4/4] sfc: add multipf support

["Lucero Palau, Alejandro" <alejandro.lucero-palau@amd.com>]

On 01/10/2026 23:32, Dave Jiang wrote:
>
> On 10/1/26 6:20 AM, alucerop@amd.com wrote:
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Use CXL core accelerator API for linking a non-PF0 PF to the CXL region
>> its related PF0 CXL memdev is attached to, allowing non-PF0 PF release if
>> such a CXL region is released itself. This can occur in different
>> scenarios like PF0 release or CXL memdev release.
>>
>> Obtain the CXL HPA region to work with and the ioremap based on such
>> HPA and an offset based on the PF index.
>>
>> Refactor CXL initialization with different code paths for PF0 and non
>> PF0 PFs.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> ---
>>   drivers/net/ethernet/sfc/efx_cxl.c | 100 ++++++++++++++++++++++++++---
>>   1 file changed, 91 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> index 348d7404cd7a..f884580cb528 100644
>> --- a/drivers/net/ethernet/sfc/efx_cxl.c
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -13,8 +13,69 @@
>>   #include "efx_cxl.h"
>>   
>>   #define EFX_CTPIO_BUFFER_SIZE	SZ_256M
>> +#define EFX_CTPIO_BUFFER_PER_PF_SIZE	SZ_8M
>>   
>> -int efx_cxl_init(struct efx_probe_data *probe_data)
>> +static int cxl_map(struct efx_probe_data *probe_data, struct efx_cxl *cxl,
>> +		   u64 devfn, struct range cxl_pio_range)
>> +{
>> +	struct efx_nic *efx = &probe_data->efx;
>> +	struct pci_dev *pci_dev = efx->pci_dev;
>> +	u64 cxl_pio_pf_start;
>> +
>> +	cxl_pio_pf_start = cxl_pio_range.start +
>> +			   devfn * EFX_CTPIO_BUFFER_PER_PF_SIZE;
>> +
>> +	cxl->ctpio_cxl = ioremap_wc(cxl_pio_pf_start,
>> +				    EFX_CTPIO_BUFFER_PER_PF_SIZE);
>> +	if (!cxl->ctpio_cxl) {
>> +		pci_err(pci_dev, "CXL ioremap region (%pra) failed\n",
>> +			&cxl_pio_range);
>> +		return -ENOMEM;
>> +	}
>> +	return 0;
>> +}
>> +
>> +static int efx_cxl_non_pf0_init(struct efx_probe_data *probe_data)
>> +{
>> +	struct efx_nic *efx = &probe_data->efx;
>> +	struct pci_dev *pci_dev = efx->pci_dev;
>> +	struct range cxl_pio_range;
>> +	struct efx_cxl *cxl;
>> +	u64 devfn;
>> +
>> +	devfn = PCI_FUNC(pci_dev->devfn);
> I think you will want to use pci_dev->devfn directly. If you do this, devfn is 2:0 and PCI_SLOT() will evaluate to 0.


Uhmmm, I think with the refactoring I'm not using devfn properly here. 
Let me study this further.


> Also, does this device need to handle ARI?


Not for sfc devices.


>> +
>> +	struct pci_dev *pf0_pci_dev __free(pci_dev_put) =
>> +		pci_get_slot(pci_dev->bus, PCI_DEVFN(PCI_SLOT(devfn), 0));
>> +
>> +	/* This should not happen! */
>> +	if (!pf0_pci_dev)
>> +		return 0;
>> +
>> +	/* Is the PF0 device configured with and using CXL? */
>> +	if (!pcie_is_cxl(pf0_pci_dev))
>> +		return 0;
>> +
>> +	if (!cxl_get_range_and_link(&pf0_pci_dev->dev, &pci_dev->dev,
>> +				    &cxl_pio_range))
> Is this error check inverted?


Yes. I'll fix it.


Thanks!


> DJ
>
>> +		return  -EPROBE_DEFER;
>> +
>> +	cxl = kzalloc_obj(*cxl, GFP_KERNEL);
>> +	if (!cxl)
>> +		return -ENOMEM;
>> +
>> +	if (cxl_map(probe_data, cxl, (u64)devfn, cxl_pio_range)) {
>> +		kfree(cxl);
>> +		return -ENOMEM;
>> +	}
>> +
>> +	probe_data->cxl = cxl;
>> +	probe_data->cxl_pio_initialised = true;
>> +
>> +	return 0;
>> +}
>> +
>> +static int efx_cxl_pf0_init(struct efx_probe_data *probe_data)
>>   {
>>   	struct efx_nic *efx = &probe_data->efx;
>>   	struct pci_dev *pci_dev = efx->pci_dev;
>> @@ -80,26 +141,47 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
>>   		return PTR_ERR(cxl->cxlmd);
>>   	}
>>   
>> -	cxl->ctpio_cxl = ioremap_wc(cxl_pio_range.start,
>> -				    range_len(&cxl_pio_range));
>> -	if (!cxl->ctpio_cxl) {
>> -		pci_err(pci_dev, "CXL ioremap region (%pra) failed\n",
>> -			&cxl_pio_range);
>> +	if (cxl_map(probe_data, cxl, 0, cxl_pio_range))
>>   		return -ENOMEM;
>> -	}
>>   
>> -	probe_data->cxl_pio_initialised = true;
>>   	probe_data->cxl = cxl;
>> -
>> +	probe_data->cxl_pio_initialised = true;
>>   	return 0;
>>   }
>>   
>> +int efx_cxl_init(struct efx_probe_data *probe_data)
>> +{
>> +	struct efx_nic *efx = &probe_data->efx;
>> +	struct pci_dev *pci_dev = efx->pci_dev;
>> +	u8 devfn;
>> +
>> +	if (efx->type->is_vf)
>> +		return 0;
>> +
>> +	/* are we PF0? */
>> +	devfn = PCI_FUNC(pci_dev->devfn);
>> +	if (devfn == 0)
>> +		return efx_cxl_pf0_init(probe_data);
>> +	else
>> +		return efx_cxl_non_pf0_init(probe_data);
>> +}
>> +
>>   void efx_cxl_exit(struct efx_probe_data *probe_data)
>>   {
>> +	struct efx_nic *efx = &probe_data->efx;
>> +	struct pci_dev *pci_dev = efx->pci_dev;
>> +	u8 devfn;
>> +
>>   	if (!probe_data->cxl)
>>   		return;
>>   
>>   	iounmap(probe_data->cxl->ctpio_cxl);
>> +
>> +	devfn = PCI_FUNC(pci_dev->devfn);
>> +	if (devfn == 0)
>> +		return;
>> +
>> +	kfree(probe_data->cxl);
>>   }
>>   
>>   MODULE_IMPORT_NS("CXL");