From: David Lechner <david@lechnology.com>
To: "irving.ch.lin" <irving-ch.lin@mediatek.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Richard Cochran <richardcochran@gmail.com>,
Bartosz Golaszewski <brgl@kernel.org>,
Chen-Yu Tsai <wenst@chromium.org>,
Miles Chen <miles.chen@mediatek.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, netdev@vger.kernel.org,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Qiqi Wang <qiqi.wang@mediatek.com>,
sirius.wang@mediatek.com, vince-wl.liu@mediatek.com,
jh.hsu@mediatek.com
Subject: Re: [PATCH v5 01/18] dt-bindings: clock: Add MediaTek MT8189 clock
Date: Tue, 3 Feb 2026 16:07:19 -0600 [thread overview]
Message-ID: <dfd2801b-75dd-48eb-9e87-2b88fc00b66e@lechnology.com> (raw)
In-Reply-To: <20260202062840.342707-2-irving-ch.lin@mediatek.com>
On 2/2/26 12:28 AM, irving.ch.lin wrote:
> From: Irving-CH Lin <irving-ch.lin@mediatek.com>
>
> Add dt schema and IDs for the clocks of MediaTek MT8189 SoC.
> The MT8189 clock IP provide clock control for main system
> (apmixedsys, topcksys and vlpcksys) and
> subsys (eg. peri, mfg, venc/vdec ...).
>
> +#define CLK_TOP_VOWPLL 174
This one seems out of place. It is not used in the driver. It is
a fixed 1:1 divider AFAKCT, so should not be included. (And this
line has spaces while the rest of the file uses tabs for indent.)
next prev parent reply other threads:[~2026-02-03 22:26 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 6:28 [PATCH v5 00/18] Add support for MT8189 clock controller irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 01/18] dt-bindings: clock: Add MediaTek MT8189 clock irving.ch.lin
2026-02-03 22:07 ` David Lechner [this message]
2026-02-03 22:16 ` David Lechner
2026-02-05 9:20 ` Krzysztof Kozlowski
2026-02-02 6:28 ` [PATCH v5 02/18] clk: mediatek: clk-mux: Make sure bypass clk enabled while setting MFG rate irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 03/18] clk: mediatek: Add MT8189 apmixedsys clock support irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 04/18] clk: mediatek: Add MT8189 topckgen " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 05/18] clk: mediatek: Add MT8189 vlpckgen " irving.ch.lin
2026-02-19 20:44 ` David Lechner
2026-02-19 21:27 ` David Lechner
2026-02-19 20:49 ` David Lechner
2026-02-23 13:54 ` AngeloGioacchino Del Regno
2026-02-19 21:10 ` David Lechner
2026-02-23 13:54 ` AngeloGioacchino Del Regno
2026-02-02 6:28 ` [PATCH v5 06/18] clk: mediatek: Add MT8189 vlpcfg " irving.ch.lin
2026-02-19 18:40 ` David Lechner
2026-02-24 12:40 ` Louis-Alexis Eyraud
2026-02-02 6:28 ` [PATCH v5 07/18] clk: mediatek: Add MT8189 bus " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 08/18] clk: mediatek: Add MT8189 cam " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 09/18] clk: mediatek: Add MT8189 dbgao " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 10/18] clk: mediatek: Add MT8189 dvfsrc " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 11/18] clk: mediatek: Add MT8189 i2c " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 12/18] clk: mediatek: Add MT8189 img " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 13/18] clk: mediatek: Add MT8189 mdp " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 14/18] clk: mediatek: Add MT8189 mfg " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 15/18] clk: mediatek: Add MT8189 dispsys " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 16/18] clk: mediatek: Add MT8189 scp " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 17/18] clk: mediatek: Add MT8189 ufs " irving.ch.lin
2026-02-02 6:28 ` [PATCH v5 18/18] clk: mediatek: Add MT8189 vcodec " irving.ch.lin
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