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Wed, 11 Mar 2026 10:43:05 +0000 (GMT) Message-ID: Subject: Re: [PATCH v3 1/2] PCI: AtomicOps: Define valid root port capabilities From: Gerd Bayer To: Bjorn Helgaas Cc: Bjorn Helgaas , Jay Cornwall , Felix Kuehling , Leon Romanovsky , Niklas Schnelle , Alexander Schmidt , linux-s390@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-rdma@vger.kernel.org, Gerd Bayer Date: Wed, 11 Mar 2026 11:43:05 +0100 In-Reply-To: <20260310214923.GA823330@bhelgaas> References: <20260310214923.GA823330@bhelgaas> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.3 (3.58.3-1.fc43) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=EK4LElZC c=1 sm=1 tr=0 ts=69b1473f cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=47nuJLWWyNEhpKPdMncA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzExMDA4OCBTYWx0ZWRfX9DiEMEggvTUP ROazNa5TksWEOqDF4NTday75D0gcIwiGmgbtrkhf0/voPsu9FoRmpTcOJU4erHTe/szdwC3DxjP 7QP54WWmR3uWeZ57/RX8cRzqNh8OG0P7DQM8WNVVKI1CWHvemCXgMosNmOlLZnntVH7jgs1PEbt tC1sAjIJcIuyQQDCRwLmtJTcJXDP57CAfuFh+C/yqT0bp5gdHW1ISgL4vsSCbNAyeSKNBcUDQyE CnB1W0EBpsEqB8BcRYpu5B4vMzRV7xMXtx8pOtyfrxwSfxx5uHZtmUljcd7v4ve6IuN2r3HAz57 e6gP4M9TnePD2rlrXM1IS5iGzx42tMFkNtbwNvdgNuQjliMR4yN5+UD7R90Ij+OsoHt5JjBFtjJ L36dkTEN0Pnl/wIouWbfk+hXg9Vwth2sCosuuyFf4umLWmAdMtA31ZfUzJC6vZGaJempIZJKCPm SAEoBd/Yqxd4bHmLr/w== X-Proofpoint-GUID: 2SmBxZTyrhpqTEvqkssE5Yex2WT49E_1 X-Proofpoint-ORIG-GUID: cIe_qzXne_T1INu4ks0EVsZsdHC_Atlj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-11_01,2026-03-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 clxscore=1015 bulkscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603110088 On Tue, 2026-03-10 at 16:49 -0500, Bjorn Helgaas wrote: > On Fri, Mar 06, 2026 at 06:13:58PM +0100, Gerd Bayer wrote: > > Provide the two combinations of Atomic Op Completion size attributes > > that a root port may support per PCIe Spec 7.0 section 6.15.3.1. - > > besides the trivial "No support" - as two new defines. > >=20 > > Change documentation of pci_enable_atomic_ops_to_root() that these are > > the only ones that should be used. Also, spell out that all requested > > capabilities need to be supported at the root port for enable to > > succeed. Also emphasize that on success, this sets AtomicOpsCtl:ReqEn t= o > > 1, and leaves it untouched in case of failure. > >=20 > > Suggested-by: Leon Romanovsky > > Signed-off-by: Gerd Bayer > > --- > > drivers/pci/pci.c | 13 +++++++------ > > include/uapi/linux/pci_regs.h | 8 ++++++++ > > 2 files changed, 15 insertions(+), 6 deletions(-) > >=20 > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > > index 8479c2e1f74f1044416281aba11bf071ea89488a..cc8abe6b1d0766148889587= 6dbbcf8aaeadf4a17 100644 > > --- a/drivers/pci/pci.c > > +++ b/drivers/pci/pci.c > > @@ -3663,15 +3663,16 @@ void pci_acs_init(struct pci_dev *dev) > > /** > > * pci_enable_atomic_ops_to_root - enable AtomicOp requests to root po= rt > > * @dev: the PCI device > > - * @cap_mask: mask of desired AtomicOp sizes, including one or more of= : > > - * PCI_EXP_DEVCAP2_ATOMIC_COMP32 > > - * PCI_EXP_DEVCAP2_ATOMIC_COMP64 > > - * PCI_EXP_DEVCAP2_ATOMIC_COMP128 > > + * @cap_mask: root port must support combinations of AtomicOp sizes > > + * PCI_EXP_ROOT_PORT_ATOMIC_BASE > > + * PCI_EXP_ROOT_PORT_ATOMIC_FULL > > * > > * Return 0 if all upstream bridges support AtomicOp routing, egress > > * blocking is disabled on all upstream ports, and the root port suppo= rts > > - * the requested completion capabilities (32-bit, 64-bit and/or 128-bi= t > > - * AtomicOp completion), or negative otherwise. > > + * all the requested completion capabilities (BASE: 32-bit, 64-bit or > > + * FULL: 32/64- and 128-bit AtomicOp completion). In that case enable = the > > + * device to send AtomicOp requests. Otherwise, return negative and le= ave > > + * the enablement in the PCI config space untouched. > > */ > > int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask) > > { > > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_reg= s.h > > index 14f634ab9350d5442192162225b5e5202dbe2308..63ac62b882a94c6873a0db4= 33ba808332ddbea04 100644 > > --- a/include/uapi/linux/pci_regs.h > > +++ b/include/uapi/linux/pci_regs.h > > @@ -669,6 +669,14 @@ > > #define PCI_EXP_DEVCAP2_ATOMIC_COMP32 0x00000080 /* 32b AtomicOp comp= letion */ > > #define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp comp= letion */ > > #define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp co= mpletion */ > > +/* PCIe spec 7.0 6.15.3.1: Root ports may support one of 2 sets of Ato= mic Ops */ > > +#define PCI_EXP_ROOT_PORT_ATOMIC_BASE \ > > + (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | \ > > + PCI_EXP_DEVCAP2_ATOMIC_COMP64) > > +#define PCI_EXP_ROOT_PORT_ATOMIC_FULL \ > > + (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | \ > > + PCI_EXP_DEVCAP2_ATOMIC_COMP64 | \ > > + PCI_EXP_DEVCAP2_ATOMIC_COMP128) >=20 > I'm sort of ambivalent about this patch, partly because it adds > these #defines that aren't used anywhere. Also, the "BASE" and "FULL" > names don't contain as much information as mentioning COMP32, COMP64, > and COMP128 does. Hi Bjorn, I see your point. This patch is better suited to lead into a separate small series that continues on to actually propose corrections of today's (mis-)use of pci_enable_atomic_ops_to_root() in the corresponding device drivers. > If we *do* want this, I think these combo definitions are beyond the > scope of uapi/linux/pci_regs.h, which generally is just > transliteration of register bits from the spec. They could possibly > go in linux/pci.h where pci_enable_atomic_ops_to_root() is declared. I like this idea, I'll move the "valid combination" defines to linux/pci.h >=20 > > #define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reportin= g */ > > #define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer sup= port */ > > #define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanis= m */ > >=20 > > --=20 > > 2.51.0 > >=20 Thanks, Gerd