From: Heiner Kallweit <hkallweit1@gmail.com>
To: Chunhao Lin <hau@realtek.com>
Cc: netdev@vger.kernel.org, nic_swsd@realtek.com
Subject: Re: [PATCH net v3 2/2] r8169: fix dmar pte write access is not set error
Date: Mon, 26 Dec 2022 13:47:57 +0100 [thread overview]
Message-ID: <e04ef1af-56fb-4740-7420-4b1710f0fd98@gmail.com> (raw)
In-Reply-To: <20221226123153.4406-3-hau@realtek.com>
On 26.12.2022 13:31, Chunhao Lin wrote:
> When close device, if wol is enabled, rx will be enabled. When open
> device it will cause rx packet to be dma to the wrong memory address
> after pci_set_master() and system log will show blow messages.
>
> DMAR: DRHD: handling fault status reg 3
> DMAR: [DMA Write] Request device [02:00.0] PASID ffffffff fault addr
> ffdd4000 [fault reason 05] PTE Write access is not set
>
> In this patch, driver disable tx/rx when close device. If wol is
> enabled, only enable rx filter and disable rxdv_gate(if support) to
> let hardware only receive packet to fifo but not to dma it.
>
> Signed-off-by: Chunhao Lin <hau@realtek.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
next prev parent reply other threads:[~2022-12-26 12:48 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-26 12:31 [PATCH net v3 0/2] fix dmar pte write access is not set error Chunhao Lin
2022-12-26 12:31 ` [PATCH net v3 1/2] r8169: move rtl_wol_enable_rx() and rtl_prepare_power_down() Chunhao Lin
2022-12-26 12:47 ` Heiner Kallweit
2022-12-26 12:31 ` [PATCH net v3 2/2] r8169: fix dmar pte write access is not set error Chunhao Lin
2022-12-26 12:47 ` Heiner Kallweit [this message]
2022-12-28 12:00 ` [PATCH net v3 0/2] " patchwork-bot+netdevbpf
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