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From: "Wu. JackBB (GSM)" <JackBB_Wu@compal.com>
To: Simon Horman <horms@kernel.org>
Cc: "loic.poulain@oss.qualcomm.com" <loic.poulain@oss.qualcomm.com>,
	"ryazanov.s.a@gmail.com" <ryazanov.s.a@gmail.com>,
	"johannes@sipsolutions.net" <johannes@sipsolutions.net>,
	"andrew+netdev@lunn.ch" <andrew+netdev@lunn.ch>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"edumazet@google.com" <edumazet@google.com>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"pabeni@redhat.com" <pabeni@redhat.com>,
	"wen-zhi.huang@mediatek.com" <wen-zhi.huang@mediatek.com>,
	"shi-wei.yeh@mediatek.com" <shi-wei.yeh@mediatek.com>,
	"Minano.tseng@mediatek.com" <Minano.tseng@mediatek.com>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"angelogioacchino.delregno@collabora.com"
	<angelogioacchino.delregno@collabora.com>,
	"corbet@lwn.net" <corbet@lwn.net>,
	"skhan@linuxfoundation.org" <skhan@linuxfoundation.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>
Subject: RE: [External Mail] Re: [PATCH v4 2/7] net: wwan: t9xx: Add control plane transaction layer
Date: Fri, 17 Jul 2026 10:53:36 +0000	[thread overview]
Message-ID: <e4c414ee18a0428f8388ee8c847b3ad5@compal.com> (raw)
In-Reply-To: <47002e869f5b4f0985316669d2769c19@compal.com>


Hi Simon,

After further internal review, we agree this needs to be fixed.

On Jack Wu wrote:

>> [Severity: High]
>> Does this code apply a double byte-swap on big-endian architectures?

>T9XX currently only targets x86 (little-endian) platforms where
>cpu_to_le32() is a no-op. The Kconfig enforces "depends on PCI &&

In v5 we will remove LE32_TO_U32(cpu_to_le32(...)) and return
hw_bits directly in both mtk_pci_ext_d2h_evt_hw_bits() and
mtk_pci_ext_h2d_evt_hw_bits(). The custom LE32_TO_U32 macro
will also be removed.

Thanks.

Jack Wu

  reply	other threads:[~2026-07-17 10:53 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-09 10:53 [PATCH v4 0/7] net: wwan: t9xx: Add MediaTek T9XX WWAN driver Jack Wu via B4 Relay
2026-07-09 10:53 ` [PATCH v4 1/7] net: wwan: t9xx: Add PCIe core Jack Wu via B4 Relay
2026-07-16  9:33   ` Simon Horman
2026-07-17  6:25     ` [External Mail] " Wu. JackBB (GSM)
2026-07-17 10:51       ` Wu. JackBB (GSM)
2026-07-09 10:53 ` [PATCH v4 2/7] net: wwan: t9xx: Add control plane transaction layer Jack Wu via B4 Relay
2026-07-16  9:33   ` Simon Horman
2026-07-17  6:27     ` [External Mail] " Wu. JackBB (GSM)
2026-07-17 10:53       ` Wu. JackBB (GSM) [this message]
2026-07-09 10:53 ` [PATCH v4 3/7] net: wwan: t9xx: Add control DMA interface Jack Wu via B4 Relay
2026-07-16  9:34   ` Simon Horman
2026-07-17  6:37     ` [External Mail] " Wu. JackBB (GSM)
2026-07-17 10:57       ` Wu. JackBB (GSM)
2026-07-09 10:53 ` [PATCH v4 4/7] net: wwan: t9xx: Add control port Jack Wu via B4 Relay
2026-07-16  9:34   ` Simon Horman
2026-07-17  7:20     ` [External Mail] " Wu. JackBB (GSM)
2026-07-17 11:00       ` Wu. JackBB (GSM)
2026-07-09 10:53 ` [PATCH v4 5/7] net: wwan: t9xx: Add FSM thread Jack Wu via B4 Relay
2026-07-16  9:34   ` Simon Horman
2026-07-17  7:24     ` [External Mail] " Wu. JackBB (GSM)
2026-07-17 11:02       ` Wu. JackBB (GSM)
2026-07-09 10:53 ` [PATCH v4 6/7] net: wwan: t9xx: Add AT & MBIM WWAN ports Jack Wu via B4 Relay
2026-07-16  9:34   ` Simon Horman
2026-07-17  7:26     ` [External Mail] " Wu. JackBB (GSM)
2026-07-09 10:53 ` [PATCH v4 7/7] net: wwan: t9xx: Add maintainers entry Jack Wu via B4 Relay

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