* [PATCH] net: stmmac: don't set tx delay in RGMII_ID and RGMII_TXID mode
@ 2017-02-01 19:19 Heiner Kallweit
2017-02-03 3:00 ` David Miller
2017-02-03 19:47 ` Martin Blumenstingl
0 siblings, 2 replies; 3+ messages in thread
From: Heiner Kallweit @ 2017-02-01 19:19 UTC (permalink / raw)
To: David Miller; +Cc: Martin Blumenstingl, netdev@vger.kernel.org, linux-amlogic
As documented in Documentation/devicetree/bindings/net/ethernet.txt,
in RGMII_ID and RGMII_TXID mode the MAC should not add a tx delay.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
index 8840a360..96855559 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
@@ -177,12 +177,19 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac)
{
int ret;
unsigned long clk_rate;
- u8 tx_dly_val;
+ u8 tx_dly_val = 0;
switch (dwmac->phy_mode) {
case PHY_INTERFACE_MODE_RGMII:
- case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
+ /* TX clock delay in ns = "8ns / 4 * tx_dly_val" (where
+ * 8ns are exactly one cycle of the 125MHz RGMII TX clock):
+ * 0ns = 0x0, 2ns = 0x1, 4ns = 0x2, 6ns = 0x3
+ */
+ tx_dly_val = dwmac->tx_delay_ns >> 1;
+ /* fall through */
+
+ case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* Generate a 25MHz clock for the PHY */
clk_rate = 25 * 1000 * 1000;
@@ -195,11 +202,6 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac)
meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
PRG_ETH0_INVERTED_RMII_CLK, 0);
- /* TX clock delay in ns = "8ns / 4 * tx_dly_val" (where
- * 8ns are exactly one cycle of the 125MHz RGMII TX clock):
- * 0ns = 0x0, 2ns = 0x1, 4ns = 0x2, 6ns = 0x3
- */
- tx_dly_val = dwmac->tx_delay_ns >> 1;
meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TXDLY_MASK,
tx_dly_val << PRG_ETH0_TXDLY_SHIFT);
break;
--
2.11.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] net: stmmac: don't set tx delay in RGMII_ID and RGMII_TXID mode
2017-02-01 19:19 [PATCH] net: stmmac: don't set tx delay in RGMII_ID and RGMII_TXID mode Heiner Kallweit
@ 2017-02-03 3:00 ` David Miller
2017-02-03 19:47 ` Martin Blumenstingl
1 sibling, 0 replies; 3+ messages in thread
From: David Miller @ 2017-02-03 3:00 UTC (permalink / raw)
To: hkallweit1; +Cc: martin.blumenstingl, netdev, linux-amlogic
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Wed, 1 Feb 2017 20:19:25 +0100
> As documented in Documentation/devicetree/bindings/net/ethernet.txt,
> in RGMII_ID and RGMII_TXID mode the MAC should not add a tx delay.
>
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Applied to net-next, thank you.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] net: stmmac: don't set tx delay in RGMII_ID and RGMII_TXID mode
2017-02-01 19:19 [PATCH] net: stmmac: don't set tx delay in RGMII_ID and RGMII_TXID mode Heiner Kallweit
2017-02-03 3:00 ` David Miller
@ 2017-02-03 19:47 ` Martin Blumenstingl
1 sibling, 0 replies; 3+ messages in thread
From: Martin Blumenstingl @ 2017-02-03 19:47 UTC (permalink / raw)
To: Heiner Kallweit; +Cc: David Miller, netdev@vger.kernel.org, linux-amlogic
On Wed, Feb 1, 2017 at 8:19 PM, Heiner Kallweit <hkallweit1@gmail.com> wrote:
> As documented in Documentation/devicetree/bindings/net/ethernet.txt,
> in RGMII_ID and RGMII_TXID mode the MAC should not add a tx delay.
>
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com"
> ---
> drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 16 +++++++++-------
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> index 8840a360..96855559 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> @@ -177,12 +177,19 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac)
> {
> int ret;
> unsigned long clk_rate;
> - u8 tx_dly_val;
> + u8 tx_dly_val = 0;
>
> switch (dwmac->phy_mode) {
> case PHY_INTERFACE_MODE_RGMII:
> - case PHY_INTERFACE_MODE_RGMII_ID:
> case PHY_INTERFACE_MODE_RGMII_RXID:
> + /* TX clock delay in ns = "8ns / 4 * tx_dly_val" (where
> + * 8ns are exactly one cycle of the 125MHz RGMII TX clock):
> + * 0ns = 0x0, 2ns = 0x1, 4ns = 0x2, 6ns = 0x3
> + */
> + tx_dly_val = dwmac->tx_delay_ns >> 1;
> + /* fall through */
> +
> + case PHY_INTERFACE_MODE_RGMII_ID:
> case PHY_INTERFACE_MODE_RGMII_TXID:
> /* Generate a 25MHz clock for the PHY */
> clk_rate = 25 * 1000 * 1000;
> @@ -195,11 +202,6 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac)
> meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
> PRG_ETH0_INVERTED_RMII_CLK, 0);
>
> - /* TX clock delay in ns = "8ns / 4 * tx_dly_val" (where
> - * 8ns are exactly one cycle of the 125MHz RGMII TX clock):
> - * 0ns = 0x0, 2ns = 0x1, 4ns = 0x2, 6ns = 0x3
> - */
> - tx_dly_val = dwmac->tx_delay_ns >> 1;
> meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TXDLY_MASK,
> tx_dly_val << PRG_ETH0_TXDLY_SHIFT);
> break;
> --
> 2.11.0
>
Heiner, many thanks for this and your other patches!
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2017-02-03 19:48 UTC | newest]
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2017-02-01 19:19 [PATCH] net: stmmac: don't set tx delay in RGMII_ID and RGMII_TXID mode Heiner Kallweit
2017-02-03 3:00 ` David Miller
2017-02-03 19:47 ` Martin Blumenstingl
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