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Davis" , Hussain Khaja , Suman Anna , Ben Levinsky , Tanmay Shah , Erwan Leray , Fabrice Gasnier CC: Roger Quadros , , , , , , , , , , , , , , , , References: <20260511165942.2774868-1-robh@kernel.org> Content-Language: en-US From: "Shah, Tanmay" In-Reply-To: <20260511165942.2774868-1-robh@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: tanmays@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001D0:EE_|MN2PR12MB4128:EE_ X-MS-Office365-Filtering-Correlation-Id: d5794162-9094-4f75-6f33-08deb1cc1728 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|82310400026|7416014|376014|3023799003|921020|22082099003|18002099003|56012099003|11063799003; X-Microsoft-Antispam-Message-Info: j434hSJwySlu8HAmf+PxHnPKbC7mjagUUc/NDouRkBkY97/dERW9Z3NdALbm64PVV7jZ9WcxXqu8oGDc/M7KIwlzrPEHBuF/eKy8fQId+tAStvKEy7IS9M5aDTW6rrbUA5EDR8Ql4vUbrf8vMWCETcxjglknUVjl4J+gKiDBdhp8dK+CrLmUJwPOjQkPLSx0uqfc9tUdN6R5grhq0JKZWcdTmX5J63ARD4yecvv7nMnU41Z8zo2WJvYl3NEF7Hv2I/EscDrZ+6vRhFKDt3iA05aGj+AHrIGEH37gEiY3caacAUTiWwYle6TXpwKh7CHhYPBfmCJutonDk6XawnLsmk3sNPcM2Lj7ZG9wiFKyPx7JB9sLjHzsCNXWvgw0EC3CvS1RE5b6xPxK73dHkRO+WuYZKaefyVgsFgI/wdbSuZqbdffTLcE2ouzESZNwLcuVHsHmpvOAy2kls4ZAF3c5Z4AKJ6RdxHJwzsd1sdSgNvIX3QonUe5QIES8G6JscyGdeUjY2EgHkEQaNqsZ54K85xA91+Z/PE5Lisw85CO1dVKnHSdQBnfVLlEfshtWXpjUk5WwBtG3N7eaEJgFA0tAI5r8er+kM88320VKcaX6MFfowambZD505E4gVUDT9YH/teLrkQMnDeIvOfWMoWJXvTRU6Inf28FvEDfO4F2UatvgqbmEHxLWeTD7xB3arbyDbe3vE+Tztg2yt+U9nTAj56SMPQodK31lktZQfnXeUFo= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(1800799024)(82310400026)(7416014)(376014)(3023799003)(921020)(22082099003)(18002099003)(56012099003)(11063799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zexsxn6b5AthW2x+zN0EYG9Ngq90bzd6CSKZTo2VzAp9+IndlYFtjc0S1vCc+1ye4M6eW/K7Eg9Ame/XU2bmjHW6AAkQg2ZXL3VWruC8RMhlz3C5NPvkT/reFIzJzDifl24yr6nscFHPHZPACTQAzhmb1+Q4EXDbvl4HuX58SY5DpG84Ypb4DnSGdq7ZVYSLlKzky88SvE0iGBXgS75cLEYbGluJ+iqH8in47hkM8OcUFFda7cC0CfcVqq6QDKcRRkWtzbItTLB20YfRJmHDuw6tH0hHLPFIAQspAVAq3tvU/L9LzCCDgC2Z57d8Cinof/v5dO170/01BJhgo11YnfWBr+ZvCVk8pjcEd69HiZDOTVn4ynP8eVudbot44W1AZB+UPC+NRQhO+GDO6eMgWKBNZItuByTgyapW2Qqdc8FezBEnikkAgkEaqUkOEAO8 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 May 2026 15:18:45.2187 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5794162-9094-4f75-6f33-08deb1cc1728 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4128 Reviewed-by: Tanmay Shah On 5/11/2026 11:59 AM, Rob Herring (Arm) wrote: > The "sram" property has become a de facto standard property, so create a > common schema for it and drop all the duplicated definitions. > > Signed-off-by: Rob Herring (Arm) > --- > .../imx/fsl,imx8qxp-dc-command-sequencer.yaml | 2 +- > .../devicetree/bindings/display/msm/gpu.yaml | 6 +---- > .../bindings/dma/stericsson,dma40.yaml | 8 ++---- > .../bindings/media/cnm,wave521c.yaml | 2 +- > .../bindings/media/nxp,imx8-jpeg.yaml | 6 ++--- > .../bindings/media/rockchip,vdec.yaml | 5 ++-- > .../bindings/media/st,stm32-dcmi.yaml | 6 ++--- > .../devicetree/bindings/net/mediatek,net.yaml | 3 +-- > .../bindings/net/ti,icssg-prueth.yaml | 2 +- > .../bindings/net/ti,icssm-prueth.yaml | 2 +- > .../remoteproc/amlogic,meson-mx-ao-arc.yaml | 7 +---- > .../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 8 ------ > .../bindings/remoteproc/ti,k3-r5f-rproc.yaml | 8 ------ > .../remoteproc/xlnx,zynqmp-r5fss.yaml | 9 +------ > .../devicetree/bindings/spi/st,stm32-spi.yaml | 10 +++---- > .../bindings/sram/sram-consumer.yaml | 26 +++++++++++++++++++ > 16 files changed, 48 insertions(+), 62 deletions(-) > create mode 100644 Documentation/devicetree/bindings/sram/sram-consumer.yaml > > diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml > index 27118f4c0d28..fd095e5742c5 100644 > --- a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml > +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml > @@ -41,7 +41,7 @@ properties: > - const: sw3 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > description: phandle pointing to the mmio-sram device node > > required: > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml > index 04b2328903ca..358759fad8dc 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml > @@ -84,13 +84,9 @@ properties: > maxItems: 64 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle-array > minItems: 1 > maxItems: 4 > - items: > - maxItems: 1 > - description: | > - phandles to one or more reserved on-chip SRAM regions. > + description: > phandle to the On Chip Memory (OCMEM) that's present on some a3xx and > a4xx Snapdragon SoCs. See > Documentation/devicetree/bindings/sram/qcom,ocmem.yaml > diff --git a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml > index 607da11e7baa..d8f92838f4c9 100644 > --- a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml > +++ b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml > @@ -136,13 +136,9 @@ properties: > maxItems: 1 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle-array > - description: A phandle array with inner size 1 (no arg cells). > - First phandle is the LCPA (Logical Channel Parameter Address) memory. > - Second phandle is the LCLA (Logical Channel Link base Address) memory. > - maxItems: 2 > items: > - maxItems: 1 > + - description: LCPA (Logical Channel Parameter Address) memory. > + - description: LCLA (Logical Channel Link base Address) memory. > > memcpy-channels: > $ref: /schemas/types.yaml#/definitions/uint32-array > diff --git a/Documentation/devicetree/bindings/media/cnm,wave521c.yaml b/Documentation/devicetree/bindings/media/cnm,wave521c.yaml > index 6a11c1d11fb5..6cd33dfd095d 100644 > --- a/Documentation/devicetree/bindings/media/cnm,wave521c.yaml > +++ b/Documentation/devicetree/bindings/media/cnm,wave521c.yaml > @@ -37,7 +37,7 @@ properties: > maxItems: 1 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > description: > The VPU uses the SRAM to store some of the reference data instead of > storing it on DMA memory. It is mainly used for the purpose of reducing > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml > index 18cc6315a821..6ba668aa633d 100644 > --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml > +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml > @@ -56,10 +56,10 @@ properties: > maxItems: 5 # Wrapper and 4 slots > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > description: > - Optional phandle to a reserved on-chip SRAM regions. The SRAM can > - be used for descriptor storage, which may improve bus utilization. > + The SRAM can be used for descriptor storage, which may improve bus > + utilization. > > required: > - compatible > diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml > index 42022401d0ff..4f38a0ef29d8 100644 > --- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml > +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml > @@ -91,9 +91,8 @@ properties: > maxItems: 1 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > - description: | > - phandle to a reserved on-chip SRAM regions. > + maxItems: 1 > + description: > Some SoCs, like rk3588 provide on-chip SRAM to store temporary > buffers during decoding. > > diff --git a/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml b/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml > index d9fbb90b0977..7c2ddd27780f 100644 > --- a/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml > +++ b/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml > @@ -47,10 +47,10 @@ properties: > maxItems: 1 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > description: > - phandle to a reserved SRAM region which is used as temporary > - storage memory between DMA and MDMA engines. > + SRAM region which is used as temporary storage memory between DMA and > + MDMA engines. > > port: > $ref: /schemas/graph.yaml#/$defs/port-base > diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml > index cc346946291a..6bbd83c6aaf7 100644 > --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml > +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml > @@ -67,8 +67,7 @@ properties: > - const: ppe > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > - description: phandle to mmio SRAM > + maxItems: 1 > > mediatek,ethsys: > $ref: /schemas/types.yaml#/definitions/phandle > diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > index c296e5711848..883033b19b8f 100644 > --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml > @@ -21,7 +21,7 @@ properties: > - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > description: > phandle to MSMC SRAM node > > diff --git a/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml > index a98ad45ca66f..9370c43bc66a 100644 > --- a/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml > +++ b/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml > @@ -24,7 +24,7 @@ properties: > - ti,am3359-prueth # for AM33x SoC family > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > description: > phandle to OCMC SRAM node > > diff --git a/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml b/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml > index 76e8ca44906a..3f710433e937 100644 > --- a/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml > +++ b/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml > @@ -48,12 +48,7 @@ properties: > minItems: 1 > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > - description: > - phandles to a reserved SRAM region which is used as the memory of > - the ARC core. The region should be defined as child nodes of the > - AHB SRAM node as per the generic bindings in > - Documentation/devicetree/bindings/sram/sram.yaml > + maxItems: 1 > > amlogic,secbus2: > $ref: /schemas/types.yaml#/definitions/phandle > diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml > index b51bb863d759..8b1ed384ef22 100644 > --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml > +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml > @@ -75,16 +75,8 @@ properties: > # -------------------- > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle-array > minItems: 1 > maxItems: 4 > - items: > - maxItems: 1 > - description: | > - phandles to one or more reserved on-chip SRAM regions. The regions > - should be defined as child nodes of the respective SRAM node, and > - should be defined as per the generic bindings in, > - Documentation/devicetree/bindings/sram/sram.yaml > > allOf: > - if: > diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml > index 775e9b3a1938..14e6b2f817b3 100644 > --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml > +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml > @@ -224,16 +224,8 @@ patternProperties: > at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted. > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle-array > minItems: 1 > maxItems: 4 > - items: > - maxItems: 1 > - description: | > - phandles to one or more reserved on-chip SRAM regions. The regions > - should be defined as child nodes of the respective SRAM node, and > - should be defined as per the generic bindings in, > - Documentation/devicetree/bindings/sram/sram.yaml > > required: > - compatible > diff --git a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml > index ee63c03949c9..c7d5e58330d6 100644 > --- a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml > +++ b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml > @@ -106,20 +106,13 @@ patternProperties: > - const: rx > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle-array > minItems: 1 > maxItems: 8 > - items: > - maxItems: 1 > - description: | > + description: > phandles to one or more reserved on-chip SRAM regions. Other than TCM, > the RPU can execute instructions and access data from the OCM memory, > the main DDR memory, and other system memories. > > - The regions should be defined as child nodes of the respective SRAM > - node, and should be defined as per the generic bindings in > - Documentation/devicetree/bindings/sram/sram.yaml > - > memory-region: > description: | > List of phandles to the reserved memory regions associated with the > diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml > index 472e92974714..6d7d595e4ab3 100644 > --- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml > +++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml > @@ -89,12 +89,10 @@ properties: > - const: rxm2m > > sram: > - $ref: /schemas/types.yaml#/definitions/phandle > - description: | > - Phandles to a reserved SRAM region which is used as temporary > - storage memory between DMA and MDMA engines. > - The region should be defined as child node of the AHB SRAM node > - as per the generic bindings in Documentation/devicetree/bindings/sram/sram.yaml > + maxItems: 1 > + description: > + SRAM region which is used as temporary storage memory between DMA and > + MDMA engines. > > power-domains: > maxItems: 1 > diff --git a/Documentation/devicetree/bindings/sram/sram-consumer.yaml b/Documentation/devicetree/bindings/sram/sram-consumer.yaml > new file mode 100644 > index 000000000000..f00087bd2879 > --- /dev/null > +++ b/Documentation/devicetree/bindings/sram/sram-consumer.yaml > @@ -0,0 +1,26 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sram/sram-consumer.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SRAM Consumers > + > +maintainers: > + - Rob Herring > + > +select: true > + > +properties: > + sram: > + description: > + Phandles to one or more reserved on-chip SRAM regions. The regions > + should be defined as child nodes of the respective SRAM node, and > + should be defined as per the generic bindings in, > + Documentation/devicetree/bindings/sram/sram.yaml > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + maxItems: 1 > + > +additionalProperties: true > +...