From: "Christian König" <christian.koenig@amd.com>
To: Vivian Wang <wangruikang@iscas.ac.cn>,
Madhavan Srinivasan <maddy@linux.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
"Christophe Leroy (CS GROUP)" <chleroy@kernel.org>,
Alex Deucher <alexander.deucher@amd.com>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Brett Creeley <brett.creeley@amd.com>
Cc: Han Gao <gaohan@iscas.ac.cn>, Thomas Gleixner <tglx@kernel.org>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
netdev@vger.kernel.org, linux-pci@vger.kernel.org,
linux-sound@vger.kernel.org, linux-riscv@lists.infradead.org,
sophgo@lists.linux.dev
Subject: Re: [PATCH v4 3/4] drm/radeon: Raise msi_addr_mask to dma_bits
Date: Thu, 29 Jan 2026 09:08:00 +0100 [thread overview]
Message-ID: <f7c23358-9438-47cd-8493-6bc84ecd9900@amd.com> (raw)
In-Reply-To: <20260129-pci-msi-addr-mask-v4-3-70da998f2750@iscas.ac.cn>
On 1/29/26 02:56, Vivian Wang wrote:
> The code was originally written using no_64bit_msi, which restricts the
> device to 32-bit MSI addresses.
>
> Since msi_addr_mask is introduced, use DMA_BIT_MASK(dma_bits) instead of
> DMA_BIT_MASK(32) here for msi_addr_mask, describing the restriction more
> precisely and allowing these devices to work on platforms with MSI
> doorbell address above the 32-bit limit, as long as it is within the
> hardware's addressable range.
>
> Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Reviewed-by: Christian König <christian.koenig@amd.com>
>
> ---
> v4: Patch message rewording for more consistency
> ---
> drivers/gpu/drm/radeon/radeon_device.c | 1 +
> drivers/gpu/drm/radeon/radeon_irq_kms.c | 10 ----------
> 2 files changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
> index 60afaa8e56b4..5faae0361361 100644
> --- a/drivers/gpu/drm/radeon/radeon_device.c
> +++ b/drivers/gpu/drm/radeon/radeon_device.c
> @@ -1374,6 +1374,7 @@ int radeon_device_init(struct radeon_device *rdev,
> pr_warn("radeon: No suitable DMA available\n");
> return r;
> }
> + rdev->pdev->msi_addr_mask = DMA_BIT_MASK(dma_bits);
> rdev->need_swiotlb = drm_need_swiotlb(dma_bits);
>
> /* Registers mapping */
> diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
> index d550554a6f3f..839d619e5602 100644
> --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
> +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
> @@ -245,16 +245,6 @@ static bool radeon_msi_ok(struct radeon_device *rdev)
> if (rdev->flags & RADEON_IS_AGP)
> return false;
>
> - /*
> - * Older chips have a HW limitation, they can only generate 40 bits
> - * of address for "64-bit" MSIs which breaks on some platforms, notably
> - * IBM POWER servers, so we limit them
> - */
> - if (rdev->family < CHIP_BONAIRE) {
> - dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
> - rdev->pdev->msi_addr_mask = DMA_BIT_MASK(32);
> - }
> -
> /* force MSI on */
> if (radeon_msi == 1)
> return true;
>
next prev parent reply other threads:[~2026-01-29 8:08 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-29 1:56 [PATCH v4 0/4] PCI/MSI: Generalize no_64bit_msi into msi_addr_mask Vivian Wang
2026-01-29 1:56 ` [PATCH v4 1/4] PCI/MSI: Conservatively generalize " Vivian Wang
2026-02-26 18:25 ` Mark Bloch
2026-02-27 5:25 ` Vivian Wang
2026-02-27 8:16 ` Mark Bloch
2026-02-27 16:49 ` Bjorn Helgaas
2026-01-29 1:56 ` [PATCH v4 2/4] PCI/MSI: Check msi_addr_mask in msi_verify_entries() Vivian Wang
2026-01-29 1:56 ` [PATCH v4 3/4] drm/radeon: Raise msi_addr_mask to dma_bits Vivian Wang
2026-01-29 8:08 ` Christian König [this message]
2026-01-29 1:56 ` [PATCH v4 4/4] ALSA: hda/intel: " Vivian Wang
2026-01-29 21:51 ` [PATCH v4 0/4] PCI/MSI: Generalize no_64bit_msi into msi_addr_mask Thomas Gleixner
2026-02-20 4:10 ` patchwork-bot+linux-riscv
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f7c23358-9438-47cd-8493-6bc84ecd9900@amd.com \
--to=christian.koenig@amd.com \
--cc=airlied@gmail.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=andrew+netdev@lunn.ch \
--cc=bhelgaas@google.com \
--cc=brett.creeley@amd.com \
--cc=chleroy@kernel.org \
--cc=davem@davemloft.net \
--cc=dri-devel@lists.freedesktop.org \
--cc=edumazet@google.com \
--cc=gaohan@iscas.ac.cn \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-sound@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=maddy@linux.ibm.com \
--cc=mpe@ellerman.id.au \
--cc=netdev@vger.kernel.org \
--cc=npiggin@gmail.com \
--cc=pabeni@redhat.com \
--cc=perex@perex.cz \
--cc=simona@ffwll.ch \
--cc=sophgo@lists.linux.dev \
--cc=tglx@kernel.org \
--cc=tiwai@suse.com \
--cc=wangruikang@iscas.ac.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox