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Date: Mon, 12 Oct 2026 15:20:12 +0200
From: Nicolai Buchwitz <nb@tipi-net.de>
To: Andrew Lunn <andrew@lunn.ch>
Cc: James Clark <jjc@jclark.com>, "David S. Miller" <davem@davemloft.net>,
 Eric Dumazet <edumazet@kernel.org>, Jakub Kicinski <kuba@kernel.org>, Paolo
 Abeni <pabeni@redhat.com>, Andrew Lunn <andrew+netdev@lunn.ch>, Heiner
 Kallweit <hkallweit1@gmail.com>, Richard Cochran <richardcochran@gmail.com>,
 Florian Fainelli <florian.fainelli@broadcom.com>, Doug Berger
 <opendmb@gmail.com>, =?UTF-8?Q?Th=C3=A9o_Lebrun?= <theo.lebrun@bootlin.com>,
 Russell King <linux@armlinux.org.uk>, Conor Dooley
 <conor.dooley@microchip.com>, Broadcom internal kernel review list
 <bcm-kernel-feedback-list@broadcom.com>, Thomas Gleixner <tglx@kernel.org>,
 Miroslav Lichvar <mlichvar@redhat.com>, netdev@vger.kernel.org,
 linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 0/5] net: mdio: add timestamped MDIO writes for
 PHY gettimex64
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On 12.10.2026 15:18, Andrew Lunn wrote:

> [...]

>> Pi 4 and CM4 (the one with the PTP PHY) have no clock-frequency, so
>> the driver keeps the firmware's divider 9, and 200 MHz / 20 is the
>> 10 MHz James mentions.
> 
> For CM4, i think the PHY is on the board? Does the MDIO bus get
> exported via a connector? If it is a closed system, then running the
> bus faster by default is O.K, since it is impossible to connect a
> device which is only standards compliant. But if the bus does get
> connected to the carrier board, it would be better to stick to 2.5MHz.

Yes, everything is on the same board and (unfortunately for some of my 
use cases)
no connector / possibility to use MDIO without the default PHY.

Regards
Nicolai