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([2605:59c8:829:4c00:82ee:73ff:fe41:9a02]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-2698030ecc1sm110937565ad.112.2025.09.21.16.36.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Sep 2025 16:36:59 -0700 (PDT) Message-ID: Subject: Re: [PATCH net-next] eth: fbnic: Read module EEPROM From: Alexander H Duyck To: Andrew Lunn , Mohsin Bashir Cc: netdev@vger.kernel.org, alexanderduyck@fb.com, kuba@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, gustavoars@kernel.org, horms@kernel.org, jacob.e.keller@intel.com, kees@kernel.org, kernel-team@meta.com, lee@trager.us, linux@armlinux.org.uk, pabeni@redhat.com, sanman.p211993@gmail.com, suhui@nfschina.com, vadim.fedorenko@linux.dev Date: Sun, 21 Sep 2025 16:36:58 -0700 In-Reply-To: References: <20250919191624.1239810-1-mohsin.bashr@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-1.fc42) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-09-19 at 21:25 +0200, Andrew Lunn wrote: > On Fri, Sep 19, 2025 at 12:16:24PM -0700, Mohsin Bashir wrote: > > Add support to read module EEPROM for fbnic. Towards this, add required > > support to issue a new command to the firmware and to receive the respo= nse > > to the corresponding command. > >=20 > > Create a local copy of the data in the completion struct before writing= to > > ethtool_module_eeprom to avoid writing to data in case it is freed. Giv= en > > that EEPROM pages are small, the overhead of additional copy is > > negligible. > >=20 > > Signed-off-by: Jakub Kicinski > > Signed-off-by: Mohsin Bashir > > --- > > .../net/ethernet/meta/fbnic/fbnic_ethtool.c | 66 +++++++++ > > drivers/net/ethernet/meta/fbnic/fbnic_fw.c | 135 ++++++++++++++++++ > > drivers/net/ethernet/meta/fbnic/fbnic_fw.h | 22 +++ > > 3 files changed, 223 insertions(+) > >=20 > > diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c b/drivers/= net/ethernet/meta/fbnic/fbnic_ethtool.c > > index b4ff98ee2051..f6069cddffa5 100644 > > --- a/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c > > +++ b/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c > > @@ -1635,6 +1635,71 @@ static void fbnic_get_ts_stats(struct net_device= *netdev, > > } > > } > > =20 > > +static int > > +fbnic_get_module_eeprom_by_page(struct net_device *netdev, > > + const struct ethtool_module_eeprom *page_data, > > + struct netlink_ext_ack *extack) > > +{ > > + struct fbnic_net *fbn =3D netdev_priv(netdev); > > + struct fbnic_fw_completion *fw_cmpl; > > + struct fbnic_dev *fbd =3D fbn->fbd; > > + int err; > > + > > + if (page_data->i2c_address !=3D 0x50) { > > + NL_SET_ERR_MSG_MOD(extack, > > + "Invalid i2c address. Only 0x50 is supported"); > > + return -EINVAL; > > + } > > + > > + if (page_data->bank !=3D 0) { > > + NL_SET_ERR_MSG_MOD(extack, > > + "Invalid bank. Only 0 is supported"); > > + return -EINVAL; > > + } > > + > > + fw_cmpl =3D __fbnic_fw_alloc_cmpl(FBNIC_TLV_MSG_ID_QSFP_READ_RESP, > > + page_data->length); > > + if (!fw_cmpl) > > + return -ENOMEM; > > + > > + /* Initialize completion and queue it for FW to process */ > > + fw_cmpl->u.qsfp.length =3D page_data->length; > > + fw_cmpl->u.qsfp.offset =3D page_data->offset; > > + fw_cmpl->u.qsfp.page =3D page_data->page; > > + fw_cmpl->u.qsfp.bank =3D page_data->bank; > > + > > + err =3D fbnic_fw_xmit_qsfp_read_msg(fbd, fw_cmpl, page_data->page, > > + page_data->bank, page_data->offset, > > + page_data->length); > > + if (err) { > > + NL_SET_ERR_MSG_MOD(extack, > > + "Failed to transmit EEPROM read request"); > > + goto exit_free; > > + } >=20 > At some point, you are going to hand off control of the I2C bus to > phylink, so it can drive the SFP. I know Alex at least had a plan how > that will work. At that point, will you just throw this away, and let > sfp_get_module_eeprom_by_page() implement this? >=20 > Andrew That would be the general idea. The fbnic_fw_xmit_qsfp_read_msg will still have to exist as it is essentially the firmware provided front end to issue a I2C read request to the QSFP module. I have code that essentially does that somewhere in one of my patch sets as I had coded it up as proof-of-concept. I am hoping to wrap up the phydev/phylink code this half. Unfortunately I haven't had a ton of time as I have been getting pulled in several different directions lately. The larger hurdles I am still trying to sort out are adding support for 25/50/100G to a generic clause 45 phydev support in order to support the fact that we need to deal with a 4s delay due to the PMD needing time for link training, and then I have to go through and sort out the PCS/PMA code which may be a bit messy as it looks like XPCS was already added, but it only seems to support 40G so I will have to sort that out.