From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2BF5C4360F for ; Mon, 18 Feb 2019 14:40:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9301121736 for ; Mon, 18 Feb 2019 14:40:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Z/cDhb/2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733274AbfBROk3 (ORCPT ); Mon, 18 Feb 2019 09:40:29 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:49788 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732715AbfBROk2 (ORCPT ); Mon, 18 Feb 2019 09:40:28 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1IEeHpB008483; Mon, 18 Feb 2019 08:40:17 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1550500817; bh=30xXwf8mGCfGJjEZ9d+foENxiXTMta71r59Sz542IhI=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=Z/cDhb/24w5us8Zd0gzQctgLxBtCYD3uXNkDVdy4pzDcu4mQv1LGRIXWDvbhumSD7 IT6ZB9NwYqT2/osJA1ZZjJO3YFdohRW/ng7LXIN6+b6tWFV4eTTTnsueh3LUhbavQV fCveFvZbrUmSo6xXXQxBnHjAvQuT0F/EcAAoYEaA= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1IEeHF5115091 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 18 Feb 2019 08:40:17 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 18 Feb 2019 08:40:17 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 18 Feb 2019 08:40:17 -0600 Received: from [192.168.2.6] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1IEeE4n011409; Mon, 18 Feb 2019 08:40:15 -0600 Subject: Re: [PATCH v2 2/2] net: phy: at803x: disable delay only for RGMII mode To: Vinod Koul , David S Miller CC: , Bjorn Andersson , , Niklas Cassel , Andrew Lunn , Florian Fainelli , "Nori, Sekhar" , Marc Gonzalez References: <20190218101853.4290-1-vkoul@kernel.org> <20190218101853.4290-2-vkoul@kernel.org> From: Peter Ujfalusi Message-ID: Date: Mon, 18 Feb 2019 16:40:43 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <20190218101853.4290-2-vkoul@kernel.org> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hi Vinod, On 18/02/2019 12.18, Vinod Koul wrote: > Per "Documentation/devicetree/bindings/net/ethernet.txt" RGMII mode > should not have delay in PHY wheras RGMII_ID and RGMII_RXID/RGMII_TXID > can have delay in phy. > > So disable the delay only for RGMII mode and enable for other modes. > Also treat the default case as disabled delays. With https://patchwork.ozlabs.org/project/netdev/list/?series=92672 ethernet is working on am335x-evmsk. thank you: Tested-by: Peter Ujfalusi > Fixes: cd28d1d6e52e: ("net: phy: at803x: Disable phy delay for RGMII mode") > Reported-by: Peter Ujfalusi > Signed-off-by: Vinod Koul > --- > drivers/net/phy/at803x.c | 47 ++++++++++++++++++++++++++++++---------- > 1 file changed, 36 insertions(+), 11 deletions(-) > > diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c > index c6e7d800fd7a..dc1b13f7fc12 100644 > --- a/drivers/net/phy/at803x.c > +++ b/drivers/net/phy/at803x.c > @@ -110,6 +110,18 @@ static int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg, > return phy_write(phydev, AT803X_DEBUG_DATA, val); > } > > +static int at803x_enable_rx_delay(struct phy_device *phydev) > +{ > + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, 0, > + AT803X_DEBUG_RX_CLK_DLY_EN); > +} > + > +static int at803x_enable_tx_delay(struct phy_device *phydev) > +{ > + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0, > + AT803X_DEBUG_TX_CLK_DLY_EN); > +} > + > static int at803x_disable_rx_delay(struct phy_device *phydev) > { > return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, > @@ -255,23 +267,36 @@ static int at803x_config_init(struct phy_device *phydev) > if (ret < 0) > return ret; > > - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || > - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || > - phydev->interface == PHY_INTERFACE_MODE_RGMII) { > - ret = at803x_disable_rx_delay(phydev); > + /* The hardware register default is RX and TX delay enabled, so lets > + * first disable the RX and TX delays in phy and enable them based > + * on the mode selected > + */ > + ret = at803x_disable_rx_delay(phydev); > + if (ret < 0) > + return ret; > + ret = at803x_disable_tx_delay(phydev); > + if (ret < 0) > + return ret; > + > + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || > + phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { > + /* If RGMII_ID or RGMII_RXID are specified enable RX delay, > + * otherwise keep it disabled > + */ > + ret = at803x_enable_rx_delay(phydev); > if (ret < 0) > return ret; > } > > - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || > - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || > - phydev->interface == PHY_INTERFACE_MODE_RGMII) { > - ret = at803x_disable_tx_delay(phydev); > - if (ret < 0) > - return ret; > + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || > + phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { > + /* If RGMII_ID or RGMII_TXID are specified enable TX delay, > + * otherwise keep it disabled > + */ > + ret = at803x_enable_tx_delay(phydev); > } > > - return 0; > + return ret; > } > > static int at803x_ack_interrupt(struct phy_device *phydev) > - Péter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 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