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[2003:ea:8bf1:e200:e01d:4ae0:d77d:a906]) by smtp.googlemail.com with ESMTPSA id y5sm10690457wmg.31.2019.03.04.22.58.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Mar 2019 22:58:39 -0800 (PST) Subject: Re: net-next: new CL45 regression To: "S-k, Shyam-sundar" Cc: "netdev@vger.kernel.org" , "Lendacky, Thomas" , Florian Fainelli , David Miller References: <98b56f6a-935d-4835-8520-f933359e603f@gmail.com> <4f0da0bb-5a17-8802-9f38-ffa9f7cb3d19@amd.com> From: Heiner Kallweit Message-ID: Date: Tue, 5 Mar 2019 07:58:34 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <4f0da0bb-5a17-8802-9f38-ffa9f7cb3d19@amd.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On 05.03.2019 04:07, S-k, Shyam-sundar wrote: > Hi Heiner, > > On 3/5/2019 2:18 AM, Heiner Kallweit wrote: >> On 04.03.2019 15:48, S-k, Shyam-sundar wrote: >>> Hi Heiner, >>> >>> We noticed that, the recent changes for CL45 in net-next tree causing regression on AMD platforms. The following is the commit: >>> >>> 3ce2a02 net: phy: marvell10g: check for newly set aneg >>> >>> Now, I see that, this code is moved to phy-c45.c with newer commit >>> >>> 1af9f16 net: phy: add genphy_c45_check_and_restart_aneg >>> >>> With this change, the link never comes up. Can you please a re-look once before it enters mainline? >>> >>> Thanks, >>> >>> Shyam >>> >> Hi Shyam, >> >> thanks for the report. However the description quite vague, therefore I'd appreciate the following details: >> >> - The mentioned patch affects Marvell 10G PHY's only. Could you please provide: >> - exact PHY model you're using > Yes, we have on-board Marvell 88X3310 chip, which works as external PHY for AMD Ethernet controller. >> - interface mode you're using > RJ45. >> - link speed you expect and advertised speeds from both sides > Both advertised and link speeds are 1G SGMII >> >> - Some details regarding "AMD platform" would be helpful. What kind of board is it? >> >> - There's a known issue in genphy_c45_an_config_aneg(), however I'm not sure whether it could be related >> to your issue. Could you please test the following patch whether it fixes the issue for you? >> https://patchwork.ozlabs.org/patch/1051291/ > > Thank you very much! This patch fixes the problem. > Great, thanks for the feedback. Patch has been applied to net-next few hours ago. > -Shyam > > Heiner