Re: [PATCH v2 01/10] dt-bindings: ptp: Document the TSCSS on Qualcomm SA8775P and QCS8300 SoCs

[Imran Shaik <imran.shaik@oss.qualcomm.com>]

On 13-11-2026 12:33 pm, Krzysztof Kozlowski wrote:
> On 12/11/2026 10:31, Imran Shaik wrote:
>>>> +allOf:
>>>> +  - if:
>>>> +      properties:
>>>> +        reg-names:
>>>> +          contains:
>>>> +            const: etu
>>>
>>> Reason for same devices with different address space details should be
>>> provided somewhere, preferrably in description. Assuming in the first
>>> place, that this stays because how two devices can be basically
>>> identical (same compatible) if they have different programming
>>> interface?
>>>
>>
>> TSCSS is a single hardware device, split into two sub-blocks - TSC and
>> ETU, each with its own register address. Every SoC with this compatible
>> has both blocks in hardware.
> 
> This is not what the binding said.
> 
>>
>> What changes is whether the vendor/board actually wires up the ETU's
>> external event. The ETU block captures a timestamp from the TSC block
>> when an external event fires one of the ETU slices, which are driven
>> through board-level GPIO/IRQs. If a board doesn't wire any slice,
>> there's nothing in the ETU region for Linux to use.
> 
> This is not what the binding said. The binding said there are different
> types of devices, one with etu and one without. Look, easy to spot:
> 
> +  reg:
> +    minItems: 1
> +    maxItems: 2
> 

Sure, I will drop this reg handling, and add all the register spaces
support by default in next series.

Thanks,
Imran