From: Krzysztof Halasa <khc@pm.waw.pl>
To: <netdev@vger.kernel.org>
Cc: David Miller <davem@davemloft.net>,
Jeff Kirsher <jeffrey.t.kirsher@intel.com>,
Jesse Brandeburg <jesse.brandeburg@intel.com>,
Bruce Allan <bruce.w.allan@intel.com>,
PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>,
John Ronciak <john.ronciak@intel.com>
Subject: E100 RX ring buffers continued...
Date: Sat, 22 Aug 2009 16:09:00 +0200 [thread overview]
Message-ID: <m38whchrer.fsf@intrepid.localdomain> (raw)
Hi,
E100 RX buffers seem more problematic than I though.
The descriptor doesn't contain the address of the data buffer. Instead,
the descriptor is to be followed by the data buffer immediately. It's
not only the driver invention :-(
The manual mentions it's the only mode supported, aka "simplified mode".
There is also apparently unsupported and mostly undocumented "flexible
mode". The question to Intel's experts: can the flexible mode be used
anyway? I can write the code, but need info about eg. the data
structures (RFD, how does it work in flexible mode) and a confirmation
the silicon (or maybe which silicon) will work with it.
TIA.
--
Krzysztof Halasa
next reply other threads:[~2009-08-22 14:09 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-22 14:09 Krzysztof Halasa [this message]
2009-08-22 15:32 ` E100 RX ring buffers continued Krzysztof Halasa
2009-08-23 1:15 ` David Miller
2009-08-23 15:30 ` Krzysztof Halasa
2009-08-23 18:20 ` Walt Holman
2009-08-23 20:43 ` Krzysztof Halasa
2009-08-24 2:03 ` David Miller
[not found] ` <m3bpm5v65e.fsf@intrepid.localdomain>
2009-08-24 20:10 ` David Miller
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