From mboxrd@z Thu Jan 1 00:00:00 1970 From: Krzysztof Halasa Subject: E100 RX ring buffers continued... Date: Sat, 22 Aug 2009 16:09:00 +0200 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: David Miller , Jeff Kirsher , Jesse Brandeburg , Bruce Allan , PJ Waskiewicz , John Ronciak To: Return-path: Received: from khc.piap.pl ([195.187.100.11]:33881 "EHLO khc.piap.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932141AbZHVOJB (ORCPT ); Sat, 22 Aug 2009 10:09:01 -0400 Sender: netdev-owner@vger.kernel.org List-ID: Hi, E100 RX buffers seem more problematic than I though. The descriptor doesn't contain the address of the data buffer. Instead, the descriptor is to be followed by the data buffer immediately. It's not only the driver invention :-( The manual mentions it's the only mode supported, aka "simplified mode". There is also apparently unsupported and mostly undocumented "flexible mode". The question to Intel's experts: can the flexible mode be used anyway? I can write the code, but need info about eg. the data structures (RFD, how does it work in flexible mode) and a confirmation the silicon (or maybe which silicon) will work with it. TIA. -- Krzysztof Halasa