* Re: [PATCH 03/04] smc91x: add insw/outsw to default config V2
From: Nicolas Pitre @ 2008-02-22 14:33 UTC (permalink / raw)
To: Magnus Damm; +Cc: netdev, lethal, akpm
In-Reply-To: <20080222105524.7408.24180.sendpatchset@clockwork.opensource.se>
On Fri, 22 Feb 2008, Magnus Damm wrote:
> This patch makes sure SMC_insw()/SMC_outsw() are defined for the
> default configuration. Without this change BUG()s will be triggered
> when using 16-bit only platform data and the default configuration.
>
> Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Nicolas Pitre <nico@cam.org>
> ---
>
> drivers/net/smc91x.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> --- 0003/drivers/net/smc91x.h
> +++ work/drivers/net/smc91x.h 2008-02-22 15:25:39.000000000 +0900
> @@ -476,6 +476,8 @@ static inline void LPD7_SMC_outsw (unsig
> #define SMC_outb(v, a, r) writeb(v, (a) + (r))
> #define SMC_outw(v, a, r) writew(v, (a) + (r))
> #define SMC_outl(v, a, r) writel(v, (a) + (r))
> +#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
> +#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
> #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
> #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
>
>
Nicolas
^ permalink raw reply
* Re: [PATCH 02/04] smc91x: introduce platform data flags V2
From: Nicolas Pitre @ 2008-02-22 14:32 UTC (permalink / raw)
To: Magnus Damm; +Cc: netdev, lethal, akpm
In-Reply-To: <20080222105515.7408.74941.sendpatchset@clockwork.opensource.se>
On Fri, 22 Feb 2008, Magnus Damm wrote:
> This patch introduces struct smc91x_platdata and modifies the driver so
> bus width is checked during run time using SMC_nBIT() instead of
> SMC_CAN_USE_nBIT.
>
> V2 keeps static configuration lean using SMC_DYNAMIC_BUS_CONFIG.
>
> Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Nicolas Pitre <nico@cam.org>
> ---
>
> drivers/net/smc91x.c | 34 ++++++++++++++++++++++++----
> drivers/net/smc91x.h | 57 +++++++++++++++++++++++++++++-------------------
> include/linux/smc91x.h | 13 ++++++++++
> 3 files changed, 77 insertions(+), 27 deletions(-)
>
> --- 0002/drivers/net/smc91x.c
> +++ work/drivers/net/smc91x.c 2008-02-22 15:11:44.000000000 +0900
> @@ -1997,6 +1997,8 @@ err_out:
>
> static int smc_enable_device(struct platform_device *pdev)
> {
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct smc_local *lp = netdev_priv(ndev);
> unsigned long flags;
> unsigned char ecor, ecsr;
> void __iomem *addr;
> @@ -2039,7 +2041,7 @@ static int smc_enable_device(struct plat
> * Set the appropriate byte/word mode.
> */
> ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
> - if (!SMC_CAN_USE_16BIT)
> + if (!SMC_16BIT(lp))
> ecsr |= ECSR_IOIS8;
> writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
> local_irq_restore(flags);
> @@ -2124,10 +2126,11 @@ static void smc_release_datacs(struct pl
> */
> static int smc_drv_probe(struct platform_device *pdev)
> {
> + struct smc91x_platdata *pd = pdev->dev.platform_data;
> + struct smc_local *lp;
> struct net_device *ndev;
> struct resource *res, *ires;
> unsigned int __iomem *addr;
> - unsigned long irq_flags = SMC_IRQ_FLAGS;
> int ret;
>
> res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
> @@ -2152,6 +2155,27 @@ static int smc_drv_probe(struct platform
> }
> SET_NETDEV_DEV(ndev, &pdev->dev);
>
> + /* get configuration from platform data, only allow use of
> + * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
> + */
> +
> + lp = netdev_priv(ndev);
> + lp->cfg.irq_flags = SMC_IRQ_FLAGS;
> +
> +#ifdef SMC_DYNAMIC_BUS_CONFIG
> + if (pd)
> + memcpy(&lp->cfg, pd, sizeof(lp->cfg));
> + else {
> + lp->cfg.flags = SMC91X_USE_8BIT;
> + lp->cfg.flags |= SMC91X_USE_16BIT;
> + lp->cfg.flags |= SMC91X_USE_32BIT;
> + }
> +
> + lp->cfg.flags &= ~(SMC_CAN_USE_8BIT ? 0 : SMC91X_USE_8BIT);
> + lp->cfg.flags &= ~(SMC_CAN_USE_16BIT ? 0 : SMC91X_USE_16BIT);
> + lp->cfg.flags &= ~(SMC_CAN_USE_32BIT ? 0 : SMC91X_USE_32BIT);
> +#endif
> +
> ndev->dma = (unsigned char)-1;
>
> ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> @@ -2162,7 +2186,7 @@ static int smc_drv_probe(struct platform
>
> ndev->irq = ires->start;
> if (SMC_IRQ_FLAGS == -1)
> - irq_flags = ires->flags & IRQF_TRIGGER_MASK;
> + lp->cfg.irq_flags = ires->flags & IRQF_TRIGGER_MASK;
>
> ret = smc_request_attrib(pdev);
> if (ret)
> @@ -2170,6 +2194,7 @@ static int smc_drv_probe(struct platform
> #if defined(CONFIG_SA1100_ASSABET)
> NCR_0 |= NCR_ENET_OSC_EN;
> #endif
> + platform_set_drvdata(pdev, ndev);
> ret = smc_enable_device(pdev);
> if (ret)
> goto out_release_attrib;
> @@ -2188,8 +2213,7 @@ static int smc_drv_probe(struct platform
> }
> #endif
>
> - platform_set_drvdata(pdev, ndev);
> - ret = smc_probe(ndev, addr, irq_flags);
> + ret = smc_probe(ndev, addr, lp->cfg.irq_flags);
> if (ret != 0)
> goto out_iounmap;
>
> --- 0002/drivers/net/smc91x.h
> +++ work/drivers/net/smc91x.h 2008-02-22 15:01:30.000000000 +0900
> @@ -34,6 +34,7 @@
> #ifndef _SMC91X_H_
> #define _SMC91X_H_
>
> +#include <linux/smc91x.h>
>
> /*
> * Define your architecture specific bus configuration parameters here.
> @@ -481,6 +482,7 @@ static inline void LPD7_SMC_outsw (unsig
> #define RPC_LSA_DEFAULT RPC_LED_100_10
> #define RPC_LSB_DEFAULT RPC_LED_TX_RX
>
> +#define SMC_DYNAMIC_BUS_CONFIG
> #endif
>
>
> @@ -526,8 +528,19 @@ struct smc_local {
> #endif
> void __iomem *base;
> void __iomem *datacs;
> +
> + struct smc91x_platdata cfg;
> };
>
> +#ifdef SMC_DYNAMIC_BUS_CONFIG
> +#define SMC_8BIT(p) (((p)->cfg.flags & SMC91X_USE_8BIT) && SMC_CAN_USE_8BIT)
> +#define SMC_16BIT(p) (((p)->cfg.flags & SMC91X_USE_16BIT) && SMC_CAN_USE_16BIT)
> +#define SMC_32BIT(p) (((p)->cfg.flags & SMC91X_USE_32BIT) && SMC_CAN_USE_32BIT)
> +#else
> +#define SMC_8BIT(p) SMC_CAN_USE_8BIT
> +#define SMC_16BIT(p) SMC_CAN_USE_16BIT
> +#define SMC_32BIT(p) SMC_CAN_USE_32BIT
> +#endif
>
> #ifdef SMC_USE_PXA_DMA
> /*
> @@ -1108,41 +1121,41 @@ static const char * chip_ids[ 16 ] = {
> *
> * Enforce it on any 32-bit capable setup for now.
> */
> -#define SMC_MUST_ALIGN_WRITE SMC_CAN_USE_32BIT
> +#define SMC_MUST_ALIGN_WRITE(lp) SMC_32BIT(lp)
>
> #define SMC_GET_PN(lp) \
> - (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, PN_REG(lp))) \
> + (SMC_8BIT(lp) ? (SMC_inb(ioaddr, PN_REG(lp))) \
> : (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
>
> #define SMC_SET_PN(lp, x) \
> do { \
> - if (SMC_MUST_ALIGN_WRITE) \
> + if (SMC_MUST_ALIGN_WRITE(lp)) \
> SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \
> - else if (SMC_CAN_USE_8BIT) \
> + else if (SMC_8BIT(lp)) \
> SMC_outb(x, ioaddr, PN_REG(lp)); \
> else \
> SMC_outw(x, ioaddr, PN_REG(lp)); \
> } while (0)
>
> #define SMC_GET_AR(lp) \
> - (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, AR_REG(lp))) \
> + (SMC_8BIT(lp) ? (SMC_inb(ioaddr, AR_REG(lp))) \
> : (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
>
> #define SMC_GET_TXFIFO(lp) \
> - (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
> + (SMC_8BIT(lp) ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
> : (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
>
> #define SMC_GET_RXFIFO(lp) \
> - (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
> + (SMC_8BIT(lp) ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
> : (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
>
> #define SMC_GET_INT(lp) \
> - (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, INT_REG(lp))) \
> + (SMC_8BIT(lp) ? (SMC_inb(ioaddr, INT_REG(lp))) \
> : (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
>
> #define SMC_ACK_INT(lp, x) \
> do { \
> - if (SMC_CAN_USE_8BIT) \
> + if (SMC_8BIT(lp)) \
> SMC_outb(x, ioaddr, INT_REG(lp)); \
> else { \
> unsigned long __flags; \
> @@ -1155,12 +1168,12 @@ static const char * chip_ids[ 16 ] = {
> } while (0)
>
> #define SMC_GET_INT_MASK(lp) \
> - (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, IM_REG(lp))) \
> + (SMC_8BIT(lp) ? (SMC_inb(ioaddr, IM_REG(lp))) \
> : (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
>
> #define SMC_SET_INT_MASK(lp, x) \
> do { \
> - if (SMC_CAN_USE_8BIT) \
> + if (SMC_8BIT(lp)) \
> SMC_outb(x, ioaddr, IM_REG(lp)); \
> else \
> SMC_outw((x) << 8, ioaddr, INT_REG(lp)); \
> @@ -1170,7 +1183,7 @@ static const char * chip_ids[ 16 ] = {
>
> #define SMC_SELECT_BANK(lp, x) \
> do { \
> - if (SMC_MUST_ALIGN_WRITE) \
> + if (SMC_MUST_ALIGN_WRITE(lp)) \
> SMC_outl((x)<<16, ioaddr, 12<<SMC_IO_SHIFT); \
> else \
> SMC_outw(x, ioaddr, BANK_SELECT); \
> @@ -1208,7 +1221,7 @@ static const char * chip_ids[ 16 ] = {
>
> #define SMC_SET_PTR(lp, x) \
> do { \
> - if (SMC_MUST_ALIGN_WRITE) \
> + if (SMC_MUST_ALIGN_WRITE(lp)) \
> SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \
> else \
> SMC_outw(x, ioaddr, PTR_REG(lp)); \
> @@ -1226,7 +1239,7 @@ static const char * chip_ids[ 16 ] = {
>
> #define SMC_SET_RPC(lp, x) \
> do { \
> - if (SMC_MUST_ALIGN_WRITE) \
> + if (SMC_MUST_ALIGN_WRITE(lp)) \
> SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \
> else \
> SMC_outw(x, ioaddr, RPC_REG(lp)); \
> @@ -1267,7 +1280,7 @@ static const char * chip_ids[ 16 ] = {
>
> #define SMC_PUT_PKT_HDR(lp, status, length) \
> do { \
> - if (SMC_CAN_USE_32BIT) \
> + if (SMC_32BIT(lp)) \
> SMC_outl((status) | (length)<<16, ioaddr, \
> DATA_REG(lp)); \
> else { \
> @@ -1278,7 +1291,7 @@ static const char * chip_ids[ 16 ] = {
>
> #define SMC_GET_PKT_HDR(lp, status, length) \
> do { \
> - if (SMC_CAN_USE_32BIT) { \
> + if (SMC_32BIT(lp)) { \
> unsigned int __val = SMC_inl(ioaddr, DATA_REG(lp)); \
> (status) = __val & 0xffff; \
> (length) = __val >> 16; \
> @@ -1290,7 +1303,7 @@ static const char * chip_ids[ 16 ] = {
>
> #define SMC_PUSH_DATA(lp, p, l) \
> do { \
> - if (SMC_CAN_USE_32BIT) { \
> + if (SMC_32BIT(lp)) { \
> void *__ptr = (p); \
> int __len = (l); \
> void __iomem *__ioaddr = ioaddr; \
> @@ -1308,15 +1321,15 @@ static const char * chip_ids[ 16 ] = {
> SMC_outw(*((u16 *)__ptr), ioaddr, \
> DATA_REG(lp)); \
> } \
> - } else if (SMC_CAN_USE_16BIT) \
> + } else if (SMC_16BIT(lp)) \
> SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
> - else if (SMC_CAN_USE_8BIT) \
> + else if (SMC_8BIT(lp)) \
> SMC_outsb(ioaddr, DATA_REG(lp), p, l); \
> } while (0)
>
> #define SMC_PULL_DATA(lp, p, l) \
> do { \
> - if (SMC_CAN_USE_32BIT) { \
> + if (SMC_32BIT(lp)) { \
> void *__ptr = (p); \
> int __len = (l); \
> void __iomem *__ioaddr = ioaddr; \
> @@ -1343,9 +1356,9 @@ static const char * chip_ids[ 16 ] = {
> __ioaddr = lp->datacs; \
> __len += 2; \
> SMC_insl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
> - } else if (SMC_CAN_USE_16BIT) \
> + } else if (SMC_16BIT(lp)) \
> SMC_insw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
> - else if (SMC_CAN_USE_8BIT) \
> + else if (SMC_8BIT(lp)) \
> SMC_insb(ioaddr, DATA_REG(lp), p, l); \
> } while (0)
>
> --- /dev/null
> +++ work/include/linux/smc91x.h 2008-02-22 14:58:42.000000000 +0900
> @@ -0,0 +1,13 @@
> +#ifndef __SMC91X_H__
> +#define __SMC91X_H__
> +
> +#define SMC91X_USE_8BIT (1 << 0)
> +#define SMC91X_USE_16BIT (1 << 1)
> +#define SMC91X_USE_32BIT (1 << 2)
> +
> +struct smc91x_platdata {
> + unsigned long flags;
> + unsigned long irq_flags; /* IRQF_... */
> +};
> +
> +#endif /* __SMC91X_H__ */
>
Nicolas
^ permalink raw reply
* Re: [PATCH 01/04] smc91x: pass along private data V2
From: Nicolas Pitre @ 2008-02-22 14:26 UTC (permalink / raw)
To: Magnus Damm; +Cc: netdev, lethal, akpm
In-Reply-To: <20080222105505.7408.73708.sendpatchset@clockwork.opensource.se>
On Fri, 22 Feb 2008, Magnus Damm wrote:
> Pass a private data pointer to macros and functions. This makes it easy
> to later on make run time decisions. This patch does not change any logic.
> These changes should be optimized away during compilation.
>
> V2 changes the macro argument name from "priv" to "lp".
>
> Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Nicolas Pitre <nico@cam.org>
> ---
>
> drivers/net/smc91x.c | 301 +++++++++++++++++++++++++-------------------------
> drivers/net/smc91x.h | 254 +++++++++++++++++++++---------------------
> 2 files changed, 280 insertions(+), 275 deletions(-)
>
> --- 0001/drivers/net/smc91x.c
> +++ work/drivers/net/smc91x.c 2008-02-22 14:07:43.000000000 +0900
> @@ -220,22 +220,22 @@ static void PRINT_PKT(u_char *buf, int l
>
>
> /* this enables an interrupt in the interrupt mask register */
> -#define SMC_ENABLE_INT(x) do { \
> +#define SMC_ENABLE_INT(lp, x) do { \
> unsigned char mask; \
> spin_lock_irq(&lp->lock); \
> - mask = SMC_GET_INT_MASK(); \
> + mask = SMC_GET_INT_MASK(lp); \
> mask |= (x); \
> - SMC_SET_INT_MASK(mask); \
> + SMC_SET_INT_MASK(lp, mask); \
> spin_unlock_irq(&lp->lock); \
> } while (0)
>
> /* this disables an interrupt from the interrupt mask register */
> -#define SMC_DISABLE_INT(x) do { \
> +#define SMC_DISABLE_INT(lp, x) do { \
> unsigned char mask; \
> spin_lock_irq(&lp->lock); \
> - mask = SMC_GET_INT_MASK(); \
> + mask = SMC_GET_INT_MASK(lp); \
> mask &= ~(x); \
> - SMC_SET_INT_MASK(mask); \
> + SMC_SET_INT_MASK(lp, mask); \
> spin_unlock_irq(&lp->lock); \
> } while (0)
>
> @@ -244,10 +244,10 @@ static void PRINT_PKT(u_char *buf, int l
> * if at all, but let's avoid deadlocking the system if the hardware
> * decides to go south.
> */
> -#define SMC_WAIT_MMU_BUSY() do { \
> - if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
> +#define SMC_WAIT_MMU_BUSY(lp) do { \
> + if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
> unsigned long timeout = jiffies + 2; \
> - while (SMC_GET_MMU_CMD() & MC_BUSY) { \
> + while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
> if (time_after(jiffies, timeout)) { \
> printk("%s: timeout %s line %d\n", \
> dev->name, __FILE__, __LINE__); \
> @@ -273,8 +273,8 @@ static void smc_reset(struct net_device
>
> /* Disable all interrupts, block TX tasklet */
> spin_lock_irq(&lp->lock);
> - SMC_SELECT_BANK(2);
> - SMC_SET_INT_MASK(0);
> + SMC_SELECT_BANK(lp, 2);
> + SMC_SET_INT_MASK(lp, 0);
> pending_skb = lp->pending_tx_skb;
> lp->pending_tx_skb = NULL;
> spin_unlock_irq(&lp->lock);
> @@ -290,15 +290,15 @@ static void smc_reset(struct net_device
> * This resets the registers mostly to defaults, but doesn't
> * affect EEPROM. That seems unnecessary
> */
> - SMC_SELECT_BANK(0);
> - SMC_SET_RCR(RCR_SOFTRST);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_RCR(lp, RCR_SOFTRST);
>
> /*
> * Setup the Configuration Register
> * This is necessary because the CONFIG_REG is not affected
> * by a soft reset
> */
> - SMC_SELECT_BANK(1);
> + SMC_SELECT_BANK(lp, 1);
>
> cfg = CONFIG_DEFAULT;
>
> @@ -316,7 +316,7 @@ static void smc_reset(struct net_device
> */
> cfg |= CONFIG_EPH_POWER_EN;
>
> - SMC_SET_CONFIG(cfg);
> + SMC_SET_CONFIG(lp, cfg);
>
> /* this should pause enough for the chip to be happy */
> /*
> @@ -329,12 +329,12 @@ static void smc_reset(struct net_device
> udelay(1);
>
> /* Disable transmit and receive functionality */
> - SMC_SELECT_BANK(0);
> - SMC_SET_RCR(RCR_CLEAR);
> - SMC_SET_TCR(TCR_CLEAR);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_RCR(lp, RCR_CLEAR);
> + SMC_SET_TCR(lp, TCR_CLEAR);
>
> - SMC_SELECT_BANK(1);
> - ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
> + SMC_SELECT_BANK(lp, 1);
> + ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
>
> /*
> * Set the control register to automatically release successfully
> @@ -345,12 +345,12 @@ static void smc_reset(struct net_device
> ctl |= CTL_AUTO_RELEASE;
> else
> ctl &= ~CTL_AUTO_RELEASE;
> - SMC_SET_CTL(ctl);
> + SMC_SET_CTL(lp, ctl);
>
> /* Reset the MMU */
> - SMC_SELECT_BANK(2);
> - SMC_SET_MMU_CMD(MC_RESET);
> - SMC_WAIT_MMU_BUSY();
> + SMC_SELECT_BANK(lp, 2);
> + SMC_SET_MMU_CMD(lp, MC_RESET);
> + SMC_WAIT_MMU_BUSY(lp);
> }
>
> /*
> @@ -365,19 +365,19 @@ static void smc_enable(struct net_device
> DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
>
> /* see the header file for options in TCR/RCR DEFAULT */
> - SMC_SELECT_BANK(0);
> - SMC_SET_TCR(lp->tcr_cur_mode);
> - SMC_SET_RCR(lp->rcr_cur_mode);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_TCR(lp, lp->tcr_cur_mode);
> + SMC_SET_RCR(lp, lp->rcr_cur_mode);
>
> - SMC_SELECT_BANK(1);
> - SMC_SET_MAC_ADDR(dev->dev_addr);
> + SMC_SELECT_BANK(lp, 1);
> + SMC_SET_MAC_ADDR(lp, dev->dev_addr);
>
> /* now, enable interrupts */
> mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
> if (lp->version >= (CHIP_91100 << 4))
> mask |= IM_MDINT;
> - SMC_SELECT_BANK(2);
> - SMC_SET_INT_MASK(mask);
> + SMC_SELECT_BANK(lp, 2);
> + SMC_SET_INT_MASK(lp, mask);
>
> /*
> * From this point the register bank must _NOT_ be switched away
> @@ -400,8 +400,8 @@ static void smc_shutdown(struct net_devi
>
> /* no more interrupts for me */
> spin_lock_irq(&lp->lock);
> - SMC_SELECT_BANK(2);
> - SMC_SET_INT_MASK(0);
> + SMC_SELECT_BANK(lp, 2);
> + SMC_SET_INT_MASK(lp, 0);
> pending_skb = lp->pending_tx_skb;
> lp->pending_tx_skb = NULL;
> spin_unlock_irq(&lp->lock);
> @@ -409,14 +409,14 @@ static void smc_shutdown(struct net_devi
> dev_kfree_skb(pending_skb);
>
> /* and tell the card to stay away from that nasty outside world */
> - SMC_SELECT_BANK(0);
> - SMC_SET_RCR(RCR_CLEAR);
> - SMC_SET_TCR(TCR_CLEAR);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_RCR(lp, RCR_CLEAR);
> + SMC_SET_TCR(lp, TCR_CLEAR);
>
> #ifdef POWER_DOWN
> /* finally, shut the chip down */
> - SMC_SELECT_BANK(1);
> - SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
> + SMC_SELECT_BANK(lp, 1);
> + SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
> #endif
> }
>
> @@ -431,17 +431,17 @@ static inline void smc_rcv(struct net_d
>
> DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
>
> - packet_number = SMC_GET_RXFIFO();
> + packet_number = SMC_GET_RXFIFO(lp);
> if (unlikely(packet_number & RXFIFO_REMPTY)) {
> PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
> return;
> }
>
> /* read from start of packet */
> - SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
> + SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
>
> /* First two words are status and packet length */
> - SMC_GET_PKT_HDR(status, packet_len);
> + SMC_GET_PKT_HDR(lp, status, packet_len);
> packet_len &= 0x07ff; /* mask off top bits */
> DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
> dev->name, packet_number, status,
> @@ -460,8 +460,8 @@ static inline void smc_rcv(struct net_d
> dev->name, packet_len, status);
> status |= RS_TOOSHORT;
> }
> - SMC_WAIT_MMU_BUSY();
> - SMC_SET_MMU_CMD(MC_RELEASE);
> + SMC_WAIT_MMU_BUSY(lp);
> + SMC_SET_MMU_CMD(lp, MC_RELEASE);
> dev->stats.rx_errors++;
> if (status & RS_ALGNERR)
> dev->stats.rx_frame_errors++;
> @@ -490,8 +490,8 @@ static inline void smc_rcv(struct net_d
> if (unlikely(skb == NULL)) {
> printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
> dev->name);
> - SMC_WAIT_MMU_BUSY();
> - SMC_SET_MMU_CMD(MC_RELEASE);
> + SMC_WAIT_MMU_BUSY(lp);
> + SMC_SET_MMU_CMD(lp, MC_RELEASE);
> dev->stats.rx_dropped++;
> return;
> }
> @@ -510,10 +510,10 @@ static inline void smc_rcv(struct net_d
> */
> data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
> data = skb_put(skb, data_len);
> - SMC_PULL_DATA(data, packet_len - 4);
> + SMC_PULL_DATA(lp, data, packet_len - 4);
>
> - SMC_WAIT_MMU_BUSY();
> - SMC_SET_MMU_CMD(MC_RELEASE);
> + SMC_WAIT_MMU_BUSY(lp);
> + SMC_SET_MMU_CMD(lp, MC_RELEASE);
>
> PRINT_PKT(data, packet_len - 4);
>
> @@ -591,7 +591,7 @@ static void smc_hardware_send_pkt(unsign
> }
> lp->pending_tx_skb = NULL;
>
> - packet_no = SMC_GET_AR();
> + packet_no = SMC_GET_AR(lp);
> if (unlikely(packet_no & AR_FAILED)) {
> printk("%s: Memory allocation failed.\n", dev->name);
> dev->stats.tx_errors++;
> @@ -601,8 +601,8 @@ static void smc_hardware_send_pkt(unsign
> }
>
> /* point to the beginning of the packet */
> - SMC_SET_PN(packet_no);
> - SMC_SET_PTR(PTR_AUTOINC);
> + SMC_SET_PN(lp, packet_no);
> + SMC_SET_PTR(lp, PTR_AUTOINC);
>
> buf = skb->data;
> len = skb->len;
> @@ -614,13 +614,13 @@ static void smc_hardware_send_pkt(unsign
> * Send the packet length (+6 for status words, length, and ctl.
> * The card will pad to 64 bytes with zeroes if packet is too small.
> */
> - SMC_PUT_PKT_HDR(0, len + 6);
> + SMC_PUT_PKT_HDR(lp, 0, len + 6);
>
> /* send the actual data */
> - SMC_PUSH_DATA(buf, len & ~1);
> + SMC_PUSH_DATA(lp, buf, len & ~1);
>
> /* Send final ctl word with the last byte if there is one */
> - SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
> + SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
>
> /*
> * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
> @@ -634,14 +634,14 @@ static void smc_hardware_send_pkt(unsign
> netif_stop_queue(dev);
>
> /* queue the packet for TX */
> - SMC_SET_MMU_CMD(MC_ENQUEUE);
> + SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
> smc_special_unlock(&lp->lock);
>
> dev->trans_start = jiffies;
> dev->stats.tx_packets++;
> dev->stats.tx_bytes += len;
>
> - SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
> + SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
>
> done: if (!THROTTLE_TX_PKTS)
> netif_wake_queue(dev);
> @@ -688,7 +688,7 @@ static int smc_hard_start_xmit(struct sk
> smc_special_lock(&lp->lock);
>
> /* now, try to allocate the memory */
> - SMC_SET_MMU_CMD(MC_ALLOC | numPages);
> + SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
>
> /*
> * Poll the chip for a short amount of time in case the
> @@ -696,9 +696,9 @@ static int smc_hard_start_xmit(struct sk
> */
> poll_count = MEMORY_WAIT_TIME;
> do {
> - status = SMC_GET_INT();
> + status = SMC_GET_INT(lp);
> if (status & IM_ALLOC_INT) {
> - SMC_ACK_INT(IM_ALLOC_INT);
> + SMC_ACK_INT(lp, IM_ALLOC_INT);
> break;
> }
> } while (--poll_count);
> @@ -710,7 +710,7 @@ static int smc_hard_start_xmit(struct sk
> /* oh well, wait until the chip finds memory later */
> netif_stop_queue(dev);
> DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
> - SMC_ENABLE_INT(IM_ALLOC_INT);
> + SMC_ENABLE_INT(lp, IM_ALLOC_INT);
> } else {
> /*
> * Allocation succeeded: push packet to the chip's own memory
> @@ -736,19 +736,19 @@ static void smc_tx(struct net_device *de
> DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
>
> /* If the TX FIFO is empty then nothing to do */
> - packet_no = SMC_GET_TXFIFO();
> + packet_no = SMC_GET_TXFIFO(lp);
> if (unlikely(packet_no & TXFIFO_TEMPTY)) {
> PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
> return;
> }
>
> /* select packet to read from */
> - saved_packet = SMC_GET_PN();
> - SMC_SET_PN(packet_no);
> + saved_packet = SMC_GET_PN(lp);
> + SMC_SET_PN(lp, packet_no);
>
> /* read the first word (status word) from this packet */
> - SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
> - SMC_GET_PKT_HDR(tx_status, pkt_len);
> + SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
> + SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
> DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
> dev->name, tx_status, packet_no);
>
> @@ -771,17 +771,17 @@ static void smc_tx(struct net_device *de
> }
>
> /* kill the packet */
> - SMC_WAIT_MMU_BUSY();
> - SMC_SET_MMU_CMD(MC_FREEPKT);
> + SMC_WAIT_MMU_BUSY(lp);
> + SMC_SET_MMU_CMD(lp, MC_FREEPKT);
>
> /* Don't restore Packet Number Reg until busy bit is cleared */
> - SMC_WAIT_MMU_BUSY();
> - SMC_SET_PN(saved_packet);
> + SMC_WAIT_MMU_BUSY(lp);
> + SMC_SET_PN(lp, saved_packet);
>
> /* re-enable transmit */
> - SMC_SELECT_BANK(0);
> - SMC_SET_TCR(lp->tcr_cur_mode);
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_TCR(lp, lp->tcr_cur_mode);
> + SMC_SELECT_BANK(lp, 2);
> }
>
>
> @@ -793,7 +793,7 @@ static void smc_mii_out(struct net_devic
> void __iomem *ioaddr = lp->base;
> unsigned int mii_reg, mask;
>
> - mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
> + mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
> mii_reg |= MII_MDOE;
>
> for (mask = 1 << (bits - 1); mask; mask >>= 1) {
> @@ -802,9 +802,9 @@ static void smc_mii_out(struct net_devic
> else
> mii_reg &= ~MII_MDO;
>
> - SMC_SET_MII(mii_reg);
> + SMC_SET_MII(lp, mii_reg);
> udelay(MII_DELAY);
> - SMC_SET_MII(mii_reg | MII_MCLK);
> + SMC_SET_MII(lp, mii_reg | MII_MCLK);
> udelay(MII_DELAY);
> }
> }
> @@ -815,16 +815,16 @@ static unsigned int smc_mii_in(struct ne
> void __iomem *ioaddr = lp->base;
> unsigned int mii_reg, mask, val;
>
> - mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
> - SMC_SET_MII(mii_reg);
> + mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
> + SMC_SET_MII(lp, mii_reg);
>
> for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
> - if (SMC_GET_MII() & MII_MDI)
> + if (SMC_GET_MII(lp) & MII_MDI)
> val |= mask;
>
> - SMC_SET_MII(mii_reg);
> + SMC_SET_MII(lp, mii_reg);
> udelay(MII_DELAY);
> - SMC_SET_MII(mii_reg | MII_MCLK);
> + SMC_SET_MII(lp, mii_reg | MII_MCLK);
> udelay(MII_DELAY);
> }
>
> @@ -840,7 +840,7 @@ static int smc_phy_read(struct net_devic
> void __iomem *ioaddr = lp->base;
> unsigned int phydata;
>
> - SMC_SELECT_BANK(3);
> + SMC_SELECT_BANK(lp, 3);
>
> /* Idle - 32 ones */
> smc_mii_out(dev, 0xffffffff, 32);
> @@ -852,12 +852,12 @@ static int smc_phy_read(struct net_devic
> phydata = smc_mii_in(dev, 18);
>
> /* Return to idle state */
> - SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
> + SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
>
> DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
> __FUNCTION__, phyaddr, phyreg, phydata);
>
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 2);
> return phydata;
> }
>
> @@ -870,7 +870,7 @@ static void smc_phy_write(struct net_dev
> struct smc_local *lp = netdev_priv(dev);
> void __iomem *ioaddr = lp->base;
>
> - SMC_SELECT_BANK(3);
> + SMC_SELECT_BANK(lp, 3);
>
> /* Idle - 32 ones */
> smc_mii_out(dev, 0xffffffff, 32);
> @@ -879,12 +879,12 @@ static void smc_phy_write(struct net_dev
> smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
>
> /* Return to idle state */
> - SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
> + SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
>
> DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
> __FUNCTION__, phyaddr, phyreg, phydata);
>
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 2);
> }
>
> /*
> @@ -957,9 +957,9 @@ static int smc_phy_fixed(struct net_devi
> smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
>
> /* Re-Configure the Receive/Phy Control register */
> - SMC_SELECT_BANK(0);
> - SMC_SET_RPC(lp->rpc_cur_mode);
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_RPC(lp, lp->rpc_cur_mode);
> + SMC_SELECT_BANK(lp, 2);
>
> return 1;
> }
> @@ -1050,8 +1050,8 @@ static void smc_phy_check_media(struct n
> lp->tcr_cur_mode &= ~TCR_SWFDUP;
> }
>
> - SMC_SELECT_BANK(0);
> - SMC_SET_TCR(lp->tcr_cur_mode);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_TCR(lp, lp->tcr_cur_mode);
> }
> }
>
> @@ -1100,8 +1100,8 @@ static void smc_phy_configure(struct wor
> PHY_INT_SPDDET | PHY_INT_DPLXDET);
>
> /* Configure the Receive/Phy Control register */
> - SMC_SELECT_BANK(0);
> - SMC_SET_RPC(lp->rpc_cur_mode);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_RPC(lp, lp->rpc_cur_mode);
>
> /* If the user requested no auto neg, then go set his request */
> if (lp->mii.force_media) {
> @@ -1158,7 +1158,7 @@ static void smc_phy_configure(struct wor
> smc_phy_check_media(dev, 1);
>
> smc_phy_configure_exit:
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 2);
> spin_unlock_irq(&lp->lock);
> lp->work_pending = 0;
> }
> @@ -1200,9 +1200,9 @@ static void smc_10bt_check_media(struct
>
> old_carrier = netif_carrier_ok(dev) ? 1 : 0;
>
> - SMC_SELECT_BANK(0);
> - new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 0);
> + new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
> + SMC_SELECT_BANK(lp, 2);
>
> if (init || (old_carrier != new_carrier)) {
> if (!new_carrier) {
> @@ -1224,11 +1224,11 @@ static void smc_eph_interrupt(struct net
>
> smc_10bt_check_media(dev, 0);
>
> - SMC_SELECT_BANK(1);
> - ctl = SMC_GET_CTL();
> - SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
> - SMC_SET_CTL(ctl);
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 1);
> + ctl = SMC_GET_CTL(lp);
> + SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
> + SMC_SET_CTL(lp, ctl);
> + SMC_SELECT_BANK(lp, 2);
> }
>
> /*
> @@ -1252,22 +1252,22 @@ static irqreturn_t smc_interrupt(int irq
> * ISR. */
> SMC_INTERRUPT_PREAMBLE;
>
> - saved_pointer = SMC_GET_PTR();
> - mask = SMC_GET_INT_MASK();
> - SMC_SET_INT_MASK(0);
> + saved_pointer = SMC_GET_PTR(lp);
> + mask = SMC_GET_INT_MASK(lp);
> + SMC_SET_INT_MASK(lp, 0);
>
> /* set a timeout value, so I don't stay here forever */
> timeout = MAX_IRQ_LOOPS;
>
> do {
> - status = SMC_GET_INT();
> + status = SMC_GET_INT(lp);
>
> DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
> dev->name, status, mask,
> - ({ int meminfo; SMC_SELECT_BANK(0);
> - meminfo = SMC_GET_MIR();
> - SMC_SELECT_BANK(2); meminfo; }),
> - SMC_GET_FIFO());
> + ({ int meminfo; SMC_SELECT_BANK(lp, 0);
> + meminfo = SMC_GET_MIR(lp);
> + SMC_SELECT_BANK(lp, 2); meminfo; }),
> + SMC_GET_FIFO(lp));
>
> status &= mask;
> if (!status)
> @@ -1277,7 +1277,7 @@ static irqreturn_t smc_interrupt(int irq
> /* do this before RX as it will free memory quickly */
> DBG(3, "%s: TX int\n", dev->name);
> smc_tx(dev);
> - SMC_ACK_INT(IM_TX_INT);
> + SMC_ACK_INT(lp, IM_TX_INT);
> if (THROTTLE_TX_PKTS)
> netif_wake_queue(dev);
> } else if (status & IM_RCV_INT) {
> @@ -1292,9 +1292,9 @@ static irqreturn_t smc_interrupt(int irq
> mask &= ~IM_TX_EMPTY_INT;
>
> /* update stats */
> - SMC_SELECT_BANK(0);
> - card_stats = SMC_GET_COUNTER();
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 0);
> + card_stats = SMC_GET_COUNTER(lp);
> + SMC_SELECT_BANK(lp, 2);
>
> /* single collisions */
> dev->stats.collisions += card_stats & 0xF;
> @@ -1304,26 +1304,26 @@ static irqreturn_t smc_interrupt(int irq
> dev->stats.collisions += card_stats & 0xF;
> } else if (status & IM_RX_OVRN_INT) {
> DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
> - ({ int eph_st; SMC_SELECT_BANK(0);
> - eph_st = SMC_GET_EPH_STATUS();
> - SMC_SELECT_BANK(2); eph_st; }) );
> - SMC_ACK_INT(IM_RX_OVRN_INT);
> + ({ int eph_st; SMC_SELECT_BANK(lp, 0);
> + eph_st = SMC_GET_EPH_STATUS(lp);
> + SMC_SELECT_BANK(lp, 2); eph_st; }));
> + SMC_ACK_INT(lp, IM_RX_OVRN_INT);
> dev->stats.rx_errors++;
> dev->stats.rx_fifo_errors++;
> } else if (status & IM_EPH_INT) {
> smc_eph_interrupt(dev);
> } else if (status & IM_MDINT) {
> - SMC_ACK_INT(IM_MDINT);
> + SMC_ACK_INT(lp, IM_MDINT);
> smc_phy_interrupt(dev);
> } else if (status & IM_ERCV_INT) {
> - SMC_ACK_INT(IM_ERCV_INT);
> + SMC_ACK_INT(lp, IM_ERCV_INT);
> PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
> }
> } while (--timeout);
>
> /* restore register states */
> - SMC_SET_PTR(saved_pointer);
> - SMC_SET_INT_MASK(mask);
> + SMC_SET_PTR(lp, saved_pointer);
> + SMC_SET_INT_MASK(lp, mask);
> spin_unlock(&lp->lock);
>
> if (timeout == MAX_IRQ_LOOPS)
> @@ -1366,13 +1366,13 @@ static void smc_timeout(struct net_devic
> DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
>
> spin_lock_irq(&lp->lock);
> - status = SMC_GET_INT();
> - mask = SMC_GET_INT_MASK();
> - fifo = SMC_GET_FIFO();
> - SMC_SELECT_BANK(0);
> - eph_st = SMC_GET_EPH_STATUS();
> - meminfo = SMC_GET_MIR();
> - SMC_SELECT_BANK(2);
> + status = SMC_GET_INT(lp);
> + mask = SMC_GET_INT_MASK(lp);
> + fifo = SMC_GET_FIFO(lp);
> + SMC_SELECT_BANK(lp, 0);
> + eph_st = SMC_GET_EPH_STATUS(lp);
> + meminfo = SMC_GET_MIR(lp);
> + SMC_SELECT_BANK(lp, 2);
> spin_unlock_irq(&lp->lock);
> PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
> "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
> @@ -1492,13 +1492,13 @@ static void smc_set_multicast_list(struc
> }
>
> spin_lock_irq(&lp->lock);
> - SMC_SELECT_BANK(0);
> - SMC_SET_RCR(lp->rcr_cur_mode);
> + SMC_SELECT_BANK(lp, 0);
> + SMC_SET_RCR(lp, lp->rcr_cur_mode);
> if (update_multicast) {
> - SMC_SELECT_BANK(3);
> - SMC_SET_MCAST(multicast_table);
> + SMC_SELECT_BANK(lp, 3);
> + SMC_SET_MCAST(lp, multicast_table);
> }
> - SMC_SELECT_BANK(2);
> + SMC_SELECT_BANK(lp, 2);
> spin_unlock_irq(&lp->lock);
> }
>
> @@ -1702,8 +1702,9 @@ static const struct ethtool_ops smc_etht
> * I just deleted auto_irq.c, since it was never built...
> * --jgarzik
> */
> -static int __init smc_findirq(void __iomem *ioaddr)
> +static int __init smc_findirq(struct smc_local *lp)
> {
> + void __iomem *ioaddr = lp->base;
> int timeout = 20;
> unsigned long cookie;
>
> @@ -1717,14 +1718,14 @@ static int __init smc_findirq(void __iom
> * when done.
> */
> /* enable ALLOCation interrupts ONLY */
> - SMC_SELECT_BANK(2);
> - SMC_SET_INT_MASK(IM_ALLOC_INT);
> + SMC_SELECT_BANK(lp, 2);
> + SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
>
> /*
> * Allocate 512 bytes of memory. Note that the chip was just
> * reset so all the memory is available
> */
> - SMC_SET_MMU_CMD(MC_ALLOC | 1);
> + SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
>
> /*
> * Wait until positive that the interrupt has been generated
> @@ -1732,7 +1733,7 @@ static int __init smc_findirq(void __iom
> do {
> int int_status;
> udelay(10);
> - int_status = SMC_GET_INT();
> + int_status = SMC_GET_INT(lp);
> if (int_status & IM_ALLOC_INT)
> break; /* got the interrupt */
> } while (--timeout);
> @@ -1745,7 +1746,7 @@ static int __init smc_findirq(void __iom
> */
>
> /* and disable all interrupts again */
> - SMC_SET_INT_MASK(0);
> + SMC_SET_INT_MASK(lp, 0);
>
> /* and return what I found */
> return probe_irq_off(cookie);
> @@ -1788,7 +1789,7 @@ static int __init smc_probe(struct net_d
> DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
>
> /* First, see if the high byte is 0x33 */
> - val = SMC_CURRENT_BANK();
> + val = SMC_CURRENT_BANK(lp);
> DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
> if ((val & 0xFF00) != 0x3300) {
> if ((val & 0xFF) == 0x33) {
> @@ -1804,8 +1805,8 @@ static int __init smc_probe(struct net_d
> * The above MIGHT indicate a device, but I need to write to
> * further test this.
> */
> - SMC_SELECT_BANK(0);
> - val = SMC_CURRENT_BANK();
> + SMC_SELECT_BANK(lp, 0);
> + val = SMC_CURRENT_BANK(lp);
> if ((val & 0xFF00) != 0x3300) {
> retval = -ENODEV;
> goto err_out;
> @@ -1817,8 +1818,8 @@ static int __init smc_probe(struct net_d
> * register to bank 1, so I can access the base address
> * register
> */
> - SMC_SELECT_BANK(1);
> - val = SMC_GET_BASE();
> + SMC_SELECT_BANK(lp, 1);
> + val = SMC_GET_BASE(lp);
> val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
> if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
> printk("%s: IOADDR %p doesn't match configuration (%x).\n",
> @@ -1830,8 +1831,8 @@ static int __init smc_probe(struct net_d
> * recognize. These might need to be added to later,
> * as future revisions could be added.
> */
> - SMC_SELECT_BANK(3);
> - revision_register = SMC_GET_REV();
> + SMC_SELECT_BANK(lp, 3);
> + revision_register = SMC_GET_REV(lp);
> DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
> version_string = chip_ids[ (revision_register >> 4) & 0xF];
> if (!version_string || (revision_register & 0xff00) != 0x3300) {
> @@ -1855,8 +1856,8 @@ static int __init smc_probe(struct net_d
> spin_lock_init(&lp->lock);
>
> /* Get the MAC address */
> - SMC_SELECT_BANK(1);
> - SMC_GET_MAC_ADDR(dev->dev_addr);
> + SMC_SELECT_BANK(lp, 1);
> + SMC_GET_MAC_ADDR(lp, dev->dev_addr);
>
> /* now, reset the chip, and put it into a known state */
> smc_reset(dev);
> @@ -1881,7 +1882,7 @@ static int __init smc_probe(struct net_d
>
> trials = 3;
> while (trials--) {
> - dev->irq = smc_findirq(ioaddr);
> + dev->irq = smc_findirq(lp);
> if (dev->irq)
> break;
> /* kick the card and try again */
> --- 0001/drivers/net/smc91x.h
> +++ work/drivers/net/smc91x.h 2008-02-22 14:05:18.000000000 +0900
> @@ -720,7 +720,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Transmit Control Register
> /* BANK 0 */
> -#define TCR_REG SMC_REG(0x0000, 0)
> +#define TCR_REG(lp) SMC_REG(lp, 0x0000, 0)
> #define TCR_ENABLE 0x0001 // When 1 we can transmit
> #define TCR_LOOP 0x0002 // Controls output pin LBK
> #define TCR_FORCOL 0x0004 // When 1 will force a collision
> @@ -739,7 +739,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // EPH Status Register
> /* BANK 0 */
> -#define EPH_STATUS_REG SMC_REG(0x0002, 0)
> +#define EPH_STATUS_REG(lp) SMC_REG(lp, 0x0002, 0)
> #define ES_TX_SUC 0x0001 // Last TX was successful
> #define ES_SNGL_COL 0x0002 // Single collision detected for last tx
> #define ES_MUL_COL 0x0004 // Multiple collisions detected for last tx
> @@ -758,7 +758,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Receive Control Register
> /* BANK 0 */
> -#define RCR_REG SMC_REG(0x0004, 0)
> +#define RCR_REG(lp) SMC_REG(lp, 0x0004, 0)
> #define RCR_RX_ABORT 0x0001 // Set if a rx frame was aborted
> #define RCR_PRMS 0x0002 // Enable promiscuous mode
> #define RCR_ALMUL 0x0004 // When set accepts all multicast frames
> @@ -775,17 +775,17 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Counter Register
> /* BANK 0 */
> -#define COUNTER_REG SMC_REG(0x0006, 0)
> +#define COUNTER_REG(lp) SMC_REG(lp, 0x0006, 0)
>
>
> // Memory Information Register
> /* BANK 0 */
> -#define MIR_REG SMC_REG(0x0008, 0)
> +#define MIR_REG(lp) SMC_REG(lp, 0x0008, 0)
>
>
> // Receive/Phy Control Register
> /* BANK 0 */
> -#define RPC_REG SMC_REG(0x000A, 0)
> +#define RPC_REG(lp) SMC_REG(lp, 0x000A, 0)
> #define RPC_SPEED 0x2000 // When 1 PHY is in 100Mbps mode.
> #define RPC_DPLX 0x1000 // When 1 PHY is in Full-Duplex Mode
> #define RPC_ANEG 0x0800 // When 1 PHY is in Auto-Negotiate Mode
> @@ -819,7 +819,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Configuration Reg
> /* BANK 1 */
> -#define CONFIG_REG SMC_REG(0x0000, 1)
> +#define CONFIG_REG(lp) SMC_REG(lp, 0x0000, 1)
> #define CONFIG_EXT_PHY 0x0200 // 1=external MII, 0=internal Phy
> #define CONFIG_GPCNTRL 0x0400 // Inverse value drives pin nCNTRL
> #define CONFIG_NO_WAIT 0x1000 // When 1 no extra wait states on ISA bus
> @@ -831,24 +831,24 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Base Address Register
> /* BANK 1 */
> -#define BASE_REG SMC_REG(0x0002, 1)
> +#define BASE_REG(lp) SMC_REG(lp, 0x0002, 1)
>
>
> // Individual Address Registers
> /* BANK 1 */
> -#define ADDR0_REG SMC_REG(0x0004, 1)
> -#define ADDR1_REG SMC_REG(0x0006, 1)
> -#define ADDR2_REG SMC_REG(0x0008, 1)
> +#define ADDR0_REG(lp) SMC_REG(lp, 0x0004, 1)
> +#define ADDR1_REG(lp) SMC_REG(lp, 0x0006, 1)
> +#define ADDR2_REG(lp) SMC_REG(lp, 0x0008, 1)
>
>
> // General Purpose Register
> /* BANK 1 */
> -#define GP_REG SMC_REG(0x000A, 1)
> +#define GP_REG(lp) SMC_REG(lp, 0x000A, 1)
>
>
> // Control Register
> /* BANK 1 */
> -#define CTL_REG SMC_REG(0x000C, 1)
> +#define CTL_REG(lp) SMC_REG(lp, 0x000C, 1)
> #define CTL_RCV_BAD 0x4000 // When 1 bad CRC packets are received
> #define CTL_AUTO_RELEASE 0x0800 // When 1 tx pages are released automatically
> #define CTL_LE_ENABLE 0x0080 // When 1 enables Link Error interrupt
> @@ -861,7 +861,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // MMU Command Register
> /* BANK 2 */
> -#define MMU_CMD_REG SMC_REG(0x0000, 2)
> +#define MMU_CMD_REG(lp) SMC_REG(lp, 0x0000, 2)
> #define MC_BUSY 1 // When 1 the last release has not completed
> #define MC_NOP (0<<5) // No Op
> #define MC_ALLOC (1<<5) // OR with number of 256 byte packets
> @@ -875,30 +875,30 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Packet Number Register
> /* BANK 2 */
> -#define PN_REG SMC_REG(0x0002, 2)
> +#define PN_REG(lp) SMC_REG(lp, 0x0002, 2)
>
>
> // Allocation Result Register
> /* BANK 2 */
> -#define AR_REG SMC_REG(0x0003, 2)
> +#define AR_REG(lp) SMC_REG(lp, 0x0003, 2)
> #define AR_FAILED 0x80 // Alocation Failed
>
>
> // TX FIFO Ports Register
> /* BANK 2 */
> -#define TXFIFO_REG SMC_REG(0x0004, 2)
> +#define TXFIFO_REG(lp) SMC_REG(lp, 0x0004, 2)
> #define TXFIFO_TEMPTY 0x80 // TX FIFO Empty
>
> // RX FIFO Ports Register
> /* BANK 2 */
> -#define RXFIFO_REG SMC_REG(0x0005, 2)
> +#define RXFIFO_REG(lp) SMC_REG(lp, 0x0005, 2)
> #define RXFIFO_REMPTY 0x80 // RX FIFO Empty
>
> -#define FIFO_REG SMC_REG(0x0004, 2)
> +#define FIFO_REG(lp) SMC_REG(lp, 0x0004, 2)
>
> // Pointer Register
> /* BANK 2 */
> -#define PTR_REG SMC_REG(0x0006, 2)
> +#define PTR_REG(lp) SMC_REG(lp, 0x0006, 2)
> #define PTR_RCV 0x8000 // 1=Receive area, 0=Transmit area
> #define PTR_AUTOINC 0x4000 // Auto increment the pointer on each access
> #define PTR_READ 0x2000 // When 1 the operation is a read
> @@ -906,17 +906,17 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Data Register
> /* BANK 2 */
> -#define DATA_REG SMC_REG(0x0008, 2)
> +#define DATA_REG(lp) SMC_REG(lp, 0x0008, 2)
>
>
> // Interrupt Status/Acknowledge Register
> /* BANK 2 */
> -#define INT_REG SMC_REG(0x000C, 2)
> +#define INT_REG(lp) SMC_REG(lp, 0x000C, 2)
>
>
> // Interrupt Mask Register
> /* BANK 2 */
> -#define IM_REG SMC_REG(0x000D, 2)
> +#define IM_REG(lp) SMC_REG(lp, 0x000D, 2)
> #define IM_MDINT 0x80 // PHY MI Register 18 Interrupt
> #define IM_ERCV_INT 0x40 // Early Receive Interrupt
> #define IM_EPH_INT 0x20 // Set by Ethernet Protocol Handler section
> @@ -929,15 +929,15 @@ smc_pxa_dma_irq(int dma, void *dummy)
>
> // Multicast Table Registers
> /* BANK 3 */
> -#define MCAST_REG1 SMC_REG(0x0000, 3)
> -#define MCAST_REG2 SMC_REG(0x0002, 3)
> -#define MCAST_REG3 SMC_REG(0x0004, 3)
> -#define MCAST_REG4 SMC_REG(0x0006, 3)
> +#define MCAST_REG1(lp) SMC_REG(lp, 0x0000, 3)
> +#define MCAST_REG2(lp) SMC_REG(lp, 0x0002, 3)
> +#define MCAST_REG3(lp) SMC_REG(lp, 0x0004, 3)
> +#define MCAST_REG4(lp) SMC_REG(lp, 0x0006, 3)
>
>
> // Management Interface Register (MII)
> /* BANK 3 */
> -#define MII_REG SMC_REG(0x0008, 3)
> +#define MII_REG(lp) SMC_REG(lp, 0x0008, 3)
> #define MII_MSK_CRS100 0x4000 // Disables CRS100 detection during tx half dup
> #define MII_MDOE 0x0008 // MII Output Enable
> #define MII_MCLK 0x0004 // MII Clock, pin MDCLK
> @@ -948,20 +948,20 @@ smc_pxa_dma_irq(int dma, void *dummy)
> // Revision Register
> /* BANK 3 */
> /* ( hi: chip id low: rev # ) */
> -#define REV_REG SMC_REG(0x000A, 3)
> +#define REV_REG(lp) SMC_REG(lp, 0x000A, 3)
>
>
> // Early RCV Register
> /* BANK 3 */
> /* this is NOT on SMC9192 */
> -#define ERCV_REG SMC_REG(0x000C, 3)
> +#define ERCV_REG(lp) SMC_REG(lp, 0x000C, 3)
> #define ERCV_RCV_DISCRD 0x0080 // When 1 discards a packet being received
> #define ERCV_THRESHOLD 0x001F // ERCV Threshold Mask
>
>
> // External Register
> /* BANK 7 */
> -#define EXT_REG SMC_REG(0x0000, 7)
> +#define EXT_REG(lp) SMC_REG(lp, 0x0000, 7)
>
>
> #define CHIP_9192 3
> @@ -1085,9 +1085,9 @@ static const char * chip_ids[ 16 ] = {
> */
>
> #if SMC_DEBUG > 0
> -#define SMC_REG(reg, bank) \
> +#define SMC_REG(lp, reg, bank) \
> ({ \
> - int __b = SMC_CURRENT_BANK(); \
> + int __b = SMC_CURRENT_BANK(lp); \
> if (unlikely((__b & ~0xf0) != (0x3300 | bank))) { \
> printk( "%s: bank reg screwed (0x%04x)\n", \
> CARDNAME, __b ); \
> @@ -1096,7 +1096,7 @@ static const char * chip_ids[ 16 ] = {
> reg<<SMC_IO_SHIFT; \
> })
> #else
> -#define SMC_REG(reg, bank) (reg<<SMC_IO_SHIFT)
> +#define SMC_REG(lp, reg, bank) (reg<<SMC_IO_SHIFT)
> #endif
>
> /*
> @@ -1110,65 +1110,65 @@ static const char * chip_ids[ 16 ] = {
> */
> #define SMC_MUST_ALIGN_WRITE SMC_CAN_USE_32BIT
>
> -#define SMC_GET_PN() \
> - ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, PN_REG)) \
> - : (SMC_inw(ioaddr, PN_REG) & 0xFF) )
> +#define SMC_GET_PN(lp) \
> + (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, PN_REG(lp))) \
> + : (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
>
> -#define SMC_SET_PN(x) \
> +#define SMC_SET_PN(lp, x) \
> do { \
> if (SMC_MUST_ALIGN_WRITE) \
> - SMC_outl((x)<<16, ioaddr, SMC_REG(0, 2)); \
> + SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \
> else if (SMC_CAN_USE_8BIT) \
> - SMC_outb(x, ioaddr, PN_REG); \
> + SMC_outb(x, ioaddr, PN_REG(lp)); \
> else \
> - SMC_outw(x, ioaddr, PN_REG); \
> + SMC_outw(x, ioaddr, PN_REG(lp)); \
> } while (0)
>
> -#define SMC_GET_AR() \
> - ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, AR_REG)) \
> - : (SMC_inw(ioaddr, PN_REG) >> 8) )
> +#define SMC_GET_AR(lp) \
> + (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, AR_REG(lp))) \
> + : (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
>
> -#define SMC_GET_TXFIFO() \
> - ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, TXFIFO_REG)) \
> - : (SMC_inw(ioaddr, TXFIFO_REG) & 0xFF) )
> +#define SMC_GET_TXFIFO(lp) \
> + (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
> + : (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
>
> -#define SMC_GET_RXFIFO() \
> - ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, RXFIFO_REG)) \
> - : (SMC_inw(ioaddr, TXFIFO_REG) >> 8) )
> +#define SMC_GET_RXFIFO(lp) \
> + (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
> + : (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
>
> -#define SMC_GET_INT() \
> - ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, INT_REG)) \
> - : (SMC_inw(ioaddr, INT_REG) & 0xFF) )
> +#define SMC_GET_INT(lp) \
> + (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, INT_REG(lp))) \
> + : (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
>
> -#define SMC_ACK_INT(x) \
> +#define SMC_ACK_INT(lp, x) \
> do { \
> if (SMC_CAN_USE_8BIT) \
> - SMC_outb(x, ioaddr, INT_REG); \
> + SMC_outb(x, ioaddr, INT_REG(lp)); \
> else { \
> unsigned long __flags; \
> int __mask; \
> local_irq_save(__flags); \
> - __mask = SMC_inw( ioaddr, INT_REG ) & ~0xff; \
> - SMC_outw( __mask | (x), ioaddr, INT_REG ); \
> + __mask = SMC_inw(ioaddr, INT_REG(lp)) & ~0xff; \
> + SMC_outw(__mask | (x), ioaddr, INT_REG(lp)); \
> local_irq_restore(__flags); \
> } \
> } while (0)
>
> -#define SMC_GET_INT_MASK() \
> - ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, IM_REG)) \
> - : (SMC_inw( ioaddr, INT_REG ) >> 8) )
> +#define SMC_GET_INT_MASK(lp) \
> + (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, IM_REG(lp))) \
> + : (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
>
> -#define SMC_SET_INT_MASK(x) \
> +#define SMC_SET_INT_MASK(lp, x) \
> do { \
> if (SMC_CAN_USE_8BIT) \
> - SMC_outb(x, ioaddr, IM_REG); \
> + SMC_outb(x, ioaddr, IM_REG(lp)); \
> else \
> - SMC_outw((x) << 8, ioaddr, INT_REG); \
> + SMC_outw((x) << 8, ioaddr, INT_REG(lp)); \
> } while (0)
>
> -#define SMC_CURRENT_BANK() SMC_inw(ioaddr, BANK_SELECT)
> +#define SMC_CURRENT_BANK(lp) SMC_inw(ioaddr, BANK_SELECT)
>
> -#define SMC_SELECT_BANK(x) \
> +#define SMC_SELECT_BANK(lp, x) \
> do { \
> if (SMC_MUST_ALIGN_WRITE) \
> SMC_outl((x)<<16, ioaddr, 12<<SMC_IO_SHIFT); \
> @@ -1176,118 +1176,119 @@ static const char * chip_ids[ 16 ] = {
> SMC_outw(x, ioaddr, BANK_SELECT); \
> } while (0)
>
> -#define SMC_GET_BASE() SMC_inw(ioaddr, BASE_REG)
> +#define SMC_GET_BASE(lp) SMC_inw(ioaddr, BASE_REG(lp))
>
> -#define SMC_SET_BASE(x) SMC_outw(x, ioaddr, BASE_REG)
> +#define SMC_SET_BASE(lp, x) SMC_outw(x, ioaddr, BASE_REG(lp))
>
> -#define SMC_GET_CONFIG() SMC_inw(ioaddr, CONFIG_REG)
> +#define SMC_GET_CONFIG(lp) SMC_inw(ioaddr, CONFIG_REG(lp))
>
> -#define SMC_SET_CONFIG(x) SMC_outw(x, ioaddr, CONFIG_REG)
> +#define SMC_SET_CONFIG(lp, x) SMC_outw(x, ioaddr, CONFIG_REG(lp))
>
> -#define SMC_GET_COUNTER() SMC_inw(ioaddr, COUNTER_REG)
> +#define SMC_GET_COUNTER(lp) SMC_inw(ioaddr, COUNTER_REG(lp))
>
> -#define SMC_GET_CTL() SMC_inw(ioaddr, CTL_REG)
> +#define SMC_GET_CTL(lp) SMC_inw(ioaddr, CTL_REG(lp))
>
> -#define SMC_SET_CTL(x) SMC_outw(x, ioaddr, CTL_REG)
> +#define SMC_SET_CTL(lp, x) SMC_outw(x, ioaddr, CTL_REG(lp))
>
> -#define SMC_GET_MII() SMC_inw(ioaddr, MII_REG)
> +#define SMC_GET_MII(lp) SMC_inw(ioaddr, MII_REG(lp))
>
> -#define SMC_SET_MII(x) SMC_outw(x, ioaddr, MII_REG)
> +#define SMC_SET_MII(lp, x) SMC_outw(x, ioaddr, MII_REG(lp))
>
> -#define SMC_GET_MIR() SMC_inw(ioaddr, MIR_REG)
> +#define SMC_GET_MIR(lp) SMC_inw(ioaddr, MIR_REG(lp))
>
> -#define SMC_SET_MIR(x) SMC_outw(x, ioaddr, MIR_REG)
> +#define SMC_SET_MIR(lp, x) SMC_outw(x, ioaddr, MIR_REG(lp))
>
> -#define SMC_GET_MMU_CMD() SMC_inw(ioaddr, MMU_CMD_REG)
> +#define SMC_GET_MMU_CMD(lp) SMC_inw(ioaddr, MMU_CMD_REG(lp))
>
> -#define SMC_SET_MMU_CMD(x) SMC_outw(x, ioaddr, MMU_CMD_REG)
> +#define SMC_SET_MMU_CMD(lp, x) SMC_outw(x, ioaddr, MMU_CMD_REG(lp))
>
> -#define SMC_GET_FIFO() SMC_inw(ioaddr, FIFO_REG)
> +#define SMC_GET_FIFO(lp) SMC_inw(ioaddr, FIFO_REG(lp))
>
> -#define SMC_GET_PTR() SMC_inw(ioaddr, PTR_REG)
> +#define SMC_GET_PTR(lp) SMC_inw(ioaddr, PTR_REG(lp))
>
> -#define SMC_SET_PTR(x) \
> +#define SMC_SET_PTR(lp, x) \
> do { \
> if (SMC_MUST_ALIGN_WRITE) \
> - SMC_outl((x)<<16, ioaddr, SMC_REG(4, 2)); \
> + SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \
> else \
> - SMC_outw(x, ioaddr, PTR_REG); \
> + SMC_outw(x, ioaddr, PTR_REG(lp)); \
> } while (0)
>
> -#define SMC_GET_EPH_STATUS() SMC_inw(ioaddr, EPH_STATUS_REG)
> +#define SMC_GET_EPH_STATUS(lp) SMC_inw(ioaddr, EPH_STATUS_REG(lp))
>
> -#define SMC_GET_RCR() SMC_inw(ioaddr, RCR_REG)
> +#define SMC_GET_RCR(lp) SMC_inw(ioaddr, RCR_REG(lp))
>
> -#define SMC_SET_RCR(x) SMC_outw(x, ioaddr, RCR_REG)
> +#define SMC_SET_RCR(lp, x) SMC_outw(x, ioaddr, RCR_REG(lp))
>
> -#define SMC_GET_REV() SMC_inw(ioaddr, REV_REG)
> +#define SMC_GET_REV(lp) SMC_inw(ioaddr, REV_REG(lp))
>
> -#define SMC_GET_RPC() SMC_inw(ioaddr, RPC_REG)
> +#define SMC_GET_RPC(lp) SMC_inw(ioaddr, RPC_REG(lp))
>
> -#define SMC_SET_RPC(x) \
> +#define SMC_SET_RPC(lp, x) \
> do { \
> if (SMC_MUST_ALIGN_WRITE) \
> - SMC_outl((x)<<16, ioaddr, SMC_REG(8, 0)); \
> + SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \
> else \
> - SMC_outw(x, ioaddr, RPC_REG); \
> + SMC_outw(x, ioaddr, RPC_REG(lp)); \
> } while (0)
>
> -#define SMC_GET_TCR() SMC_inw(ioaddr, TCR_REG)
> +#define SMC_GET_TCR(lp) SMC_inw(ioaddr, TCR_REG(lp))
>
> -#define SMC_SET_TCR(x) SMC_outw(x, ioaddr, TCR_REG)
> +#define SMC_SET_TCR(lp, x) SMC_outw(x, ioaddr, TCR_REG(lp))
>
> #ifndef SMC_GET_MAC_ADDR
> -#define SMC_GET_MAC_ADDR(addr) \
> +#define SMC_GET_MAC_ADDR(lp, addr) \
> do { \
> unsigned int __v; \
> - __v = SMC_inw( ioaddr, ADDR0_REG ); \
> + __v = SMC_inw(ioaddr, ADDR0_REG(lp)); \
> addr[0] = __v; addr[1] = __v >> 8; \
> - __v = SMC_inw( ioaddr, ADDR1_REG ); \
> + __v = SMC_inw(ioaddr, ADDR1_REG(lp)); \
> addr[2] = __v; addr[3] = __v >> 8; \
> - __v = SMC_inw( ioaddr, ADDR2_REG ); \
> + __v = SMC_inw(ioaddr, ADDR2_REG(lp)); \
> addr[4] = __v; addr[5] = __v >> 8; \
> } while (0)
> #endif
>
> -#define SMC_SET_MAC_ADDR(addr) \
> +#define SMC_SET_MAC_ADDR(lp, addr) \
> do { \
> - SMC_outw( addr[0]|(addr[1] << 8), ioaddr, ADDR0_REG ); \
> - SMC_outw( addr[2]|(addr[3] << 8), ioaddr, ADDR1_REG ); \
> - SMC_outw( addr[4]|(addr[5] << 8), ioaddr, ADDR2_REG ); \
> + SMC_outw(addr[0]|(addr[1] << 8), ioaddr, ADDR0_REG(lp)); \
> + SMC_outw(addr[2]|(addr[3] << 8), ioaddr, ADDR1_REG(lp)); \
> + SMC_outw(addr[4]|(addr[5] << 8), ioaddr, ADDR2_REG(lp)); \
> } while (0)
>
> -#define SMC_SET_MCAST(x) \
> +#define SMC_SET_MCAST(lp, x) \
> do { \
> const unsigned char *mt = (x); \
> - SMC_outw( mt[0] | (mt[1] << 8), ioaddr, MCAST_REG1 ); \
> - SMC_outw( mt[2] | (mt[3] << 8), ioaddr, MCAST_REG2 ); \
> - SMC_outw( mt[4] | (mt[5] << 8), ioaddr, MCAST_REG3 ); \
> - SMC_outw( mt[6] | (mt[7] << 8), ioaddr, MCAST_REG4 ); \
> + SMC_outw(mt[0] | (mt[1] << 8), ioaddr, MCAST_REG1(lp)); \
> + SMC_outw(mt[2] | (mt[3] << 8), ioaddr, MCAST_REG2(lp)); \
> + SMC_outw(mt[4] | (mt[5] << 8), ioaddr, MCAST_REG3(lp)); \
> + SMC_outw(mt[6] | (mt[7] << 8), ioaddr, MCAST_REG4(lp)); \
> } while (0)
>
> -#define SMC_PUT_PKT_HDR(status, length) \
> +#define SMC_PUT_PKT_HDR(lp, status, length) \
> do { \
> if (SMC_CAN_USE_32BIT) \
> - SMC_outl((status) | (length)<<16, ioaddr, DATA_REG); \
> + SMC_outl((status) | (length)<<16, ioaddr, \
> + DATA_REG(lp)); \
> else { \
> - SMC_outw(status, ioaddr, DATA_REG); \
> - SMC_outw(length, ioaddr, DATA_REG); \
> + SMC_outw(status, ioaddr, DATA_REG(lp)); \
> + SMC_outw(length, ioaddr, DATA_REG(lp)); \
> } \
> } while (0)
>
> -#define SMC_GET_PKT_HDR(status, length) \
> +#define SMC_GET_PKT_HDR(lp, status, length) \
> do { \
> if (SMC_CAN_USE_32BIT) { \
> - unsigned int __val = SMC_inl(ioaddr, DATA_REG); \
> + unsigned int __val = SMC_inl(ioaddr, DATA_REG(lp)); \
> (status) = __val & 0xffff; \
> (length) = __val >> 16; \
> } else { \
> - (status) = SMC_inw(ioaddr, DATA_REG); \
> - (length) = SMC_inw(ioaddr, DATA_REG); \
> + (status) = SMC_inw(ioaddr, DATA_REG(lp)); \
> + (length) = SMC_inw(ioaddr, DATA_REG(lp)); \
> } \
> } while (0)
>
> -#define SMC_PUSH_DATA(p, l) \
> +#define SMC_PUSH_DATA(lp, p, l) \
> do { \
> if (SMC_CAN_USE_32BIT) { \
> void *__ptr = (p); \
> @@ -1295,23 +1296,25 @@ static const char * chip_ids[ 16 ] = {
> void __iomem *__ioaddr = ioaddr; \
> if (__len >= 2 && (unsigned long)__ptr & 2) { \
> __len -= 2; \
> - SMC_outw(*(u16 *)__ptr, ioaddr, DATA_REG); \
> + SMC_outw(*(u16 *)__ptr, ioaddr, \
> + DATA_REG(lp)); \
> __ptr += 2; \
> } \
> if (SMC_CAN_USE_DATACS && lp->datacs) \
> __ioaddr = lp->datacs; \
> - SMC_outsl(__ioaddr, DATA_REG, __ptr, __len>>2); \
> + SMC_outsl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
> if (__len & 2) { \
> __ptr += (__len & ~3); \
> - SMC_outw(*((u16 *)__ptr), ioaddr, DATA_REG); \
> + SMC_outw(*((u16 *)__ptr), ioaddr, \
> + DATA_REG(lp)); \
> } \
> } else if (SMC_CAN_USE_16BIT) \
> - SMC_outsw(ioaddr, DATA_REG, p, (l) >> 1); \
> + SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
> else if (SMC_CAN_USE_8BIT) \
> - SMC_outsb(ioaddr, DATA_REG, p, l); \
> + SMC_outsb(ioaddr, DATA_REG(lp), p, l); \
> } while (0)
>
> -#define SMC_PULL_DATA(p, l) \
> +#define SMC_PULL_DATA(lp, p, l) \
> do { \
> if (SMC_CAN_USE_32BIT) { \
> void *__ptr = (p); \
> @@ -1333,16 +1336,17 @@ static const char * chip_ids[ 16 ] = {
> */ \
> __ptr -= 2; \
> __len += 2; \
> - SMC_SET_PTR(2|PTR_READ|PTR_RCV|PTR_AUTOINC); \
> + SMC_SET_PTR(lp, \
> + 2|PTR_READ|PTR_RCV|PTR_AUTOINC); \
> } \
> if (SMC_CAN_USE_DATACS && lp->datacs) \
> __ioaddr = lp->datacs; \
> __len += 2; \
> - SMC_insl(__ioaddr, DATA_REG, __ptr, __len>>2); \
> + SMC_insl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
> } else if (SMC_CAN_USE_16BIT) \
> - SMC_insw(ioaddr, DATA_REG, p, (l) >> 1); \
> + SMC_insw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
> else if (SMC_CAN_USE_8BIT) \
> - SMC_insb(ioaddr, DATA_REG, p, l); \
> + SMC_insb(ioaddr, DATA_REG(lp), p, l); \
> } while (0)
>
> #endif /* _SMC91X_H_ */
>
Nicolas
^ permalink raw reply
* [PATCH] iproute2: fix ip manpage typo (syntax error)
From: Andreas Henriksson @ 2008-02-22 13:11 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: netdev
Hello Stephen!
The patches branch of the debian packaging repo, at
git://git.debian.org/git/collab-maint/pkg-iproute, now has four patches still
pending. (Not resending, since they've all been posted multiple times before.
Pick them up from the repo if you're interested.)
Here's the latest addition:
commit 3c904bb5933257533f4afecf805ca5a548a8e885
Author: Andreas Henriksson <andreas@fatal.se>
Date: Fri Feb 22 13:57:10 2008 +0100
Fix typo (syntax error) in ip(8) manpage.
Caught by lintian (debian package checker).
diff --git a/man/man8/ip.8 b/man/man8/ip.8
index 1a57a42..c46a9f6 100644
--- a/man/man8/ip.8
+++ b/man/man8/ip.8
@@ -940,7 +940,7 @@ Linux-2.x can pack routes into several routing
tables identified by a number in the range from 1 to 255 or by
name from the file
.B /etc/iproute2/rt_tables
-. By default all normal routes are inserted into the
+By default all normal routes are inserted into the
.B main
table (ID 254) and the kernel only uses this table when calculating routes.
--
Regards,
Andreas Henriksson
^ permalink raw reply related
* [PATCH][NET] sock.c: sk_dst_lock lockdep keys and names per af_family
From: Jarek Poplawski @ 2008-02-22 14:16 UTC (permalink / raw)
To: James Chapman; +Cc: David Miller, Paul Mackerras, netdev
In-Reply-To: <47BD4A34.7070606@katalix.com>
On Thu, Feb 21, 2008 at 09:53:56AM +0000, James Chapman wrote:
...
> The lockups still happen, but I think they are now due to a different
> problem, as you say.
...
I hope, this patch should help to remove some possibly false lockdep
warnings during this current testing.
Regards,
Jarek P.
------------------->
Subject: [NET] sock.c: sk_dst_lock lockdep keys and names per af_family
Initialize sk_dst_lock lockdep keys and names per af_family.
Additionally some reorder is done in lockdep related code to keep
it in one place and to use static key tables only when needed.
Signed-off-by: Jarek Poplawski <jarkao2@gmail.com>
[not tested]
---
net/core/sock.c | 79 +++++++++++++++++++++++++++++++++++++++----------------
1 files changed, 56 insertions(+), 23 deletions(-)
diff --git a/net/core/sock.c b/net/core/sock.c
index 433715f..18c33d2 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -131,14 +131,17 @@
#include <net/tcp.h>
#endif
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+
/*
- * Each address family might have different locking rules, so we have
- * one slock key per address family:
+ * Each address family might have different locking rules, so we have one:
+ * sk_lock, slock, sk_callback_lock and sk_dst_lock key per address family:
*/
static struct lock_class_key af_family_keys[AF_MAX];
static struct lock_class_key af_family_slock_keys[AF_MAX];
+static struct lock_class_key af_family_callback_keys[AF_MAX];
+static struct lock_class_key af_family_dst_keys[AF_MAX];
-#ifdef CONFIG_DEBUG_LOCK_ALLOC
/*
* Make lock validator output more readable. (we pre-construct these
* strings build-time, so that runtime initialization of socket
@@ -186,13 +189,52 @@ static const char *af_family_clock_key_strings[AF_MAX+1] = {
"clock-AF_TIPC" , "clock-AF_BLUETOOTH", "clock-AF_IUCV" ,
"clock-AF_RXRPC" , "clock-AF_MAX"
};
-#endif
+static const char *af_family_dst_key_strings[AF_MAX+1] = {
+ "sk_dst-AF_UNSPEC", "sk_dst-AF_UNIX" , "sk_dst-AF_INET" ,
+ "sk_dst-AF_AX25" , "sk_dst-AF_IPX" , "sk_dst-AF_APPLETALK",
+ "sk_dst-AF_NETROM", "sk_dst-AF_BRIDGE" , "sk_dst-AF_ATMPVC" ,
+ "sk_dst-AF_X25" , "sk_dst-AF_INET6" , "sk_dst-AF_ROSE" ,
+ "sk_dst-AF_DECnet", "sk_dst-AF_NETBEUI" , "sk_dst-AF_SECURITY" ,
+ "sk_dst-AF_KEY" , "sk_dst-AF_NETLINK" , "sk_dst-AF_PACKET" ,
+ "sk_dst-AF_ASH" , "sk_dst-AF_ECONET" , "sk_dst-AF_ATMSVC" ,
+ "sk_dst-21" , "sk_dst-AF_SNA" , "sk_dst-AF_IRDA" ,
+ "sk_dst-AF_PPPOX" , "sk_dst-AF_WANPIPE" , "sk_dst-AF_LLC" ,
+ "sk_dst-27" , "sk_dst-28" , "sk_dst-29" ,
+ "sk_dst-AF_TIPC" , "sk_dst-AF_BLUETOOTH", "sk_dst-AF_IUCV" ,
+ "sk_dst-AF_RXRPC" , "sk_dst-AF_MAX"
+};
-/*
- * sk_callback_lock locking rules are per-address-family,
- * so split the lock classes by using a per-AF key:
- */
-static struct lock_class_key af_callback_keys[AF_MAX];
+
+static inline void sock_lock_init(struct sock *sk)
+{
+ sock_lock_init_class_and_name(sk,
+ af_family_slock_key_strings[sk->sk_family],
+ af_family_slock_keys + sk->sk_family,
+ af_family_key_strings[sk->sk_family],
+ af_family_keys + sk->sk_family);
+}
+
+#define lockdep_set_sk_callback_lock(lock, family) \
+ lockdep_set_class_and_name(lock, \
+ af_family_callback_keys + (family), \
+ af_family_clock_key_strings[(family)])
+
+#define lockdep_set_sk_dst_lock(lock, family) \
+ lockdep_set_class_and_name(lock, \
+ af_family_dst_keys + (family), \
+ af_family_dst_key_strings[(family)])
+
+#else
+
+static inline void sock_lock_init(struct sock *sk)
+{
+ sock_lock_init_class_and_name(sk, 0, 0, 0, 0);
+}
+
+#define lockdep_set_sk_callback_lock(lock, family) do {} while (0)
+#define lockdep_set_sk_dst_lock(lock, family) do {} while (0)
+
+#endif /* CONFIG_DEBUG_LOCK_ALLOC */
/* Take into consideration the size of the struct sk_buff overhead in the
* determination of these values, since that is non-constant across
@@ -866,14 +908,6 @@ lenout:
*
* (We also register the sk_lock with the lock validator.)
*/
-static inline void sock_lock_init(struct sock *sk)
-{
- sock_lock_init_class_and_name(sk,
- af_family_slock_key_strings[sk->sk_family],
- af_family_slock_keys + sk->sk_family,
- af_family_key_strings[sk->sk_family],
- af_family_keys + sk->sk_family);
-}
static void sock_copy(struct sock *nsk, const struct sock *osk)
{
@@ -1014,10 +1048,10 @@ struct sock *sk_clone(const struct sock *sk, const gfp_t priority)
#endif
rwlock_init(&newsk->sk_dst_lock);
+ lockdep_set_sk_dst_lock(&newsk->sk_dst_lock, newsk->sk_family);
rwlock_init(&newsk->sk_callback_lock);
- lockdep_set_class_and_name(&newsk->sk_callback_lock,
- af_callback_keys + newsk->sk_family,
- af_family_clock_key_strings[newsk->sk_family]);
+ lockdep_set_sk_callback_lock(&newsk->sk_callback_lock,
+ newsk->sk_family);
newsk->sk_dst_cache = NULL;
newsk->sk_wmem_queued = 0;
@@ -1703,10 +1737,9 @@ void sock_init_data(struct socket *sock, struct sock *sk)
sk->sk_sleep = NULL;
rwlock_init(&sk->sk_dst_lock);
+ lockdep_set_sk_dst_lock(&sk->sk_dst_lock, sk->sk_family);
rwlock_init(&sk->sk_callback_lock);
- lockdep_set_class_and_name(&sk->sk_callback_lock,
- af_callback_keys + sk->sk_family,
- af_family_clock_key_strings[sk->sk_family]);
+ lockdep_set_sk_callback_lock(&sk->sk_callback_lock, sk->sk_family);
sk->sk_state_change = sock_def_wakeup;
sk->sk_data_ready = sock_def_readable;
^ permalink raw reply related
* Re: [RTNL]: Validate hardware and broadcast address attribute for RTM_NEWLINK
From: Patrick McHardy @ 2008-02-22 13:33 UTC (permalink / raw)
To: Thomas Graf; +Cc: davem, netdev
In-Reply-To: <20080222133135.GC20815@postel.suug.ch>
Thomas Graf wrote:
> * Patrick McHardy <kaber@trash.net> 2008-02-22 14:05
>> Minor nitpick: it would be more logical to put this in the
>>
>> if (dev) {
>> ...
>>
>> branch a bit below since thats the only path that leads to
>> do_setlink(). That would also allow to remove the
>> if (dev) check from validate_linkmsg().
>
> I knew this question would come up :-)
:)
> The reason I did it this way is to keep validate_linkmsg() generic
> and make it possible to put validation code which must also apply
> to new links (dev==NULL) into that function.
OK, thanks for the explanation.
^ permalink raw reply
* Re: [RTNL]: Validate hardware and broadcast address attribute for RTM_NEWLINK
From: Thomas Graf @ 2008-02-22 13:31 UTC (permalink / raw)
To: Patrick McHardy; +Cc: davem, netdev
In-Reply-To: <47BEC89E.9030909@trash.net>
* Patrick McHardy <kaber@trash.net> 2008-02-22 14:05
> Minor nitpick: it would be more logical to put this in the
>
> if (dev) {
> ...
>
> branch a bit below since thats the only path that leads to
> do_setlink(). That would also allow to remove the
> if (dev) check from validate_linkmsg().
I knew this question would come up :-)
The reason I did it this way is to keep validate_linkmsg() generic
and make it possible to put validation code which must also apply
to new links (dev==NULL) into that function.
^ permalink raw reply
* Re: lockdep warning
From: Jiri Kosina @ 2008-02-22 13:20 UTC (permalink / raw)
To: Anders Eriksson; +Cc: linux-kernel, netdev
In-Reply-To: <20080222131608.7FC1E93C12F@tippex.mynet.homeunix.org>
On Fri, 22 Feb 2008, Anders Eriksson wrote:
> > This needs to be CCed to netdev.
> > Any chance that
> > git revert 69cc64d8d92
> > makes this report go away?
> I'll have to install a git repo to check, or maybe you can send me the diff to
> reverse vs. 2.6.25-rc2?
diff --git a/net/core/neighbour.c b/net/core/neighbour.c
index 7bb6a9a..a16cf1e 100644
--- a/net/core/neighbour.c
+++ b/net/core/neighbour.c
@@ -834,12 +834,18 @@ static void neigh_timer_handler(unsigned long arg)
}
if (neigh->nud_state & (NUD_INCOMPLETE | NUD_PROBE)) {
struct sk_buff *skb = skb_peek(&neigh->arp_queue);
-
+ /* keep skb alive even if arp_queue overflows */
+ if (skb)
+ skb_get(skb);
+ write_unlock(&neigh->lock);
neigh->ops->solicit(neigh, skb);
atomic_inc(&neigh->probes);
- }
+ if (skb)
+ kfree_skb(skb);
+ } else {
out:
- write_unlock(&neigh->lock);
+ write_unlock(&neigh->lock);
+ }
if (notify)
neigh_update_notify(neigh);
diff --git a/net/ipv4/arp.c b/net/ipv4/arp.c
index c663fa5..8e17f65 100644
--- a/net/ipv4/arp.c
+++ b/net/ipv4/arp.c
@@ -368,6 +368,7 @@ static void arp_solicit(struct neighbour *neigh, struct sk_buff *skb)
if (!(neigh->nud_state&NUD_VALID))
printk(KERN_DEBUG "trying to ucast probe in NUD_INVALID\n");
dst_ha = neigh->ha;
+ read_lock_bh(&neigh->lock);
} else if ((probes -= neigh->parms->app_probes) < 0) {
#ifdef CONFIG_ARPD
neigh_app_ns(neigh);
@@ -377,6 +378,8 @@ static void arp_solicit(struct neighbour *neigh, struct sk_buff *skb)
arp_send(ARPOP_REQUEST, ETH_P_ARP, target, dev, saddr,
dst_ha, dev->dev_addr, NULL);
+ if (dst_ha)
+ read_unlock_bh(&neigh->lock);
}
static int arp_ignore(struct in_device *in_dev, __be32 sip, __be32 tip)
^ permalink raw reply related
* Re: lockdep warning
From: Anders Eriksson @ 2008-02-22 13:16 UTC (permalink / raw)
To: Jiri Kosina; +Cc: Anders Eriksson, linux-kernel, netdev
In-Reply-To: <Pine.LNX.4.64.0802221214020.7699@twin.jikos.cz>
jkosina@suse.cz said:
> This needs to be CCed to netdev.
> Any chance that
> git revert 69cc64d8d92
> makes this report go away?
I'll have to install a git repo to check, or maybe you can send me the diff to
reverse vs. 2.6.25-rc2?
^ permalink raw reply
* Taiwan's glory--computer industry
From: 『Taiwan News Express』 @ 2008-02-22 13:14 UTC (permalink / raw)
To: netdev
<http://www.taiwannews.com.tw/static/express/080222-01.pdf>
<http://www.taiwannews.com.tw/static/express/080222-02.pdf>
<http://www.taiwannews.com.tw/static/express/080222-03.pdf>
<http://www.taiwannews.com.tw/static/express/080222-04.pdf>
--
Powered by PHPlist, www.phplist.com --
^ permalink raw reply
* Re: [RTNL]: Validate hardware and broadcast address attribute for RTM_NEWLINK
From: Patrick McHardy @ 2008-02-22 13:05 UTC (permalink / raw)
To: Thomas Graf; +Cc: davem, netdev
In-Reply-To: <20080222125702.GB20815@postel.suug.ch>
Thomas Graf wrote:
> RTM_NEWLINK allows for already existing links to be modified. For this
> purpose do_setlink() is called which expects address attributes with a
> payload length of at least dev->addr_len. This patch adds the necessary
> validation for the RTM_NEWLINK case.
>
> The address length for links to be created is not checked for now as the
> actual attribute length is used when copying the address to the netdevice
> structure. It might make sense to report an error if less than addr_len
> bytes are provided but enforcing this might break drivers trying to be
> smart with not transmitting all zero addresses.
>
> Signed-off-by: Thomas Graf <tgraf@suug.ch>
>
> Index: net-2.6.26/net/core/rtnetlink.c
> ===================================================================
> --- net-2.6.26.orig/net/core/rtnetlink.c 2008-02-22 01:50:53.000000000 +0100
> +++ net-2.6.26/net/core/rtnetlink.c 2008-02-22 11:28:59.000000000 +0100
> @@ -726,6 +726,21 @@
> return net;
> }
>
> +static int validate_linkmsg(struct net_device *dev, struct nlattr *tb[])
> +{
> + if (dev) {
> + if (tb[IFLA_ADDRESS] &&
> + nla_len(tb[IFLA_ADDRESS]) < dev->addr_len)
> + return -EINVAL;
> +
> + if (tb[IFLA_BROADCAST] &&
> + nla_len(tb[IFLA_BROADCAST]) < dev->addr_len)
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
> struct nlattr **tb, char *ifname, int modified)
> {
> @@ -910,12 +925,7 @@
> goto errout;
> }
>
> - if (tb[IFLA_ADDRESS] &&
> - nla_len(tb[IFLA_ADDRESS]) < dev->addr_len)
> - goto errout_dev;
> -
> - if (tb[IFLA_BROADCAST] &&
> - nla_len(tb[IFLA_BROADCAST]) < dev->addr_len)
> + if ((err = validate_linkmsg(dev, tb)) < 0)
> goto errout_dev;
>
> err = do_setlink(dev, ifm, tb, ifname, 0);
> @@ -1036,6 +1046,9 @@
> else
> dev = NULL;
>
> + if ((err = validate_linkmsg(dev, tb)) < 0)
> + return err;
> +
Minor nitpick: it would be more logical to put this in the
if (dev) {
...
branch a bit below since thats the only path that leads to
do_setlink(). That would also allow to remove the
if (dev) check from validate_linkmsg().
^ permalink raw reply
* [RTNL]: Validate hardware and broadcast address attribute for RTM_NEWLINK
From: Thomas Graf @ 2008-02-22 12:57 UTC (permalink / raw)
To: davem; +Cc: netdev
RTM_NEWLINK allows for already existing links to be modified. For this
purpose do_setlink() is called which expects address attributes with a
payload length of at least dev->addr_len. This patch adds the necessary
validation for the RTM_NEWLINK case.
The address length for links to be created is not checked for now as the
actual attribute length is used when copying the address to the netdevice
structure. It might make sense to report an error if less than addr_len
bytes are provided but enforcing this might break drivers trying to be
smart with not transmitting all zero addresses.
Signed-off-by: Thomas Graf <tgraf@suug.ch>
Index: net-2.6.26/net/core/rtnetlink.c
===================================================================
--- net-2.6.26.orig/net/core/rtnetlink.c 2008-02-22 01:50:53.000000000 +0100
+++ net-2.6.26/net/core/rtnetlink.c 2008-02-22 11:28:59.000000000 +0100
@@ -726,6 +726,21 @@
return net;
}
+static int validate_linkmsg(struct net_device *dev, struct nlattr *tb[])
+{
+ if (dev) {
+ if (tb[IFLA_ADDRESS] &&
+ nla_len(tb[IFLA_ADDRESS]) < dev->addr_len)
+ return -EINVAL;
+
+ if (tb[IFLA_BROADCAST] &&
+ nla_len(tb[IFLA_BROADCAST]) < dev->addr_len)
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
struct nlattr **tb, char *ifname, int modified)
{
@@ -910,12 +925,7 @@
goto errout;
}
- if (tb[IFLA_ADDRESS] &&
- nla_len(tb[IFLA_ADDRESS]) < dev->addr_len)
- goto errout_dev;
-
- if (tb[IFLA_BROADCAST] &&
- nla_len(tb[IFLA_BROADCAST]) < dev->addr_len)
+ if ((err = validate_linkmsg(dev, tb)) < 0)
goto errout_dev;
err = do_setlink(dev, ifm, tb, ifname, 0);
@@ -1036,6 +1046,9 @@
else
dev = NULL;
+ if ((err = validate_linkmsg(dev, tb)) < 0)
+ return err;
+
if (tb[IFLA_LINKINFO]) {
err = nla_parse_nested(linkinfo, IFLA_INFO_MAX,
tb[IFLA_LINKINFO], ifla_info_policy);
^ permalink raw reply
* Re: [PATCH] Fix multicast on VLAN interfaces
From: Patrick McHardy @ 2008-02-22 12:25 UTC (permalink / raw)
To: Phil Oester; +Cc: netdev
In-Reply-To: <20080221220542.GA19693@linuxace.com>
Phil Oester wrote:
> In commit 56addd6eeeb4e11f5a0af7093ca078e0f29140e0 the VLAN multicast list
> handling was reworked. Unfortunately, a variable initialization was missed,
> and multicast over vlan devices has been broken since 2.6.23-rc1 (apparently
> not too many people use this). Trivial fix below, which might be a candidate
> for -stable.
Thanks Phil, a similar patch is already sitting in net-2.6.git.
^ permalink raw reply
* Re: lockdep warning
From: Jiri Kosina @ 2008-02-22 11:16 UTC (permalink / raw)
To: Anders Eriksson; +Cc: linux-kernel, netdev
In-Reply-To: <20080222104049.BD95A93C12F@tippex.mynet.homeunix.org>
On Fri, 22 Feb 2008, Anders Eriksson wrote:
> I found this is a newly booted 2.6.25-rc2's syslog.
> Feb 21 20:46:33 tippex BUG: rwlock wrong owner on CPU#0, runscript.sh/2633, d2c04084
> Feb 21 20:46:33 tippex Pid: 2633, comm: runscript.sh Not tainted 2.6.25-rc2 #3
> Feb 21 20:46:33 tippex [<c02342d0>] rwlock_bug+0x50/0x60
> Feb 21 20:46:33 tippex [<c0234356>] _raw_write_unlock+0x56/0x60
> Feb 21 20:46:33 tippex [<c040365d>] _write_unlock+0x1d/0x50
> Feb 21 20:46:33 tippex [<c03289be>] neigh_timer_handler+0x18e/0x2d0
> Feb 21 20:46:33 tippex [<c0125449>] run_timer_softirq+0x119/0x180
> Feb 21 20:46:33 tippex [<c013856d>] ? lock_release_holdtime+0x5d/0x80
> Feb 21 20:46:33 tippex [<c0328830>] ? neigh_timer_handler+0x0/0x2d0
> Feb 21 20:46:33 tippex [<c0121a64>] __do_softirq+0x54/0xb0
> Feb 21 20:46:33 tippex [<c0121af5>] do_softirq+0x35/0x40
> Feb 21 20:46:33 tippex [<c0121cb4>] irq_exit+0x44/0x50
> Feb 21 20:46:33 tippex [<c0105757>] do_IRQ+0x47/0x80
> Feb 21 20:46:33 tippex [<c01039c3>] common_interrupt+0x23/0x28
> Feb 21 20:46:33 tippex =======================
This needs to be CCed to netdev.
Any chance that
git revert 69cc64d8d92
makes this report go away?
--
Jiri Kosina
SUSE Labs
^ permalink raw reply
* [PATCH 04/04] smc91x: make superh use default config V2
From: Magnus Damm @ 2008-02-22 10:55 UTC (permalink / raw)
To: netdev; +Cc: Magnus Damm, lethal, nico, akpm
In-Reply-To: <20080222105456.7408.11277.sendpatchset@clockwork.opensource.se>
Removes superh board specific configuration from the header file. These boards
will instead be configured using platform data.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
---
drivers/net/smc91x.h | 30 ------------------------------
1 file changed, 30 deletions(-)
--- 0004/drivers/net/smc91x.h
+++ work/drivers/net/smc91x.h 2008-02-22 15:26:42.000000000 +0900
@@ -292,36 +292,6 @@ SMC_outw(u16 val, void __iomem *ioaddr,
#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
-#elif defined(CONFIG_SUPERH)
-
-#ifdef CONFIG_SOLUTION_ENGINE
-#define SMC_IRQ_FLAGS (0)
-#define SMC_CAN_USE_8BIT 0
-#define SMC_CAN_USE_16BIT 1
-#define SMC_CAN_USE_32BIT 0
-#define SMC_IO_SHIFT 0
-#define SMC_NOWAIT 1
-
-#define SMC_inw(a, r) inw((a) + (r))
-#define SMC_outw(v, a, r) outw(v, (a) + (r))
-#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
-#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
-
-#else /* BOARDS */
-
-#define SMC_CAN_USE_8BIT 1
-#define SMC_CAN_USE_16BIT 1
-#define SMC_CAN_USE_32BIT 0
-
-#define SMC_inb(a, r) inb((a) + (r))
-#define SMC_inw(a, r) inw((a) + (r))
-#define SMC_outb(v, a, r) outb(v, (a) + (r))
-#define SMC_outw(v, a, r) outw(v, (a) + (r))
-#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
-#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
-
-#endif /* BOARDS */
-
#elif defined(CONFIG_M32R)
#define SMC_CAN_USE_8BIT 0
^ permalink raw reply
* [PATCH 03/04] smc91x: add insw/outsw to default config V2
From: Magnus Damm @ 2008-02-22 10:55 UTC (permalink / raw)
To: netdev; +Cc: Magnus Damm, lethal, nico, akpm
In-Reply-To: <20080222105456.7408.11277.sendpatchset@clockwork.opensource.se>
This patch makes sure SMC_insw()/SMC_outsw() are defined for the
default configuration. Without this change BUG()s will be triggered
when using 16-bit only platform data and the default configuration.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
---
drivers/net/smc91x.h | 2 ++
1 file changed, 2 insertions(+)
--- 0003/drivers/net/smc91x.h
+++ work/drivers/net/smc91x.h 2008-02-22 15:25:39.000000000 +0900
@@ -476,6 +476,8 @@ static inline void LPD7_SMC_outsw (unsig
#define SMC_outb(v, a, r) writeb(v, (a) + (r))
#define SMC_outw(v, a, r) writew(v, (a) + (r))
#define SMC_outl(v, a, r) writel(v, (a) + (r))
+#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
+#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
^ permalink raw reply
* [PATCH 02/04] smc91x: introduce platform data flags V2
From: Magnus Damm @ 2008-02-22 10:55 UTC (permalink / raw)
To: netdev; +Cc: Magnus Damm, lethal, nico, akpm
In-Reply-To: <20080222105456.7408.11277.sendpatchset@clockwork.opensource.se>
This patch introduces struct smc91x_platdata and modifies the driver so
bus width is checked during run time using SMC_nBIT() instead of
SMC_CAN_USE_nBIT.
V2 keeps static configuration lean using SMC_DYNAMIC_BUS_CONFIG.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
---
drivers/net/smc91x.c | 34 ++++++++++++++++++++++++----
drivers/net/smc91x.h | 57 +++++++++++++++++++++++++++++-------------------
include/linux/smc91x.h | 13 ++++++++++
3 files changed, 77 insertions(+), 27 deletions(-)
--- 0002/drivers/net/smc91x.c
+++ work/drivers/net/smc91x.c 2008-02-22 15:11:44.000000000 +0900
@@ -1997,6 +1997,8 @@ err_out:
static int smc_enable_device(struct platform_device *pdev)
{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct smc_local *lp = netdev_priv(ndev);
unsigned long flags;
unsigned char ecor, ecsr;
void __iomem *addr;
@@ -2039,7 +2041,7 @@ static int smc_enable_device(struct plat
* Set the appropriate byte/word mode.
*/
ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
- if (!SMC_CAN_USE_16BIT)
+ if (!SMC_16BIT(lp))
ecsr |= ECSR_IOIS8;
writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
local_irq_restore(flags);
@@ -2124,10 +2126,11 @@ static void smc_release_datacs(struct pl
*/
static int smc_drv_probe(struct platform_device *pdev)
{
+ struct smc91x_platdata *pd = pdev->dev.platform_data;
+ struct smc_local *lp;
struct net_device *ndev;
struct resource *res, *ires;
unsigned int __iomem *addr;
- unsigned long irq_flags = SMC_IRQ_FLAGS;
int ret;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
@@ -2152,6 +2155,27 @@ static int smc_drv_probe(struct platform
}
SET_NETDEV_DEV(ndev, &pdev->dev);
+ /* get configuration from platform data, only allow use of
+ * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
+ */
+
+ lp = netdev_priv(ndev);
+ lp->cfg.irq_flags = SMC_IRQ_FLAGS;
+
+#ifdef SMC_DYNAMIC_BUS_CONFIG
+ if (pd)
+ memcpy(&lp->cfg, pd, sizeof(lp->cfg));
+ else {
+ lp->cfg.flags = SMC91X_USE_8BIT;
+ lp->cfg.flags |= SMC91X_USE_16BIT;
+ lp->cfg.flags |= SMC91X_USE_32BIT;
+ }
+
+ lp->cfg.flags &= ~(SMC_CAN_USE_8BIT ? 0 : SMC91X_USE_8BIT);
+ lp->cfg.flags &= ~(SMC_CAN_USE_16BIT ? 0 : SMC91X_USE_16BIT);
+ lp->cfg.flags &= ~(SMC_CAN_USE_32BIT ? 0 : SMC91X_USE_32BIT);
+#endif
+
ndev->dma = (unsigned char)-1;
ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -2162,7 +2186,7 @@ static int smc_drv_probe(struct platform
ndev->irq = ires->start;
if (SMC_IRQ_FLAGS == -1)
- irq_flags = ires->flags & IRQF_TRIGGER_MASK;
+ lp->cfg.irq_flags = ires->flags & IRQF_TRIGGER_MASK;
ret = smc_request_attrib(pdev);
if (ret)
@@ -2170,6 +2194,7 @@ static int smc_drv_probe(struct platform
#if defined(CONFIG_SA1100_ASSABET)
NCR_0 |= NCR_ENET_OSC_EN;
#endif
+ platform_set_drvdata(pdev, ndev);
ret = smc_enable_device(pdev);
if (ret)
goto out_release_attrib;
@@ -2188,8 +2213,7 @@ static int smc_drv_probe(struct platform
}
#endif
- platform_set_drvdata(pdev, ndev);
- ret = smc_probe(ndev, addr, irq_flags);
+ ret = smc_probe(ndev, addr, lp->cfg.irq_flags);
if (ret != 0)
goto out_iounmap;
--- 0002/drivers/net/smc91x.h
+++ work/drivers/net/smc91x.h 2008-02-22 15:01:30.000000000 +0900
@@ -34,6 +34,7 @@
#ifndef _SMC91X_H_
#define _SMC91X_H_
+#include <linux/smc91x.h>
/*
* Define your architecture specific bus configuration parameters here.
@@ -481,6 +482,7 @@ static inline void LPD7_SMC_outsw (unsig
#define RPC_LSA_DEFAULT RPC_LED_100_10
#define RPC_LSB_DEFAULT RPC_LED_TX_RX
+#define SMC_DYNAMIC_BUS_CONFIG
#endif
@@ -526,8 +528,19 @@ struct smc_local {
#endif
void __iomem *base;
void __iomem *datacs;
+
+ struct smc91x_platdata cfg;
};
+#ifdef SMC_DYNAMIC_BUS_CONFIG
+#define SMC_8BIT(p) (((p)->cfg.flags & SMC91X_USE_8BIT) && SMC_CAN_USE_8BIT)
+#define SMC_16BIT(p) (((p)->cfg.flags & SMC91X_USE_16BIT) && SMC_CAN_USE_16BIT)
+#define SMC_32BIT(p) (((p)->cfg.flags & SMC91X_USE_32BIT) && SMC_CAN_USE_32BIT)
+#else
+#define SMC_8BIT(p) SMC_CAN_USE_8BIT
+#define SMC_16BIT(p) SMC_CAN_USE_16BIT
+#define SMC_32BIT(p) SMC_CAN_USE_32BIT
+#endif
#ifdef SMC_USE_PXA_DMA
/*
@@ -1108,41 +1121,41 @@ static const char * chip_ids[ 16 ] = {
*
* Enforce it on any 32-bit capable setup for now.
*/
-#define SMC_MUST_ALIGN_WRITE SMC_CAN_USE_32BIT
+#define SMC_MUST_ALIGN_WRITE(lp) SMC_32BIT(lp)
#define SMC_GET_PN(lp) \
- (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, PN_REG(lp))) \
+ (SMC_8BIT(lp) ? (SMC_inb(ioaddr, PN_REG(lp))) \
: (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
#define SMC_SET_PN(lp, x) \
do { \
- if (SMC_MUST_ALIGN_WRITE) \
+ if (SMC_MUST_ALIGN_WRITE(lp)) \
SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \
- else if (SMC_CAN_USE_8BIT) \
+ else if (SMC_8BIT(lp)) \
SMC_outb(x, ioaddr, PN_REG(lp)); \
else \
SMC_outw(x, ioaddr, PN_REG(lp)); \
} while (0)
#define SMC_GET_AR(lp) \
- (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, AR_REG(lp))) \
+ (SMC_8BIT(lp) ? (SMC_inb(ioaddr, AR_REG(lp))) \
: (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
#define SMC_GET_TXFIFO(lp) \
- (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
+ (SMC_8BIT(lp) ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
: (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
#define SMC_GET_RXFIFO(lp) \
- (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
+ (SMC_8BIT(lp) ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
: (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
#define SMC_GET_INT(lp) \
- (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, INT_REG(lp))) \
+ (SMC_8BIT(lp) ? (SMC_inb(ioaddr, INT_REG(lp))) \
: (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
#define SMC_ACK_INT(lp, x) \
do { \
- if (SMC_CAN_USE_8BIT) \
+ if (SMC_8BIT(lp)) \
SMC_outb(x, ioaddr, INT_REG(lp)); \
else { \
unsigned long __flags; \
@@ -1155,12 +1168,12 @@ static const char * chip_ids[ 16 ] = {
} while (0)
#define SMC_GET_INT_MASK(lp) \
- (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, IM_REG(lp))) \
+ (SMC_8BIT(lp) ? (SMC_inb(ioaddr, IM_REG(lp))) \
: (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
#define SMC_SET_INT_MASK(lp, x) \
do { \
- if (SMC_CAN_USE_8BIT) \
+ if (SMC_8BIT(lp)) \
SMC_outb(x, ioaddr, IM_REG(lp)); \
else \
SMC_outw((x) << 8, ioaddr, INT_REG(lp)); \
@@ -1170,7 +1183,7 @@ static const char * chip_ids[ 16 ] = {
#define SMC_SELECT_BANK(lp, x) \
do { \
- if (SMC_MUST_ALIGN_WRITE) \
+ if (SMC_MUST_ALIGN_WRITE(lp)) \
SMC_outl((x)<<16, ioaddr, 12<<SMC_IO_SHIFT); \
else \
SMC_outw(x, ioaddr, BANK_SELECT); \
@@ -1208,7 +1221,7 @@ static const char * chip_ids[ 16 ] = {
#define SMC_SET_PTR(lp, x) \
do { \
- if (SMC_MUST_ALIGN_WRITE) \
+ if (SMC_MUST_ALIGN_WRITE(lp)) \
SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \
else \
SMC_outw(x, ioaddr, PTR_REG(lp)); \
@@ -1226,7 +1239,7 @@ static const char * chip_ids[ 16 ] = {
#define SMC_SET_RPC(lp, x) \
do { \
- if (SMC_MUST_ALIGN_WRITE) \
+ if (SMC_MUST_ALIGN_WRITE(lp)) \
SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \
else \
SMC_outw(x, ioaddr, RPC_REG(lp)); \
@@ -1267,7 +1280,7 @@ static const char * chip_ids[ 16 ] = {
#define SMC_PUT_PKT_HDR(lp, status, length) \
do { \
- if (SMC_CAN_USE_32BIT) \
+ if (SMC_32BIT(lp)) \
SMC_outl((status) | (length)<<16, ioaddr, \
DATA_REG(lp)); \
else { \
@@ -1278,7 +1291,7 @@ static const char * chip_ids[ 16 ] = {
#define SMC_GET_PKT_HDR(lp, status, length) \
do { \
- if (SMC_CAN_USE_32BIT) { \
+ if (SMC_32BIT(lp)) { \
unsigned int __val = SMC_inl(ioaddr, DATA_REG(lp)); \
(status) = __val & 0xffff; \
(length) = __val >> 16; \
@@ -1290,7 +1303,7 @@ static const char * chip_ids[ 16 ] = {
#define SMC_PUSH_DATA(lp, p, l) \
do { \
- if (SMC_CAN_USE_32BIT) { \
+ if (SMC_32BIT(lp)) { \
void *__ptr = (p); \
int __len = (l); \
void __iomem *__ioaddr = ioaddr; \
@@ -1308,15 +1321,15 @@ static const char * chip_ids[ 16 ] = {
SMC_outw(*((u16 *)__ptr), ioaddr, \
DATA_REG(lp)); \
} \
- } else if (SMC_CAN_USE_16BIT) \
+ } else if (SMC_16BIT(lp)) \
SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
- else if (SMC_CAN_USE_8BIT) \
+ else if (SMC_8BIT(lp)) \
SMC_outsb(ioaddr, DATA_REG(lp), p, l); \
} while (0)
#define SMC_PULL_DATA(lp, p, l) \
do { \
- if (SMC_CAN_USE_32BIT) { \
+ if (SMC_32BIT(lp)) { \
void *__ptr = (p); \
int __len = (l); \
void __iomem *__ioaddr = ioaddr; \
@@ -1343,9 +1356,9 @@ static const char * chip_ids[ 16 ] = {
__ioaddr = lp->datacs; \
__len += 2; \
SMC_insl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
- } else if (SMC_CAN_USE_16BIT) \
+ } else if (SMC_16BIT(lp)) \
SMC_insw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
- else if (SMC_CAN_USE_8BIT) \
+ else if (SMC_8BIT(lp)) \
SMC_insb(ioaddr, DATA_REG(lp), p, l); \
} while (0)
--- /dev/null
+++ work/include/linux/smc91x.h 2008-02-22 14:58:42.000000000 +0900
@@ -0,0 +1,13 @@
+#ifndef __SMC91X_H__
+#define __SMC91X_H__
+
+#define SMC91X_USE_8BIT (1 << 0)
+#define SMC91X_USE_16BIT (1 << 1)
+#define SMC91X_USE_32BIT (1 << 2)
+
+struct smc91x_platdata {
+ unsigned long flags;
+ unsigned long irq_flags; /* IRQF_... */
+};
+
+#endif /* __SMC91X_H__ */
^ permalink raw reply
* [PATCH 01/04] smc91x: pass along private data V2
From: Magnus Damm @ 2008-02-22 10:55 UTC (permalink / raw)
To: netdev; +Cc: Magnus Damm, lethal, nico, akpm
In-Reply-To: <20080222105456.7408.11277.sendpatchset@clockwork.opensource.se>
Pass a private data pointer to macros and functions. This makes it easy
to later on make run time decisions. This patch does not change any logic.
These changes should be optimized away during compilation.
V2 changes the macro argument name from "priv" to "lp".
Signed-off-by: Magnus Damm <damm@igel.co.jp>
---
drivers/net/smc91x.c | 301 +++++++++++++++++++++++++-------------------------
drivers/net/smc91x.h | 254 +++++++++++++++++++++---------------------
2 files changed, 280 insertions(+), 275 deletions(-)
--- 0001/drivers/net/smc91x.c
+++ work/drivers/net/smc91x.c 2008-02-22 14:07:43.000000000 +0900
@@ -220,22 +220,22 @@ static void PRINT_PKT(u_char *buf, int l
/* this enables an interrupt in the interrupt mask register */
-#define SMC_ENABLE_INT(x) do { \
+#define SMC_ENABLE_INT(lp, x) do { \
unsigned char mask; \
spin_lock_irq(&lp->lock); \
- mask = SMC_GET_INT_MASK(); \
+ mask = SMC_GET_INT_MASK(lp); \
mask |= (x); \
- SMC_SET_INT_MASK(mask); \
+ SMC_SET_INT_MASK(lp, mask); \
spin_unlock_irq(&lp->lock); \
} while (0)
/* this disables an interrupt from the interrupt mask register */
-#define SMC_DISABLE_INT(x) do { \
+#define SMC_DISABLE_INT(lp, x) do { \
unsigned char mask; \
spin_lock_irq(&lp->lock); \
- mask = SMC_GET_INT_MASK(); \
+ mask = SMC_GET_INT_MASK(lp); \
mask &= ~(x); \
- SMC_SET_INT_MASK(mask); \
+ SMC_SET_INT_MASK(lp, mask); \
spin_unlock_irq(&lp->lock); \
} while (0)
@@ -244,10 +244,10 @@ static void PRINT_PKT(u_char *buf, int l
* if at all, but let's avoid deadlocking the system if the hardware
* decides to go south.
*/
-#define SMC_WAIT_MMU_BUSY() do { \
- if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
+#define SMC_WAIT_MMU_BUSY(lp) do { \
+ if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
unsigned long timeout = jiffies + 2; \
- while (SMC_GET_MMU_CMD() & MC_BUSY) { \
+ while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
if (time_after(jiffies, timeout)) { \
printk("%s: timeout %s line %d\n", \
dev->name, __FILE__, __LINE__); \
@@ -273,8 +273,8 @@ static void smc_reset(struct net_device
/* Disable all interrupts, block TX tasklet */
spin_lock_irq(&lp->lock);
- SMC_SELECT_BANK(2);
- SMC_SET_INT_MASK(0);
+ SMC_SELECT_BANK(lp, 2);
+ SMC_SET_INT_MASK(lp, 0);
pending_skb = lp->pending_tx_skb;
lp->pending_tx_skb = NULL;
spin_unlock_irq(&lp->lock);
@@ -290,15 +290,15 @@ static void smc_reset(struct net_device
* This resets the registers mostly to defaults, but doesn't
* affect EEPROM. That seems unnecessary
*/
- SMC_SELECT_BANK(0);
- SMC_SET_RCR(RCR_SOFTRST);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_RCR(lp, RCR_SOFTRST);
/*
* Setup the Configuration Register
* This is necessary because the CONFIG_REG is not affected
* by a soft reset
*/
- SMC_SELECT_BANK(1);
+ SMC_SELECT_BANK(lp, 1);
cfg = CONFIG_DEFAULT;
@@ -316,7 +316,7 @@ static void smc_reset(struct net_device
*/
cfg |= CONFIG_EPH_POWER_EN;
- SMC_SET_CONFIG(cfg);
+ SMC_SET_CONFIG(lp, cfg);
/* this should pause enough for the chip to be happy */
/*
@@ -329,12 +329,12 @@ static void smc_reset(struct net_device
udelay(1);
/* Disable transmit and receive functionality */
- SMC_SELECT_BANK(0);
- SMC_SET_RCR(RCR_CLEAR);
- SMC_SET_TCR(TCR_CLEAR);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_RCR(lp, RCR_CLEAR);
+ SMC_SET_TCR(lp, TCR_CLEAR);
- SMC_SELECT_BANK(1);
- ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
+ SMC_SELECT_BANK(lp, 1);
+ ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
/*
* Set the control register to automatically release successfully
@@ -345,12 +345,12 @@ static void smc_reset(struct net_device
ctl |= CTL_AUTO_RELEASE;
else
ctl &= ~CTL_AUTO_RELEASE;
- SMC_SET_CTL(ctl);
+ SMC_SET_CTL(lp, ctl);
/* Reset the MMU */
- SMC_SELECT_BANK(2);
- SMC_SET_MMU_CMD(MC_RESET);
- SMC_WAIT_MMU_BUSY();
+ SMC_SELECT_BANK(lp, 2);
+ SMC_SET_MMU_CMD(lp, MC_RESET);
+ SMC_WAIT_MMU_BUSY(lp);
}
/*
@@ -365,19 +365,19 @@ static void smc_enable(struct net_device
DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
/* see the header file for options in TCR/RCR DEFAULT */
- SMC_SELECT_BANK(0);
- SMC_SET_TCR(lp->tcr_cur_mode);
- SMC_SET_RCR(lp->rcr_cur_mode);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_TCR(lp, lp->tcr_cur_mode);
+ SMC_SET_RCR(lp, lp->rcr_cur_mode);
- SMC_SELECT_BANK(1);
- SMC_SET_MAC_ADDR(dev->dev_addr);
+ SMC_SELECT_BANK(lp, 1);
+ SMC_SET_MAC_ADDR(lp, dev->dev_addr);
/* now, enable interrupts */
mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
if (lp->version >= (CHIP_91100 << 4))
mask |= IM_MDINT;
- SMC_SELECT_BANK(2);
- SMC_SET_INT_MASK(mask);
+ SMC_SELECT_BANK(lp, 2);
+ SMC_SET_INT_MASK(lp, mask);
/*
* From this point the register bank must _NOT_ be switched away
@@ -400,8 +400,8 @@ static void smc_shutdown(struct net_devi
/* no more interrupts for me */
spin_lock_irq(&lp->lock);
- SMC_SELECT_BANK(2);
- SMC_SET_INT_MASK(0);
+ SMC_SELECT_BANK(lp, 2);
+ SMC_SET_INT_MASK(lp, 0);
pending_skb = lp->pending_tx_skb;
lp->pending_tx_skb = NULL;
spin_unlock_irq(&lp->lock);
@@ -409,14 +409,14 @@ static void smc_shutdown(struct net_devi
dev_kfree_skb(pending_skb);
/* and tell the card to stay away from that nasty outside world */
- SMC_SELECT_BANK(0);
- SMC_SET_RCR(RCR_CLEAR);
- SMC_SET_TCR(TCR_CLEAR);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_RCR(lp, RCR_CLEAR);
+ SMC_SET_TCR(lp, TCR_CLEAR);
#ifdef POWER_DOWN
/* finally, shut the chip down */
- SMC_SELECT_BANK(1);
- SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
+ SMC_SELECT_BANK(lp, 1);
+ SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
#endif
}
@@ -431,17 +431,17 @@ static inline void smc_rcv(struct net_d
DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
- packet_number = SMC_GET_RXFIFO();
+ packet_number = SMC_GET_RXFIFO(lp);
if (unlikely(packet_number & RXFIFO_REMPTY)) {
PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
return;
}
/* read from start of packet */
- SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
+ SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
/* First two words are status and packet length */
- SMC_GET_PKT_HDR(status, packet_len);
+ SMC_GET_PKT_HDR(lp, status, packet_len);
packet_len &= 0x07ff; /* mask off top bits */
DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
dev->name, packet_number, status,
@@ -460,8 +460,8 @@ static inline void smc_rcv(struct net_d
dev->name, packet_len, status);
status |= RS_TOOSHORT;
}
- SMC_WAIT_MMU_BUSY();
- SMC_SET_MMU_CMD(MC_RELEASE);
+ SMC_WAIT_MMU_BUSY(lp);
+ SMC_SET_MMU_CMD(lp, MC_RELEASE);
dev->stats.rx_errors++;
if (status & RS_ALGNERR)
dev->stats.rx_frame_errors++;
@@ -490,8 +490,8 @@ static inline void smc_rcv(struct net_d
if (unlikely(skb == NULL)) {
printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
dev->name);
- SMC_WAIT_MMU_BUSY();
- SMC_SET_MMU_CMD(MC_RELEASE);
+ SMC_WAIT_MMU_BUSY(lp);
+ SMC_SET_MMU_CMD(lp, MC_RELEASE);
dev->stats.rx_dropped++;
return;
}
@@ -510,10 +510,10 @@ static inline void smc_rcv(struct net_d
*/
data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
data = skb_put(skb, data_len);
- SMC_PULL_DATA(data, packet_len - 4);
+ SMC_PULL_DATA(lp, data, packet_len - 4);
- SMC_WAIT_MMU_BUSY();
- SMC_SET_MMU_CMD(MC_RELEASE);
+ SMC_WAIT_MMU_BUSY(lp);
+ SMC_SET_MMU_CMD(lp, MC_RELEASE);
PRINT_PKT(data, packet_len - 4);
@@ -591,7 +591,7 @@ static void smc_hardware_send_pkt(unsign
}
lp->pending_tx_skb = NULL;
- packet_no = SMC_GET_AR();
+ packet_no = SMC_GET_AR(lp);
if (unlikely(packet_no & AR_FAILED)) {
printk("%s: Memory allocation failed.\n", dev->name);
dev->stats.tx_errors++;
@@ -601,8 +601,8 @@ static void smc_hardware_send_pkt(unsign
}
/* point to the beginning of the packet */
- SMC_SET_PN(packet_no);
- SMC_SET_PTR(PTR_AUTOINC);
+ SMC_SET_PN(lp, packet_no);
+ SMC_SET_PTR(lp, PTR_AUTOINC);
buf = skb->data;
len = skb->len;
@@ -614,13 +614,13 @@ static void smc_hardware_send_pkt(unsign
* Send the packet length (+6 for status words, length, and ctl.
* The card will pad to 64 bytes with zeroes if packet is too small.
*/
- SMC_PUT_PKT_HDR(0, len + 6);
+ SMC_PUT_PKT_HDR(lp, 0, len + 6);
/* send the actual data */
- SMC_PUSH_DATA(buf, len & ~1);
+ SMC_PUSH_DATA(lp, buf, len & ~1);
/* Send final ctl word with the last byte if there is one */
- SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
+ SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
/*
* If THROTTLE_TX_PKTS is set, we stop the queue here. This will
@@ -634,14 +634,14 @@ static void smc_hardware_send_pkt(unsign
netif_stop_queue(dev);
/* queue the packet for TX */
- SMC_SET_MMU_CMD(MC_ENQUEUE);
+ SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
smc_special_unlock(&lp->lock);
dev->trans_start = jiffies;
dev->stats.tx_packets++;
dev->stats.tx_bytes += len;
- SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
+ SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
done: if (!THROTTLE_TX_PKTS)
netif_wake_queue(dev);
@@ -688,7 +688,7 @@ static int smc_hard_start_xmit(struct sk
smc_special_lock(&lp->lock);
/* now, try to allocate the memory */
- SMC_SET_MMU_CMD(MC_ALLOC | numPages);
+ SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
/*
* Poll the chip for a short amount of time in case the
@@ -696,9 +696,9 @@ static int smc_hard_start_xmit(struct sk
*/
poll_count = MEMORY_WAIT_TIME;
do {
- status = SMC_GET_INT();
+ status = SMC_GET_INT(lp);
if (status & IM_ALLOC_INT) {
- SMC_ACK_INT(IM_ALLOC_INT);
+ SMC_ACK_INT(lp, IM_ALLOC_INT);
break;
}
} while (--poll_count);
@@ -710,7 +710,7 @@ static int smc_hard_start_xmit(struct sk
/* oh well, wait until the chip finds memory later */
netif_stop_queue(dev);
DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
- SMC_ENABLE_INT(IM_ALLOC_INT);
+ SMC_ENABLE_INT(lp, IM_ALLOC_INT);
} else {
/*
* Allocation succeeded: push packet to the chip's own memory
@@ -736,19 +736,19 @@ static void smc_tx(struct net_device *de
DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
/* If the TX FIFO is empty then nothing to do */
- packet_no = SMC_GET_TXFIFO();
+ packet_no = SMC_GET_TXFIFO(lp);
if (unlikely(packet_no & TXFIFO_TEMPTY)) {
PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
return;
}
/* select packet to read from */
- saved_packet = SMC_GET_PN();
- SMC_SET_PN(packet_no);
+ saved_packet = SMC_GET_PN(lp);
+ SMC_SET_PN(lp, packet_no);
/* read the first word (status word) from this packet */
- SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
- SMC_GET_PKT_HDR(tx_status, pkt_len);
+ SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
+ SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
dev->name, tx_status, packet_no);
@@ -771,17 +771,17 @@ static void smc_tx(struct net_device *de
}
/* kill the packet */
- SMC_WAIT_MMU_BUSY();
- SMC_SET_MMU_CMD(MC_FREEPKT);
+ SMC_WAIT_MMU_BUSY(lp);
+ SMC_SET_MMU_CMD(lp, MC_FREEPKT);
/* Don't restore Packet Number Reg until busy bit is cleared */
- SMC_WAIT_MMU_BUSY();
- SMC_SET_PN(saved_packet);
+ SMC_WAIT_MMU_BUSY(lp);
+ SMC_SET_PN(lp, saved_packet);
/* re-enable transmit */
- SMC_SELECT_BANK(0);
- SMC_SET_TCR(lp->tcr_cur_mode);
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_TCR(lp, lp->tcr_cur_mode);
+ SMC_SELECT_BANK(lp, 2);
}
@@ -793,7 +793,7 @@ static void smc_mii_out(struct net_devic
void __iomem *ioaddr = lp->base;
unsigned int mii_reg, mask;
- mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
+ mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
mii_reg |= MII_MDOE;
for (mask = 1 << (bits - 1); mask; mask >>= 1) {
@@ -802,9 +802,9 @@ static void smc_mii_out(struct net_devic
else
mii_reg &= ~MII_MDO;
- SMC_SET_MII(mii_reg);
+ SMC_SET_MII(lp, mii_reg);
udelay(MII_DELAY);
- SMC_SET_MII(mii_reg | MII_MCLK);
+ SMC_SET_MII(lp, mii_reg | MII_MCLK);
udelay(MII_DELAY);
}
}
@@ -815,16 +815,16 @@ static unsigned int smc_mii_in(struct ne
void __iomem *ioaddr = lp->base;
unsigned int mii_reg, mask, val;
- mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
- SMC_SET_MII(mii_reg);
+ mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
+ SMC_SET_MII(lp, mii_reg);
for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
- if (SMC_GET_MII() & MII_MDI)
+ if (SMC_GET_MII(lp) & MII_MDI)
val |= mask;
- SMC_SET_MII(mii_reg);
+ SMC_SET_MII(lp, mii_reg);
udelay(MII_DELAY);
- SMC_SET_MII(mii_reg | MII_MCLK);
+ SMC_SET_MII(lp, mii_reg | MII_MCLK);
udelay(MII_DELAY);
}
@@ -840,7 +840,7 @@ static int smc_phy_read(struct net_devic
void __iomem *ioaddr = lp->base;
unsigned int phydata;
- SMC_SELECT_BANK(3);
+ SMC_SELECT_BANK(lp, 3);
/* Idle - 32 ones */
smc_mii_out(dev, 0xffffffff, 32);
@@ -852,12 +852,12 @@ static int smc_phy_read(struct net_devic
phydata = smc_mii_in(dev, 18);
/* Return to idle state */
- SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
+ SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
__FUNCTION__, phyaddr, phyreg, phydata);
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 2);
return phydata;
}
@@ -870,7 +870,7 @@ static void smc_phy_write(struct net_dev
struct smc_local *lp = netdev_priv(dev);
void __iomem *ioaddr = lp->base;
- SMC_SELECT_BANK(3);
+ SMC_SELECT_BANK(lp, 3);
/* Idle - 32 ones */
smc_mii_out(dev, 0xffffffff, 32);
@@ -879,12 +879,12 @@ static void smc_phy_write(struct net_dev
smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
/* Return to idle state */
- SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
+ SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
__FUNCTION__, phyaddr, phyreg, phydata);
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 2);
}
/*
@@ -957,9 +957,9 @@ static int smc_phy_fixed(struct net_devi
smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
/* Re-Configure the Receive/Phy Control register */
- SMC_SELECT_BANK(0);
- SMC_SET_RPC(lp->rpc_cur_mode);
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_RPC(lp, lp->rpc_cur_mode);
+ SMC_SELECT_BANK(lp, 2);
return 1;
}
@@ -1050,8 +1050,8 @@ static void smc_phy_check_media(struct n
lp->tcr_cur_mode &= ~TCR_SWFDUP;
}
- SMC_SELECT_BANK(0);
- SMC_SET_TCR(lp->tcr_cur_mode);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_TCR(lp, lp->tcr_cur_mode);
}
}
@@ -1100,8 +1100,8 @@ static void smc_phy_configure(struct wor
PHY_INT_SPDDET | PHY_INT_DPLXDET);
/* Configure the Receive/Phy Control register */
- SMC_SELECT_BANK(0);
- SMC_SET_RPC(lp->rpc_cur_mode);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_RPC(lp, lp->rpc_cur_mode);
/* If the user requested no auto neg, then go set his request */
if (lp->mii.force_media) {
@@ -1158,7 +1158,7 @@ static void smc_phy_configure(struct wor
smc_phy_check_media(dev, 1);
smc_phy_configure_exit:
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 2);
spin_unlock_irq(&lp->lock);
lp->work_pending = 0;
}
@@ -1200,9 +1200,9 @@ static void smc_10bt_check_media(struct
old_carrier = netif_carrier_ok(dev) ? 1 : 0;
- SMC_SELECT_BANK(0);
- new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 0);
+ new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
+ SMC_SELECT_BANK(lp, 2);
if (init || (old_carrier != new_carrier)) {
if (!new_carrier) {
@@ -1224,11 +1224,11 @@ static void smc_eph_interrupt(struct net
smc_10bt_check_media(dev, 0);
- SMC_SELECT_BANK(1);
- ctl = SMC_GET_CTL();
- SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
- SMC_SET_CTL(ctl);
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 1);
+ ctl = SMC_GET_CTL(lp);
+ SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
+ SMC_SET_CTL(lp, ctl);
+ SMC_SELECT_BANK(lp, 2);
}
/*
@@ -1252,22 +1252,22 @@ static irqreturn_t smc_interrupt(int irq
* ISR. */
SMC_INTERRUPT_PREAMBLE;
- saved_pointer = SMC_GET_PTR();
- mask = SMC_GET_INT_MASK();
- SMC_SET_INT_MASK(0);
+ saved_pointer = SMC_GET_PTR(lp);
+ mask = SMC_GET_INT_MASK(lp);
+ SMC_SET_INT_MASK(lp, 0);
/* set a timeout value, so I don't stay here forever */
timeout = MAX_IRQ_LOOPS;
do {
- status = SMC_GET_INT();
+ status = SMC_GET_INT(lp);
DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
dev->name, status, mask,
- ({ int meminfo; SMC_SELECT_BANK(0);
- meminfo = SMC_GET_MIR();
- SMC_SELECT_BANK(2); meminfo; }),
- SMC_GET_FIFO());
+ ({ int meminfo; SMC_SELECT_BANK(lp, 0);
+ meminfo = SMC_GET_MIR(lp);
+ SMC_SELECT_BANK(lp, 2); meminfo; }),
+ SMC_GET_FIFO(lp));
status &= mask;
if (!status)
@@ -1277,7 +1277,7 @@ static irqreturn_t smc_interrupt(int irq
/* do this before RX as it will free memory quickly */
DBG(3, "%s: TX int\n", dev->name);
smc_tx(dev);
- SMC_ACK_INT(IM_TX_INT);
+ SMC_ACK_INT(lp, IM_TX_INT);
if (THROTTLE_TX_PKTS)
netif_wake_queue(dev);
} else if (status & IM_RCV_INT) {
@@ -1292,9 +1292,9 @@ static irqreturn_t smc_interrupt(int irq
mask &= ~IM_TX_EMPTY_INT;
/* update stats */
- SMC_SELECT_BANK(0);
- card_stats = SMC_GET_COUNTER();
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 0);
+ card_stats = SMC_GET_COUNTER(lp);
+ SMC_SELECT_BANK(lp, 2);
/* single collisions */
dev->stats.collisions += card_stats & 0xF;
@@ -1304,26 +1304,26 @@ static irqreturn_t smc_interrupt(int irq
dev->stats.collisions += card_stats & 0xF;
} else if (status & IM_RX_OVRN_INT) {
DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
- ({ int eph_st; SMC_SELECT_BANK(0);
- eph_st = SMC_GET_EPH_STATUS();
- SMC_SELECT_BANK(2); eph_st; }) );
- SMC_ACK_INT(IM_RX_OVRN_INT);
+ ({ int eph_st; SMC_SELECT_BANK(lp, 0);
+ eph_st = SMC_GET_EPH_STATUS(lp);
+ SMC_SELECT_BANK(lp, 2); eph_st; }));
+ SMC_ACK_INT(lp, IM_RX_OVRN_INT);
dev->stats.rx_errors++;
dev->stats.rx_fifo_errors++;
} else if (status & IM_EPH_INT) {
smc_eph_interrupt(dev);
} else if (status & IM_MDINT) {
- SMC_ACK_INT(IM_MDINT);
+ SMC_ACK_INT(lp, IM_MDINT);
smc_phy_interrupt(dev);
} else if (status & IM_ERCV_INT) {
- SMC_ACK_INT(IM_ERCV_INT);
+ SMC_ACK_INT(lp, IM_ERCV_INT);
PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
}
} while (--timeout);
/* restore register states */
- SMC_SET_PTR(saved_pointer);
- SMC_SET_INT_MASK(mask);
+ SMC_SET_PTR(lp, saved_pointer);
+ SMC_SET_INT_MASK(lp, mask);
spin_unlock(&lp->lock);
if (timeout == MAX_IRQ_LOOPS)
@@ -1366,13 +1366,13 @@ static void smc_timeout(struct net_devic
DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
spin_lock_irq(&lp->lock);
- status = SMC_GET_INT();
- mask = SMC_GET_INT_MASK();
- fifo = SMC_GET_FIFO();
- SMC_SELECT_BANK(0);
- eph_st = SMC_GET_EPH_STATUS();
- meminfo = SMC_GET_MIR();
- SMC_SELECT_BANK(2);
+ status = SMC_GET_INT(lp);
+ mask = SMC_GET_INT_MASK(lp);
+ fifo = SMC_GET_FIFO(lp);
+ SMC_SELECT_BANK(lp, 0);
+ eph_st = SMC_GET_EPH_STATUS(lp);
+ meminfo = SMC_GET_MIR(lp);
+ SMC_SELECT_BANK(lp, 2);
spin_unlock_irq(&lp->lock);
PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
"MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
@@ -1492,13 +1492,13 @@ static void smc_set_multicast_list(struc
}
spin_lock_irq(&lp->lock);
- SMC_SELECT_BANK(0);
- SMC_SET_RCR(lp->rcr_cur_mode);
+ SMC_SELECT_BANK(lp, 0);
+ SMC_SET_RCR(lp, lp->rcr_cur_mode);
if (update_multicast) {
- SMC_SELECT_BANK(3);
- SMC_SET_MCAST(multicast_table);
+ SMC_SELECT_BANK(lp, 3);
+ SMC_SET_MCAST(lp, multicast_table);
}
- SMC_SELECT_BANK(2);
+ SMC_SELECT_BANK(lp, 2);
spin_unlock_irq(&lp->lock);
}
@@ -1702,8 +1702,9 @@ static const struct ethtool_ops smc_etht
* I just deleted auto_irq.c, since it was never built...
* --jgarzik
*/
-static int __init smc_findirq(void __iomem *ioaddr)
+static int __init smc_findirq(struct smc_local *lp)
{
+ void __iomem *ioaddr = lp->base;
int timeout = 20;
unsigned long cookie;
@@ -1717,14 +1718,14 @@ static int __init smc_findirq(void __iom
* when done.
*/
/* enable ALLOCation interrupts ONLY */
- SMC_SELECT_BANK(2);
- SMC_SET_INT_MASK(IM_ALLOC_INT);
+ SMC_SELECT_BANK(lp, 2);
+ SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
/*
* Allocate 512 bytes of memory. Note that the chip was just
* reset so all the memory is available
*/
- SMC_SET_MMU_CMD(MC_ALLOC | 1);
+ SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
/*
* Wait until positive that the interrupt has been generated
@@ -1732,7 +1733,7 @@ static int __init smc_findirq(void __iom
do {
int int_status;
udelay(10);
- int_status = SMC_GET_INT();
+ int_status = SMC_GET_INT(lp);
if (int_status & IM_ALLOC_INT)
break; /* got the interrupt */
} while (--timeout);
@@ -1745,7 +1746,7 @@ static int __init smc_findirq(void __iom
*/
/* and disable all interrupts again */
- SMC_SET_INT_MASK(0);
+ SMC_SET_INT_MASK(lp, 0);
/* and return what I found */
return probe_irq_off(cookie);
@@ -1788,7 +1789,7 @@ static int __init smc_probe(struct net_d
DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
/* First, see if the high byte is 0x33 */
- val = SMC_CURRENT_BANK();
+ val = SMC_CURRENT_BANK(lp);
DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
if ((val & 0xFF00) != 0x3300) {
if ((val & 0xFF) == 0x33) {
@@ -1804,8 +1805,8 @@ static int __init smc_probe(struct net_d
* The above MIGHT indicate a device, but I need to write to
* further test this.
*/
- SMC_SELECT_BANK(0);
- val = SMC_CURRENT_BANK();
+ SMC_SELECT_BANK(lp, 0);
+ val = SMC_CURRENT_BANK(lp);
if ((val & 0xFF00) != 0x3300) {
retval = -ENODEV;
goto err_out;
@@ -1817,8 +1818,8 @@ static int __init smc_probe(struct net_d
* register to bank 1, so I can access the base address
* register
*/
- SMC_SELECT_BANK(1);
- val = SMC_GET_BASE();
+ SMC_SELECT_BANK(lp, 1);
+ val = SMC_GET_BASE(lp);
val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
printk("%s: IOADDR %p doesn't match configuration (%x).\n",
@@ -1830,8 +1831,8 @@ static int __init smc_probe(struct net_d
* recognize. These might need to be added to later,
* as future revisions could be added.
*/
- SMC_SELECT_BANK(3);
- revision_register = SMC_GET_REV();
+ SMC_SELECT_BANK(lp, 3);
+ revision_register = SMC_GET_REV(lp);
DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
version_string = chip_ids[ (revision_register >> 4) & 0xF];
if (!version_string || (revision_register & 0xff00) != 0x3300) {
@@ -1855,8 +1856,8 @@ static int __init smc_probe(struct net_d
spin_lock_init(&lp->lock);
/* Get the MAC address */
- SMC_SELECT_BANK(1);
- SMC_GET_MAC_ADDR(dev->dev_addr);
+ SMC_SELECT_BANK(lp, 1);
+ SMC_GET_MAC_ADDR(lp, dev->dev_addr);
/* now, reset the chip, and put it into a known state */
smc_reset(dev);
@@ -1881,7 +1882,7 @@ static int __init smc_probe(struct net_d
trials = 3;
while (trials--) {
- dev->irq = smc_findirq(ioaddr);
+ dev->irq = smc_findirq(lp);
if (dev->irq)
break;
/* kick the card and try again */
--- 0001/drivers/net/smc91x.h
+++ work/drivers/net/smc91x.h 2008-02-22 14:05:18.000000000 +0900
@@ -720,7 +720,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Transmit Control Register
/* BANK 0 */
-#define TCR_REG SMC_REG(0x0000, 0)
+#define TCR_REG(lp) SMC_REG(lp, 0x0000, 0)
#define TCR_ENABLE 0x0001 // When 1 we can transmit
#define TCR_LOOP 0x0002 // Controls output pin LBK
#define TCR_FORCOL 0x0004 // When 1 will force a collision
@@ -739,7 +739,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
// EPH Status Register
/* BANK 0 */
-#define EPH_STATUS_REG SMC_REG(0x0002, 0)
+#define EPH_STATUS_REG(lp) SMC_REG(lp, 0x0002, 0)
#define ES_TX_SUC 0x0001 // Last TX was successful
#define ES_SNGL_COL 0x0002 // Single collision detected for last tx
#define ES_MUL_COL 0x0004 // Multiple collisions detected for last tx
@@ -758,7 +758,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Receive Control Register
/* BANK 0 */
-#define RCR_REG SMC_REG(0x0004, 0)
+#define RCR_REG(lp) SMC_REG(lp, 0x0004, 0)
#define RCR_RX_ABORT 0x0001 // Set if a rx frame was aborted
#define RCR_PRMS 0x0002 // Enable promiscuous mode
#define RCR_ALMUL 0x0004 // When set accepts all multicast frames
@@ -775,17 +775,17 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Counter Register
/* BANK 0 */
-#define COUNTER_REG SMC_REG(0x0006, 0)
+#define COUNTER_REG(lp) SMC_REG(lp, 0x0006, 0)
// Memory Information Register
/* BANK 0 */
-#define MIR_REG SMC_REG(0x0008, 0)
+#define MIR_REG(lp) SMC_REG(lp, 0x0008, 0)
// Receive/Phy Control Register
/* BANK 0 */
-#define RPC_REG SMC_REG(0x000A, 0)
+#define RPC_REG(lp) SMC_REG(lp, 0x000A, 0)
#define RPC_SPEED 0x2000 // When 1 PHY is in 100Mbps mode.
#define RPC_DPLX 0x1000 // When 1 PHY is in Full-Duplex Mode
#define RPC_ANEG 0x0800 // When 1 PHY is in Auto-Negotiate Mode
@@ -819,7 +819,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Configuration Reg
/* BANK 1 */
-#define CONFIG_REG SMC_REG(0x0000, 1)
+#define CONFIG_REG(lp) SMC_REG(lp, 0x0000, 1)
#define CONFIG_EXT_PHY 0x0200 // 1=external MII, 0=internal Phy
#define CONFIG_GPCNTRL 0x0400 // Inverse value drives pin nCNTRL
#define CONFIG_NO_WAIT 0x1000 // When 1 no extra wait states on ISA bus
@@ -831,24 +831,24 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Base Address Register
/* BANK 1 */
-#define BASE_REG SMC_REG(0x0002, 1)
+#define BASE_REG(lp) SMC_REG(lp, 0x0002, 1)
// Individual Address Registers
/* BANK 1 */
-#define ADDR0_REG SMC_REG(0x0004, 1)
-#define ADDR1_REG SMC_REG(0x0006, 1)
-#define ADDR2_REG SMC_REG(0x0008, 1)
+#define ADDR0_REG(lp) SMC_REG(lp, 0x0004, 1)
+#define ADDR1_REG(lp) SMC_REG(lp, 0x0006, 1)
+#define ADDR2_REG(lp) SMC_REG(lp, 0x0008, 1)
// General Purpose Register
/* BANK 1 */
-#define GP_REG SMC_REG(0x000A, 1)
+#define GP_REG(lp) SMC_REG(lp, 0x000A, 1)
// Control Register
/* BANK 1 */
-#define CTL_REG SMC_REG(0x000C, 1)
+#define CTL_REG(lp) SMC_REG(lp, 0x000C, 1)
#define CTL_RCV_BAD 0x4000 // When 1 bad CRC packets are received
#define CTL_AUTO_RELEASE 0x0800 // When 1 tx pages are released automatically
#define CTL_LE_ENABLE 0x0080 // When 1 enables Link Error interrupt
@@ -861,7 +861,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
// MMU Command Register
/* BANK 2 */
-#define MMU_CMD_REG SMC_REG(0x0000, 2)
+#define MMU_CMD_REG(lp) SMC_REG(lp, 0x0000, 2)
#define MC_BUSY 1 // When 1 the last release has not completed
#define MC_NOP (0<<5) // No Op
#define MC_ALLOC (1<<5) // OR with number of 256 byte packets
@@ -875,30 +875,30 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Packet Number Register
/* BANK 2 */
-#define PN_REG SMC_REG(0x0002, 2)
+#define PN_REG(lp) SMC_REG(lp, 0x0002, 2)
// Allocation Result Register
/* BANK 2 */
-#define AR_REG SMC_REG(0x0003, 2)
+#define AR_REG(lp) SMC_REG(lp, 0x0003, 2)
#define AR_FAILED 0x80 // Alocation Failed
// TX FIFO Ports Register
/* BANK 2 */
-#define TXFIFO_REG SMC_REG(0x0004, 2)
+#define TXFIFO_REG(lp) SMC_REG(lp, 0x0004, 2)
#define TXFIFO_TEMPTY 0x80 // TX FIFO Empty
// RX FIFO Ports Register
/* BANK 2 */
-#define RXFIFO_REG SMC_REG(0x0005, 2)
+#define RXFIFO_REG(lp) SMC_REG(lp, 0x0005, 2)
#define RXFIFO_REMPTY 0x80 // RX FIFO Empty
-#define FIFO_REG SMC_REG(0x0004, 2)
+#define FIFO_REG(lp) SMC_REG(lp, 0x0004, 2)
// Pointer Register
/* BANK 2 */
-#define PTR_REG SMC_REG(0x0006, 2)
+#define PTR_REG(lp) SMC_REG(lp, 0x0006, 2)
#define PTR_RCV 0x8000 // 1=Receive area, 0=Transmit area
#define PTR_AUTOINC 0x4000 // Auto increment the pointer on each access
#define PTR_READ 0x2000 // When 1 the operation is a read
@@ -906,17 +906,17 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Data Register
/* BANK 2 */
-#define DATA_REG SMC_REG(0x0008, 2)
+#define DATA_REG(lp) SMC_REG(lp, 0x0008, 2)
// Interrupt Status/Acknowledge Register
/* BANK 2 */
-#define INT_REG SMC_REG(0x000C, 2)
+#define INT_REG(lp) SMC_REG(lp, 0x000C, 2)
// Interrupt Mask Register
/* BANK 2 */
-#define IM_REG SMC_REG(0x000D, 2)
+#define IM_REG(lp) SMC_REG(lp, 0x000D, 2)
#define IM_MDINT 0x80 // PHY MI Register 18 Interrupt
#define IM_ERCV_INT 0x40 // Early Receive Interrupt
#define IM_EPH_INT 0x20 // Set by Ethernet Protocol Handler section
@@ -929,15 +929,15 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Multicast Table Registers
/* BANK 3 */
-#define MCAST_REG1 SMC_REG(0x0000, 3)
-#define MCAST_REG2 SMC_REG(0x0002, 3)
-#define MCAST_REG3 SMC_REG(0x0004, 3)
-#define MCAST_REG4 SMC_REG(0x0006, 3)
+#define MCAST_REG1(lp) SMC_REG(lp, 0x0000, 3)
+#define MCAST_REG2(lp) SMC_REG(lp, 0x0002, 3)
+#define MCAST_REG3(lp) SMC_REG(lp, 0x0004, 3)
+#define MCAST_REG4(lp) SMC_REG(lp, 0x0006, 3)
// Management Interface Register (MII)
/* BANK 3 */
-#define MII_REG SMC_REG(0x0008, 3)
+#define MII_REG(lp) SMC_REG(lp, 0x0008, 3)
#define MII_MSK_CRS100 0x4000 // Disables CRS100 detection during tx half dup
#define MII_MDOE 0x0008 // MII Output Enable
#define MII_MCLK 0x0004 // MII Clock, pin MDCLK
@@ -948,20 +948,20 @@ smc_pxa_dma_irq(int dma, void *dummy)
// Revision Register
/* BANK 3 */
/* ( hi: chip id low: rev # ) */
-#define REV_REG SMC_REG(0x000A, 3)
+#define REV_REG(lp) SMC_REG(lp, 0x000A, 3)
// Early RCV Register
/* BANK 3 */
/* this is NOT on SMC9192 */
-#define ERCV_REG SMC_REG(0x000C, 3)
+#define ERCV_REG(lp) SMC_REG(lp, 0x000C, 3)
#define ERCV_RCV_DISCRD 0x0080 // When 1 discards a packet being received
#define ERCV_THRESHOLD 0x001F // ERCV Threshold Mask
// External Register
/* BANK 7 */
-#define EXT_REG SMC_REG(0x0000, 7)
+#define EXT_REG(lp) SMC_REG(lp, 0x0000, 7)
#define CHIP_9192 3
@@ -1085,9 +1085,9 @@ static const char * chip_ids[ 16 ] = {
*/
#if SMC_DEBUG > 0
-#define SMC_REG(reg, bank) \
+#define SMC_REG(lp, reg, bank) \
({ \
- int __b = SMC_CURRENT_BANK(); \
+ int __b = SMC_CURRENT_BANK(lp); \
if (unlikely((__b & ~0xf0) != (0x3300 | bank))) { \
printk( "%s: bank reg screwed (0x%04x)\n", \
CARDNAME, __b ); \
@@ -1096,7 +1096,7 @@ static const char * chip_ids[ 16 ] = {
reg<<SMC_IO_SHIFT; \
})
#else
-#define SMC_REG(reg, bank) (reg<<SMC_IO_SHIFT)
+#define SMC_REG(lp, reg, bank) (reg<<SMC_IO_SHIFT)
#endif
/*
@@ -1110,65 +1110,65 @@ static const char * chip_ids[ 16 ] = {
*/
#define SMC_MUST_ALIGN_WRITE SMC_CAN_USE_32BIT
-#define SMC_GET_PN() \
- ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, PN_REG)) \
- : (SMC_inw(ioaddr, PN_REG) & 0xFF) )
+#define SMC_GET_PN(lp) \
+ (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, PN_REG(lp))) \
+ : (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
-#define SMC_SET_PN(x) \
+#define SMC_SET_PN(lp, x) \
do { \
if (SMC_MUST_ALIGN_WRITE) \
- SMC_outl((x)<<16, ioaddr, SMC_REG(0, 2)); \
+ SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \
else if (SMC_CAN_USE_8BIT) \
- SMC_outb(x, ioaddr, PN_REG); \
+ SMC_outb(x, ioaddr, PN_REG(lp)); \
else \
- SMC_outw(x, ioaddr, PN_REG); \
+ SMC_outw(x, ioaddr, PN_REG(lp)); \
} while (0)
-#define SMC_GET_AR() \
- ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, AR_REG)) \
- : (SMC_inw(ioaddr, PN_REG) >> 8) )
+#define SMC_GET_AR(lp) \
+ (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, AR_REG(lp))) \
+ : (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
-#define SMC_GET_TXFIFO() \
- ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, TXFIFO_REG)) \
- : (SMC_inw(ioaddr, TXFIFO_REG) & 0xFF) )
+#define SMC_GET_TXFIFO(lp) \
+ (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
+ : (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
-#define SMC_GET_RXFIFO() \
- ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, RXFIFO_REG)) \
- : (SMC_inw(ioaddr, TXFIFO_REG) >> 8) )
+#define SMC_GET_RXFIFO(lp) \
+ (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
+ : (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
-#define SMC_GET_INT() \
- ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, INT_REG)) \
- : (SMC_inw(ioaddr, INT_REG) & 0xFF) )
+#define SMC_GET_INT(lp) \
+ (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, INT_REG(lp))) \
+ : (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
-#define SMC_ACK_INT(x) \
+#define SMC_ACK_INT(lp, x) \
do { \
if (SMC_CAN_USE_8BIT) \
- SMC_outb(x, ioaddr, INT_REG); \
+ SMC_outb(x, ioaddr, INT_REG(lp)); \
else { \
unsigned long __flags; \
int __mask; \
local_irq_save(__flags); \
- __mask = SMC_inw( ioaddr, INT_REG ) & ~0xff; \
- SMC_outw( __mask | (x), ioaddr, INT_REG ); \
+ __mask = SMC_inw(ioaddr, INT_REG(lp)) & ~0xff; \
+ SMC_outw(__mask | (x), ioaddr, INT_REG(lp)); \
local_irq_restore(__flags); \
} \
} while (0)
-#define SMC_GET_INT_MASK() \
- ( SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, IM_REG)) \
- : (SMC_inw( ioaddr, INT_REG ) >> 8) )
+#define SMC_GET_INT_MASK(lp) \
+ (SMC_CAN_USE_8BIT ? (SMC_inb(ioaddr, IM_REG(lp))) \
+ : (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
-#define SMC_SET_INT_MASK(x) \
+#define SMC_SET_INT_MASK(lp, x) \
do { \
if (SMC_CAN_USE_8BIT) \
- SMC_outb(x, ioaddr, IM_REG); \
+ SMC_outb(x, ioaddr, IM_REG(lp)); \
else \
- SMC_outw((x) << 8, ioaddr, INT_REG); \
+ SMC_outw((x) << 8, ioaddr, INT_REG(lp)); \
} while (0)
-#define SMC_CURRENT_BANK() SMC_inw(ioaddr, BANK_SELECT)
+#define SMC_CURRENT_BANK(lp) SMC_inw(ioaddr, BANK_SELECT)
-#define SMC_SELECT_BANK(x) \
+#define SMC_SELECT_BANK(lp, x) \
do { \
if (SMC_MUST_ALIGN_WRITE) \
SMC_outl((x)<<16, ioaddr, 12<<SMC_IO_SHIFT); \
@@ -1176,118 +1176,119 @@ static const char * chip_ids[ 16 ] = {
SMC_outw(x, ioaddr, BANK_SELECT); \
} while (0)
-#define SMC_GET_BASE() SMC_inw(ioaddr, BASE_REG)
+#define SMC_GET_BASE(lp) SMC_inw(ioaddr, BASE_REG(lp))
-#define SMC_SET_BASE(x) SMC_outw(x, ioaddr, BASE_REG)
+#define SMC_SET_BASE(lp, x) SMC_outw(x, ioaddr, BASE_REG(lp))
-#define SMC_GET_CONFIG() SMC_inw(ioaddr, CONFIG_REG)
+#define SMC_GET_CONFIG(lp) SMC_inw(ioaddr, CONFIG_REG(lp))
-#define SMC_SET_CONFIG(x) SMC_outw(x, ioaddr, CONFIG_REG)
+#define SMC_SET_CONFIG(lp, x) SMC_outw(x, ioaddr, CONFIG_REG(lp))
-#define SMC_GET_COUNTER() SMC_inw(ioaddr, COUNTER_REG)
+#define SMC_GET_COUNTER(lp) SMC_inw(ioaddr, COUNTER_REG(lp))
-#define SMC_GET_CTL() SMC_inw(ioaddr, CTL_REG)
+#define SMC_GET_CTL(lp) SMC_inw(ioaddr, CTL_REG(lp))
-#define SMC_SET_CTL(x) SMC_outw(x, ioaddr, CTL_REG)
+#define SMC_SET_CTL(lp, x) SMC_outw(x, ioaddr, CTL_REG(lp))
-#define SMC_GET_MII() SMC_inw(ioaddr, MII_REG)
+#define SMC_GET_MII(lp) SMC_inw(ioaddr, MII_REG(lp))
-#define SMC_SET_MII(x) SMC_outw(x, ioaddr, MII_REG)
+#define SMC_SET_MII(lp, x) SMC_outw(x, ioaddr, MII_REG(lp))
-#define SMC_GET_MIR() SMC_inw(ioaddr, MIR_REG)
+#define SMC_GET_MIR(lp) SMC_inw(ioaddr, MIR_REG(lp))
-#define SMC_SET_MIR(x) SMC_outw(x, ioaddr, MIR_REG)
+#define SMC_SET_MIR(lp, x) SMC_outw(x, ioaddr, MIR_REG(lp))
-#define SMC_GET_MMU_CMD() SMC_inw(ioaddr, MMU_CMD_REG)
+#define SMC_GET_MMU_CMD(lp) SMC_inw(ioaddr, MMU_CMD_REG(lp))
-#define SMC_SET_MMU_CMD(x) SMC_outw(x, ioaddr, MMU_CMD_REG)
+#define SMC_SET_MMU_CMD(lp, x) SMC_outw(x, ioaddr, MMU_CMD_REG(lp))
-#define SMC_GET_FIFO() SMC_inw(ioaddr, FIFO_REG)
+#define SMC_GET_FIFO(lp) SMC_inw(ioaddr, FIFO_REG(lp))
-#define SMC_GET_PTR() SMC_inw(ioaddr, PTR_REG)
+#define SMC_GET_PTR(lp) SMC_inw(ioaddr, PTR_REG(lp))
-#define SMC_SET_PTR(x) \
+#define SMC_SET_PTR(lp, x) \
do { \
if (SMC_MUST_ALIGN_WRITE) \
- SMC_outl((x)<<16, ioaddr, SMC_REG(4, 2)); \
+ SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \
else \
- SMC_outw(x, ioaddr, PTR_REG); \
+ SMC_outw(x, ioaddr, PTR_REG(lp)); \
} while (0)
-#define SMC_GET_EPH_STATUS() SMC_inw(ioaddr, EPH_STATUS_REG)
+#define SMC_GET_EPH_STATUS(lp) SMC_inw(ioaddr, EPH_STATUS_REG(lp))
-#define SMC_GET_RCR() SMC_inw(ioaddr, RCR_REG)
+#define SMC_GET_RCR(lp) SMC_inw(ioaddr, RCR_REG(lp))
-#define SMC_SET_RCR(x) SMC_outw(x, ioaddr, RCR_REG)
+#define SMC_SET_RCR(lp, x) SMC_outw(x, ioaddr, RCR_REG(lp))
-#define SMC_GET_REV() SMC_inw(ioaddr, REV_REG)
+#define SMC_GET_REV(lp) SMC_inw(ioaddr, REV_REG(lp))
-#define SMC_GET_RPC() SMC_inw(ioaddr, RPC_REG)
+#define SMC_GET_RPC(lp) SMC_inw(ioaddr, RPC_REG(lp))
-#define SMC_SET_RPC(x) \
+#define SMC_SET_RPC(lp, x) \
do { \
if (SMC_MUST_ALIGN_WRITE) \
- SMC_outl((x)<<16, ioaddr, SMC_REG(8, 0)); \
+ SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \
else \
- SMC_outw(x, ioaddr, RPC_REG); \
+ SMC_outw(x, ioaddr, RPC_REG(lp)); \
} while (0)
-#define SMC_GET_TCR() SMC_inw(ioaddr, TCR_REG)
+#define SMC_GET_TCR(lp) SMC_inw(ioaddr, TCR_REG(lp))
-#define SMC_SET_TCR(x) SMC_outw(x, ioaddr, TCR_REG)
+#define SMC_SET_TCR(lp, x) SMC_outw(x, ioaddr, TCR_REG(lp))
#ifndef SMC_GET_MAC_ADDR
-#define SMC_GET_MAC_ADDR(addr) \
+#define SMC_GET_MAC_ADDR(lp, addr) \
do { \
unsigned int __v; \
- __v = SMC_inw( ioaddr, ADDR0_REG ); \
+ __v = SMC_inw(ioaddr, ADDR0_REG(lp)); \
addr[0] = __v; addr[1] = __v >> 8; \
- __v = SMC_inw( ioaddr, ADDR1_REG ); \
+ __v = SMC_inw(ioaddr, ADDR1_REG(lp)); \
addr[2] = __v; addr[3] = __v >> 8; \
- __v = SMC_inw( ioaddr, ADDR2_REG ); \
+ __v = SMC_inw(ioaddr, ADDR2_REG(lp)); \
addr[4] = __v; addr[5] = __v >> 8; \
} while (0)
#endif
-#define SMC_SET_MAC_ADDR(addr) \
+#define SMC_SET_MAC_ADDR(lp, addr) \
do { \
- SMC_outw( addr[0]|(addr[1] << 8), ioaddr, ADDR0_REG ); \
- SMC_outw( addr[2]|(addr[3] << 8), ioaddr, ADDR1_REG ); \
- SMC_outw( addr[4]|(addr[5] << 8), ioaddr, ADDR2_REG ); \
+ SMC_outw(addr[0]|(addr[1] << 8), ioaddr, ADDR0_REG(lp)); \
+ SMC_outw(addr[2]|(addr[3] << 8), ioaddr, ADDR1_REG(lp)); \
+ SMC_outw(addr[4]|(addr[5] << 8), ioaddr, ADDR2_REG(lp)); \
} while (0)
-#define SMC_SET_MCAST(x) \
+#define SMC_SET_MCAST(lp, x) \
do { \
const unsigned char *mt = (x); \
- SMC_outw( mt[0] | (mt[1] << 8), ioaddr, MCAST_REG1 ); \
- SMC_outw( mt[2] | (mt[3] << 8), ioaddr, MCAST_REG2 ); \
- SMC_outw( mt[4] | (mt[5] << 8), ioaddr, MCAST_REG3 ); \
- SMC_outw( mt[6] | (mt[7] << 8), ioaddr, MCAST_REG4 ); \
+ SMC_outw(mt[0] | (mt[1] << 8), ioaddr, MCAST_REG1(lp)); \
+ SMC_outw(mt[2] | (mt[3] << 8), ioaddr, MCAST_REG2(lp)); \
+ SMC_outw(mt[4] | (mt[5] << 8), ioaddr, MCAST_REG3(lp)); \
+ SMC_outw(mt[6] | (mt[7] << 8), ioaddr, MCAST_REG4(lp)); \
} while (0)
-#define SMC_PUT_PKT_HDR(status, length) \
+#define SMC_PUT_PKT_HDR(lp, status, length) \
do { \
if (SMC_CAN_USE_32BIT) \
- SMC_outl((status) | (length)<<16, ioaddr, DATA_REG); \
+ SMC_outl((status) | (length)<<16, ioaddr, \
+ DATA_REG(lp)); \
else { \
- SMC_outw(status, ioaddr, DATA_REG); \
- SMC_outw(length, ioaddr, DATA_REG); \
+ SMC_outw(status, ioaddr, DATA_REG(lp)); \
+ SMC_outw(length, ioaddr, DATA_REG(lp)); \
} \
} while (0)
-#define SMC_GET_PKT_HDR(status, length) \
+#define SMC_GET_PKT_HDR(lp, status, length) \
do { \
if (SMC_CAN_USE_32BIT) { \
- unsigned int __val = SMC_inl(ioaddr, DATA_REG); \
+ unsigned int __val = SMC_inl(ioaddr, DATA_REG(lp)); \
(status) = __val & 0xffff; \
(length) = __val >> 16; \
} else { \
- (status) = SMC_inw(ioaddr, DATA_REG); \
- (length) = SMC_inw(ioaddr, DATA_REG); \
+ (status) = SMC_inw(ioaddr, DATA_REG(lp)); \
+ (length) = SMC_inw(ioaddr, DATA_REG(lp)); \
} \
} while (0)
-#define SMC_PUSH_DATA(p, l) \
+#define SMC_PUSH_DATA(lp, p, l) \
do { \
if (SMC_CAN_USE_32BIT) { \
void *__ptr = (p); \
@@ -1295,23 +1296,25 @@ static const char * chip_ids[ 16 ] = {
void __iomem *__ioaddr = ioaddr; \
if (__len >= 2 && (unsigned long)__ptr & 2) { \
__len -= 2; \
- SMC_outw(*(u16 *)__ptr, ioaddr, DATA_REG); \
+ SMC_outw(*(u16 *)__ptr, ioaddr, \
+ DATA_REG(lp)); \
__ptr += 2; \
} \
if (SMC_CAN_USE_DATACS && lp->datacs) \
__ioaddr = lp->datacs; \
- SMC_outsl(__ioaddr, DATA_REG, __ptr, __len>>2); \
+ SMC_outsl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
if (__len & 2) { \
__ptr += (__len & ~3); \
- SMC_outw(*((u16 *)__ptr), ioaddr, DATA_REG); \
+ SMC_outw(*((u16 *)__ptr), ioaddr, \
+ DATA_REG(lp)); \
} \
} else if (SMC_CAN_USE_16BIT) \
- SMC_outsw(ioaddr, DATA_REG, p, (l) >> 1); \
+ SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
else if (SMC_CAN_USE_8BIT) \
- SMC_outsb(ioaddr, DATA_REG, p, l); \
+ SMC_outsb(ioaddr, DATA_REG(lp), p, l); \
} while (0)
-#define SMC_PULL_DATA(p, l) \
+#define SMC_PULL_DATA(lp, p, l) \
do { \
if (SMC_CAN_USE_32BIT) { \
void *__ptr = (p); \
@@ -1333,16 +1336,17 @@ static const char * chip_ids[ 16 ] = {
*/ \
__ptr -= 2; \
__len += 2; \
- SMC_SET_PTR(2|PTR_READ|PTR_RCV|PTR_AUTOINC); \
+ SMC_SET_PTR(lp, \
+ 2|PTR_READ|PTR_RCV|PTR_AUTOINC); \
} \
if (SMC_CAN_USE_DATACS && lp->datacs) \
__ioaddr = lp->datacs; \
__len += 2; \
- SMC_insl(__ioaddr, DATA_REG, __ptr, __len>>2); \
+ SMC_insl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
} else if (SMC_CAN_USE_16BIT) \
- SMC_insw(ioaddr, DATA_REG, p, (l) >> 1); \
+ SMC_insw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
else if (SMC_CAN_USE_8BIT) \
- SMC_insb(ioaddr, DATA_REG, p, l); \
+ SMC_insb(ioaddr, DATA_REG(lp), p, l); \
} while (0)
#endif /* _SMC91X_H_ */
^ permalink raw reply
* [PATCH 00/04] smc91x: request bus width using platform data V2
From: Magnus Damm @ 2008-02-22 10:54 UTC (permalink / raw)
To: netdev; +Cc: Magnus Damm, lethal, nico, akpm
These patches make it possible to request bus width in the platform data.
Instead of keep on updating smc91x.h with board specific configuration,
use platform data to pass along bus width and irq flags to the driver.
This change is designed to be backwards-compatible, so all boards configured
in the header file should just work as usual.
[PATCH 01/04] smc91x: pass along private data V2
[PATCH 02/04] smc91x: introduce platform data flags V2
[PATCH 03/04] smc91x: add insw/outsw to default config V2
[PATCH 04/04] smc91x: make superh use default config V2
Tested with and without platform data on a SuperH sh7722 MigoR board.
V2 changes the macro argument name to "lp" and adds SMC_DYNAMIC_BUS_CONFIG.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
---
drivers/net/smc91x.c | 335 +++++++++++++++++++++++++---------------------
drivers/net/smc91x.h | 343 +++++++++++++++++++++++-------------------------
include/linux/smc91x.h | 13 +
3 files changed, 359 insertions(+), 332 deletions(-)
^ permalink raw reply
* Re: [RFC,PATCH] loopback: calls netif_receive_skb() instead of netif_rx()
From: Daniel Lezcano @ 2008-02-22 10:19 UTC (permalink / raw)
To: Eric Dumazet; +Cc: David S. Miller, netdev
In-Reply-To: <47BE06F7.5080305@cosmosbay.com>
Eric Dumazet wrote:
> Daniel Lezcano a écrit :
>> Eric Dumazet wrote:
>>> Hi David
>>>
>>> This is an RFC, based on net-2.6 for convenience only.
>>>
>>> Thank you
>>>
>>> [RFC,PATCH] loopback: calls netif_receive_skb() instead of netif_rx()
>>>
>>> Loopback transmit function loopback_xmit() actually calls netif_rx()
>>> to queue
>>> a skb to the softnet queue, and arms a softirq so that this skb can
>>> be handled later.
>>>
>>> This has a cost on SMP, because we need to hold a reference on the
>>> device, and free this
>>> reference when softirq dequeues packet.
>>>
>>> Following patch directly calls netif_receive_skb() and avoids lot of
>>> atomic operations.
>>> (atomic_inc(&dev->refcnt), set_and_set_bit(NAPI_STATE_SCHED,
>>> &n->state), ...
>>> atomic_dec(&dev->refcnt)...), cache line ping-pongs on device
>>> refcnt, but also softirq overhead.
>>>
>>> This gives a nice boost on tbench for example (5 % on my machine)
>>
>> I understand this is interesting for the loopback when there is no
>> multiple instances of it and it can't be unregistered. But now with
>> the network namespaces, we can have multiple instances of the loopback
>> and it can to be unregistered. Shouldn't we still use netif_rx ?
>> Perhaps we can do something like:
>>
>> if (dev->nd_net == &init_net)
>> netif_receive_skb(skb);
>> else
>> netif_rx(skb);
>
> or
>
> #ifdef CONFIG_NET_NS
> if (dev->nd_net != &init_net)
> netif_rx(skb);
> else
> #endif
> netif_receive_skb(skb);
>
>>
>> Or we create:
>> init_loopback_xmit() calling netif_receive_skb(skb);
>> and setup this function when creating the loopback for init_net,
>> otherwise we setup the usual loopback_xmit.
>>
>> We are still safe for multiple network namespaces and we have the
>> improvement for init_net loopback.
>>
>
> I dont understand how my patch could degrade loopbackdev unregister
> logic. It should only help it, by avoiding a queue of 'pending packets'
> per cpu.
>
> When we want to unregister a network device, stack makes sure that no
> more calls to dev->hard_start_xmit() can occur.
>
> If no more loopback_xmit() calls are done on this device, it doesnt
> matter if it internally uses netif_rx() or netif_receive_skb(skb)
>
> loopback device has no queue, its really unfortunate to use the
> 'softirq' internal queue.
Fair enough :)
^ permalink raw reply
* Re: Linux 2.6.24.1 - kernel does not boot; IRQ trouble?
From: Chris Rankin @ 2008-02-22 9:41 UTC (permalink / raw)
To: Kay Sievers, Stephen Hemminger
Cc: Andrew Morton, linux-acpi, linux-kernel, netdev
In-Reply-To: <3ae72650802220111s11e68f1ft149d7832e9bebbd6@mail.gmail.com>
--- Kay Sievers <kay.sievers@vrfy.org> wrote:
> Greg,
> it seems that:
> arch/x86/pci/legacy.c :: pci_legacy_init()
>
> tries to create already created "bridge" symlinks in 2.6.24. So we
> discover the same devices twice? Can this be a reason for the hang?
No, it can't be because it's *not* hanging in this configuration :-). It hangs when I *don't* add
the acpi=noirq option, whereas here it's just adding noise to the dmesg log. (I'm guessing Linux
doesn't call pci_legacy_init() when ACPI takes charge of the IRQs.)
Cheers,
Chris
__________________________________________________________
Sent from Yahoo! Mail.
A Smarter Inbox. http://uk.docs.yahoo.com/nowyoucan.html
^ permalink raw reply
* [PATCH][NEIGH]: Fix race between neighbor lookup and table's hash_rnd update.
From: Pavel Emelyanov @ 2008-02-22 9:37 UTC (permalink / raw)
To: David Miller, Linux Netdev List, devel
The neigh_hash_grow() may update the tbl->hash_rnd value, which
is used in all tbl->hash callbacks to calculate the hashval.
Two lookup routines may race with this, since they call the
->hash callback without the tbl->lock held. Since the hash_rnd
is changed with this lock write-locked moving the calls to ->hash
under this lock read-locked closes this gap.
Signed-off-by: Pavel Emelyanov <xemul@openvz.org>
---
diff --git a/net/core/neighbour.c b/net/core/neighbour.c
index 4062b88..2328acb 100644
--- a/net/core/neighbour.c
+++ b/net/core/neighbour.c
@@ -358,11 +358,12 @@ struct neighbour *neigh_lookup(struct neigh_table *tbl, const void *pkey,
{
struct neighbour *n;
int key_len = tbl->key_len;
- u32 hash_val = tbl->hash(pkey, dev);
+ u32 hash_val;
NEIGH_CACHE_STAT_INC(tbl, lookups);
read_lock_bh(&tbl->lock);
+ hash_val = tbl->hash(pkey, dev);
for (n = tbl->hash_buckets[hash_val & tbl->hash_mask]; n; n = n->next) {
if (dev == n->dev && !memcmp(n->primary_key, pkey, key_len)) {
neigh_hold(n);
@@ -379,11 +380,12 @@ struct neighbour *neigh_lookup_nodev(struct neigh_table *tbl, struct net *net,
{
struct neighbour *n;
int key_len = tbl->key_len;
- u32 hash_val = tbl->hash(pkey, NULL);
+ u32 hash_val;
NEIGH_CACHE_STAT_INC(tbl, lookups);
read_lock_bh(&tbl->lock);
+ hash_val = tbl->hash(pkey, NULL);
for (n = tbl->hash_buckets[hash_val & tbl->hash_mask]; n; n = n->next) {
if (!memcmp(n->primary_key, pkey, key_len) &&
(net == n->dev->nd_net)) {
^ permalink raw reply related
* Re: Linux 2.6.24.1 - kernel does not boot; IRQ trouble?
From: Kay Sievers @ 2008-02-22 9:11 UTC (permalink / raw)
To: Stephen Hemminger
Cc: Chris Rankin, Andrew Morton, linux-acpi, linux-kernel, netdev
In-Reply-To: <3ae72650802190047l5a1f07d9u5fc2031ac92608b6@mail.gmail.com>
On Tue, Feb 19, 2008 at 9:47 AM, Kay Sievers <kay.sievers@vrfy.org> wrote:
> On Feb 18, 2008 9:06 PM, Stephen Hemminger <shemminger@linux-foundation.org> wrote:
> > On Mon, 18 Feb 2008 19:42:25 +0000 (GMT)
> > Chris Rankin <rankincj@yahoo.com> wrote:
> >
> > > --- Stephen Hemminger <shemminger@linux-foundation.org> wrote:
> > > > > > sysfs: duplicate filename 'bridge' can not be created
> > > > > > WARNING: at fs/sysfs/dir.c:424 sysfs_add_one()
> > > > > > Pid: 1, comm: swapper Not tainted 2.6.24.1 #1
> > > > > > [<c0105020>] show_trace_log_lvl+0x1a/0x2f
> > > > > > [<c0105990>] show_trace+0x12/0x14
> > > > > > [<c010613d>] dump_stack+0x6c/0x72
> > > > > > [<c01991bf>] sysfs_add_one+0x57/0xbc
> > > > > > [<c0199e41>] sysfs_create_link+0xc2/0x10d
> > > > > > [<c01bae9a>] pci_bus_add_devices+0xbd/0x103
> > > > > > [<c034016c>] pci_legacy_init+0x56/0xe3
> > > > > > [<c03274e1>] kernel_init+0x157/0x2c3
> > > > > > [<c0104c83>] kernel_thread_helper+0x7/0x10
> > > > > > =======================
> > > > > > pci 0000:00:01.0: Error creating sysfs bridge symlink, continuing...
> > > > > > sysfs: duplicate filename 'bridge' can not be created
> > > > > > WARNING: at fs/sysfs/dir.c:424 sysfs_add_one()
Greg,
it seems that:
arch/x86/pci/legacy.c :: pci_legacy_init()
tries to create already created "bridge" symlinks in 2.6.24. So we
discover the same devices twice? Can this be a reason for the hang?
I guess in 2.6.25, the warning is gone with:
commit fd7d1ced29e5beb88c9068801da7a362606d8273
Author: Greg Kroah-Hartman <gregkh@suse.de>
Date: Tue May 22 22:47:54 2007 -0400
PCI: make pci_bus a struct device
This moves the pci_bus class device to be a real struct device and at
the same time, place it in the device tree in the correct location.
Note, the old "bridge" symlink is now gone.
Thanks,
Kay
^ permalink raw reply
* Re: [NETFILTER]: Introduce nf_inet_address
From: David Woodhouse @ 2008-02-22 8:01 UTC (permalink / raw)
To: Patrick McHardy
Cc: netdev, Jan Engelhardt, David S. Miller, varekova, twoerner
In-Reply-To: <1203666762.5771.35.camel@shinybook.infradead.org>
On Fri, 2008-02-22 at 16:52 +0900, David Woodhouse wrote:
>
> It looks like iptables is fairly broken anyway:
>
> make[1]: Entering directory
> `/home/dwmw2/working/extras/iptables/devel/iptables-1.4.0'
> Unable to resolve dependency on linux/compiler.h. Try 'make clean'.
And if I move away the contents of the local include/linux/ directory
and replace it with proper headers generated by 'make
headers_install' (which won't be trying to include compiler.h), then I
get more failures:
Unable to resolve dependency on ../include/linux/netfilter/xt_u32.h. Try 'make clean'.
Unable to resolve dependency on linux/netfilter/xt_time.h. Try 'make clean'.
Unable to resolve dependency on linux/netfilter/xt_quota.h. Try 'make clean'.
Unable to resolve dependency on ../include/linux/netfilter/xt_connlimit.h. Try 'make clean'.
Unable to resolve dependency on linux/netfilter_ipv6/ip6t_mh.h. Try 'make clean'.
Unable to resolve dependency on linux/netfilter/nf_nat.h. Try 'make clean'.
In file included from include/linux/netfilter/xt_conntrack.h:10,
from extensions/../include/linux/netfilter_ipv4/ipt_conntrack.h:9,
from extensions/libipt_conntrack.c:15:
/usr/include/linux/in.h:26: error: redeclaration of enumerator ‘IPPROTO_IP’
/usr/include/netinet/in.h:34: error: previous definition of ‘IPPROTO_IP’ was here
--
dwmw2
^ permalink raw reply
* Re: [NETFILTER]: Introduce nf_inet_address
From: David Woodhouse @ 2008-02-22 7:52 UTC (permalink / raw)
To: Patrick McHardy
Cc: netdev, Jan Engelhardt, David S. Miller, varekova, twoerner
In-Reply-To: <47BAEB6C.1030609@trash.net>
On Tue, 2008-02-19 at 15:45 +0100, Patrick McHardy wrote:
> That would break iptables compilation, which already includes
> linux/in.h in some files. I guess the best fix for now is to
> include netinet/in.h in busybox and long-term clean this up
> properly.
It looks like iptables is fairly broken anyway:
make[1]: Entering directory `/home/dwmw2/working/extras/iptables/devel/iptables-1.4.0'
Unable to resolve dependency on linux/compiler.h. Try 'make clean'.
Extensions found:
make[1]: Leaving directory `/home/dwmw2/working/extras/iptables/devel/iptables-1.4.0'
error: Bad exit status from /var/tmp/rpm-tmp.32057 (%build)
--
dwmw2
^ permalink raw reply
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