* [PATCH 1/8] [RFC] CAIF Protocol Stack
From: sjur.brandeland @ 2009-09-23 17:30 UTC (permalink / raw)
To: netdev; +Cc: Kim.xx.Lilliestierna, sjur.brandeland
From: Kim Lilliestierna <Kim.xx.Lilliestierna@ericsson.com>
Signed-off-by: sjur.brandeland@stericsson.com
---
include/linux/caif/caif_config.h | 203 ++++++++++++++++++++++++++++++++++++++
include/linux/caif/caif_ioctl.h | 114 +++++++++++++++++++++
2 files changed, 317 insertions(+), 0 deletions(-)
create mode 100644 include/linux/caif/caif_config.h
create mode 100644 include/linux/caif/caif_ioctl.h
diff --git a/include/linux/caif/caif_config.h b/include/linux/caif/caif_config.h
new file mode 100644
index 0000000..6ea934b
--- /dev/null
+++ b/include/linux/caif/caif_config.h
@@ -0,0 +1,203 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2009
+ *
+ * CAIF Channel Configuration definitions.
+ *
+ * Author: Sjur Brendeland/ sjur.brandeland@stericsson.com
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ *
+ */
+
+#ifndef CAIF_CONFIG_H_
+#define CAIF_CONFIG_H_
+
+/**
+ * enum caif_phy_preference - Types of Physical HW Interfaces
+ * towards modem defined in CAIF Stack,
+ * @CAIF_PHYPREF_UNSPECIFIED: Default Physical Interface
+ * @CAIF_PHYPREF_LOW_LAT: Default Physical Interface for Low Latency
+ * Traffic
+ * @CAIF_PHYPREF_HIGH_BW: Default Physical Interface for High Bandwidth
+ * Traffic
+ * @_CAIF_PHYPREF_LOOP: TEST Loop-back Interface Simulating Acc side
+ * responses
+ * @_CAIF_PHYPREF_RAW_LOOP: TEST ONLY Raw loopback interface
+ *
+ * For Client convenience to special types are defined:
+ * CAIF_PHYPREF_LOW_LAT is the preferred low latency physical link.
+ * Typically used for "control" purposes.
+ * CAIF_PHYPREF_HIGH_BW is the preferred high bandwidth physical link.
+ * Typically used for "payload" purposes.
+ *
+ */
+enum caif_phy_preference {
+ CAIF_PHYPREF_UNSPECIFIED = 0x00,
+ CAIF_PHYPREF_LOW_LAT = 0xd0,
+ CAIF_PHYPREF_HIGH_BW = 0xe0,
+ _CAIF_PHYPREF_LOOP = 0x70,
+ _CAIF_PHYPREF_RAW_LOOP = 0x80
+};
+
+
+/*!
+ * define CAIF Channel Priority.
+ * Used when setting up a Channel to specify the
+ * priority level of the channel.
+ */
+
+#define CAIF_PRIO_UNSPCEIFIED 0x0
+#define CAIF_PRIO_MIN 0x01 /*! Minimum Priority Level */
+#define CAIF_PRIO_LOW 0x04 /*!< Suggested Priority Level for
+ * Low Priority Channel */
+#define CAIF_PRIO_NORMAL 0x0f /*!< Suggested Normal/Default
+ * priority Level */
+#define CAIF_PRIO_HIGH 0x14 /*!< Suggested High Priority Level */
+#define CAIF_PRIO_MAX 0x1F /*!< Max Priority for Channel
+ (do not use)
+ */
+
+/**
+ * enum caif_channel_type Types of CAIF Channel type defined in CAIF Stack.
+ * @CAIF_CHTY_AT: Classical AT
+ * @CAIF_CHTY_AT_CTRL: AT Control only
+ * @CAIF_CHTY_AT_PAIRED: Paired control and data
+ * @CAIF_CHTY_DATAGRAM: Datagram, Requires: connection_id
+ * @CAIF_CHTY_DATAGRAM_LOOP: Datagram Loopback (testing purposes only)
+ * @CAIF_CHTY_VIDEO: Video Channel
+ * @CAIF_CHTY_DEBUG: Debug Service (Debug Server and
+ * Interactive Debug)
+ * @CAIF_CHTY_DEBUG_TRACE: Debug Server only
+ * @CAIF_CHTY_DEBUG_INTERACT: Debug Interactive
+ * @CAIF_CHTY_RFM: RFM Service. Params: connection_id, volume
+ * @CAIF_CHTY_UTILITY: Utility (Psock) Service.
+ * Params: fifo_kb,fifo_pkt, name, psock_param
+ * @CAIF_CHTY_RAW: DO NOT USE. This is for testing only
+ *
+ * This is used for Channel Configuration specifying the type of channel.
+ */
+
+enum caif_channel_type {
+ CAIF_CHTY_AT,
+ CAIF_CHTY_AT_CTRL,
+ CAIF_CHTY_AT_PAIRED,
+ CAIF_CHTY_DATAGRAM,
+ CAIF_CHTY_DATAGRAM_LOOP,
+ CAIF_CHTY_VIDEO,
+ CAIF_CHTY_DEBUG,
+ CAIF_CHTY_DEBUG_TRACE,
+ CAIF_CHTY_DEBUG_INTERACT,
+ CAIF_CHTY_RFM,
+ CAIF_CHTY_UTILITY,
+ CAIF_CHTY_RAW
+};
+
+/**
+ *struct caif_channel_config This structures is used for configuring
+ * CAIF Channels.
+ * @name: Mandatory: Nickname for this device
+ * @type: Mandatory Define the type of caif service
+ * @priority: Mandatory Value between CAIF_PRIO_MIN and
+ * CAIF_PRIO_MAX,
+ * CAIF_PRIO_LOW, CAIF_PRIO_NORMAL, CAIF_PRIO_HIGH
+ * are suggested values.
+ * @phy_pref: Either: Specify type of physical interface to use.
+ * @phy_name: Or: Specify identity of the physical interface.
+ *
+ * @u: Union of Channel Type Specific configuration
+ * parameters
+ *
+ * @u.dgm: CAIF_CHTYPE_DATAGRAM
+ * @u.dgm.connection_id: Mandatory Connection ID must be specified.
+ *
+ * @u.video: CAIF_CHTYPE_VIDEO
+ * @u.video.connection_id: Mandatory Connection ID must be specified.
+ *
+ * @u.rfm CAIF_CHTYPE_RFM
+ * @u.rfm.connection_id: Mandatory Connection ID must be specified.
+ * @u.rfm.volume: Mandatory Volume to mount.
+ *
+ * @u.utility: CAIF_CHTYPE_UTILITY
+ * @u.utility.fifosize_kb: Psock: FIFO size in KB
+ * @u.utility.fifosize_bufs: Psock: # signal buffers
+ * @u.utility.name: Psock: Name of service
+ * @u.utility.params: Psock: Channel Config Parameters
+ * @u.utility.paramlen: Psock: Length of Channel Config Parameters
+ *
+ *
+ * It holds configuration parameters for setting up all devined CAIF
+ * Channel types.
+ * The four first fields are mandatory, then Physical Device can be specified
+ * either by name
+ * or by prefered characteristics.
+ * The rest of the configuration fields are hold in a union for each
+ * channel type and are channel type specific.
+ * \b Documentation see STE Doc No: 155 19-CRH 109 913.
+ */
+
+struct caif_channel_config {
+ /* Mandatory: Nickname for this device */
+ char name[16];
+ /* Mandatory: Define the type of caif service */
+ enum caif_channel_type type;
+ /** Mandatory: Mandatory - Value between
+ * CAIF_PRIO_MIN and CAIF_PRIO_MAX, CAIF_PRIO_LOW, CAIF_PRIO_NORMAL,
+ * CAIF_PRIO_HIGH are suggested values. */
+ unsigned priority;
+
+ /** Either: Specify type of physical interface to use. */
+ enum caif_phy_preference phy_pref;
+ /** Or: Specify identity of the physical interface. */
+ char phy_name[16];
+
+ /** Union of Channel Type Specific configuration parameters
+ * 'switched' by attribute type */
+ union {
+ /* CAIF_CHTYPE_DATAGRAM */
+ struct {
+ /** Mandatory Connection ID must be specified. */
+ unsigned connection_id;
+ } dgm;
+ /* CAIF_CHTYPE_VIDEO */
+ struct {
+ /** Datagram: Mandatory Connection ID Must be
+ * specified. */
+ unsigned connection_id;
+ } video;
+ /* CAIF_CHTYPE_RFM */
+ struct {
+ /** RFM: Mandatory Connection ID. */
+ unsigned connection_id;
+ /** RFM: Mandatory Volume to mount. */
+ char volume[20];
+ } rfm;
+ /* CAIF_CHTYPE_UTILITY */
+ struct {
+/** Psock: FIFO size in KB */
+ unsigned fifosize_kb;
+/** Psock: # signal buffers */
+ unsigned fifosize_bufs;
+/** Psock: Name of service */
+ char name[16];
+/** Psock: Channel Config Parameters> */
+ unsigned char params[256];
+/** Psock: Length of Channel Config Parameters */
+ int paramlen;
+ } utility;
+
+
+ /* Raw Data configuration: DO NOT USE,
+ * applies for testing only */
+
+ struct raw {
+ unsigned channeltype;
+ unsigned char endpoint:2;
+ unsigned char subtype:2;
+ unsigned char serviceconfig[512];
+ unsigned int service_length;
+ } _raw;
+ } u;
+
+};
+
+#endif /* CAIF_CONFIG_H_ */
diff --git a/include/linux/caif/caif_ioctl.h b/include/linux/caif/caif_ioctl.h
new file mode 100644
index 0000000..4fdd648
--- /dev/null
+++ b/include/linux/caif/caif_ioctl.h
@@ -0,0 +1,114 @@
+/*
+* Copyright (C) ST-Ericsson AB 2009
+*
+* Author: Daniel Martensson / Daniel.Martensson@stericsson.com
+*
+* License terms: GNU General Public License (GPL), version 2.
+*
+*/
+
+
+
+
+
+
+#ifndef CAIF_IOCTL_H_
+#define CAIF_IOCTL_H_
+#include "caif_config.h"
+
+
+
+/*!\page caif_ioctl.h
+ * This file defines the management interface to CAIF.
+ * It defines how CAIF Channels are configured and become visible in Linux
+ * file system under "/dev/caifconfig".
+ *
+ *\b Example - creating a new AT character device:
+ * \code
+ fd = open("/dev/caifconfig",..);
+ struct caif_channel_create_action at_config = {
+ .name = "cnhl2",
+ .config = {
+ .channel = CAIF_CHTY_AT,
+ .phy_ref = CAIF_PHY_LOW_LAT,
+ .priority = CAIF_PRIO_HIGH
+ }};
+ ioctl(fd, CAIF_IOC_CONFIG_DEVICE,&at_config);
+ close(fd);
+ * \endcode
+ * This will cause a new AT channel to be available in at "/dev/chnl2".
+ * This CAIF channel can then be connected by using \ref open.
+ *
+*/
+
+/*! \addtogroup caif_ioctl
+ * Additional documentation for group `caif_config.h'
+ * @{
+ */
+
+
+
+/* Use 'g' as magic number. 'g' is the first free letter in
+ * Documentation/ioctl-number.txt*/
+#define CAIF_IOC_MAGIC 'g'
+#define DEVICE_NAME_LEN 16
+
+/* Specifies the type of device to create NET device or CHAR device*/
+enum caif_dev_type {
+ CAIF_DEV_CHR = 1,
+ CAIF_DEV_NET = 2
+};
+
+
+/** Used for identifying devices, PHY interfaces etc*/
+struct caif_device_name {
+ char name[DEVICE_NAME_LEN]; /*!< Device name */
+ enum caif_dev_type devtype; /*!< Device type */
+};
+
+
+/**
+ * CAIF ACTION for \ref CAIF_ACT_CHANNEL_CONFIG.
+ * This structure is used to configure a new CAIF Channel and
+ * create the corresponding character device.
+ */
+struct caif_channel_create_action {
+ /** \b in CAIF Configuration Request */
+ struct caif_channel_config config;
+ /** \b in/out Device name returned from ACTION */
+ struct caif_device_name name;
+ /** \b out Major device id */
+ int major;
+ /** \b out Minor device id */
+ int minor;
+};
+
+/**
+ * union caif_action
+ * This union is used to configure a new CAIF Channel and
+ */
+
+union caif_action {
+ struct caif_device_name delete_channel;
+ struct caif_channel_create_action create_channel;
+};
+
+
+/**
+ * CAIF IOCTL for \ref CAIF_IOC_CHANNEL_CONFIG.
+ * This structure is used to configure a new CAIF Channel and
+ * create the corresponding character device.
+ */
+
+/** Create and Configure a new CAIF device.
+ * Note that the device is not implicitly connected. */
+#define CAIF_IOC_CONFIG_DEVICE _IOWR(CAIF_IOC_MAGIC, 1,\
+struct caif_channel_create_action)
+
+/** Remove a CAIF device. Requires the device to be previously disconnected. */
+#define CAIF_IOC_REMOVE_DEVICE _IOWR(CAIF_IOC_MAGIC, 2,\
+ struct caif_device_name)
+#define CAIF__IOC_MAXNR 9
+/*! @} */
+
+#endif /* CAIF_IOCTL_H_ */
--
1.6.0.4
^ permalink raw reply related
* [PATCH 0/8] [RFC] CAIF Protocol Stack
From: sjur.brandeland @ 2009-09-23 17:30 UTC (permalink / raw)
To: netdev; +Cc: Kim.xx.Lilliestierna
Hello,
First of all, apologies for the size of this patch set,
but we like to get comments and feedback from this list.
We are working on a patch set in order to introduce the CAIF protocol in Linux.
CAIF (Communication CPU to Application CPU Interface) is the primary protocol
used to communicate between to ST-Ericsson modem and the external host system.
The host processes can use CAIF to open virtual AT channels, initiate GPRS Data
connections, Video channels and Utility Channels. The Utility Channels are
general-purpose pipes between modem and host.
ST-Ericsson modems support a number of Link Layers between modem and host,
currently Uart and Shared Memory are available for Linux, SPI is soon to come.
Architecture:
------------
The Implementation of CAIF is divided into:
* CAIF Devices Drivers: Character Device, Net Device and Kernel API.
* CAIF Protocol Implementation
* CAIF Link Layer
In order to configure the devices a set of IOCTLs is used.
IOCTL
!
! +------+ +------+ +------+
! +------+! +------+! +------+!
! ! Chr !! !Kernel!! ! Net !!
! ! Dev !+ ! API !+ ! Dev !+ <- CAIF Devices Drivers
! +------+ +------! +------+
! ! ! !
! +----------!----------+
! +------+ <- CAIF Protocol Implementation
+-------> ! CAIF ! /dev/caifconfig
+------+
+--------!--------+
! !
+------+ +-----+
!ShMem ! ! TTY ! <- Link Layer
+------+ +-----+
Any comments welcome.
The patch set is compiled on arm and 386 for 2.6.31.
We have split the patches up in the following way:
--- [1/8] User Space header files used in IOCTL
include/linux/caif/caif_config.h | 203 ++++++++++++++++++++++++++++++++++++++
include/linux/caif/caif_ioctl.h | 114 +++++++++++++++++++++
--- [2/8] Generic CAIF Protocol Stack header files
include/net/caif/generic/caif_layer.h | 378 +++++++++++++++++++++++++++++++++
include/net/caif/generic/cfcnfg.h | 223 +++++++++++++++++++
include/net/caif/generic/cfctrl.h | 139 ++++++++++++
include/net/caif/generic/cffrml.h | 29 +++
include/net/caif/generic/cfglue.h | 206 ++++++++++++++++++
include/net/caif/generic/cfloopcfg.h | 28 +++
include/net/caif/generic/cflst.h | 27 +++
include/net/caif/generic/cfmsll.h | 22 ++
include/net/caif/generic/cfmuxl.h | 30 +++
include/net/caif/generic/cfpkt.h | 246 +++++++++++++++++++++
include/net/caif/generic/cfserl.h | 22 ++
include/net/caif/generic/cfshml.h | 21 ++
include/net/caif/generic/cfspil.h | 80 +++++++
include/net/caif/generic/cfsrvl.h | 48 ++++
include/net/caif/generic/fcs.h | 22 ++
--- [3/8] c
include/net/caif/caif_actions.h | 81 +++++++++
include/net/caif/caif_chr.h | 52 ++++++
include/net/caif/caif_config_util.h | 27 +++
include/net/caif/caif_kernel.h | 324 +++++++++++++++++++++++++++++++++++
include/net/caif/caif_log.h | 83 +++++++++
--- [4/8] Generic CAIF Protocol Stack code
net/caif/generic/cfcnfg.c | 546 +++++++++++++++++++++++++++++++++
net/caif/generic/cfctrl.c | 641 +++++++++++++++++++++++++++++++++++++++
net/caif/generic/cfdgml.c | 119 ++++++++
net/caif/generic/cffrml.c | 146 +++++++++
net/caif/generic/cflist.c | 99 ++++++
net/caif/generic/cfloopcfg.c | 93 ++++++
net/caif/generic/cflooplayer.c | 116 +++++++
net/caif/generic/cfmsll.c | 55 ++++
net/caif/generic/cfmuxl.c | 263 ++++++++++++++++
net/caif/generic/cfpkt_skbuff.c | 590 +++++++++++++++++++++++++++++++++++
net/caif/generic/cfrfml.c | 112 +++++++
net/caif/generic/cfserl.c | 297 ++++++++++++++++++
net/caif/generic/cfshml.c | 67 ++++
net/caif/generic/cfspil.c | 245 +++++++++++++++
net/caif/generic/cfsrvl.c | 177 +++++++++++
net/caif/generic/cfutill.c | 115 +++++++
net/caif/generic/cfveil.c | 118 +++++++
net/caif/generic/cfvidl.c | 68 ++++
net/caif/generic/fcs.c | 58 ++++
--- [5/8] Device Drivers code: CHR device, NET device, CAIF Kernel API
net/caif/Kconfig | 61 +++
net/caif/Makefile | 62 +++
net/caif/caif_chnlif.c | 219 ++++++++
net/caif/caif_chr.c | 378 ++++++++++++++
net/caif/caif_config_util.c | 167 +++++++
net/caif/chnl_chr.c | 1161 +++++++++++++++++++++++++++++++++++++++++++
net/caif/chnl_net.c | 464 +++++++++++++++++
--- [6/8] 8
drivers/net/caif/Kconfig | 64 +++
drivers/net/caif/Makefile | 29 ++
drivers/net/caif/chnl_tty.c | 220 +++++++++++
drivers/net/caif/phyif_loop.c | 309 +++++++++++++++
drivers/net/caif/phyif_ser.c | 189 +++++++++
drivers/net/caif/phyif_shm.c | 870 +++++++++++++++++++++++++++++++++++++++++
drivers/net/caif/shm.h | 95 +++++
drivers/net/caif/shm_cfgifc.c | 60 +++
drivers/net/caif/shm_mbxifc.c | 98 +++++
drivers/net/caif/shm_smbx.c | 81 ++++
--- [7/8] Documentation
Documentation/CAIF/Linux-CAIF.txt | 319 +++++++++++++++++
Documentation/CAIF/README | 60 ++++
Documentation/CAIF/chardevconfig/Makefile | 11 +
Documentation/CAIF/chardevconfig/README | 39 ++
Documentation/CAIF/chardevconfig/caif_cmd_parse.c | 365 ++++++++++++++++++++
Documentation/CAIF/chardevconfig/chardevconfig.c | 111 ++++++
.../CAIF/chardevconfig/create_devices.config | 12 +
.../CAIF/chardevconfig/delete_devices.config | 12 +
Documentation/CAIF/ldiscd/ldiscd.c | 123 +++++++
--- [8/8] Kconfig and Makefiles
drivers/net/Makefile | 1 +
net/Kconfig | 1 +
net/Makefile | 1 +
Regards
Sjur Brændeland
ST-Ericsson
^ permalink raw reply
* Re: [PATCHv5 3/3] vhost_net: a kernel-level virtio server
From: Gregory Haskins @ 2009-09-23 17:58 UTC (permalink / raw)
To: Avi Kivity
Cc: Ira W. Snyder, Michael S. Tsirkin, netdev, virtualization, kvm,
linux-kernel, mingo, linux-mm, akpm, hpa, Rusty Russell, s.hetze,
alacrityvm-devel
In-Reply-To: <4ABA3A73.5090508@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 11641 bytes --]
Gregory Haskins wrote:
> Avi Kivity wrote:
>> On 09/23/2009 05:26 PM, Gregory Haskins wrote:
>>>
>>>>> Yes, I'm having to create my own bus model, a-la lguest, virtio-pci,
>>>>> and
>>>>> virtio-s390. It isn't especially easy. I can steal lots of code from
>>>>> the
>>>>> lguest bus model, but sometimes it is good to generalize, especially
>>>>> after the fourth implemention or so. I think this is what GHaskins
>>>>> tried
>>>>> to do.
>>>>>
>>>>>
>>>> Yes. vbus is more finely layered so there is less code duplication.
>>>>
>>> To clarify, Ira was correct in stating this generalizing some of these
>>> components was one of the goals for the vbus project: IOW vbus finely
>>> layers and defines what's below virtio, not replaces it.
>>>
>>> You can think of a virtio-stack like this:
>>>
>>> --------------------------
>>> | virtio-net
>>> --------------------------
>>> | virtio-ring
>>> --------------------------
>>> | virtio-bus
>>> --------------------------
>>> | ? undefined ?
>>> --------------------------
>>>
>>> IOW: The way I see it, virtio is a device interface model only. The
>>> rest of it is filled in by the virtio-transport and some kind of
>>> back-end.
>>>
>>> So today, we can complete the "? undefined ?" block like this for KVM:
>>>
>>> --------------------------
>>> | virtio-pci
>>> --------------------------
>>> |
>>> --------------------------
>>> | kvm.ko
>>> --------------------------
>>> | qemu
>>> --------------------------
>>> | tuntap
>>> --------------------------
>>>
>>> In this case, kvm.ko and tuntap are providing plumbing, and qemu is
>>> providing a backend device model (pci-based, etc).
>>>
>>> You can, of course, plug a different stack in (such as virtio-lguest,
>>> virtio-ira, etc) but you are more or less on your own to recreate many
>>> of the various facilities contained in that stack (such as things
>>> provided by QEMU, like discovery/hotswap/addressing), as Ira is
>>> discovering.
>>>
>>> Vbus tries to commoditize more components in the stack (like the bus
>>> model and backend-device model) so they don't need to be redesigned each
>>> time we solve this "virtio-transport" problem. IOW: stop the
>>> proliferation of the need for pci-bus, lguest-bus, foo-bus underneath
>>> virtio. Instead, we can then focus on the value add on top, like the
>>> models themselves or the simple glue between them.
>>>
>>> So now you might have something like
>>>
>>> --------------------------
>>> | virtio-vbus
>>> --------------------------
>>> | vbus-proxy
>>> --------------------------
>>> | kvm-guest-connector
>>> --------------------------
>>> |
>>> --------------------------
>>> | kvm.ko
>>> --------------------------
>>> | kvm-host-connector.ko
>>> --------------------------
>>> | vbus.ko
>>> --------------------------
>>> | virtio-net-backend.ko
>>> --------------------------
>>>
>>> so now we don't need to worry about the bus-model or the device-model
>>> framework. We only need to implement the connector, etc. This is handy
>>> when you find yourself in an environment that doesn't support PCI (such
>>> as Ira's rig, or userspace containers), or when you want to add features
>>> that PCI doesn't have (such as fluid event channels for things like IPC
>>> services, or priortizable interrupts, etc).
>>>
>> Well, vbus does more, for example it tunnels interrupts instead of
>> exposing them 1:1 on the native interface if it exists.
>
> As I've previously explained, that trait is a function of the
> kvm-connector I've chosen to implement, not of the overall design of vbus.
>
> The reason why my kvm-connector is designed that way is because my early
> testing/benchmarking shows one of the issues in KVM performance is the
> ratio of exits per IO operation are fairly high, especially as your
> scale io-load. Therefore, the connector achieves a substantial
> reduction in that ratio by treating "interrupts" to the same kind of
> benefits that NAPI brought to general networking: That is, we enqueue
> "interrupt" messages into a lockless ring and only hit the IDT for the
> first occurrence. Subsequent interrupts are injected in a
> parallel/lockless manner, without hitting the IDT nor incurring an extra
> EOI. This pays dividends as the IO rate increases, which is when the
> guest needs the most help.
>
> OTOH, it is entirely possible to design the connector such that we
> maintain a 1:1 ratio of signals to traditional IDT interrupts. It is
> also possible to design a connector which surfaces as something else,
> such as PCI devices (by terminating the connector in QEMU and utilizing
> its PCI emulation facilities), which would naturally employ 1:1 mapping.
>
> So if 1:1 mapping is a critical feature (I would argue to the contrary),
> vbus can support it.
>
>> It also pulls parts of the device model into the host kernel.
>
> That is the point. Most of it needs to be there for performance.
To clarify this point:
There are various aspects about designing high-performance virtual
devices such as providing the shortest paths possible between the
physical resources and the consumers. Conversely, we also need to
ensure that we meet proper isolation/protection guarantees at the same
time. What this means is there are various aspects to any
high-performance PV design that require to be placed in-kernel to
maximize the performance yet properly isolate the guest.
For instance, you are required to have your signal-path (interrupts and
hypercalls), your memory-path (gpa translation), and
addressing/isolation model in-kernel to maximize performance.
Vbus accomplishes its in-kernel isolation model by providing a
"container" concept, where objects are placed into this container by
userspace. The host kernel enforces isolation/protection by using a
namespace to identify objects that is only relevant within a specific
container's context (namely, a "u32 dev-id"). The guest addresses the
objects by its dev-id, and the kernel ensures that the guest can't
access objects outside of its dev-id namespace.
All that is required is a way to transport a message with a "devid"
attribute as an address (such as DEVCALL(devid)) and the framework
provides the rest of the decode+execute function.
Contrast this to vhost+virtio-pci (called simply "vhost" from here).
It is not immune to requiring in-kernel addressing support either, but
rather it just does it differently (and its not as you might expect via
qemu).
Vhost relies on QEMU to render PCI objects to the guest, which the guest
assigns resources (such as BARs, interrupts, etc). A PCI-BAR in this
example may represent a PIO address for triggering some operation in the
device-model's fast-path. For it to have meaning in the fast-path, KVM
has to have in-kernel knowledge of what a PIO-exit is, and what to do
with it (this is where pio-bus and ioeventfd come in). The programming
of the PIO-exit and the ioeventfd are likewise controlled by some
userspace management entity (i.e. qemu). The PIO address and value
tuple form the address, and the ioeventfd framework within KVM provide
the decode+execute function.
This idea seemingly works fine, mind you, but it rides on top of a *lot*
of stuff including but not limited to: the guests pci stack, the qemu
pci emulation, kvm pio support, and ioeventfd. When you get into
situations where you don't have PCI or even KVM underneath you (e.g. a
userspace container, Ira's rig, etc) trying to recreate all of that PCI
infrastructure for the sake of using PCI is, IMO, a lot of overhead for
little gain.
All you really need is a simple decode+execute mechanism, and a way to
program it from userspace control. vbus tries to do just that:
commoditize it so all you need is the transport of the control messages
(like DEVCALL()), but the decode+execute itself is reuseable, even
across various environments (like KVM or Iras rig).
And we face similar situations with the signal-path and memory-path
components...but lets take a look at the slow-path side.
> And what doesn't need to be there for performance can either be:
>
> a) skipped at the discretion of the connector/device-model designer
>
> OR
>
> b) included because its trivially small subset of the model (e.g. a
> mac-addr attribute) and its nice to have a cohesive solution instead of
> requiring a separate binary blob that can get out of sync, etc.
>
> The example Ive provided to date (venet on kvm) utilizes (b), but it
> certainly doesn't have to. Therefore, I don't think vbus as a whole can
> be judged on this one point.
For a given model, we have a grouping of operations for fast path and
slow path. Fast path would be things like we just talked about
(signal-path, memory-path, addressing model). Slow path would be things
like device discovery (and hotswap), config-space, etc.
And your argument, I believe, is that vbus allows both to be implemented
in the kernel (though to reiterate, its optional) and is therefore a bad
design, so lets discuss that.
I believe the assertion is that things like config-space are best left
to userspace, and we should only relegate fast-path duties to the
kernel. The problem is that, in my experience, a good deal of
config-space actually influences the fast-path and thus needs to
interact with the fast-path mechanism eventually anyway. Whats left
over that doesn't fall into this category may cheaply ride on existing
plumbing, so its not like we created something new or unnatural just to
support this subclass of config-space.
For example: take an attribute like the mac-address assigned to a NIC.
This clearly doesn't need to be in-kernel and could go either way (such
as a PCI config-space register).
As another example: consider an option bit that enables a new feature
that affects the fast-path, like RXBUF merging. If we use the split
model where config space is handled by userspace and fast-path is
in-kernel, the userspace component is only going to act as a proxy.
I.e. it will pass the option down to the kernel eventually. Therefore,
there is little gain in trying to split this type of slow-path out to
userspace. In fact, its more work.
vbus addresses this observation by providing a very simple (yet
hopefully powerful) model of providing two basic verbs to a device:
dev->call()
dev->shm()
It makes no distinction of slow or fast-path type operations, per se.
Just a mechanism for synchronous or asynchronous communication. It is
expected that a given component will build "config-space" primarily from
the synchronous ->call() interface if it requires one. However, it gets
this for free since we need ->call() for fast-path too (like the
rt-scheduler device, etc).
So I can then use ->call to perform a fast-path scheduler update (has to
go in-kernel for performance), an "enable rxbuf-merge" function (has to
end-up in-kernel eventually), or a "macquery" (doesn't need to be
in-kernel).
My choice was to support that third operation in-kernel as well, because
its way more complicated to do it another way that it is to simply
export a sysfs attribute to set it. Userspace is still completely in
control..it sets the value. It just doesnt have to write plumbing to
make it accessible. The basic vbus model inherently provides this.
Thats enough for now. We can talk about discovery/hotswap at a later time.
Kind Regards,
-Greg
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 267 bytes --]
^ permalink raw reply
* Re: [PATCH 1/3] iwmc3200top: Add Intel Wireless MultiCom 3200 top driver.
From: Inaky Perez-Gonzalez @ 2009-09-23 17:48 UTC (permalink / raw)
To: Tomas Winkler
Cc: Johannes Berg, davem@davemloft.net, linville@tuxdriver.com,
netdev@vger.kernel.org, linux-wireless@vger.kernel.org,
linux-mmc@vger.kernel.org, Zhu, Yi, Kao, Cindy H, Cohen, Guy,
Rindjunsky, Ron
In-Reply-To: <1ba2fa240909230023v17fe2b49v4981d464dba469ed@mail.gmail.com>
On Wed, 2009-09-23 at 01:23 -0600, Tomas Winkler wrote:
> On Wed, Sep 23, 2009 at 9:57 AM, Johannes Berg
> <johannes@sipsolutions.net> wrote:
> > On Wed, 2009-09-23 at 02:38 +0300, Tomas Winkler wrote:
> >
> >> +config IWMC3200TOP
> >> + tristate "Intel Wireless MultiCom Top Driver"
> >> + depends on MMC && EXPERIMENTAL
> >> + select FW_LOADER
> >> + ---help---
> >> + Intel Wireless MultiCom 3200 Top driver is responsible for
> >> + for firmware load and enabled coms enumeration
> >
> > This seems like the wrong approach to me.
> >
> > To me, it seems like you have a device that contains an internal bus and
> > allows bus enumeration. Typically, we would surface that bus in the
> > driver/device model and allow sub-drivers to bind to that by way of
> > exposing the internal bus, like e.g. drivers/ssb/.
>
> From HW perspective your assumption is not exactly correct. All the
> devices are visible on the SDIO bus but they are not operational
> (probe won't succeed) until TOP download the firmware and kicks the
> devices. From SW perspective to create another bus layer is an option.
> I'm not sure if it's not more complicated one.
It is definitely more complicated; we thought about it and it wasn't
worth. The current solution works and it is simple enough.
To extend Tomas' explanation:
1 device powers up
2 enabling any sdio function that is not the top one fails; drivers
return -ENODEV
3 top function is enabled, firmware loaded, it initializes
the rest of the functions. Top driver kicks a SDIO bus rescan
on a workqueue
4 other sdio functions can be enabled and probe succesfully (uploading
firmware, yadah yadah).
A subbus would add a lot of complexity to all this, having to replicate
most of the device probing, suspend/resume, pre/post reset (that's is
being added to SDIO).
Thanks,
^ permalink raw reply
* Re: fanotify as syscalls
From: Davide Libenzi @ 2009-09-23 17:31 UTC (permalink / raw)
To: Tvrtko Ursulin
Cc: Andreas Gruenbacher, Jamie Lokier, Eric Paris, Linus Torvalds,
Evgeniy Polyakov, David Miller, Linux Kernel Mailing List,
linux-fsdevel@vger.kernel.org, netdev@vger.kernel.org,
viro@zeniv.linux.org.uk, alan@linux.intel.com, hch@infradead.org
In-Reply-To: <200909231645.29559.tvrtko.ursulin@sophos.com>
On Wed, 23 Sep 2009, Tvrtko Ursulin wrote:
> Yeah, you could do something like kauth on OSX, which is I guess similar to
> LSM, which was turned off for out of tree. And now you want to push users of
> fanotify out of tree, so what should it be? In tree bad, out of tree bad?
As I said before, the good of a syscall tracing approach, is that it is a
completely generic mechanism (extensible for other kind of hooks too),
with minimal kernel impact, while allowing its module-users to stuff all
the code they want in the part that it's their responsibility.
So that a "we need this too" gets translated to "just do it in your code",
instead of a request to add more stuff into the kernel, and maybe altering
the userspace access interface (which is always painful).
- Davide
^ permalink raw reply
* r8169 chips on some Intel D945GSEJT boards fail to work after PXE boot
From: Simon Farnsworth @ 2009-09-23 16:57 UTC (permalink / raw)
To: Francois Romieu; +Cc: netdev
[-- Attachment #1: Type: text/plain, Size: 1102 bytes --]
Hello,
I'm having trouble getting Intel D945GSEJT boards to reliably install
via PXE boot. They all have apparently identical r8169 chips, and I'm
using the r8169 driver from Fedora's 2.6.30-1 kernel; I've also tried
porting the changes in r8169.c from Linus's git
85910a8e9f425656bb7202d0fc62800000ffa262 to the kernel I'm using,
without success.
Some boards are good, and just work, whether I boot via PXE or boot from
the local disk; dmesg.working and lspci.working are from a good board.
Some boards are bad; they work fine if I boot from local disk (including
network), but the kernel cannot detect link, or send or receive data if
I PXE boot. dmesg.broken and lspci.broken are from a bad board.
I've tried disabling MSI, in case it's an interrupt issue, which hasn't
helped; unfortunately, the pungi-generated initramfs for PXE boot
doesn't have a shell I can use to interrogate the kernel.
I've updated them to the current BIOS revision,
JT94510H.86A.0037.2009.0820.1551, which hasn't helped. I'm happy to try
any suggestions, or to provide more information if needed.
--
Simon Farnsworth
[-- Attachment #2: dmesg.broken --]
[-- Type: text/plain, Size: 30364 bytes --]
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 2.6.30-1.NTB7.fc8.i686.PAE (sfarnsworth@f8simon.office.onelan.co.uk) (gcc version 4.1.2 20070925 (Red Hat 4.1.2-33)) #1 SMP Wed Sep 23 12:09:32 BST 2009
KERNEL supported cpus:
Intel GenuineIntel
AMD AuthenticAMD
NSC Geode by NSC
Cyrix CyrixInstead
Centaur CentaurHauls
Transmeta GenuineTMx86
Transmeta TransmetaCPU
UMC UMC UMC UMC
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009d800 (usable)
BIOS-e820: 000000000009d800 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000003f4b5000 (usable)
BIOS-e820: 000000003f4b5000 - 000000003f4e0000 (ACPI NVS)
BIOS-e820: 000000003f4e0000 - 000000003f5fe000 (reserved)
BIOS-e820: 000000003f5fe000 - 000000003f5ff000 (usable)
BIOS-e820: 000000003f5ff000 - 000000003f600000 (ACPI NVS)
BIOS-e820: 000000003f600000 - 000000003f608000 (ACPI data)
BIOS-e820: 000000003f608000 - 000000003f60e000 (ACPI NVS)
BIOS-e820: 000000003f60e000 - 000000003f62b000 (reserved)
BIOS-e820: 000000003f62b000 - 000000003f700000 (usable)
BIOS-e820: 00000000e0000000 - 00000000ffc00000 (reserved)
BIOS-e820: 00000000fff00000 - 0000000100000000 (reserved)
DMI 2.6 present.
last_pfn = 0x3f700 max_arch_pfn = 0x100000
MTRR default type: uncachable
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-E7FFF uncachable
E8000-FFFFF write-protect
MTRR variable ranges enabled:
0 base 000000000 mask 0C0000000 write-back
1 base 03F700000 mask 0FFF00000 uncachable
2 base 03F800000 mask 0FF800000 uncachable
3 disabled
4 disabled
5 disabled
6 disabled
7 disabled
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
original variable MTRRs
reg 0, base: 0GB, range: 1GB, type WB
reg 1, base: 1015MB, range: 1MB, type UC
reg 2, base: 1016MB, range: 8MB, type UC
total RAM coverred: 1015M
Found optimal setting for mtrr clean up
gran_size: 64K chunk_size: 16M num_reg: 3 lose cover RAM: 0G
New variable MTRRs
reg 0, base: 0GB, range: 1GB, type WB
reg 1, base: 1015MB, range: 1MB, type UC
reg 2, base: 1016MB, range: 8MB, type UC
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
init_memory_mapping: 0000000000000000-00000000377fe000
Using x86 segment limits to approximate NX protection
0000000000 - 0000400000 page 4k
0000400000 - 0037400000 page 2M
0037400000 - 00377fe000 page 4k
kernel direct mapping tables up to 377fe000 @ 7000-c000
RAMDISK: 37dcf000 - 37fefa77
Allocated new RAMDISK: 00100000 - 00320a77
Move RAMDISK from 0000000037dcf000 - 0000000037fefa76 to 00100000 - 00320a76
ACPI: RSDP 000f0400 00024 (v02 INTEL )
ACPI: XSDT 3f606f10 0003C (v01 INTEL D945JT 06222004 MSFT 00010013)
ACPI: FACP 3f605d90 000F4 (v04 INTEL D945JT 06222004 MSFT 00010013)
ACPI Warning (tbfadt-0370): 32/64 FACS address mismatch in FADT - two FACS tables! [20090320]
ACPI Warning (tbfadt-0488): 32/64X FACS address mismatch in FADT - 3F60DE40/000000003F60DD40, using 32 [20090320]
ACPI: DSDT 3f600010 0416D (v01 INTEL D945JT 00000000 INTL 20051117)
ACPI: FACS 3f60de40 00040
ACPI: APIC 3f607e90 0005C (v02 INTEL D945JT 06222004 MSFT 00010013)
ACPI: MCFG 3f607e10 0003C (v01 INTEL D945JT 06222004 MSFT 00000097)
ACPI: Local APIC address 0xfee00000
127MB HIGHMEM available.
887MB LOWMEM available.
mapped low ram: 0 - 377fe000
low ram: 0 - 377fe000
node 0 low ram: 00000000 - 377fe000
node 0 bootmap 00008000 - 0000ef00
(9 early reservations) ==> bootmem [0000000000 - 00377fe000]
#0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
#1 [0000001000 - 0000002000] EX TRAMPOLINE ==> [0000001000 - 0000002000]
#2 [0000006000 - 0000007000] TRAMPOLINE ==> [0000006000 - 0000007000]
#3 [0000400000 - 0000a14008] TEXT DATA BSS ==> [0000400000 - 0000a14008]
#4 [000009d800 - 0000100000] BIOS reserved ==> [000009d800 - 0000100000]
#5 [0000a15000 - 0000a181d9] BRK ==> [0000a15000 - 0000a181d9]
#6 [0000007000 - 0000008000] PGTABLE ==> [0000007000 - 0000008000]
#7 [0000100000 - 0000320a77] NEW RAMDISK ==> [0000100000 - 0000320a77]
#8 [0000008000 - 000000f000] BOOTMAP ==> [0000008000 - 000000f000]
Zone PFN ranges:
DMA 0x00000000 -> 0x00001000
Normal 0x00001000 -> 0x000377fe
HighMem 0x000377fe -> 0x0003f700
Movable zone start PFN for each node
early_node_map[4] active PFN ranges
0: 0x00000000 -> 0x0000009d
0: 0x00000100 -> 0x0003f4b5
0: 0x0003f5fe -> 0x0003f5ff
0: 0x0003f62b -> 0x0003f700
On node 0 totalpages: 259368
free_area_init_node: node 0, pgdat c08bac20, node_mem_map c1000000
DMA zone: 32 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 3965 pages, LIFO batch:0
Normal zone: 1744 pages used for memmap
Normal zone: 221486 pages, LIFO batch:31
HighMem zone: 255 pages used for memmap
HighMem zone: 31886 pages, LIFO batch:7
Using APIC driver default
ACPI: PM-Timer IO Port: 0x408
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled)
ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Enabling APIC mode: Flat. Using 1 I/O APICs
Using ACPI (MADT) for SMP configuration information
SMP: Allowing 2 CPUs, 0 hotplug CPUs
nr_irqs_gsi: 24
PM: Registered nosave memory: 000000000009d000 - 000000000009e000
PM: Registered nosave memory: 000000000009e000 - 00000000000a0000
PM: Registered nosave memory: 00000000000a0000 - 00000000000e0000
PM: Registered nosave memory: 00000000000e0000 - 0000000000100000
Allocating PCI resources starting at 40000000 (gap: 3f700000:a0900000)
NR_CPUS:32 nr_cpumask_bits:32 nr_cpu_ids:2 nr_node_ids:1
PERCPU: Embedded 11 pages at c17f4000, static data 23452 bytes
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 257337
Kernel command line: ro root=/dev/NTBgroup/System quiet nomodeset
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Initializing CPU#0
NR_IRQS:1280
PID hash table entries: 4096 (order: 12, 16384 bytes)
Extended CMOS year: 2000
Fast TSC calibration using PIT
Detected 1596.253 MHz processor.
Console: colour VGA+ 80x25
console [tty0] enabled
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Initializing HighMem for node 0 (000377fe:0003f700)
Memory: 1019520k/1039360k available (3183k kernel code, 17548k reserved, 1888k data, 372k init, 128564k highmem)
virtual kernel memory layout:
fixmap : 0xffe16000 - 0xfffff000 (1956 kB)
pkmap : 0xff800000 - 0xffc00000 (4096 kB)
vmalloc : 0xf7ffe000 - 0xff7fe000 ( 120 MB)
lowmem : 0xc0000000 - 0xf77fe000 ( 887 MB)
.init : 0xc08ff000 - 0xc095c000 ( 372 kB)
.data : 0xc071bd57 - 0xc08f4048 (1888 kB)
.text : 0xc0400000 - 0xc071bd57 (3183 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
spurious 8259A interrupt: IRQ7.
Calibrating delay loop (skipped), value calculated using timer frequency.. 3192.50 BogoMIPS (lpj=1596253)
Security Framework initialized
SELinux: Initializing.
SELinux: Starting in permissive mode
Mount-cache hash table entries: 512
Initializing cgroup subsys ns
Initializing cgroup subsys cpuacct
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
CPU: L1 I cache: 32K, L1 D cache: 24K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
using mwait in idle threads.
Checking 'hlt' instruction... OK.
ACPI: Core revision 20090320
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0
CPU0: Intel(R) Atom(TM) CPU N270 @ 1.60GHz stepping 02
Booting processor 1 APIC 0x1 ip 0x6000
Initializing CPU#1
Calibrating delay using timer specific routine.. 3191.45 BogoMIPS (lpj=1595728)
CPU: L1 I cache: 32K, L1 D cache: 24K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#1.
x86 PAT enabled: cpu 1, old 0x7040600070406, new 0x7010600070106
CPU1: Intel(R) Atom(TM) CPU N270 @ 1.60GHz stepping 02
checking TSC synchronization [CPU#0 -> CPU#1]: passed.
Brought up 2 CPUs
Total of 2 processors activated (6383.96 BogoMIPS).
sizeof(vma)=84 bytes
sizeof(page)=32 bytes
sizeof(inode)=348 bytes
sizeof(dentry)=132 bytes
sizeof(ext3inode)=504 bytes
sizeof(buffer_head)=56 bytes
sizeof(skbuff)=184 bytes
sizeof(task_struct)=3172 bytes
CPU0 attaching sched-domain:
domain 0: span 0-1 level SIBLING
groups: 0 1
CPU1 attaching sched-domain:
domain 0: span 0-1 level SIBLING
groups: 1 0
net_namespace: 1048 bytes
regulator: core version 0.5
Time: 14:19:45 Date: 09/23/09
NET: Registered protocol family 16
ACPI: bus type pci registered
PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
PCI: MCFG area at e0000000 reserved in E820
PCI: Using MMCONFIG for extended config space
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
ACPI: BIOS _OSI(Linux) query ignored
ACPI: BIOS _OSI(Linux) query ignored
ACPI: Interpreter enabled
ACPI: (supports S0 S1 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
ACPI: No dock devices found.
ACPI: PCI Root Bridge [PCI0] (0000:00)
pci 0000:00:02.0: reg 10 32bit mmio: [0xffd80000-0xffdfffff]
pci 0000:00:02.0: reg 14 io port: [0xf150-0xf157]
pci 0000:00:02.0: reg 18 32bit mmio: [0xd0000000-0xdfffffff]
pci 0000:00:02.0: reg 1c 32bit mmio: [0xffe00000-0xffe3ffff]
pci 0000:00:02.1: reg 10 32bit mmio: [0xffd00000-0xffd7ffff]
pci 0000:00:1b.0: reg 10 64bit mmio: [0xcff00000-0xcff03fff]
pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1b.0: PME# disabled
pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: PME# disabled
pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.1: PME# disabled
pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.2: PME# disabled
pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.3: PME# disabled
pci 0000:00:1d.0: reg 20 io port: [0xf0a0-0xf0bf]
pci 0000:00:1d.1: reg 20 io port: [0xf080-0xf09f]
pci 0000:00:1d.2: reg 20 io port: [0xf060-0xf07f]
pci 0000:00:1d.3: reg 20 io port: [0xf040-0xf05f]
pci 0000:00:1d.7: reg 10 32bit mmio: [0xffe41000-0xffe413ff]
pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1d.7: PME# disabled
pci 0000:00:1f.0: Force enabled HPET at 0xfed00000
pci 0000:00:1f.0: quirk: region 0400-047f claimed by ICH6 ACPI/GPIO/TCO
pci 0000:00:1f.0: quirk: region 0500-053f claimed by ICH6 GPIO
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 0a00 (mask 007f)
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 2 PIO at 1640 (mask 000f)
pci 0000:00:1f.1: reg 10 io port: [0xf140-0xf147]
pci 0000:00:1f.1: reg 14 io port: [0xf130-0xf133]
pci 0000:00:1f.1: reg 18 io port: [0xf120-0xf127]
pci 0000:00:1f.1: reg 1c io port: [0xf110-0xf113]
pci 0000:00:1f.1: reg 20 io port: [0xf100-0xf10f]
pci 0000:00:1f.2: reg 10 io port: [0xf0f0-0xf0f7]
pci 0000:00:1f.2: reg 14 io port: [0xf0e0-0xf0e3]
pci 0000:00:1f.2: reg 18 io port: [0xf0d0-0xf0d7]
pci 0000:00:1f.2: reg 1c io port: [0xf0c0-0xf0c3]
pci 0000:00:1f.2: reg 20 io port: [0xf020-0xf03f]
pci 0000:00:1f.2: reg 24 32bit mmio: [0xffe40000-0xffe403ff]
pci 0000:00:1f.2: PME# supported from D3hot
pci 0000:00:1f.2: PME# disabled
pci 0000:00:1f.3: reg 20 io port: [0x1180-0x119f]
pci 0000:01:00.0: reg 10 io port: [0xe000-0xe0ff]
pci 0000:01:00.0: reg 18 64bit mmio: [0xcfe04000-0xcfe04fff]
pci 0000:01:00.0: reg 20 64bit mmio: [0xcfe00000-0xcfe03fff]
pci 0000:01:00.0: reg 30 32bit mmio: [0x000000-0x01ffff]
pci 0000:01:00.0: supports D1 D2
pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:01:00.0: PME# disabled
pci 0000:00:1c.0: bridge io port: [0xe000-0xefff]
pci 0000:00:1c.0: bridge 32bit mmio: [0xffc00000-0xffcfffff]
pci 0000:00:1c.0: bridge 64bit mmio pref: [0xcfe00000-0xcfefffff]
pci 0000:00:1e.0: transparent bridge
pci_bus 0000:00: on NUMA node 0
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P4._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P5._PRT]
ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 *7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 *10 11 12 14 15)
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
hpet clockevent registered
HPET: 3 timers in total, 0 timers will be used for per-cpu timer
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
hpet0: 3 comparators, 64-bit 14.318180 MHz counter
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp: PnP ACPI: found 13 devices
ACPI: ACPI bus type pnp unregistered
system 00:01: iomem range 0xfed14000-0xfed17fff has been reserved
system 00:01: iomem range 0xfed19000-0xfed19fff has been reserved
system 00:01: iomem range 0xfed18000-0xfed18fff has been reserved
system 00:01: iomem range 0xe0000000-0xefffffff has been reserved
system 00:01: iomem range 0xff000000-0xffffffff could not be reserved
system 00:09: ioport range 0x4d0-0x4d1 has been reserved
system 00:0b: ioport range 0xfff0-0xffff has been reserved
system 00:0b: ioport range 0xffff-0xffff has been reserved
system 00:0b: ioport range 0xffff-0xffff has been reserved
system 00:0b: ioport range 0x6a0-0x6a7 has been reserved
system 00:0c: ioport range 0x400-0x47f has been reserved
system 00:0c: ioport range 0x1180-0x119f has been reserved
system 00:0c: ioport range 0x500-0x53f has been reserved
system 00:0c: iomem range 0xfec00000-0xfec00fff has been reserved
system 00:0c: iomem range 0xfee00000-0xfee00fff has been reserved
system 00:0c: iomem range 0xfed20000-0xfed23fff has been reserved
system 00:0c: iomem range 0xffb00000-0xffbfffff has been reserved
system 00:0c: iomem range 0xfc800400-0xfc800fff has been reserved
pci 0000:00:1c.0: PCI bridge, secondary bus 0000:01
pci 0000:00:1c.0: IO window: 0xe000-0xefff
pci 0000:00:1c.0: MEM window: 0xffc00000-0xffcfffff
pci 0000:00:1c.0: PREFETCH window: 0x000000cfe00000-0x000000cfefffff
pci 0000:00:1c.1: PCI bridge, secondary bus 0000:02
pci 0000:00:1c.1: IO window: disabled
pci 0000:00:1c.1: MEM window: disabled
pci 0000:00:1c.1: PREFETCH window: disabled
pci 0000:00:1c.2: PCI bridge, secondary bus 0000:03
pci 0000:00:1c.2: IO window: disabled
pci 0000:00:1c.2: MEM window: disabled
pci 0000:00:1c.2: PREFETCH window: disabled
pci 0000:00:1c.3: PCI bridge, secondary bus 0000:04
pci 0000:00:1c.3: IO window: disabled
pci 0000:00:1c.3: MEM window: disabled
pci 0000:00:1c.3: PREFETCH window: disabled
pci 0000:00:1e.0: PCI bridge, secondary bus 0000:05
pci 0000:00:1e.0: IO window: disabled
pci 0000:00:1e.0: MEM window: disabled
pci 0000:00:1e.0: PREFETCH window: disabled
pci 0000:00:1c.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:1c.0: setting latency timer to 64
pci 0000:00:1c.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
pci 0000:00:1c.1: setting latency timer to 64
pci 0000:00:1c.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
pci 0000:00:1c.2: setting latency timer to 64
pci 0000:00:1c.3: PCI INT D -> GSI 19 (level, low) -> IRQ 19
pci 0000:00:1c.3: setting latency timer to 64
pci 0000:00:1e.0: setting latency timer to 64
pci_bus 0000:00: resource 0 io: [0x00-0xffff]
pci_bus 0000:00: resource 1 mem: [0x000000-0xffffffff]
pci_bus 0000:01: resource 0 io: [0xe000-0xefff]
pci_bus 0000:01: resource 1 mem: [0xffc00000-0xffcfffff]
pci_bus 0000:01: resource 2 pref mem [0xcfe00000-0xcfefffff]
pci_bus 0000:05: resource 3 io: [0x00-0xffff]
pci_bus 0000:05: resource 4 mem: [0x000000-0xffffffff]
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 7, 524288 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
NET: Registered protocol family 1
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 2178k freed
apm: BIOS not found.
audit: initializing netlink socket (disabled)
type=2000 audit(1253715584.346:1): initialized
highmem bounce pool size: 64 pages
HugeTLB registered 4 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
msgmni has been set to 1745
SELinux: Registering netfilter hooks
alg: No test for stdrng (krng)
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci 0000:00:02.0: Boot video device
Switched to high resolution mode on CPU 1
Switched to high resolution mode on CPU 0
pci 0000:00:1d.7: EHCI: BIOS handoff failed (BIOS bug?) 01010001
pcieport-driver 0000:00:1c.0: irq 24 for MSI/MSI-X
pcieport-driver 0000:00:1c.0: setting latency timer to 64
pcieport-driver 0000:00:1c.1: irq 25 for MSI/MSI-X
pcieport-driver 0000:00:1c.1: setting latency timer to 64
pcieport-driver 0000:00:1c.2: irq 26 for MSI/MSI-X
pcieport-driver 0000:00:1c.2: setting latency timer to 64
pcieport-driver 0000:00:1c.3: irq 27 for MSI/MSI-X
pcieport-driver 0000:00:1c.3: setting latency timer to 64
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input0
ACPI: Power Button [PWRF]
input: Power Button as /devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input1
ACPI: Power Button [PWRB]
processor ACPI_CPU:00: registered as cooling_device0
ACPI: Processor [CPU0] (supports 8 throttling states)
processor ACPI_CPU:01: registered as cooling_device1
ACPI: Processor [CPU1] (supports 8 throttling states)
isapnp: Scanning for PnP cards...
isapnp: No Plug & Play device found
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
agpgart-intel 0000:00:00.0: Intel 945GME Chipset
agpgart-intel 0000:00:00.0: detected 7932K stolen memory
agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
00:03: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:04: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
brd: module loaded
loop: module loaded
input: Macintosh mouse button emulation as /devices/virtual/input/input2
Driver 'sd' needs updating - please use bus_type methods
Driver 'sr' needs updating - please use bus_type methods
ahci 0000:00:1f.2: version 3.0
ahci 0000:00:1f.2: PCI INT B -> GSI 19 (level, low) -> IRQ 19
ahci 0000:00:1f.2: irq 28 for MSI/MSI-X
ahci 0000:00:1f.2: AHCI 0001.0100 32 slots 4 ports 1.5 Gbps 0x5 impl SATA mode
ahci 0000:00:1f.2: flags: 64bit ncq led clo pio slum part
ahci 0000:00:1f.2: setting latency timer to 64
scsi0 : ahci
scsi1 : ahci
scsi2 : ahci
scsi3 : ahci
ata1: SATA max UDMA/133 abar m1024@0xffe40000 port 0xffe40100 irq 28
ata2: DUMMY
ata3: SATA max UDMA/133 abar m1024@0xffe40000 port 0xffe40200 irq 28
ata4: DUMMY
ata_piix 0000:00:1f.1: version 2.13
ata_piix 0000:00:1f.1: PCI INT A -> GSI 18 (level, low) -> IRQ 18
ata_piix 0000:00:1f.1: setting latency timer to 64
scsi4 : ata_piix
scsi5 : ata_piix
ata5: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0xf100 irq 14
ata6: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0xf108 irq 15
Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci_hcd 0000:00:1d.7: PCI INT A -> GSI 23 (level, low) -> IRQ 23
ehci_hcd 0000:00:1d.7: setting latency timer to 64
ehci_hcd 0000:00:1d.7: EHCI Host Controller
ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 1
ehci_hcd 0000:00:1d.7: debug port 1
ehci_hcd 0000:00:1d.7: cache line size of 32 is not supported
ehci_hcd 0000:00:1d.7: irq 23, io mem 0xffe41000
ehci_hcd 0000:00:1d.7: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE ehci_hcd
usb usb1: SerialNumber: 0000:00:1d.7
usb usb1: configuration #1 chosen from 1 choice
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 8 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 23 (level, low) -> IRQ 23
uhci_hcd 0000:00:1d.0: setting latency timer to 64
uhci_hcd 0000:00:1d.0: UHCI Host Controller
uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 2
uhci_hcd 0000:00:1d.0: irq 23, io base 0x0000f0a0
usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: UHCI Host Controller
usb usb2: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb2: SerialNumber: 0000:00:1d.0
usb usb2: configuration #1 chosen from 1 choice
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 19 (level, low) -> IRQ 19
uhci_hcd 0000:00:1d.1: setting latency timer to 64
uhci_hcd 0000:00:1d.1: UHCI Host Controller
uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 3
uhci_hcd 0000:00:1d.1: irq 19, io base 0x0000f080
usb usb3: New USB device found, idVendor=1d6b, idProduct=0001
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: UHCI Host Controller
usb usb3: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb3: SerialNumber: 0000:00:1d.1
usb usb3: configuration #1 chosen from 1 choice
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
uhci_hcd 0000:00:1d.2: setting latency timer to 64
uhci_hcd 0000:00:1d.2: UHCI Host Controller
uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 4
uhci_hcd 0000:00:1d.2: irq 18, io base 0x0000f060
usb usb4: New USB device found, idVendor=1d6b, idProduct=0001
usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb4: Product: UHCI Host Controller
usb usb4: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb4: SerialNumber: 0000:00:1d.2
usb usb4: configuration #1 chosen from 1 choice
hub 4-0:1.0: USB hub found
hub 4-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.3: PCI INT D -> GSI 16 (level, low) -> IRQ 16
uhci_hcd 0000:00:1d.3: setting latency timer to 64
uhci_hcd 0000:00:1d.3: UHCI Host Controller
uhci_hcd 0000:00:1d.3: new USB bus registered, assigned bus number 5
uhci_hcd 0000:00:1d.3: irq 16, io base 0x0000f040
usb usb5: New USB device found, idVendor=1d6b, idProduct=0001
usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb5: Product: UHCI Host Controller
usb usb5: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb5: SerialNumber: 0000:00:1d.3
usb usb5: configuration #1 chosen from 1 choice
hub 5-0:1.0: USB hub found
hub 5-0:1.0: 2 ports detected
PNP: No PS/2 controller found. Probing ports directly.
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mice: PS/2 mouse device common for all mice
rtc_cmos 00:07: RTC can wake from S4
rtc_cmos 00:07: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one year, y3k, 114 bytes nvram, hpet irqs
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.14.0-ioctl (2008-04-23) initialised: dm-devel@redhat.com
cpuidle: using governor ladder
cpuidle: using governor menu
usbcore: registered new interface driver hiddev
usbcore: registered new interface driver usbhid
usbhid: v2.6:USB HID core driver
nf_conntrack version 0.5.0 (16240 buckets, 64960 max)
CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Please use
nf_conntrack.acct=1 kernel paramater, acct=1 nf_conntrack module option or
sysctl net.netfilter.nf_conntrack_acct=1 to enable it.
ip_tables: (C) 2000-2006 Netfilter Core Team
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Using IPI No-Shortcut mode
PM: Resume from disk failed.
registered taskstats version 1
Magic number: 9:502:334
tty tty55: hash matches
Initalizing network drop monitor service
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata3: SATA link down (SStatus 0 SControl 300)
ata1.00: ATA-8: ST9160310AS, 0303, max UDMA/133
ata1.00: 312581808 sectors, multi 16: LBA48 NCQ (depth 31/32)
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access ATA ST9160310AS 0303 PQ: 0 ANSI: 5
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:0: [sda] 312581808 512-byte hardware sectors: (160 GB/149 GiB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sda:<6>usb 5-1: new low speed USB device using uhci_hcd and address 2
sda1 sda2
sd 0:0:0:0: [sda] Attached SCSI disk
Freeing unused kernel memory: 372k freed
input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/device:15/input/input3
ACPI: Video Device [IGD] (multi-head: yes rom: no post: no)
usb 5-1: New USB device found, idVendor=1241, idProduct=1503
usb 5-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 5-1: Product: USB Keyboard
usb 5-1: Manufacturer:
usb 5-1: configuration #1 chosen from 1 choice
[drm] Initialized drm 1.1.0 20060810
input: USB Keyboard as /devices/pci0000:00/0000:00:1d.3/usb5/5-1/5-1:1.0/input/input4
generic-usb 0003:1241:1503.0001: input,hidraw0: USB HID v1.10 Keyboard [ USB Keyboard] on usb-0000:00:1d.3-1/input0
pci 0000:00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:02.0: setting latency timer to 64
[drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0
input: USB Keyboard as /devices/pci0000:00/0000:00:1d.3/usb5/5-1/5-1:1.1/input/input5
generic-usb 0003:1241:1503.0002: input,hidraw1: USB HID v1.10 Device [ USB Keyboard] on usb-0000:00:1d.3-1/input1
kjournald starting. Commit interval 5 seconds
EXT3-fs: mounted filesystem with ordered data mode.
SELinux: Disabled at runtime.
SELinux: Unregistering netfilter hooks
type=1404 audit(1253715588.152:2): selinux=0 auid=4294967295 ses=4294967295
r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
r8169 0000:01:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
r8169 0000:01:00.0: setting latency timer to 64
r8169 0000:01:00.0: irq 29 for MSI/MSI-X
eth0: RTL8168d/8111d at 0xf8aba000, 00:1c:c0:de:92:31, XID 081000c0 IRQ 29
parport_pc 00:05: reported by Plug and Play ACPI
parport0: PC-style at 0x378 (0x778), irq 5 [PCSPP,TRISTATE,EPP]
iTCO_vendor_support: vendor-support=0
iTCO_wdt: Intel TCO WatchDog Timer Driver v1.05
iTCO_wdt: Found a ICH7-M or ICH7-U TCO device (Version=2, TCOBASE=0x0460)
iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
intel_rng: Firmware space is locked read-only. If you can't or
intel_rng: don't want to disable this in firmware setup, and if
intel_rng: you are certain that your system has a functional
intel_rng: RNG, try using the 'no_fwh_detect' option.
i801_smbus 0000:00:1f.3: PCI INT B -> GSI 19 (level, low) -> IRQ 19
input: PC Speaker as /devices/platform/pcspkr/input/input6
HDA Intel 0000:00:1b.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
HDA Intel 0000:00:1b.0: setting latency timer to 64
hda_codec: Unknown model for ALC662, trying auto-probe from BIOS...
input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/input/input7
ata1.00: configured for UDMA/133
ata1: EH complete
device-mapper: multipath: version 1.0.5 loaded
EXT3 FS on dm-0, internal journal
kjournald starting. Commit interval 5 seconds
EXT3 FS on dm-1, internal journal
EXT3-fs: mounted filesystem with ordered data mode.
kjournald starting. Commit interval 5 seconds
EXT3 FS on sda1, internal journal
EXT3-fs: mounted filesystem with ordered data mode.
Adding 2097144k swap on /dev/mapper/NTBgroup-Swap. Priority:-1 extents:1 across:2097144k
platform microcode: firmware: requesting intel-ucode/06-1c-02
platform microcode: firmware: requesting intel-ucode/06-1c-02
Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
Microcode Update Driver: v2.00 removed.
usbcore: registered new interface driver usbserial
USB Serial support registered for generic
usbcore: registered new interface driver usbserial_generic
usbserial: USB Serial Driver core
USB Serial support registered for GSM modem (1-port)
usbcore: registered new interface driver option
option: v0.7.2:USB Driver for GSM modems
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
NET: Registered protocol family 10
lo: Disabled Privacy Extensions
r8169: eth0: link up
r8169: eth0: link up
warning: `ntpd' uses 32-bit capabilities (legacy support in use)
eth0: no IPv6 routers present
w83627ehf: Found W83627DHG chip at 0xa00
[drm:i915_get_vblank_counter] *ERROR* trying to get vblank count for disabled pipe 1
[-- Attachment #3: dmesg.working --]
[-- Type: text/plain, Size: 31041 bytes --]
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 2.6.30-1.NTB7.fc8.i686.PAE (sfarnsworth@f8simon.office.onelan.co.uk) (gcc version 4.1.2 20070925 (Red Hat 4.1.2-33)) #1 SMP Wed Sep 23 12:09:32 BST 2009
KERNEL supported cpus:
Intel GenuineIntel
AMD AuthenticAMD
NSC Geode by NSC
Cyrix CyrixInstead
Centaur CentaurHauls
Transmeta GenuineTMx86
Transmeta TransmetaCPU
UMC UMC UMC UMC
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009d800 (usable)
BIOS-e820: 000000000009d800 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000001f4b5000 (usable)
BIOS-e820: 000000001f4b5000 - 000000001f4e0000 (ACPI NVS)
BIOS-e820: 000000001f4e0000 - 000000001f5fe000 (reserved)
BIOS-e820: 000000001f5fe000 - 000000001f5ff000 (usable)
BIOS-e820: 000000001f5ff000 - 000000001f600000 (ACPI NVS)
BIOS-e820: 000000001f600000 - 000000001f608000 (ACPI data)
BIOS-e820: 000000001f608000 - 000000001f60e000 (ACPI NVS)
BIOS-e820: 000000001f60e000 - 000000001f62b000 (reserved)
BIOS-e820: 000000001f62b000 - 000000001f700000 (usable)
BIOS-e820: 00000000e0000000 - 00000000ffc00000 (reserved)
BIOS-e820: 00000000fff00000 - 0000000100000000 (reserved)
DMI 2.6 present.
last_pfn = 0x1f700 max_arch_pfn = 0x100000
MTRR default type: uncachable
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-E7FFF uncachable
E8000-FFFFF write-protect
MTRR variable ranges enabled:
0 base 000000000 mask 0E0000000 write-back
1 base 01F700000 mask 0FFF00000 uncachable
2 base 01F800000 mask 0FF800000 uncachable
3 disabled
4 disabled
5 disabled
6 disabled
7 disabled
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
original variable MTRRs
reg 0, base: 0GB, range: 512MB, type WB
reg 1, base: 503MB, range: 1MB, type UC
reg 2, base: 504MB, range: 8MB, type UC
total RAM coverred: 503M
Found optimal setting for mtrr clean up
gran_size: 64K chunk_size: 16M num_reg: 3 lose cover RAM: 0G
New variable MTRRs
reg 0, base: 0GB, range: 512MB, type WB
reg 1, base: 503MB, range: 1MB, type UC
reg 2, base: 504MB, range: 8MB, type UC
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
init_memory_mapping: 0000000000000000-000000001f700000
Using x86 segment limits to approximate NX protection
0000000000 - 0000400000 page 4k
0000400000 - 001f400000 page 2M
001f400000 - 001f700000 page 4k
kernel direct mapping tables up to 1f700000 @ 7000-c000
RAMDISK: 1f284000 - 1f4a4a77
ACPI: RSDP 000f0400 00024 (v02 INTEL )
ACPI: XSDT 1f606f10 0003C (v01 INTEL D945JT 06222004 MSFT 00010013)
ACPI: FACP 1f605d90 000F4 (v04 INTEL D945JT 06222004 MSFT 00010013)
ACPI Warning (tbfadt-0370): 32/64 FACS address mismatch in FADT - two FACS tables! [20090320]
ACPI Warning (tbfadt-0488): 32/64X FACS address mismatch in FADT - 1F60DE40/000000001F60DD40, using 32 [20090320]
ACPI: DSDT 1f600010 0416D (v01 INTEL D945JT 00000000 INTL 20051117)
ACPI: FACS 1f60de40 00040
ACPI: APIC 1f607e90 0005C (v02 INTEL D945JT 06222004 MSFT 00010013)
ACPI: MCFG 1f607e10 0003C (v01 INTEL D945JT 06222004 MSFT 00000097)
ACPI: Local APIC address 0xfee00000
0MB HIGHMEM available.
503MB LOWMEM available.
mapped low ram: 0 - 1f700000
low ram: 0 - 1f700000
node 0 low ram: 00000000 - 1f700000
node 0 bootmap 00002000 - 00005ee0
(9 early reservations) ==> bootmem [0000000000 - 001f700000]
#0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
#1 [0000001000 - 0000002000] EX TRAMPOLINE ==> [0000001000 - 0000002000]
#2 [0000006000 - 0000007000] TRAMPOLINE ==> [0000006000 - 0000007000]
#3 [0000400000 - 0000a14008] TEXT DATA BSS ==> [0000400000 - 0000a14008]
#4 [001f284000 - 001f4a4a77] RAMDISK ==> [001f284000 - 001f4a4a77]
#5 [000009d800 - 0000100000] BIOS reserved ==> [000009d800 - 0000100000]
#6 [0000a15000 - 0000a181d9] BRK ==> [0000a15000 - 0000a181d9]
#7 [0000007000 - 0000008000] PGTABLE ==> [0000007000 - 0000008000]
#8 [0000002000 - 0000006000] BOOTMAP ==> [0000002000 - 0000006000]
Zone PFN ranges:
DMA 0x00000000 -> 0x00001000
Normal 0x00001000 -> 0x0001f700
HighMem 0x0001f700 -> 0x0001f700
Movable zone start PFN for each node
early_node_map[4] active PFN ranges
0: 0x00000000 -> 0x0000009d
0: 0x00000100 -> 0x0001f4b5
0: 0x0001f5fe -> 0x0001f5ff
0: 0x0001f62b -> 0x0001f700
On node 0 totalpages: 128296
free_area_init_node: node 0, pgdat c08bac20, node_mem_map c1000000
DMA zone: 32 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 3965 pages, LIFO batch:0
Normal zone: 974 pages used for memmap
Normal zone: 123325 pages, LIFO batch:31
Using APIC driver default
ACPI: PM-Timer IO Port: 0x408
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled)
ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Enabling APIC mode: Flat. Using 1 I/O APICs
Using ACPI (MADT) for SMP configuration information
SMP: Allowing 2 CPUs, 0 hotplug CPUs
nr_irqs_gsi: 24
PM: Registered nosave memory: 000000000009d000 - 000000000009e000
PM: Registered nosave memory: 000000000009e000 - 00000000000a0000
PM: Registered nosave memory: 00000000000a0000 - 00000000000e0000
PM: Registered nosave memory: 00000000000e0000 - 0000000000100000
PM: Registered nosave memory: 000000001f4b5000 - 000000001f4e0000
PM: Registered nosave memory: 000000001f4e0000 - 000000001f5fe000
PM: Registered nosave memory: 000000001f5ff000 - 000000001f600000
PM: Registered nosave memory: 000000001f600000 - 000000001f608000
PM: Registered nosave memory: 000000001f608000 - 000000001f60e000
PM: Registered nosave memory: 000000001f60e000 - 000000001f62b000
Allocating PCI resources starting at 20000000 (gap: 1f700000:c0900000)
NR_CPUS:32 nr_cpumask_bits:32 nr_cpu_ids:2 nr_node_ids:1
PERCPU: Embedded 11 pages at c13f2000, static data 23452 bytes
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 127290
Kernel command line: ro root=/dev/NTBgroup/System quiet nomodeset
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Initializing CPU#0
NR_IRQS:1280
PID hash table entries: 2048 (order: 11, 8192 bytes)
Extended CMOS year: 2000
Fast TSC calibration using PIT
Detected 1595.949 MHz processor.
Console: colour VGA+ 80x25
console [tty0] enabled
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Initializing HighMem for node 0 (00000000:00000000)
Memory: 499820k/515072k available (3183k kernel code, 13052k reserved, 1888k data, 372k init, 0k highmem)
virtual kernel memory layout:
fixmap : 0xffe16000 - 0xfffff000 (1956 kB)
pkmap : 0xff800000 - 0xffc00000 (4096 kB)
vmalloc : 0xdff00000 - 0xff7fe000 ( 504 MB)
lowmem : 0xc0000000 - 0xdf700000 ( 503 MB)
.init : 0xc08ff000 - 0xc095c000 ( 372 kB)
.data : 0xc071bd57 - 0xc08f4048 (1888 kB)
.text : 0xc0400000 - 0xc071bd57 (3183 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Calibrating delay loop (skipped), value calculated using timer frequency.. 3191.89 BogoMIPS (lpj=1595949)
Security Framework initialized
SELinux: Initializing.
SELinux: Starting in permissive mode
Mount-cache hash table entries: 512
Initializing cgroup subsys ns
Initializing cgroup subsys cpuacct
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
CPU: L1 I cache: 32K, L1 D cache: 24K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
using mwait in idle threads.
Checking 'hlt' instruction... OK.
ACPI: Core revision 20090320
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0
CPU0: Intel(R) Atom(TM) CPU N270 @ 1.60GHz stepping 02
Booting processor 1 APIC 0x1 ip 0x6000
Initializing CPU#1
Calibrating delay using timer specific routine.. 3191.45 BogoMIPS (lpj=1595727)
CPU: L1 I cache: 32K, L1 D cache: 24K
CPU: L2 cache: 512K
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#1.
x86 PAT enabled: cpu 1, old 0x7040600070406, new 0x7010600070106
CPU1: Intel(R) Atom(TM) CPU N270 @ 1.60GHz stepping 02
checking TSC synchronization [CPU#0 -> CPU#1]: passed.
Brought up 2 CPUs
Total of 2 processors activated (6383.35 BogoMIPS).
sizeof(vma)=84 bytes
sizeof(page)=32 bytes
sizeof(inode)=348 bytes
sizeof(dentry)=132 bytes
sizeof(ext3inode)=504 bytes
sizeof(buffer_head)=56 bytes
sizeof(skbuff)=184 bytes
sizeof(task_struct)=3172 bytes
CPU0 attaching sched-domain:
domain 0: span 0-1 level SIBLING
groups: 0 1
CPU1 attaching sched-domain:
domain 0: span 0-1 level SIBLING
groups: 1 0
net_namespace: 1048 bytes
regulator: core version 0.5
Time: 13:53:35 Date: 09/23/09
NET: Registered protocol family 16
ACPI: bus type pci registered
PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
PCI: MCFG area at e0000000 reserved in E820
PCI: Using MMCONFIG for extended config space
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
ACPI: BIOS _OSI(Linux) query ignored
ACPI: BIOS _OSI(Linux) query ignored
ACPI: Interpreter enabled
ACPI: (supports S0 S1 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
ACPI: No dock devices found.
ACPI: PCI Root Bridge [PCI0] (0000:00)
pci 0000:00:02.0: reg 10 32bit mmio: [0xffd80000-0xffdfffff]
pci 0000:00:02.0: reg 14 io port: [0xf150-0xf157]
pci 0000:00:02.0: reg 18 32bit mmio: [0xd0000000-0xdfffffff]
pci 0000:00:02.0: reg 1c 32bit mmio: [0xffe00000-0xffe3ffff]
pci 0000:00:02.1: reg 10 32bit mmio: [0xffd00000-0xffd7ffff]
pci 0000:00:1b.0: reg 10 64bit mmio: [0xcff00000-0xcff03fff]
pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1b.0: PME# disabled
pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: PME# disabled
pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.1: PME# disabled
pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.2: PME# disabled
pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.3: PME# disabled
pci 0000:00:1d.0: reg 20 io port: [0xf0a0-0xf0bf]
pci 0000:00:1d.1: reg 20 io port: [0xf080-0xf09f]
pci 0000:00:1d.2: reg 20 io port: [0xf060-0xf07f]
pci 0000:00:1d.3: reg 20 io port: [0xf040-0xf05f]
pci 0000:00:1d.7: reg 10 32bit mmio: [0xffe41000-0xffe413ff]
pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1d.7: PME# disabled
pci 0000:00:1f.0: Force enabled HPET at 0xfed00000
pci 0000:00:1f.0: quirk: region 0400-047f claimed by ICH6 ACPI/GPIO/TCO
pci 0000:00:1f.0: quirk: region 0500-053f claimed by ICH6 GPIO
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 0a00 (mask 007f)
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 2 PIO at 1640 (mask 000f)
pci 0000:00:1f.1: reg 10 io port: [0xf140-0xf147]
pci 0000:00:1f.1: reg 14 io port: [0xf130-0xf133]
pci 0000:00:1f.1: reg 18 io port: [0xf120-0xf127]
pci 0000:00:1f.1: reg 1c io port: [0xf110-0xf113]
pci 0000:00:1f.1: reg 20 io port: [0xf100-0xf10f]
pci 0000:00:1f.2: reg 10 io port: [0xf0f0-0xf0f7]
pci 0000:00:1f.2: reg 14 io port: [0xf0e0-0xf0e3]
pci 0000:00:1f.2: reg 18 io port: [0xf0d0-0xf0d7]
pci 0000:00:1f.2: reg 1c io port: [0xf0c0-0xf0c3]
pci 0000:00:1f.2: reg 20 io port: [0xf020-0xf03f]
pci 0000:00:1f.2: reg 24 32bit mmio: [0xffe40000-0xffe403ff]
pci 0000:00:1f.2: PME# supported from D3hot
pci 0000:00:1f.2: PME# disabled
pci 0000:00:1f.3: reg 20 io port: [0x1180-0x119f]
pci 0000:01:00.0: reg 10 io port: [0xe000-0xe0ff]
pci 0000:01:00.0: reg 18 64bit mmio: [0xcfe04000-0xcfe04fff]
pci 0000:01:00.0: reg 20 64bit mmio: [0xcfe00000-0xcfe03fff]
pci 0000:01:00.0: reg 30 32bit mmio: [0x000000-0x01ffff]
pci 0000:01:00.0: supports D1 D2
pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:01:00.0: PME# disabled
pci 0000:00:1c.0: bridge io port: [0xe000-0xefff]
pci 0000:00:1c.0: bridge 32bit mmio: [0xffc00000-0xffcfffff]
pci 0000:00:1c.0: bridge 64bit mmio pref: [0xcfe00000-0xcfefffff]
pci 0000:00:1e.0: transparent bridge
pci_bus 0000:00: on NUMA node 0
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P4._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P5._PRT]
ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 *7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 *10 11 12 14 15)
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
hpet clockevent registered
HPET: 3 timers in total, 0 timers will be used for per-cpu timer
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
hpet0: 3 comparators, 64-bit 14.318180 MHz counter
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp: PnP ACPI: found 13 devices
ACPI: ACPI bus type pnp unregistered
system 00:01: iomem range 0xfed14000-0xfed17fff has been reserved
system 00:01: iomem range 0xfed19000-0xfed19fff has been reserved
system 00:01: iomem range 0xfed18000-0xfed18fff has been reserved
system 00:01: iomem range 0xe0000000-0xefffffff has been reserved
system 00:01: iomem range 0xff000000-0xffffffff could not be reserved
system 00:09: ioport range 0x4d0-0x4d1 has been reserved
system 00:0b: ioport range 0xfff0-0xffff has been reserved
system 00:0b: ioport range 0xffff-0xffff has been reserved
system 00:0b: ioport range 0xffff-0xffff has been reserved
system 00:0b: ioport range 0x6a0-0x6a7 has been reserved
system 00:0c: ioport range 0x400-0x47f has been reserved
system 00:0c: ioport range 0x1180-0x119f has been reserved
system 00:0c: ioport range 0x500-0x53f has been reserved
system 00:0c: iomem range 0xfec00000-0xfec00fff has been reserved
system 00:0c: iomem range 0xfee00000-0xfee00fff has been reserved
system 00:0c: iomem range 0xfed20000-0xfed23fff has been reserved
system 00:0c: iomem range 0xffb00000-0xffbfffff has been reserved
system 00:0c: iomem range 0xfc800400-0xfc800fff has been reserved
pci 0000:00:1c.0: PCI bridge, secondary bus 0000:01
pci 0000:00:1c.0: IO window: 0xe000-0xefff
pci 0000:00:1c.0: MEM window: 0xffc00000-0xffcfffff
pci 0000:00:1c.0: PREFETCH window: 0x000000cfe00000-0x000000cfefffff
pci 0000:00:1c.1: PCI bridge, secondary bus 0000:02
pci 0000:00:1c.1: IO window: disabled
pci 0000:00:1c.1: MEM window: disabled
pci 0000:00:1c.1: PREFETCH window: disabled
pci 0000:00:1c.2: PCI bridge, secondary bus 0000:03
pci 0000:00:1c.2: IO window: disabled
pci 0000:00:1c.2: MEM window: disabled
pci 0000:00:1c.2: PREFETCH window: disabled
pci 0000:00:1c.3: PCI bridge, secondary bus 0000:04
pci 0000:00:1c.3: IO window: disabled
pci 0000:00:1c.3: MEM window: disabled
pci 0000:00:1c.3: PREFETCH window: disabled
pci 0000:00:1e.0: PCI bridge, secondary bus 0000:05
pci 0000:00:1e.0: IO window: disabled
pci 0000:00:1e.0: MEM window: disabled
pci 0000:00:1e.0: PREFETCH window: disabled
pci 0000:00:1c.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:1c.0: setting latency timer to 64
pci 0000:00:1c.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
pci 0000:00:1c.1: setting latency timer to 64
pci 0000:00:1c.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
pci 0000:00:1c.2: setting latency timer to 64
pci 0000:00:1c.3: PCI INT D -> GSI 19 (level, low) -> IRQ 19
pci 0000:00:1c.3: setting latency timer to 64
pci 0000:00:1e.0: setting latency timer to 64
pci_bus 0000:00: resource 0 io: [0x00-0xffff]
pci_bus 0000:00: resource 1 mem: [0x000000-0xffffffff]
pci_bus 0000:01: resource 0 io: [0xe000-0xefff]
pci_bus 0000:01: resource 1 mem: [0xffc00000-0xffcfffff]
pci_bus 0000:01: resource 2 pref mem [0xcfe00000-0xcfefffff]
pci_bus 0000:05: resource 3 io: [0x00-0xffff]
pci_bus 0000:05: resource 4 mem: [0x000000-0xffffffff]
NET: Registered protocol family 2
IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 5, 131072 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
TCP reno registered
NET: Registered protocol family 1
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 2178k freed
apm: BIOS not found.
audit: initializing netlink socket (disabled)
type=2000 audit(1253714015.344:1): initialized
HugeTLB registered 4 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
msgmni has been set to 981
SELinux: Registering netfilter hooks
alg: No test for stdrng (krng)
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci 0000:00:02.0: Boot video device
Switched to high resolution mode on CPU 1
Switched to high resolution mode on CPU 0
pci 0000:00:1d.7: EHCI: BIOS handoff failed (BIOS bug?) 01010001
pcieport-driver 0000:00:1c.0: irq 24 for MSI/MSI-X
pcieport-driver 0000:00:1c.0: setting latency timer to 64
pcieport-driver 0000:00:1c.1: irq 25 for MSI/MSI-X
pcieport-driver 0000:00:1c.1: setting latency timer to 64
pcieport-driver 0000:00:1c.2: irq 26 for MSI/MSI-X
pcieport-driver 0000:00:1c.2: setting latency timer to 64
pcieport-driver 0000:00:1c.3: irq 27 for MSI/MSI-X
pcieport-driver 0000:00:1c.3: setting latency timer to 64
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input0
ACPI: Power Button [PWRF]
input: Power Button as /devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input1
ACPI: Power Button [PWRB]
processor ACPI_CPU:00: registered as cooling_device0
ACPI: Processor [CPU0] (supports 8 throttling states)
processor ACPI_CPU:01: registered as cooling_device1
ACPI: Processor [CPU1] (supports 8 throttling states)
isapnp: Scanning for PnP cards...
isapnp: No Plug & Play device found
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
agpgart-intel 0000:00:00.0: Intel 945GME Chipset
agpgart-intel 0000:00:00.0: detected 7932K stolen memory
agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000000
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
00:03: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:04: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
brd: module loaded
loop: module loaded
input: Macintosh mouse button emulation as /devices/virtual/input/input2
Driver 'sd' needs updating - please use bus_type methods
Driver 'sr' needs updating - please use bus_type methods
ahci 0000:00:1f.2: version 3.0
ahci 0000:00:1f.2: PCI INT B -> GSI 19 (level, low) -> IRQ 19
ahci 0000:00:1f.2: irq 28 for MSI/MSI-X
ahci 0000:00:1f.2: AHCI 0001.0100 32 slots 4 ports 1.5 Gbps 0x5 impl SATA mode
ahci 0000:00:1f.2: flags: 64bit ncq led clo pio slum part
ahci 0000:00:1f.2: setting latency timer to 64
scsi0 : ahci
scsi1 : ahci
scsi2 : ahci
scsi3 : ahci
ata1: SATA max UDMA/133 abar m1024@0xffe40000 port 0xffe40100 irq 28
ata2: DUMMY
ata3: SATA max UDMA/133 abar m1024@0xffe40000 port 0xffe40200 irq 28
ata4: DUMMY
ata_piix 0000:00:1f.1: version 2.13
ata_piix 0000:00:1f.1: PCI INT A -> GSI 18 (level, low) -> IRQ 18
ata_piix 0000:00:1f.1: setting latency timer to 64
scsi4 : ata_piix
scsi5 : ata_piix
ata5: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0xf100 irq 14
ata6: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0xf108 irq 15
Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci_hcd 0000:00:1d.7: PCI INT A -> GSI 23 (level, low) -> IRQ 23
ehci_hcd 0000:00:1d.7: setting latency timer to 64
ehci_hcd 0000:00:1d.7: EHCI Host Controller
ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 1
ehci_hcd 0000:00:1d.7: debug port 1
ehci_hcd 0000:00:1d.7: cache line size of 32 is not supported
ehci_hcd 0000:00:1d.7: irq 23, io mem 0xffe41000
ehci_hcd 0000:00:1d.7: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE ehci_hcd
usb usb1: SerialNumber: 0000:00:1d.7
usb usb1: configuration #1 chosen from 1 choice
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 8 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 23 (level, low) -> IRQ 23
uhci_hcd 0000:00:1d.0: setting latency timer to 64
uhci_hcd 0000:00:1d.0: UHCI Host Controller
uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 2
uhci_hcd 0000:00:1d.0: irq 23, io base 0x0000f0a0
usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: UHCI Host Controller
usb usb2: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb2: SerialNumber: 0000:00:1d.0
usb usb2: configuration #1 chosen from 1 choice
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 19 (level, low) -> IRQ 19
uhci_hcd 0000:00:1d.1: setting latency timer to 64
uhci_hcd 0000:00:1d.1: UHCI Host Controller
uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 3
uhci_hcd 0000:00:1d.1: irq 19, io base 0x0000f080
usb usb3: New USB device found, idVendor=1d6b, idProduct=0001
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: UHCI Host Controller
usb usb3: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb3: SerialNumber: 0000:00:1d.1
usb usb3: configuration #1 chosen from 1 choice
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
uhci_hcd 0000:00:1d.2: setting latency timer to 64
uhci_hcd 0000:00:1d.2: UHCI Host Controller
uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 4
uhci_hcd 0000:00:1d.2: irq 18, io base 0x0000f060
usb usb4: New USB device found, idVendor=1d6b, idProduct=0001
usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb4: Product: UHCI Host Controller
usb usb4: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb4: SerialNumber: 0000:00:1d.2
usb usb4: configuration #1 chosen from 1 choice
hub 4-0:1.0: USB hub found
hub 4-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.3: PCI INT D -> GSI 16 (level, low) -> IRQ 16
uhci_hcd 0000:00:1d.3: setting latency timer to 64
uhci_hcd 0000:00:1d.3: UHCI Host Controller
uhci_hcd 0000:00:1d.3: new USB bus registered, assigned bus number 5
uhci_hcd 0000:00:1d.3: irq 16, io base 0x0000f040
usb usb5: New USB device found, idVendor=1d6b, idProduct=0001
usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb5: Product: UHCI Host Controller
usb usb5: Manufacturer: Linux 2.6.30-1.NTB7.fc8.i686.PAE uhci_hcd
usb usb5: SerialNumber: 0000:00:1d.3
usb usb5: configuration #1 chosen from 1 choice
hub 5-0:1.0: USB hub found
hub 5-0:1.0: 2 ports detected
PNP: No PS/2 controller found. Probing ports directly.
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mice: PS/2 mouse device common for all mice
rtc_cmos 00:07: RTC can wake from S4
rtc_cmos 00:07: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one year, y3k, 114 bytes nvram, hpet irqs
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.14.0-ioctl (2008-04-23) initialised: dm-devel@redhat.com
cpuidle: using governor ladder
cpuidle: using governor menu
usbcore: registered new interface driver hiddev
usbcore: registered new interface driver usbhid
usbhid: v2.6:USB HID core driver
nf_conntrack version 0.5.0 (8048 buckets, 32192 max)
CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Please use
nf_conntrack.acct=1 kernel paramater, acct=1 nf_conntrack module option or
sysctl net.netfilter.nf_conntrack_acct=1 to enable it.
ip_tables: (C) 2000-2006 Netfilter Core Team
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Using IPI No-Shortcut mode
PM: Resume from disk failed.
registered taskstats version 1
Magic number: 9:464:888
ata_piix 0000:00:1f.1: hash matches
Initalizing network drop monitor service
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata3: SATA link down (SStatus 0 SControl 300)
ata1.00: ATA-8: ST9160310AS, 0303, max UDMA/133
ata1.00: 312581808 sectors, multi 16: LBA48 NCQ (depth 31/32)
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access ATA ST9160310AS 0303 PQ: 0 ANSI: 5
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:0: [sda] 312581808 512-byte hardware sectors: (160 GB/149 GiB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
sda:<6>usb 5-1: new low speed USB device using uhci_hcd and address 2
sda1 sda2
sd 0:0:0:0: [sda] Attached SCSI disk
Freeing unused kernel memory: 372k freed
usb 5-1: New USB device found, idVendor=1241, idProduct=1503
usb 5-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 5-1: Product: USB Keyboard
usb 5-1: Manufacturer:
usb 5-1: configuration #1 chosen from 1 choice
input: Video Bus as /devices/LNXSYSTM:00/device:00/PNP0A08:00/device:15/input/input3
ACPI: Video Device [IGD] (multi-head: yes rom: no post: no)
[drm] Initialized drm 1.1.0 20060810
input: USB Keyboard as /devices/pci0000:00/0000:00:1d.3/usb5/5-1/5-1:1.0/input/input4
generic-usb 0003:1241:1503.0001: input,hidraw0: USB HID v1.10 Keyboard [ USB Keyboard] on usb-0000:00:1d.3-1/input0
pci 0000:00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:02.0: setting latency timer to 64
[drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0
input: USB Keyboard as /devices/pci0000:00/0000:00:1d.3/usb5/5-1/5-1:1.1/input/input5
generic-usb 0003:1241:1503.0002: input,hidraw1: USB HID v1.10 Device [ USB Keyboard] on usb-0000:00:1d.3-1/input1
EXT3-fs: INFO: recovery required on readonly filesystem.
EXT3-fs: write access will be enabled during recovery.
kjournald starting. Commit interval 5 seconds
EXT3-fs: dm-0: orphan cleanup on readonly fs
ext3_orphan_cleanup: deleting unreferenced inode 164320
EXT3-fs: dm-0: 1 orphan inode deleted
EXT3-fs: recovery complete.
EXT3-fs: mounted filesystem with ordered data mode.
SELinux: Disabled at runtime.
SELinux: Unregistering netfilter hooks
type=1404 audit(1253714019.681:2): selinux=0 auid=4294967295 ses=4294967295
r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
r8169 0000:01:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
r8169 0000:01:00.0: setting latency timer to 64
r8169 0000:01:00.0: irq 29 for MSI/MSI-X
eth0: RTL8168d/8111d at 0xe09d2000, 00:1c:c0:de:93:9c, XID 081000c0 IRQ 29
parport_pc 00:05: reported by Plug and Play ACPI
parport0: PC-style at 0x378 (0x778), irq 5 [PCSPP,TRISTATE,EPP]
iTCO_vendor_support: vendor-support=0
iTCO_wdt: Intel TCO WatchDog Timer Driver v1.05
iTCO_wdt: Found a ICH7-M or ICH7-U TCO device (Version=2, TCOBASE=0x0460)
iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
intel_rng: Firmware space is locked read-only. If you can't or
intel_rng: don't want to disable this in firmware setup, and if
intel_rng: you are certain that your system has a functional
intel_rng: RNG, try using the 'no_fwh_detect' option.
i801_smbus 0000:00:1f.3: PCI INT B -> GSI 19 (level, low) -> IRQ 19
input: PC Speaker as /devices/platform/pcspkr/input/input6
HDA Intel 0000:00:1b.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
HDA Intel 0000:00:1b.0: setting latency timer to 64
hda_codec: Unknown model for ALC662, trying auto-probe from BIOS...
input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/input/input7
ata1.00: configured for UDMA/133
ata1: EH complete
sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
device-mapper: multipath: version 1.0.5 loaded
EXT3 FS on dm-0, internal journal
kjournald starting. Commit interval 5 seconds
EXT3 FS on dm-1, internal journal
EXT3-fs: mounted filesystem with ordered data mode.
kjournald starting. Commit interval 5 seconds
EXT3 FS on sda1, internal journal
EXT3-fs: mounted filesystem with ordered data mode.
Adding 2097144k swap on /dev/mapper/NTBgroup-Swap. Priority:-1 extents:1 across:2097144k
platform microcode: firmware: requesting intel-ucode/06-1c-02
platform microcode: firmware: requesting intel-ucode/06-1c-02
Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
Microcode Update Driver: v2.00 removed.
usbcore: registered new interface driver usbserial
USB Serial support registered for generic
usbcore: registered new interface driver usbserial_generic
usbserial: USB Serial Driver core
USB Serial support registered for GSM modem (1-port)
usbcore: registered new interface driver option
option: v0.7.2:USB Driver for GSM modems
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
NET: Registered protocol family 10
lo: Disabled Privacy Extensions
r8169: eth0: link up
r8169: eth0: link up
warning: `ntpd' uses 32-bit capabilities (legacy support in use)
eth0: no IPv6 routers present
w83627ehf: Found W83627DHG chip at 0xa00
[drm:i915_get_vblank_counter] *ERROR* trying to get vblank count for disabled pipe 1
SysRq : SAK
SAK: killed process 1016 (rc): fd#0 opened to the tty
SAK: killed process 1888 (S99local): fd#0 opened to the tty
SAK: killed process 1889 (ntb_platform_na): fd#0 opened to the tty
[-- Attachment #4: lspci.broken --]
[-- Type: text/plain, Size: 20934 bytes --]
00:00.0 Host bridge [0600]: Intel Corporation Mobile 945GME Express Memory Controller Hub [8086:27ac] (rev 03)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel driver in use: agpgart-intel
00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 945GME Express Integrated Graphics Controller [8086:27ae] (rev 03) (prog-if 00 [VGA controller])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at ffd80000 (32-bit, non-prefetchable) [size=512K]
Region 1: I/O ports at f150 [size=8]
Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M]
Region 3: Memory at ffe00000 (32-bit, non-prefetchable) [size=256K]
Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable-
Address: 00000000 Data: 0000
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Kernel modules: i915
00:02.1 Display controller [0380]: Intel Corporation Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller [8086:27a6] (rev 03)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at ffd00000 (32-bit, non-prefetchable) [size=512K]
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00:1b.0 Audio device [0403]: Intel Corporation 82801G (ICH7 Family) High Definition Audio Controller [8086:27d8] (rev 02)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at cff00000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
ClockPM- Suprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Virtual Channel <?>
Capabilities: [130] Root Complex Link <?>
Kernel driver in use: HDA Intel
Kernel modules: snd-hda-intel
00:1c.0 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 1 [8086:27d0] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 0000e000-0000efff
Memory behind bridge: ffc00000-ffcfffff
Prefetchable memory behind bridge: 00000000cfe00000-00000000cfefffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4169
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1c.1 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 2 [8086:27d2] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4171
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1c.2 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 3 [8086:27d4] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4179
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1c.3 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 4 [8086:27d6] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4181
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1d.0 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #1 [8086:27c8] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 4: I/O ports at f0a0 [size=32]
Kernel driver in use: uhci_hcd
00:1d.1 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #2 [8086:27c9] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 19
Region 4: I/O ports at f080 [size=32]
Kernel driver in use: uhci_hcd
00:1d.2 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #3 [8086:27ca] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 4: I/O ports at f060 [size=32]
Kernel driver in use: uhci_hcd
00:1d.3 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #4 [8086:27cb] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin D routed to IRQ 16
Region 4: I/O ports at f040 [size=32]
Kernel driver in use: uhci_hcd
00:1d.7 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB2 EHCI Controller [8086:27cc] (rev 02) (prog-if 20 [EHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at ffe41000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Kernel driver in use: ehci_hcd
00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e2) (prog-if 01 [Subtractive decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=05, subordinate=05, sec-latency=32
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Subsystem: Intel Corporation 82801 Mobile PCI Bridge [8086:2448]
00:1f.0 ISA bridge [0601]: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge [8086:27b9] (rev 02)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel modules: intel-rng, iTCO_wdt
00:1f.1 IDE interface [0101]: Intel Corporation 82801G (ICH7 Family) IDE Controller [8086:27df] (rev 02) (prog-if 8a [Master SecP PriP])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+
Latency: 0
Interrupt: pin A routed to IRQ 18
Region 0: I/O ports at 01f0 [size=8]
Region 1: I/O ports at 03f4 [size=1]
Region 2: I/O ports at 0170 [size=8]
Region 3: I/O ports at 0374 [size=1]
Region 4: I/O ports at f100 [size=16]
Kernel driver in use: ata_piix
00:1f.2 SATA controller [0106]: Intel Corporation 82801GBM/GHM (ICH7 Family) SATA AHCI Controller [8086:27c5] (rev 02) (prog-if 01 [AHCI 1.0])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 28
Region 0: I/O ports at f0f0 [size=8]
Region 1: I/O ports at f0e0 [size=4]
Region 2: I/O ports at f0d0 [size=8]
Region 3: I/O ports at f0c0 [size=4]
Region 4: I/O ports at f020 [size=32]
Region 5: Memory at ffe40000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0100c Data: 4189
Capabilities: [70] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA <?>
Kernel driver in use: ahci
00:1f.3 SMBus [0c05]: Intel Corporation 82801G (ICH7 Family) SMBus Controller [8086:27da] (rev 02)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 19
Region 4: I/O ports at 1180 [size=32]
Kernel driver in use: i801_smbus
Kernel modules: i2c-i801
01:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 03)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 29
Region 0: I/O ports at e000 [size=256]
Region 2: Memory at cfe04000 (64-bit, prefetchable) [size=4K]
Region 4: Memory at cfe00000 (64-bit, prefetchable) [size=16K]
[virtual] Expansion ROM at cfe20000 [disabled] [size=128K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+
Address: 00000000fee0200c Data: 4199
Capabilities: [70] Express (v2) Endpoint, MSI 01
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM+ Suprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [ac] MSI-X: Enable- Mask- TabSize=4
Vector table: BAR=4 offset=00000000
PBA: BAR=4 offset=00000800
Capabilities: [cc] Vital Product Data <?>
Capabilities: [100] Advanced Error Reporting <?>
Capabilities: [140] Virtual Channel <?>
Capabilities: [160] Device Serial Number 00-e0-4c-68-00-00-2a-51
Kernel driver in use: r8169
Kernel modules: r8169
[-- Attachment #5: lspci.working --]
[-- Type: text/plain, Size: 20934 bytes --]
00:00.0 Host bridge [0600]: Intel Corporation Mobile 945GME Express Memory Controller Hub [8086:27ac] (rev 03)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel driver in use: agpgart-intel
00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 945GME Express Integrated Graphics Controller [8086:27ae] (rev 03) (prog-if 00 [VGA controller])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at ffd80000 (32-bit, non-prefetchable) [size=512K]
Region 1: I/O ports at f150 [size=8]
Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M]
Region 3: Memory at ffe00000 (32-bit, non-prefetchable) [size=256K]
Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable-
Address: 00000000 Data: 0000
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Kernel modules: i915
00:02.1 Display controller [0380]: Intel Corporation Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller [8086:27a6] (rev 03)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at ffd00000 (32-bit, non-prefetchable) [size=512K]
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00:1b.0 Audio device [0403]: Intel Corporation 82801G (ICH7 Family) High Definition Audio Controller [8086:27d8] (rev 02)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at cff00000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable-
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
ClockPM- Suprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Virtual Channel <?>
Capabilities: [130] Root Complex Link <?>
Kernel driver in use: HDA Intel
Kernel modules: snd-hda-intel
00:1c.0 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 1 [8086:27d0] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 0000e000-0000efff
Memory behind bridge: ffc00000-ffcfffff
Prefetchable memory behind bridge: 00000000cfe00000-00000000cfefffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4169
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1c.1 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 2 [8086:27d2] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4171
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1c.2 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 3 [8086:27d4] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4179
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1c.3 PCI bridge [0604]: Intel Corporation 82801G (ICH7 Family) PCI Express Port 4 [8086:27d6] (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us
ClockPM- Suprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0300c Data: 4181
Capabilities: [90] Subsystem: Gammagraphx, Inc. Unknown device [0000:0000]
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport-driver
00:1d.0 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #1 [8086:27c8] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 4: I/O ports at f0a0 [size=32]
Kernel driver in use: uhci_hcd
00:1d.1 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #2 [8086:27c9] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 19
Region 4: I/O ports at f080 [size=32]
Kernel driver in use: uhci_hcd
00:1d.2 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #3 [8086:27ca] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 4: I/O ports at f060 [size=32]
Kernel driver in use: uhci_hcd
00:1d.3 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #4 [8086:27cb] (rev 02) (prog-if 00 [UHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin D routed to IRQ 16
Region 4: I/O ports at f040 [size=32]
Kernel driver in use: uhci_hcd
00:1d.7 USB Controller [0c03]: Intel Corporation 82801G (ICH7 Family) USB2 EHCI Controller [8086:27cc] (rev 02) (prog-if 20 [EHCI])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at ffe41000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Kernel driver in use: ehci_hcd
00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e2) (prog-if 01 [Subtractive decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=05, subordinate=05, sec-latency=32
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Subsystem: Intel Corporation 82801 Mobile PCI Bridge [8086:2448]
00:1f.0 ISA bridge [0601]: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge [8086:27b9] (rev 02)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel modules: intel-rng, iTCO_wdt
00:1f.1 IDE interface [0101]: Intel Corporation 82801G (ICH7 Family) IDE Controller [8086:27df] (rev 02) (prog-if 8a [Master SecP PriP])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+
Latency: 0
Interrupt: pin A routed to IRQ 18
Region 0: I/O ports at 01f0 [size=8]
Region 1: I/O ports at 03f4 [size=1]
Region 2: I/O ports at 0170 [size=8]
Region 3: I/O ports at 0374 [size=1]
Region 4: I/O ports at f100 [size=16]
Kernel driver in use: ata_piix
00:1f.2 SATA controller [0106]: Intel Corporation 82801GBM/GHM (ICH7 Family) SATA AHCI Controller [8086:27c5] (rev 02) (prog-if 01 [AHCI 1.0])
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 28
Region 0: I/O ports at f0f0 [size=8]
Region 1: I/O ports at f0e0 [size=4]
Region 2: I/O ports at f0d0 [size=8]
Region 3: I/O ports at f0c0 [size=4]
Region 4: I/O ports at f020 [size=32]
Region 5: Memory at ffe40000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
Address: fee0100c Data: 4189
Capabilities: [70] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA <?>
Kernel driver in use: ahci
00:1f.3 SMBus [0c05]: Intel Corporation 82801G (ICH7 Family) SMBus Controller [8086:27da] (rev 02)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 19
Region 4: I/O ports at 1180 [size=32]
Kernel driver in use: i801_smbus
Kernel modules: i2c-i801
01:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 03)
Subsystem: Intel Corporation Unknown device [8086:d615]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 29
Region 0: I/O ports at e000 [size=256]
Region 2: Memory at cfe04000 (64-bit, prefetchable) [size=4K]
Region 4: Memory at cfe00000 (64-bit, prefetchable) [size=16K]
[virtual] Expansion ROM at cfe20000 [disabled] [size=128K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+
Address: 00000000fee0200c Data: 4199
Capabilities: [70] Express (v2) Endpoint, MSI 01
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM+ Suprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [ac] MSI-X: Enable- Mask- TabSize=4
Vector table: BAR=4 offset=00000000
PBA: BAR=4 offset=00000800
Capabilities: [cc] Vital Product Data <?>
Capabilities: [100] Advanced Error Reporting <?>
Capabilities: [140] Virtual Channel <?>
Capabilities: [160] Device Serial Number 00-e0-4c-68-00-00-2a-8f
Kernel driver in use: r8169
Kernel modules: r8169
^ permalink raw reply
* Re: Why is LRO off by default on ixgbe?
From: Ben Greear @ 2009-09-23 17:16 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: NetDev
In-Reply-To: <20090923100718.79877040@s6510>
On 09/23/2009 10:07 AM, Stephen Hemminger wrote:
> On Wed, 23 Sep 2009 09:57:51 -0700
> Ben Greear<greearb@candelatech.com> wrote:
>
>> On 09/23/2009 09:53 AM, Stephen Hemminger wrote:
>>> On Wed, 23 Sep 2009 09:29:59 -0700
>>> Ben Greear<greearb@candelatech.com> wrote:
>>>
>>>> I just noticed that enabling LRO on ixgbe lets me reach about 9Gbps receive on two
>>>> NICs concurrently in an NFS test, where I was only getting about 6Gbps w/out it (1500 MTU).
>>>>
>>>> Why is LRO disabled by default?
>>>>
>>>> Thanks,
>>>> Ben
>>>
>>> LRO is turned off if bridging or routing because of End to End requirements.
>>
>> That makes sense.
>>
>> If I know that all interfaces in question can handle TSO and LRO,
>> I could manually enable LRO w/out risk, right?
>>
>
> The problem is that LRO merges TCP packets, this breaks the end-to-end
> ack clocking and checksumming, and therefore is not enabled.
> That is why GRO is the replacement solution (preserves packet boundaries)
Ok. It seems GRO was enabled the whole time, but LRO is what gave me the
extra performance boost.
In this particular case, I'm not actually routing, though I do have ip-forward
enabled, so I guess LRO will be OK as long as I'm careful...
Thanks,
Ben
--
Ben Greear <greearb@candelatech.com>
Candela Technologies Inc http://www.candelatech.com
^ permalink raw reply
* Re: Why is LRO off by default on ixgbe?
From: Stephen Hemminger @ 2009-09-23 17:07 UTC (permalink / raw)
To: Ben Greear; +Cc: NetDev
In-Reply-To: <4ABA538F.7020507@candelatech.com>
On Wed, 23 Sep 2009 09:57:51 -0700
Ben Greear <greearb@candelatech.com> wrote:
> On 09/23/2009 09:53 AM, Stephen Hemminger wrote:
> > On Wed, 23 Sep 2009 09:29:59 -0700
> > Ben Greear<greearb@candelatech.com> wrote:
> >
> >> I just noticed that enabling LRO on ixgbe lets me reach about 9Gbps receive on two
> >> NICs concurrently in an NFS test, where I was only getting about 6Gbps w/out it (1500 MTU).
> >>
> >> Why is LRO disabled by default?
> >>
> >> Thanks,
> >> Ben
> >
> > LRO is turned off if bridging or routing because of End to End requirements.
>
> That makes sense.
>
> If I know that all interfaces in question can handle TSO and LRO,
> I could manually enable LRO w/out risk, right?
>
The problem is that LRO merges TCP packets, this breaks the end-to-end
ack clocking and checksumming, and therefore is not enabled.
That is why GRO is the replacement solution (preserves packet boundaries)
^ permalink raw reply
* Re: Why is LRO off by default on ixgbe?
From: Ben Greear @ 2009-09-23 16:57 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: NetDev
In-Reply-To: <20090923095356.7f9aef37@s6510>
On 09/23/2009 09:53 AM, Stephen Hemminger wrote:
> On Wed, 23 Sep 2009 09:29:59 -0700
> Ben Greear<greearb@candelatech.com> wrote:
>
>> I just noticed that enabling LRO on ixgbe lets me reach about 9Gbps receive on two
>> NICs concurrently in an NFS test, where I was only getting about 6Gbps w/out it (1500 MTU).
>>
>> Why is LRO disabled by default?
>>
>> Thanks,
>> Ben
>
> LRO is turned off if bridging or routing because of End to End requirements.
That makes sense.
If I know that all interfaces in question can handle TSO and LRO,
I could manually enable LRO w/out risk, right?
Thanks,
Ben
--
Ben Greear <greearb@candelatech.com>
Candela Technologies Inc http://www.candelatech.com
^ permalink raw reply
* Re: Why is LRO off by default on ixgbe?
From: Stephen Hemminger @ 2009-09-23 16:53 UTC (permalink / raw)
To: Ben Greear; +Cc: NetDev
In-Reply-To: <4ABA4D07.50107@candelatech.com>
On Wed, 23 Sep 2009 09:29:59 -0700
Ben Greear <greearb@candelatech.com> wrote:
> I just noticed that enabling LRO on ixgbe lets me reach about 9Gbps receive on two
> NICs concurrently in an NFS test, where I was only getting about 6Gbps w/out it (1500 MTU).
>
> Why is LRO disabled by default?
>
> Thanks,
> Ben
LRO is turned off if bridging or routing because of End to End requirements.
^ permalink raw reply
* Getting physical packet counts with LRO enabled with ixgbe?
From: Ben Greear @ 2009-09-23 16:40 UTC (permalink / raw)
To: NetDev
I notice that with LRO enabled, the interface stats count the LRO'd pkts,
not the physical ones on the wire.
I also tried using ethtool -S, but it seems those counters are the same.
Is there any way to get the actual rx/tx packet count on the wire?
Also, for the rx/tx bytes, I assume that isn't counting the protocol headers
for the physical pkts that have been merged into a single LRO packet. Is
there any way to get the wire stats for bytes as well?
Thanks,
Ben
--
Ben Greear <greearb@candelatech.com>
Candela Technologies Inc http://www.candelatech.com
^ permalink raw reply
* Why is LRO off by default on ixgbe?
From: Ben Greear @ 2009-09-23 16:29 UTC (permalink / raw)
To: NetDev
I just noticed that enabling LRO on ixgbe lets me reach about 9Gbps receive on two
NICs concurrently in an NFS test, where I was only getting about 6Gbps w/out it (1500 MTU).
Why is LRO disabled by default?
Thanks,
Ben
--
Ben Greear <greearb@candelatech.com>
Candela Technologies Inc http://www.candelatech.com
^ permalink raw reply
* Hello
From: itai amir @ 2009-09-23 16:07 UTC (permalink / raw)
Hello
How are you today? I hope you are fine.If so thank be to God almighty.My name is Anna Luck,26 years old.I am single girl looking for honest and nice person. Somebody who care and fear God whom i can partner with .I don't care about your colour or ethnicity.I would like to know you more,most especially what you like and what you dislike.I'm sending you this beautiful mail, with a wish for much happiness.I am looking forward to hear from you.
Love from,
Anna
^ permalink raw reply
* pull request: wireless-next-2.6 2009-09-23
From: John W. Linville @ 2009-09-23 15:53 UTC (permalink / raw)
To: davem; +Cc: linux-wireless, netdev, linux-kernel
Dave,
Please accept this one last round of wireless bits for the merge window.
They are fixes for the most part, and the teams involved are very eager
to have these for the 2.6.32 cycle. In particular, the b43 and ath9k
teams have some late breakers -- yes, I have reminded them of the
process, but they are quite insistent...
Please let me know if there are problems!
Thanks,
John
---
Individual patches are available here:
http://www.kernel.org/pub/linux/kernel/people/linville/wireless-next-2.6/
---
The following changes since commit 4142e0d1def2c0176c27fd2e810243045a62eb6d:
Linus Torvalds (1):
Merge branch 'osync_cleanup' of git://git.kernel.org/.../jack/linux-fs-2.6
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6.git
Albert Herranz (2):
b43: Add Soft-MAC SDIO device support
b43: fix build error if !CONFIG_B43_LEDS
Andrew Price (1):
rt2x00: fix the definition of rt2x00crypto_rx_insert_iv
Christian Lamparter (2):
p54usb: add Zcomax XG-705A usbid
ar9170usb: add usbid for TP-Link TL-WN821N v2
Daniel C Halperin (1):
iwlwifi: fix HT operation in 2.4 GHz band
Holger Schurig (2):
cfg80211: use cfg80211_wext_freq() for freq conversion
cfg80211: minimal error handling for wext-compat freq scanning
Johannes Berg (4):
iwlwifi: disable powersave for 4965
cfg80211: fix SME connect
mac80211: fix DTIM setting
cfg80211: don't overwrite privacy setting
Julia Lawall (1):
drivers/net/wireless: Use usb_endpoint_dir_out
Larry Finger (2):
ssb: Fix error when V1 SPROM extraction is forced
b43: Implement RFKILL status for LP PHY
Luis R. Rodriguez (1):
wireless: default CONFIG_WLAN to y
Martin Decky (1):
hostap: Revert a toxic part of the conversion to net_device_ops
Michael Buesch (11):
b43: Force-wake queues on init
ssb: Disable verbose SDIO coreswitch
b43: Fix resume failure
b43: Rewrite suspend/resume code
b43: Do not use _irqsafe callbacks
b43: Fix SDIO interrupt handler deadlock
b43: Fix IRQ sync for SDIO
b43: Add optional verbose runtime statistics
b43: Disable PMQ mechanism
b43: Don't abuse wl->current_dev in the led work
b43: Remove BROKEN attribute from SDIO
Pavel Roskin (1):
rc80211_minstrel: fix contention window calculation
Randy Dunlap (2):
ssb/sdio: fix printk format warnings
wl12xx: fix kconfig/link errors
Reinette Chatre (3):
iwlwifi: fix potential rx buffer loss
iwlwifi: do not send sync command while holding spinlock
iwlwifi: reduce noise when skb allocation fails
Senthil Balasubramanian (2):
ath9k: Adjust the chainmasks properly
ath9k: Fix bug in chain handling
Stanislaw Gruszka (1):
iwlagn: fix panic in iwl{5000,4965}_rx_reply_tx
Sujith (5):
ath9k: Fix bug in ANI channel handling
ath9k: Restore TSF after RESET
ath9k: Fix chip wakeup issue
ath9k: Fix regression in PA calibration
ath9k: Fix RFKILL bugs
Thomas Ilnseher (1):
b43: Add LP PHY Analog Switch Support
Vasanthakumar Thiagarajan (3):
ath9k: Fix rx data corruption
ath9k: Don't read NF when chip has gone through full sleep mode
ath9k: Do a full reset for AR9280
Vivek Natarajan (5):
ath9k: Set default noise floor value for AR9287
ath9k: Revamp PCIE workarounds
ath9k: Fix AHB reset for AR9280
ath9k: Disable autosleep feature by default.
ath9k: Initialize txgain and rxgain for newer AR9287 chipsets.
Wey-Yi Guy (1):
iwlwifi: find the correct first antenna
drivers/net/wireless/Kconfig | 1 +
drivers/net/wireless/ath/ar9170/usb.c | 2 +
drivers/net/wireless/ath/ath9k/ani.c | 6 +-
drivers/net/wireless/ath/ath9k/calib.c | 23 ++-
drivers/net/wireless/ath/ath9k/calib.h | 1 +
drivers/net/wireless/ath/ath9k/eeprom_def.c | 4 +-
drivers/net/wireless/ath/ath9k/hw.c | 202 ++++++++++++--------
drivers/net/wireless/ath/ath9k/hw.h | 4 +-
drivers/net/wireless/ath/ath9k/main.c | 16 +-
drivers/net/wireless/ath/ath9k/reg.h | 3 +-
drivers/net/wireless/b43/Kconfig | 21 ++-
drivers/net/wireless/b43/Makefile | 1 +
drivers/net/wireless/b43/b43.h | 23 +--
drivers/net/wireless/b43/debugfs.c | 1 +
drivers/net/wireless/b43/debugfs.h | 1 +
drivers/net/wireless/b43/dma.c | 4 +-
drivers/net/wireless/b43/leds.c | 266 +++++++++++++++++++--------
drivers/net/wireless/b43/leds.h | 33 +++-
drivers/net/wireless/b43/main.c | 230 +++++++++++++----------
drivers/net/wireless/b43/phy_lp.c | 12 +-
drivers/net/wireless/b43/pio.c | 2 +-
drivers/net/wireless/b43/rfkill.c | 2 +-
drivers/net/wireless/b43/sdio.c | 202 ++++++++++++++++++++
drivers/net/wireless/b43/sdio.h | 45 +++++
drivers/net/wireless/b43/xmit.c | 5 +-
drivers/net/wireless/hostap/hostap_main.c | 3 +-
drivers/net/wireless/iwlwifi/iwl-4965.c | 7 +
drivers/net/wireless/iwlwifi/iwl-5000.c | 6 +
drivers/net/wireless/iwlwifi/iwl-agn-rs.c | 10 +-
drivers/net/wireless/iwlwifi/iwl-core.c | 9 +-
drivers/net/wireless/iwlwifi/iwl-core.h | 1 +
drivers/net/wireless/iwlwifi/iwl-power.c | 5 +-
drivers/net/wireless/iwlwifi/iwl-rx.c | 34 +++-
drivers/net/wireless/iwlwifi/iwl-sta.c | 2 +-
drivers/net/wireless/iwlwifi/iwl3945-base.c | 33 +++-
drivers/net/wireless/p54/p54usb.c | 1 +
drivers/net/wireless/rt2x00/rt2x00lib.h | 2 +-
drivers/net/wireless/wl12xx/Kconfig | 2 +-
drivers/net/wireless/zd1211rw/zd_usb.c | 2 +-
drivers/ssb/pci.c | 1 +
drivers/ssb/sdio.c | 6 +-
net/mac80211/rc80211_minstrel.c | 2 +-
net/mac80211/scan.c | 4 +-
net/wireless/scan.c | 7 +-
net/wireless/sme.c | 21 ++-
net/wireless/wext-sme.c | 2 +-
46 files changed, 921 insertions(+), 349 deletions(-)
create mode 100644 drivers/net/wireless/b43/sdio.c
create mode 100644 drivers/net/wireless/b43/sdio.h
Omnibus patch is available here:
http://www.kernel.org/pub/linux/kernel/people/linville/wireless-next-2.6-2009-09-23.patch.bz2
--
John W. Linville Someday the world will need a hero, and you
linville@tuxdriver.com might be all we have. Be ready.
^ permalink raw reply
* Re: fanotify as syscalls
From: Eric Paris @ 2009-09-23 15:51 UTC (permalink / raw)
To: Arjan van de Ven
Cc: Tvrtko Ursulin, Davide Libenzi, Andreas Gruenbacher, Jamie Lokier,
Linus Torvalds, Evgeniy Polyakov, David Miller,
Linux Kernel Mailing List, linux-fsdevel@vger.kernel.org,
netdev@vger.kernel.org, viro@zeniv.linux.org.uk,
alan@linux.intel.com, hch@infradead.org
In-Reply-To: <20090923133232.5577688d@infradead.org>
On Wed, 2009-09-23 at 13:32 +0200, Arjan van de Ven wrote:
> On Wed, 23 Sep 2009 09:39:33 +0100
> Tvrtko Ursulin <tvrtko.ursulin@sophos.com> wrote:
>
> > Lived with it because there was no other option. We used LSM while it
> > was available for modules but then it was taken away.
>
> ... at which point you could have submitted your LSM module for
> inclusion... you'd be the first (and only?) Anti Virus vendor that
> would be in the mainline kernel.. speaking of competitive advantage,
> coming out of the box in all distributions.
And users would be left in a situation between choosing an LSM which
actually does in provable ways increase security and using an AV
scanner. Until magic solves the LSM stacking problem (it's been tried,
no magic) I don't think any distro wants AV vendors as LSMs.
-Eric
^ permalink raw reply
* Re: fanotify as syscalls
From: Tvrtko Ursulin @ 2009-09-23 15:45 UTC (permalink / raw)
To: Davide Libenzi
Cc: Andreas Gruenbacher, Jamie Lokier, Eric Paris, Linus Torvalds,
Evgeniy Polyakov, David Miller, Linux Kernel Mailing List,
linux-fsdevel@vger.kernel.org, netdev@vger.kernel.org,
viro@zeniv.linux.org.uk, alan@linux.intel.com, hch@infradead.org
In-Reply-To: <alpine.DEB.2.00.0909230755160.21515@makko.or.mcafeemobile.com>
On Wednesday 23 September 2009 16:26:49 Davide Libenzi wrote:
> On Wed, 23 Sep 2009, Tvrtko Ursulin wrote:
> > Lived with it because there was no other option. We used LSM while it was
> > available for modules but then it was taken away.
> >
> > And not all vendors even use syscall interception, not even across
> > platforms, of which you sound so sure about. You can't even scan
> > something which is not in your namespace if you are at the syscall level.
> > And you can't catch things like kernel nfsd. No, syscall interception is
> > not really appropriate at all.
>
> Really?
> And *if* namespaces were the problem for the devices you were targeting,
> what prevented you to resolving the object and offering a stream to
> userspace?
You are right, nothing really, we even do it like that today. But what about
other interested users?
> In *your* module, hosting at the same time all the other logic required
> for it (caches, whitelists, etc...), instead of pushing this stuff into
> the kernel.
> WRT to the "other" system, never said they were using syscall
> interception, if you read carefully. I said that minifilters typically
> sends path names to userspace, which might drive you in the pitfall
> Andreas was describing.
Yeah, you could do something like kauth on OSX, which is I guess similar to
LSM, which was turned off for out of tree. And now you want to push users of
fanotify out of tree, so what should it be? In tree bad, out of tree bad?
Tvrtko
^ permalink raw reply
* Re: fanotify as syscalls
From: Tvrtko Ursulin @ 2009-09-23 15:42 UTC (permalink / raw)
To: Arjan van de Ven
Cc: Davide Libenzi, Andreas Gruenbacher, Jamie Lokier, Eric Paris,
Linus Torvalds, Evgeniy Polyakov, David Miller,
Linux Kernel Mailing List, linux-fsdevel@vger.kernel.org,
netdev@vger.kernel.org, viro@zeniv.linux.org.uk,
alan@linux.intel.com, hch@infradead.org
In-Reply-To: <20090923133232.5577688d@infradead.org>
On Wednesday 23 September 2009 12:32:32 Arjan van de Ven wrote:
> On Wed, 23 Sep 2009 09:39:33 +0100
>
> Tvrtko Ursulin <tvrtko.ursulin@sophos.com> wrote:
> > Lived with it because there was no other option. We used LSM while it
> > was available for modules but then it was taken away.
>
> ... at which point you could have submitted your LSM module for
> inclusion... you'd be the first (and only?) Anti Virus vendor that
> would be in the mainline kernel.. speaking of competitive advantage,
> coming out of the box in all distributions.
>
> sadly this road hasn't been chosen....
It has, but since what we had wasn't acceptable the road was long and it
turned into fanotify. Which is not only about anti-malware (hello Christoph)
so I think this sub-thread is going off-topic.
Tvrtko
^ permalink raw reply
* [PATCH] ems_pci: fix size of CAN controllers BAR mapping for CPC-PCI v2
From: Sebastian Haas @ 2009-09-23 15:37 UTC (permalink / raw)
To: netdev-u79uwXL29TY76Z2rM5mHXA
Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
davem-fT/PcQaiUtIeIZ0/mPfg9Q, wg-5Yr1BZd7O62+XT7JhA+gdA
The driver mapped only 128 bytes of the CAN controller address space when a
CPC-PCI v2 was detected (incl. CPC-104P). This patch will fix it by always
mapping the whole address space (4096 bytes on all boards) of the
corresponding PCI BAR.
Signed-off-by: Sebastian Haas <haas-zsNKPWJ8Pib6hrUXjxyGrA@public.gmane.org>
---
drivers/net/can/sja1000/ems_pci.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/can/sja1000/ems_pci.c b/drivers/net/can/sja1000/ems_pci.c
index 7d84b8a..ba98063 100644
--- a/drivers/net/can/sja1000/ems_pci.c
+++ b/drivers/net/can/sja1000/ems_pci.c
@@ -94,12 +94,14 @@ struct ems_pci_card {
#define EMS_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
#define EMS_PCI_V1_BASE_BAR 1
-#define EMS_PCI_V1_MEM_SIZE 4096
+#define EMS_PCI_V1_MEM_SIZE 4096 /* size of PITA control area */
#define EMS_PCI_V2_BASE_BAR 2
-#define EMS_PCI_V2_MEM_SIZE 128
+#define EMS_PCI_V2_MEM_SIZE 128 /* size of PLX control area */
#define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */
#define EMS_PCI_CAN_CTRL_SIZE 0x200 /* memory size for each controller */
+#define EMS_PCI_CONTR_MEM_SIZE 4096 /* size of controller area */
+
static struct pci_device_id ems_pci_tbl[] = {
/* CPC-PCI v1 */
{PCI_VENDOR_ID_SIEMENS, 0x2104, PCI_ANY_ID, PCI_ANY_ID,},
@@ -266,7 +268,7 @@ static int __devinit ems_pci_add_card(struct pci_dev *pdev,
goto failure_cleanup;
}
- card->base_addr = pci_iomap(pdev, base_bar, mem_size);
+ card->base_addr = pci_iomap(pdev, base_bar, EMS_PCI_CONTR_MEM_SIZE);
if (card->base_addr == NULL) {
err = -ENOMEM;
goto failure_cleanup;
--
EMS Dr. Thomas Wuensche e.K.
Sonnenhang 3
85304 Ilmmuenster
HRA Neuburg a.d. Donau, HR-Nr. 70.106
Phone: +49-8441-490260
Fax : +49-8441-81860
http://www.ems-wuensche.com
^ permalink raw reply related
* Re: fanotify as syscalls
From: Davide Libenzi @ 2009-09-23 15:35 UTC (permalink / raw)
To: hch@infradead.org
Cc: Tvrtko Ursulin, Andreas Gruenbacher, Jamie Lokier, Eric Paris,
Linus Torvalds, Evgeniy Polyakov, David Miller,
Linux Kernel Mailing List, linux-fsdevel@vger.kernel.org,
netdev@vger.kernel.org, viro@zeniv.linux.org.uk,
alan@linux.intel.com
In-Reply-To: <20090923112018.GA2946@infradead.org>
On Wed, 23 Sep 2009, hch@infradead.org wrote:
> On Wed, Sep 23, 2009 at 09:39:33AM +0100, Tvrtko Ursulin wrote:
> > Lived with it because there was no other option. We used LSM while it was
> > available for modules but then it was taken away.
> >
> > And not all vendors even use syscall interception, not even across platforms,
> > of which you sound so sure about. You can't even scan something which is not
> > in your namespace if you are at the syscall level. And you can't catch things
> > like kernel nfsd. No, syscall interception is not really appropriate at all.
>
> The "Anti-Malware" industry is just snake oil anyway. I think the
> proper approach to support it is just to add various no-op exports claim
> to do something and all the people requiring anti-virus on Linux will be
> just as happy with it.
The fear is that this becomes a trojan horse (no pun intended) for more
and more hooks and "stuff", driven by we-really-need-this-too and
we-really-need-that-too. And once something it's in, it's harder to say no,
under the pressure of offering a "limited solution".
This ws the reason I threw the syscall tracing thing in, so they have a
low level generic hook, and they cam knock themselves out in their module
(might need a few exports, but that's about it).
- Davide
^ permalink raw reply
* Re: fanotify as syscalls
From: Davide Libenzi @ 2009-09-23 15:26 UTC (permalink / raw)
To: Tvrtko Ursulin
Cc: Andreas Gruenbacher, Jamie Lokier, Eric Paris, Linus Torvalds,
Evgeniy Polyakov, David Miller, Linux Kernel Mailing List,
linux-fsdevel@vger.kernel.org, netdev@vger.kernel.org,
viro@zeniv.linux.org.uk, alan@linux.intel.com, hch@infradead.org
In-Reply-To: <200909230939.34003.tvrtko.ursulin@sophos.com>
On Wed, 23 Sep 2009, Tvrtko Ursulin wrote:
> Lived with it because there was no other option. We used LSM while it was
> available for modules but then it was taken away.
>
> And not all vendors even use syscall interception, not even across platforms,
> of which you sound so sure about. You can't even scan something which is not
> in your namespace if you are at the syscall level. And you can't catch things
> like kernel nfsd. No, syscall interception is not really appropriate at all.
Really?
And *if* namespaces were the problem for the devices you were targeting,
what prevented you to resolving the object and offering a stream to
userspace?
In *your* module, hosting at the same time all the other logic required
for it (caches, whitelists, etc...), instead of pushing this stuff into
the kernel.
WRT to the "other" system, never said they were using syscall
interception, if you read carefully. I said that minifilters typically
sends path names to userspace, which might drive you in the pitfall
Andreas was describing.
- Davide
^ permalink raw reply
* Re: [PATCHv5 3/3] vhost_net: a kernel-level virtio server
From: Gregory Haskins @ 2009-09-23 15:10 UTC (permalink / raw)
To: Avi Kivity
Cc: Ira W. Snyder, Michael S. Tsirkin, netdev, virtualization, kvm,
linux-kernel, mingo, linux-mm, akpm, hpa, Rusty Russell, s.hetze,
alacrityvm-devel
In-Reply-To: <4ABA32AF.50602@redhat.com>
[-- Attachment #1: Type: text/plain, Size: 7035 bytes --]
Avi Kivity wrote:
> On 09/23/2009 05:26 PM, Gregory Haskins wrote:
>>
>>
>>>> Yes, I'm having to create my own bus model, a-la lguest, virtio-pci,
>>>> and
>>>> virtio-s390. It isn't especially easy. I can steal lots of code from
>>>> the
>>>> lguest bus model, but sometimes it is good to generalize, especially
>>>> after the fourth implemention or so. I think this is what GHaskins
>>>> tried
>>>> to do.
>>>>
>>>>
>>> Yes. vbus is more finely layered so there is less code duplication.
>>>
>> To clarify, Ira was correct in stating this generalizing some of these
>> components was one of the goals for the vbus project: IOW vbus finely
>> layers and defines what's below virtio, not replaces it.
>>
>> You can think of a virtio-stack like this:
>>
>> --------------------------
>> | virtio-net
>> --------------------------
>> | virtio-ring
>> --------------------------
>> | virtio-bus
>> --------------------------
>> | ? undefined ?
>> --------------------------
>>
>> IOW: The way I see it, virtio is a device interface model only. The
>> rest of it is filled in by the virtio-transport and some kind of
>> back-end.
>>
>> So today, we can complete the "? undefined ?" block like this for KVM:
>>
>> --------------------------
>> | virtio-pci
>> --------------------------
>> |
>> --------------------------
>> | kvm.ko
>> --------------------------
>> | qemu
>> --------------------------
>> | tuntap
>> --------------------------
>>
>> In this case, kvm.ko and tuntap are providing plumbing, and qemu is
>> providing a backend device model (pci-based, etc).
>>
>> You can, of course, plug a different stack in (such as virtio-lguest,
>> virtio-ira, etc) but you are more or less on your own to recreate many
>> of the various facilities contained in that stack (such as things
>> provided by QEMU, like discovery/hotswap/addressing), as Ira is
>> discovering.
>>
>> Vbus tries to commoditize more components in the stack (like the bus
>> model and backend-device model) so they don't need to be redesigned each
>> time we solve this "virtio-transport" problem. IOW: stop the
>> proliferation of the need for pci-bus, lguest-bus, foo-bus underneath
>> virtio. Instead, we can then focus on the value add on top, like the
>> models themselves or the simple glue between them.
>>
>> So now you might have something like
>>
>> --------------------------
>> | virtio-vbus
>> --------------------------
>> | vbus-proxy
>> --------------------------
>> | kvm-guest-connector
>> --------------------------
>> |
>> --------------------------
>> | kvm.ko
>> --------------------------
>> | kvm-host-connector.ko
>> --------------------------
>> | vbus.ko
>> --------------------------
>> | virtio-net-backend.ko
>> --------------------------
>>
>> so now we don't need to worry about the bus-model or the device-model
>> framework. We only need to implement the connector, etc. This is handy
>> when you find yourself in an environment that doesn't support PCI (such
>> as Ira's rig, or userspace containers), or when you want to add features
>> that PCI doesn't have (such as fluid event channels for things like IPC
>> services, or priortizable interrupts, etc).
>>
>
> Well, vbus does more, for example it tunnels interrupts instead of
> exposing them 1:1 on the native interface if it exists.
As I've previously explained, that trait is a function of the
kvm-connector I've chosen to implement, not of the overall design of vbus.
The reason why my kvm-connector is designed that way is because my early
testing/benchmarking shows one of the issues in KVM performance is the
ratio of exits per IO operation are fairly high, especially as your
scale io-load. Therefore, the connector achieves a substantial
reduction in that ratio by treating "interrupts" to the same kind of
benefits that NAPI brought to general networking: That is, we enqueue
"interrupt" messages into a lockless ring and only hit the IDT for the
first occurrence. Subsequent interrupts are injected in a
parallel/lockless manner, without hitting the IDT nor incurring an extra
EOI. This pays dividends as the IO rate increases, which is when the
guest needs the most help.
OTOH, it is entirely possible to design the connector such that we
maintain a 1:1 ratio of signals to traditional IDT interrupts. It is
also possible to design a connector which surfaces as something else,
such as PCI devices (by terminating the connector in QEMU and utilizing
its PCI emulation facilities), which would naturally employ 1:1 mapping.
So if 1:1 mapping is a critical feature (I would argue to the contrary),
vbus can support it.
> It also pulls parts of the device model into the host kernel.
That is the point. Most of it needs to be there for performance. And
what doesn't need to be there for performance can either be:
a) skipped at the discretion of the connector/device-model designer
OR
b) included because its trivially small subset of the model (e.g. a
mac-addr attribute) and its nice to have a cohesive solution instead of
requiring a separate binary blob that can get out of sync, etc.
The example Ive provided to date (venet on kvm) utilizes (b), but it
certainly doesn't have to. Therefore, I don't think vbus as a whole can
be judged on this one point.
>
>>> The virtio layering was more or less dictated by Xen which doesn't have
>>> shared memory (it uses grant references instead). As a matter of fact
>>> lguest, kvm/pci, and kvm/s390 all have shared memory, as you do, so that
>>> part is duplicated. It's probably possible to add a virtio-shmem.ko
>>> library that people who do have shared memory can reuse.
>>>
>> Note that I do not believe the Xen folk use virtio, so while I can
>> appreciate the foresight that went into that particular aspect of the
>> design of the virtio model, I am not sure if its a realistic constraint.
>>
>
> Since a virtio goal was to reduce virtual device driver proliferation,
> it was necessary to accommodate Xen.
Fair enough, but I don't think the Xen community will ever use it.
To your point, a vbus goal was to reduce the bus-model and
backend-device-model proliferation for environments served by Linux as
the host. This naturally complements virtio's driver non-proliferation
goal, but probably excludes Xen for reasons beyond the lack of shmem
(since it has its own non-linux hypervisor kernel).
In any case, I've already stated that we simply make the virtio-shmem
(vbus-proxy-device) facility optionally defined, and unavailable on
non-shmem based architectures to work around that issue.
The alternative is that we abstract the shmem concept further (ala
->add_buf() from the virtqueue world) but it is probably pointless to
try to accommodate shared-memory if you don't really have it, and no-one
will likely use it.
Kind Regards,
-Greg
[-- Attachment #2: OpenPGP digital signature --]
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^ permalink raw reply
* Re: [PATCHv5 3/3] vhost_net: a kernel-level virtio server
From: Avi Kivity @ 2009-09-23 14:37 UTC (permalink / raw)
To: Gregory Haskins
Cc: Ira W. Snyder, Michael S. Tsirkin, netdev, virtualization, kvm,
linux-kernel, mingo, linux-mm, akpm, hpa, Rusty Russell, s.hetze,
alacrityvm-devel
In-Reply-To: <4ABA3005.60905@gmail.com>
On 09/23/2009 05:26 PM, Gregory Haskins wrote:
>
>
>>> Yes, I'm having to create my own bus model, a-la lguest, virtio-pci, and
>>> virtio-s390. It isn't especially easy. I can steal lots of code from the
>>> lguest bus model, but sometimes it is good to generalize, especially
>>> after the fourth implemention or so. I think this is what GHaskins tried
>>> to do.
>>>
>>>
>> Yes. vbus is more finely layered so there is less code duplication.
>>
> To clarify, Ira was correct in stating this generalizing some of these
> components was one of the goals for the vbus project: IOW vbus finely
> layers and defines what's below virtio, not replaces it.
>
> You can think of a virtio-stack like this:
>
> --------------------------
> | virtio-net
> --------------------------
> | virtio-ring
> --------------------------
> | virtio-bus
> --------------------------
> | ? undefined ?
> --------------------------
>
> IOW: The way I see it, virtio is a device interface model only. The
> rest of it is filled in by the virtio-transport and some kind of back-end.
>
> So today, we can complete the "? undefined ?" block like this for KVM:
>
> --------------------------
> | virtio-pci
> --------------------------
> |
> --------------------------
> | kvm.ko
> --------------------------
> | qemu
> --------------------------
> | tuntap
> --------------------------
>
> In this case, kvm.ko and tuntap are providing plumbing, and qemu is
> providing a backend device model (pci-based, etc).
>
> You can, of course, plug a different stack in (such as virtio-lguest,
> virtio-ira, etc) but you are more or less on your own to recreate many
> of the various facilities contained in that stack (such as things
> provided by QEMU, like discovery/hotswap/addressing), as Ira is discovering.
>
> Vbus tries to commoditize more components in the stack (like the bus
> model and backend-device model) so they don't need to be redesigned each
> time we solve this "virtio-transport" problem. IOW: stop the
> proliferation of the need for pci-bus, lguest-bus, foo-bus underneath
> virtio. Instead, we can then focus on the value add on top, like the
> models themselves or the simple glue between them.
>
> So now you might have something like
>
> --------------------------
> | virtio-vbus
> --------------------------
> | vbus-proxy
> --------------------------
> | kvm-guest-connector
> --------------------------
> |
> --------------------------
> | kvm.ko
> --------------------------
> | kvm-host-connector.ko
> --------------------------
> | vbus.ko
> --------------------------
> | virtio-net-backend.ko
> --------------------------
>
> so now we don't need to worry about the bus-model or the device-model
> framework. We only need to implement the connector, etc. This is handy
> when you find yourself in an environment that doesn't support PCI (such
> as Ira's rig, or userspace containers), or when you want to add features
> that PCI doesn't have (such as fluid event channels for things like IPC
> services, or priortizable interrupts, etc).
>
Well, vbus does more, for example it tunnels interrupts instead of
exposing them 1:1 on the native interface if it exists. It also pulls
parts of the device model into the host kernel.
>> The virtio layering was more or less dictated by Xen which doesn't have
>> shared memory (it uses grant references instead). As a matter of fact
>> lguest, kvm/pci, and kvm/s390 all have shared memory, as you do, so that
>> part is duplicated. It's probably possible to add a virtio-shmem.ko
>> library that people who do have shared memory can reuse.
>>
> Note that I do not believe the Xen folk use virtio, so while I can
> appreciate the foresight that went into that particular aspect of the
> design of the virtio model, I am not sure if its a realistic constraint.
>
Since a virtio goal was to reduce virtual device driver proliferation,
it was necessary to accommodate Xen.
--
error compiling committee.c: too many arguments to function
--
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^ permalink raw reply
* Re: [PATCHv5 3/3] vhost_net: a kernel-level virtio server
From: Gregory Haskins @ 2009-09-23 14:26 UTC (permalink / raw)
To: Avi Kivity
Cc: Ira W. Snyder, Michael S. Tsirkin, netdev, virtualization, kvm,
linux-kernel, mingo, linux-mm, akpm, hpa, Rusty Russell, s.hetze,
alacrityvm-devel
In-Reply-To: <4AB89C48.4020903@redhat.com>
[-- Attachment #1: Type: text/plain, Size: 4551 bytes --]
Avi Kivity wrote:
> On 09/22/2009 12:43 AM, Ira W. Snyder wrote:
>>
>>> Sure, virtio-ira and he is on his own to make a bus-model under that, or
>>> virtio-vbus + vbus-ira-connector to use the vbus framework. Either
>>> model can work, I agree.
>>>
>>>
>> Yes, I'm having to create my own bus model, a-la lguest, virtio-pci, and
>> virtio-s390. It isn't especially easy. I can steal lots of code from the
>> lguest bus model, but sometimes it is good to generalize, especially
>> after the fourth implemention or so. I think this is what GHaskins tried
>> to do.
>>
>
> Yes. vbus is more finely layered so there is less code duplication.
To clarify, Ira was correct in stating this generalizing some of these
components was one of the goals for the vbus project: IOW vbus finely
layers and defines what's below virtio, not replaces it.
You can think of a virtio-stack like this:
--------------------------
| virtio-net
--------------------------
| virtio-ring
--------------------------
| virtio-bus
--------------------------
| ? undefined ?
--------------------------
IOW: The way I see it, virtio is a device interface model only. The
rest of it is filled in by the virtio-transport and some kind of back-end.
So today, we can complete the "? undefined ?" block like this for KVM:
--------------------------
| virtio-pci
--------------------------
|
--------------------------
| kvm.ko
--------------------------
| qemu
--------------------------
| tuntap
--------------------------
In this case, kvm.ko and tuntap are providing plumbing, and qemu is
providing a backend device model (pci-based, etc).
You can, of course, plug a different stack in (such as virtio-lguest,
virtio-ira, etc) but you are more or less on your own to recreate many
of the various facilities contained in that stack (such as things
provided by QEMU, like discovery/hotswap/addressing), as Ira is discovering.
Vbus tries to commoditize more components in the stack (like the bus
model and backend-device model) so they don't need to be redesigned each
time we solve this "virtio-transport" problem. IOW: stop the
proliferation of the need for pci-bus, lguest-bus, foo-bus underneath
virtio. Instead, we can then focus on the value add on top, like the
models themselves or the simple glue between them.
So now you might have something like
--------------------------
| virtio-vbus
--------------------------
| vbus-proxy
--------------------------
| kvm-guest-connector
--------------------------
|
--------------------------
| kvm.ko
--------------------------
| kvm-host-connector.ko
--------------------------
| vbus.ko
--------------------------
| virtio-net-backend.ko
--------------------------
so now we don't need to worry about the bus-model or the device-model
framework. We only need to implement the connector, etc. This is handy
when you find yourself in an environment that doesn't support PCI (such
as Ira's rig, or userspace containers), or when you want to add features
that PCI doesn't have (such as fluid event channels for things like IPC
services, or priortizable interrupts, etc).
>
> The virtio layering was more or less dictated by Xen which doesn't have
> shared memory (it uses grant references instead). As a matter of fact
> lguest, kvm/pci, and kvm/s390 all have shared memory, as you do, so that
> part is duplicated. It's probably possible to add a virtio-shmem.ko
> library that people who do have shared memory can reuse.
Note that I do not believe the Xen folk use virtio, so while I can
appreciate the foresight that went into that particular aspect of the
design of the virtio model, I am not sure if its a realistic constraint.
The reason why I decided to not worry about that particular model is
twofold:
1) Trying to support non shared-memory designs is prohibitively high for
my performance goals (for instance, requiring an exit on each
->add_buf() in addition to the ->kick()).
2) The Xen guys are unlikely to diverge from something like
xenbus/xennet anyway, so it would be for naught.
Therefore, I just went with a device model optimized for shared-memory
outright.
That said, I believe we can refactor what is called the
"vbus-proxy-device" into this virtio-shmem interface that you and
Anthony have described. We could make the feature optional and only
support on architectures where this makes sense.
<snip>
Kind Regards,
-Greg
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^ permalink raw reply
* Re: r8169, enabling TX checksumming breaks things?
From: Denys Fedoryschenko @ 2009-09-23 14:24 UTC (permalink / raw)
To: David Dillow; +Cc: romieu, netdev
In-Reply-To: <1253714544.3925.6.camel@lap75545.ornl.gov>
On Wednesday 23 September 2009 17:02:24 David Dillow wrote:
> On Wed, 2009-09-23 at 09:15 +0300, Denys Fedoryschenko wrote:
> > Hi
> >
> > Is it expected that:
> > 1)TX checksumming is off by default
> > 2)If i try to enable it over ethtool -K eth0 tx on , TCP sessions on
> > proxy getting stuck, even in tcpdump looks everything fine and packets
> > reaching destination, i don't understand what is a reason of failure.
> > Maybe if this feature supposed to not work - user must not be able just
> > to turn it on?
>
> It is broken for large swaths of the hardware -- I have patches that got
> it and TSO working on my hardware, and they provide a framework to see
> about getting it working on yours.
>
> Basically, the fields are in different places depending on the chip
> revision. I'll try to dig those out tonight and send them along so we
> can experiment.
Thanks, i have 8 hosts (4 hosts with RTL8168b/8111b. and 4 with
RTL8168d/8111d) to test. Ready for patches to test them :-)
^ permalink raw reply
* Re: r8169, enabling TX checksumming breaks things?
From: David Dillow @ 2009-09-23 14:02 UTC (permalink / raw)
To: Denys Fedoryschenko; +Cc: romieu, netdev
In-Reply-To: <200909230915.27854.denys@visp.net.lb>
On Wed, 2009-09-23 at 09:15 +0300, Denys Fedoryschenko wrote:
> Hi
>
> Is it expected that:
> 1)TX checksumming is off by default
> 2)If i try to enable it over ethtool -K eth0 tx on , TCP sessions on proxy
> getting stuck, even in tcpdump looks everything fine and packets reaching
> destination, i don't understand what is a reason of failure.
> Maybe if this feature supposed to not work - user must not be able just to
> turn it on?
It is broken for large swaths of the hardware -- I have patches that got
it and TSO working on my hardware, and they provide a framework to see
about getting it working on yours.
Basically, the fields are in different places depending on the chip
revision. I'll try to dig those out tonight and send them along so we
can experiment.
^ permalink raw reply
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