* Re: r8169 mac reading/writing broken
From: Timo Teräs @ 2010-03-27 12:16 UTC (permalink / raw)
To: François Romieu; +Cc: Ivan Vecera, netdev
In-Reply-To: <20100327120358.GA5114@electric-eye.fr.zoreil.com>
François Romieu wrote:
> Timo Teräs <timo.teras@iki.fi> :
> [...]
>> I don't think this would do anything. The high part is recorded correctly always.
>> It's the 'low' part that gets discarded. I can do similar test if writing it
>> more times will help. Will post results soon.
>
> You may check whether writing MAC4 before MAC0 makes a difference
> or not as well.
It seems that adding single printk between writing MAC0 and MAC4 fixes it.
I guess it needs a bit of delay between the writes or something.
^ permalink raw reply
* Re: Seeing new kernel unaligned access messages in linux-next on ia64
From: Jan Engelhardt @ 2010-03-27 12:14 UTC (permalink / raw)
To: David Miller; +Cc: schwab, tony.luck, netdev
In-Reply-To: <20100324.203249.97351120.davem@davemloft.net>
On Thursday 2010-03-25 04:32, David Miller wrote:
>From: Jan Engelhardt
>Date: Thu, 25 Mar 2010 00:17:01 +0100 (CET)
>
>> No more unaligned messages - but is this [using void*]
>> an acceptable solution?
>
>We already rely on this elsewhere, particularly in the
>xfrm_user code.
Ok, here's it. (We're also getting rid of the double-obtain statistics
that was mentioned in the initial submission.)
Please apply this one, or pull, or cherry-pick from
git://dev.medozas.de/linux net
parent b79d1d54cf0672f764402fe4711ef5306f917bd3 (v2.6.34-rc1-1275-gb79d1d5)
commit c5c57d7c7837858aa499610a3ee760b39f1de937
Author: Jan Engelhardt <jengelh@medozas.de>
Date: Wed Mar 24 19:52:43 2010 +0100
net: fix unaligned access in IFLA_STATS64
Tony Luck observes that the original IFLA_STATS64 submission causes
unaligned accesses. This is because nla_data() returns a pointer to a
memory region that is only aligned to 32 bits. Do some memcpying to
workaround this.
Signed-off-by: Jan Engelhardt <jengelh@medozas.de>
---
net/core/rtnetlink.c | 54 +++++++++++++++++++++---------------------
1 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index ffc6cf3..ed0766f 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -602,36 +602,38 @@ static void copy_rtnl_link_stats(struct rtnl_link_stats *a,
a->tx_compressed = b->tx_compressed;
}
-static void copy_rtnl_link_stats64(struct rtnl_link_stats64 *a,
- const struct net_device_stats *b)
+static void copy_rtnl_link_stats64(void *v, const struct net_device_stats *b)
{
- a->rx_packets = b->rx_packets;
- a->tx_packets = b->tx_packets;
- a->rx_bytes = b->rx_bytes;
- a->tx_bytes = b->tx_bytes;
- a->rx_errors = b->rx_errors;
- a->tx_errors = b->tx_errors;
- a->rx_dropped = b->rx_dropped;
- a->tx_dropped = b->tx_dropped;
-
- a->multicast = b->multicast;
- a->collisions = b->collisions;
-
- a->rx_length_errors = b->rx_length_errors;
- a->rx_over_errors = b->rx_over_errors;
- a->rx_crc_errors = b->rx_crc_errors;
- a->rx_frame_errors = b->rx_frame_errors;
- a->rx_fifo_errors = b->rx_fifo_errors;
- a->rx_missed_errors = b->rx_missed_errors;
-
- a->tx_aborted_errors = b->tx_aborted_errors;
- a->tx_carrier_errors = b->tx_carrier_errors;
- a->tx_fifo_errors = b->tx_fifo_errors;
- a->tx_heartbeat_errors = b->tx_heartbeat_errors;
- a->tx_window_errors = b->tx_window_errors;
-
- a->rx_compressed = b->rx_compressed;
- a->tx_compressed = b->tx_compressed;
+ struct rtnl_link_stats64 a;
+
+ a.rx_packets = b->rx_packets;
+ a.tx_packets = b->tx_packets;
+ a.rx_bytes = b->rx_bytes;
+ a.tx_bytes = b->tx_bytes;
+ a.rx_errors = b->rx_errors;
+ a.tx_errors = b->tx_errors;
+ a.rx_dropped = b->rx_dropped;
+ a.tx_dropped = b->tx_dropped;
+
+ a.multicast = b->multicast;
+ a.collisions = b->collisions;
+
+ a.rx_length_errors = b->rx_length_errors;
+ a.rx_over_errors = b->rx_over_errors;
+ a.rx_crc_errors = b->rx_crc_errors;
+ a.rx_frame_errors = b->rx_frame_errors;
+ a.rx_fifo_errors = b->rx_fifo_errors;
+ a.rx_missed_errors = b->rx_missed_errors;
+
+ a.tx_aborted_errors = b->tx_aborted_errors;
+ a.tx_carrier_errors = b->tx_carrier_errors;
+ a.tx_fifo_errors = b->tx_fifo_errors;
+ a.tx_heartbeat_errors = b->tx_heartbeat_errors;
+ a.tx_window_errors = b->tx_window_errors;
+
+ a.rx_compressed = b->rx_compressed;
+ a.tx_compressed = b->tx_compressed;
+ memcpy(v, &a, sizeof(a));
}
static inline int rtnl_vfinfo_size(const struct net_device *dev)
@@ -734,8 +736,6 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
sizeof(struct rtnl_link_stats64));
if (attr == NULL)
goto nla_put_failure;
-
- stats = dev_get_stats(dev);
copy_rtnl_link_stats64(nla_data(attr), stats);
if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent) {
--
# Created with git-export-patch
^ permalink raw reply related
* Re: r8169 mac reading/writing broken
From: François Romieu @ 2010-03-27 12:03 UTC (permalink / raw)
To: Timo Teräs; +Cc: Ivan Vecera, netdev
In-Reply-To: <4BADF01E.9090906@iki.fi>
Timo Teräs <timo.teras@iki.fi> :
[...]
> I don't think this would do anything. The high part is recorded correctly always.
> It's the 'low' part that gets discarded. I can do similar test if writing it
> more times will help. Will post results soon.
You may check whether writing MAC4 before MAC0 makes a difference
or not as well.
--
Ueimor
^ permalink raw reply
* Re: [Regression] r8169: enable 64-bit DMA by default for PCI Express devices (v2)
From: =?unknown-8bit?B?RnJhbsOnb2lz?= Romieu @ 2010-03-27 11:57 UTC (permalink / raw)
To: Robert Hancock
Cc: =?unknown-8bit?B?77+9?= Engel, David Miller, torvalds,
linux-kernel, netdev
In-Reply-To: <4BAD65A0.7090309@gmail.com>
Robert Hancock <hancockrwd@gmail.com> :
[...]
> I suppose a publicly accessible datasheet for these chips is too
> much to hope for ?
I was granted access to some documentation for the 8169 and the 8168c
during the "please ask gently and don't disseminate" era then
experienced "the legal department forbids it" for the 8102.
hayeswang at realtek.com is quite supportive though.
--
Ueimor
^ permalink raw reply
* Re: r8169 mac reading/writing broken
From: Timo Teräs @ 2010-03-27 11:46 UTC (permalink / raw)
To: François Romieu; +Cc: Ivan Vecera, netdev
In-Reply-To: <20100327114059.GA3432@electric-eye.fr.zoreil.com>
François Romieu wrote:
> Timo Teräs <timo.teras@iki.fi> :
> [...]
>> I did some more testing, and added debugging info to rtl_rar_set(). It would
>> appear that even if I write any mac address (with ifconfig) and reread the
>> MAC0..MAC5 register, the first four bytes get zeroed. So it would sounds like
>> the hardware is faulty, or that the rtl_rar_set function is buggy.
>>
>> Any suggestions to fix this ?
>
> Try something like the patch below and please send a complete lspci -vvv.
Attached at the end.
> I wonder what the bus controler looks like.
>
> diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
> index 9d3ebf3..5db357a 100644
> --- a/drivers/net/r8169.c
> +++ b/drivers/net/r8169.c
> @@ -2814,6 +2814,7 @@ static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
> void __iomem *ioaddr = tp->mmio_addr;
> u32 high;
> u32 low;
> + int i;
>
> low = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24);
> high = addr[4] | (addr[5] << 8);
> @@ -2822,7 +2823,17 @@ static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
>
> RTL_W8(Cfg9346, Cfg9346_Unlock);
> RTL_W32(MAC0, low);
> - RTL_W32(MAC4, high);
> + for (i = 0; i < 16; i++) {
> + u32 read;
> +
> + RTL_W32(MAC4, high);
> + read = RTL_R32(MAC4);
> + if (read != high) {
> + printk(KERN_ERR PFX
> + "failure %02d: read = 0x%08x, write = 0x%08x\n",
> + i, read, high);
> + }
> + }
> RTL_W8(Cfg9346, Cfg9346_Lock);
>
> spin_unlock_irq(&tp->lock);
I don't think this would do anything. The high part is recorded correctly always.
It's the 'low' part that gets discarded. I can do similar test if writing it
more times will help. Will post results soon.
- Timo
00:00.0 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge
Subsystem: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR+ INTx-
Latency: 8
Region 0: Memory at e8000000 (32-bit, prefetchable) [size=128M]
Capabilities: [80] AGP version 3.5
Status: RQ=8 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW+ AGP3+ Rate=x4,x8
Command: RQ=1 ArqSz=0 Cal=0 SBA- AGP- GART64- 64bit- FW- Rate=<none>
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: agpgart-via
00:00.1 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:00.2 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:00.3 Host bridge: VIA Technologies, Inc. PT890 Host Bridge
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:00.4 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:00.7 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.0 PCI bridge: VIA Technologies, Inc. VT8237/VX700 PCI Bridge (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: fb000000-fcffffff
Prefetchable memory behind bridge: f4000000-f7ffffff
Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR+ <PERR+
BridgeCtl: Parity- SERR- NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [70] Power Management version 2
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
00:09.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC Gigabit Ethernet (rev 10)
Subsystem: Jetway Information Co., Ltd. Device 10ec
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (8000ns min, 16000ns max), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 18
Region 0: I/O ports at f200 [size=256]
Region 1: Memory at fdfff000 (32-bit, non-prefetchable) [size=256]
[virtual] Expansion ROM at 3c000000 [disabled] [size=128K]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: r8169
00:0a.0 FireWire (IEEE 1394): VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller (rev 80) (prog-if 10 [OHCI])
Subsystem: VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32 (8000ns max), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 19
Region 0: Memory at fdffe000 (32-bit, non-prefetchable) [size=2K]
Region 1: I/O ports at ff00 [size=128]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: firewire_ohci
00:0b.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC Gigabit Ethernet (rev 10)
Subsystem: Jetway Information Co., Ltd. Device 10ec
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (8000ns min, 16000ns max), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 19
Region 0: I/O ports at f000 [size=256]
Region 1: Memory at fdffd000 (32-bit, non-prefetchable) [size=256]
[virtual] Expansion ROM at 3c020000 [disabled] [size=128K]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: r8169
00:0c.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC Gigabit Ethernet (rev 10)
Subsystem: Jetway Information Co., Ltd. Device 10ec
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (8000ns min, 16000ns max), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 16
Region 0: I/O ports at ec00 [size=256]
Region 1: Memory at fdffc000 (32-bit, non-prefetchable) [size=256]
[virtual] Expansion ROM at 3c040000 [disabled] [size=128K]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: r8169
00:0f.0 IDE interface: VIA Technologies, Inc. VIA VT6420 SATA RAID Controller (rev 80) (prog-if 8f [Master SecP SecO PriP PriO])
Subsystem: VIA Technologies, Inc. VIA VT6420 SATA RAID Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32
Interrupt: pin B routed to IRQ 20
Region 0: I/O ports at fe00 [size=8]
Region 1: I/O ports at fd00 [size=4]
Region 2: I/O ports at fc00 [size=8]
Region 3: I/O ports at fb00 [size=4]
Region 4: I/O ports at fa00 [size=16]
Region 5: I/O ports at ee00 [size=256]
Capabilities: [c0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: sata_via
00:0f.1 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE (rev 06) (prog-if 8a [Master SecP PriP])
Subsystem: VIA Technologies, Inc. VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32
Interrupt: pin A routed to IRQ 20
Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8]
Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1]
Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8]
Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1]
Region 4: I/O ports at f900 [size=16]
Capabilities: [c0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pata_via
00:10.0 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) (prog-if 00 [UHCI])
Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 21
Region 4: I/O ports at f800 [size=32]
Capabilities: [80] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: uhci_hcd
00:10.1 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) (prog-if 00 [UHCI])
Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 21
Region 4: I/O ports at f700 [size=32]
Capabilities: [80] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: uhci_hcd
00:10.2 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) (prog-if 00 [UHCI])
Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32, Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 21
Region 4: I/O ports at f600 [size=32]
Capabilities: [80] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: uhci_hcd
00:10.3 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) (prog-if 00 [UHCI])
Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32, Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 21
Region 4: I/O ports at f500 [size=32]
Capabilities: [80] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: uhci_hcd
00:10.4 USB Controller: VIA Technologies, Inc. USB 2.0 (rev 86) (prog-if 20 [EHCI])
Subsystem: VIA Technologies, Inc. USB 2.0
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32, Cache Line Size: 64 bytes
Interrupt: pin C routed to IRQ 21
Region 0: Memory at fdffb000 (32-bit, non-prefetchable) [size=256]
Capabilities: [80] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: ehci_hcd
00:11.0 ISA bridge: VIA Technologies, Inc. VT8237 ISA bridge [KT600/K8T800/K8T890 South]
Subsystem: VIA Technologies, Inc. DFI KT600-AL / Soltek SL-B9D-FGR Motherboard
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [c0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
00:11.5 Multimedia audio controller: VIA Technologies, Inc. VT8233/A/8235/8237 AC97 Audio Controller (rev 60)
Subsystem: Jetway Information Co., Ltd. Device 4170
Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 22
Region 0: I/O ports at ea00 [size=256]
Capabilities: [c0] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: VIA 82xx Audio
00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 78)
Subsystem: VIA Technologies, Inc. VT6102 [Rhine II] Embeded Ethernet Controller on VT8235
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32 (750ns min, 2000ns max), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 23
Region 0: I/O ports at e800 [size=256]
Region 1: Memory at fdffa000 (32-bit, non-prefetchable) [size=256]
Capabilities: [40] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: via-rhine
01:00.0 VGA compatible controller: VIA Technologies, Inc. CN700/P4M800 Pro/P4M800 CE/VN800 [S3 UniChrome Pro] (rev 01) (prog-if 00 [VGA controller])
Subsystem: VIA Technologies, Inc. CN700/P4M800 Pro/P4M800 CE/VN800 [S3 UniChrome Pro]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 32 (500ns min)
Interrupt: pin A routed to IRQ 5
Region 0: Memory at f4000000 (32-bit, prefetchable) [size=64M]
Region 1: Memory at fb000000 (32-bit, non-prefetchable) [size=16M]
[virtual] Expansion ROM at fc000000 [disabled] [size=64K]
Capabilities: [60] Power Management version 2
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] AGP version 3.0
Status: RQ=256 Iso- ArqSz=0 Cal=7 SBA+ ITACoh- GART64- HTrans- 64bit- FW- AGP3+ Rate=x4,x8
Command: RQ=1 ArqSz=0 Cal=0 SBA+ AGP- GART64- 64bit- FW- Rate=<none>
^ permalink raw reply
* Re: r8169 mac reading/writing broken
From: François Romieu @ 2010-03-27 11:40 UTC (permalink / raw)
To: Timo Teräs; +Cc: Ivan Vecera, netdev
In-Reply-To: <4BADDDB7.4010005@iki.fi>
Timo Teräs <timo.teras@iki.fi> :
[...]
> I did some more testing, and added debugging info to rtl_rar_set(). It would
> appear that even if I write any mac address (with ifconfig) and reread the
> MAC0..MAC5 register, the first four bytes get zeroed. So it would sounds like
> the hardware is faulty, or that the rtl_rar_set function is buggy.
>
> Any suggestions to fix this ?
Try something like the patch below and please send a complete lspci -vvv.
I wonder what the bus controler looks like.
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 9d3ebf3..5db357a 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -2814,6 +2814,7 @@ static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
void __iomem *ioaddr = tp->mmio_addr;
u32 high;
u32 low;
+ int i;
low = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24);
high = addr[4] | (addr[5] << 8);
@@ -2822,7 +2823,17 @@ static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
RTL_W8(Cfg9346, Cfg9346_Unlock);
RTL_W32(MAC0, low);
- RTL_W32(MAC4, high);
+ for (i = 0; i < 16; i++) {
+ u32 read;
+
+ RTL_W32(MAC4, high);
+ read = RTL_R32(MAC4);
+ if (read != high) {
+ printk(KERN_ERR PFX
+ "failure %02d: read = 0x%08x, write = 0x%08x\n",
+ i, read, high);
+ }
+ }
RTL_W8(Cfg9346, Cfg9346_Lock);
spin_unlock_irq(&tp->lock);
^ permalink raw reply related
* [PATCH net-next-2.6] ipv6 fib: Use "Sweezle" to optimize addr_bit_test().
From: YOSHIFUJI Hideaki @ 2010-03-27 11:24 UTC (permalink / raw)
To: davem; +Cc: yoshfuji, netdev
addr_bit_test() is used in various places in IPv6 routing table
subsystem. It checks if the given fn_bit is set,
where fn_bit counts bits from MSB in words in network-order.
fn_bit : 0 .... 31 32 .... 64 65 .... 95 96 ....127
fn_bit >> 5 gives offset of word, and (~fn_bit & 0x1f) gives
count from LSB in the network-endian word in question.
fn_bit >> 5 : 0 1 2 3
~fn_bit & 0x1f: 31 .... 0 31 .... 0 31 .... 0 31 .... 0
Thus, the mask was generated as htonl(1 << (~fn_bit & 0x1f)).
This can be optimized by "sweezle" (See include/asm-generic/bitops/le.h).
In little-endian,
htonl(1 << bit) = 1 << (bit ^ BITOP_BE32_SWIZZLE)
where
BITOP_BE32_SWIZZLE is (0x1f & ~7)
So,
htonl(1 << (~fn_bit & 0x1f)) = 1 << ((~fn_bit & 0x1f) ^ (0x1f & ~7))
= 1 << ((~fn_bit ^ ~7) & 0x1f)
= 1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)
In big-endian, BITOP_BE32_SWIZZLE is equal to 0.
1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)
= 1 << ((~fn_bit) & 0x1f)
= htonl(1 << (~fn_bit & 0x1f))
Signed-off-by: YOSHIFUJI Hideaki <yoshfuji@linux-ipv6.org>
---
net/ipv6/ip6_fib.c | 15 +++++++++++++--
1 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/net/ipv6/ip6_fib.c b/net/ipv6/ip6_fib.c
index 2f98479..68119ef 100644
--- a/net/ipv6/ip6_fib.c
+++ b/net/ipv6/ip6_fib.c
@@ -127,12 +127,23 @@ static __inline__ u32 fib6_new_sernum(void)
/*
* test bit
*/
+#if defined(__LITTLE_ENDIAN)
+# define BITOP_BE32_SWIZZLE (0x1F & ~7)
+#else
+# define BITOP_BE32_SWIZZLE 0
+#endif
static __inline__ __be32 addr_bit_set(void *token, int fn_bit)
{
__be32 *addr = token;
-
- return htonl(1 << ((~fn_bit)&0x1F)) & addr[fn_bit>>5];
+ /*
+ * Here,
+ * 1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)
+ * is optimized version of
+ * htonl(1 << ((~fn_bit)&0x1F))
+ * See include/asm-generic/bitops/le.h.
+ */
+ return (1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & addr[fn_bit >> 5];
}
static __inline__ struct fib6_node * node_alloc(void)
--
1.5.6.5
^ permalink raw reply related
* r8169 mac reading/writing broken
From: Timo Teräs @ 2010-03-27 10:28 UTC (permalink / raw)
To: Francois Romieu, Ivan Vecera, netdev
It seems that my r8169 mac address is lost when r8169 module is reloaded,
or system is soft rebooted. Hard power reset recovers the mac address again.
The commit cc098dc705895f6b0109b7e8e026ac2b8ae1c0a1 (r8169: restore mac addr
in rtl8169_remove_one and rtl_shutdown) seems to have broken it. The first four
bytes of mac address go zeroes because of this.
I did some more testing, and added debugging info to rtl_rar_set(). It would
appear that even if I write any mac address (with ifconfig) and reread the
MAC0..MAC5 register, the first four bytes get zeroed. So it would sounds like
the hardware is faulty, or that the rtl_rar_set function is buggy.
Any suggestions to fix this?
The hardware in question is a 3-in-1 NIC. Each three PCI devices shows up as
something like:
00:09.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC Gigabit Ethernet [10ec:8167] (rev 10)
Subsystem: Jetway Information Co., Ltd. Device [16f3:10ec]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (8000ns min, 16000ns max), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 18
Region 0: I/O ports at f200 [size=256]
Region 1: Memory at fdfff000 (32-bit, non-prefetchable) [size=256]
[virtual] Expansion ROM at 3c000000 [disabled] [size=128K]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: r8169
And the kernel drivers prints the following at startup:
r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
r8169 0000:00:09.0: PCI->APIC IRQ transform: INT A -> IRQ 18
r8169 0000:00:09.0: no PCI Express capability
eth0: RTL8169sc/8110sc at 0xf81ae000, 00:30:18:a6:2b:6c, XID 18000000 IRQ 18
r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
r8169 0000:00:0b.0: PCI->APIC IRQ transform: INT A -> IRQ 19
r8169 0000:00:0b.0: no PCI Express capability
eth1: RTL8169sc/8110sc at 0xf81b2000, 00:30:18:a6:2b:6d, XID 18000000 IRQ 19
r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
r8169 0000:00:0c.0: PCI->APIC IRQ transform: INT A -> IRQ 16
r8169 0000:00:0c.0: no PCI Express capability
eth2: RTL8169sc/8110sc at 0xf81b6000, 00:30:18:a6:2b:6e, XID 18000000 IRQ 16
- Timo
^ permalink raw reply
* Re: [Regression] r8169: enable 64-bit DMA by default for PCI Express devices (v2)
From: J�rn Engel @ 2010-03-27 6:38 UTC (permalink / raw)
To: Robert Hancock; +Cc: David Miller, torvalds, linux-kernel, netdev, romieu
In-Reply-To: <4BAD65A0.7090309@gmail.com>
On Fri, 26 March 2010 19:55:44 -0600, Robert Hancock wrote:
>
> Well, that one's 36 bits, but it's unclear whether that driver would
> actually be likely to access anything over 4GB. It's possible that
> there's just some general problem with 64-bit DMA on that machine.
That may very well be. I've had trouble using a PCIe card in that
machine as well. "Solution" was to buy a different computer. Sad, I
know, but not my money.
> The fact that even stuff like lspci and MII is breaking seems odd,
> though. It could be that model of card doesn't like the PCIDAC register
> bit being set (maybe it means something different on that model, or
> something).
>
> I suppose a publicly accessible datasheet for these chips is too much to
> hope for?
Which chips?
J�rn
^ permalink raw reply
* [PATCH] e1000e: typo corrections
From: Joe Perches @ 2010-03-27 6:16 UTC (permalink / raw)
To: David Miller; +Cc: jeffrey.t.kirsher, netdev, gospo, bruce.w.allan
In-Reply-To: <20100326.210555.251082007.davem@davemloft.net>
Here are the other miscellaneous corrections
done by an earlier larger suggested patch now
made unnecessary by a less invasive change.
Correct a few missing newlines from logging
messages and a typo fix. Fix speed/duplex
logging message.
Signed-off-by: Joe Perches <joe@perches.com>
---
drivers/net/e1000e/82571.c | 2 +-
drivers/net/e1000e/ich8lan.c | 6 +++---
drivers/net/e1000e/lib.c | 21 +++++++++------------
3 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 712ccc6..4b0016d 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -323,7 +323,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
}
/*
- * Initialze device specific counter of SMBI acquisition
+ * Initialize device specific counter of SMBI acquisition
* timeouts.
*/
hw->dev_spec.e82571.smb_counter = 0;
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 8b5e157..5059c22 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -1622,7 +1622,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
/* Check if the flash descriptor is valid */
if (hsfsts.hsf_status.fldesvalid == 0) {
e_dbg("Flash descriptor invalid. "
- "SW Sequencing must be used.");
+ "SW Sequencing must be used.\n");
return -E1000_ERR_NVM;
}
@@ -1671,7 +1671,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
hsfsts.hsf_status.flcdone = 1;
ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval);
} else {
- e_dbg("Flash controller busy, cannot get access");
+ e_dbg("Flash controller busy, cannot get access\n");
}
}
@@ -1822,7 +1822,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
continue;
} else if (hsfsts.hsf_status.flcdone == 0) {
e_dbg("Timeout error - flash cycle "
- "did not complete.");
+ "did not complete.\n");
break;
}
}
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index a8b2c0d..b0d2a60 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -1262,24 +1262,21 @@ s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *dup
u32 status;
status = er32(STATUS);
- if (status & E1000_STATUS_SPEED_1000) {
+ if (status & E1000_STATUS_SPEED_1000)
*speed = SPEED_1000;
- e_dbg("1000 Mbs, ");
- } else if (status & E1000_STATUS_SPEED_100) {
+ else if (status & E1000_STATUS_SPEED_100)
*speed = SPEED_100;
- e_dbg("100 Mbs, ");
- } else {
+ else
*speed = SPEED_10;
- e_dbg("10 Mbs, ");
- }
- if (status & E1000_STATUS_FD) {
+ if (status & E1000_STATUS_FD)
*duplex = FULL_DUPLEX;
- e_dbg("Full Duplex\n");
- } else {
+ else
*duplex = HALF_DUPLEX;
- e_dbg("Half Duplex\n");
- }
+
+ e_dbg("%u Mbps, %s Duplex\n",
+ *speed == SPEED_1000 ? 1000 : *speed == SPEED_100 ? 100 : 10,
+ *duplex == FULL_DUPLEX ? "Full" : "Half");
return 0;
}
^ permalink raw reply related
* Re: Null dereference in uli526x_rx_packet()
From: Grant Grundler @ 2010-03-27 6:08 UTC (permalink / raw)
To: David Miller; +Cc: grundler, kyle, netdev, error27
In-Reply-To: <20100326.202125.238456279.davem@davemloft.net>
On Fri, Mar 26, 2010 at 08:21:25PM -0700, David Miller wrote:
> From: Grant Grundler <grundler@parisc-linux.org>
> Date: Sun, 7 Feb 2010 00:15:40 -0700
>
> > On Sat, Mar 28, 2009 at 11:59:31PM -0700, David Miller wrote:
> > ...
> >> > Patch below looks right to me. Clobbering the skb is certainly wrong.
> >> >
> >> > Acked-by: Grant Grundler <grundler@parisc-linux.org>
> >>
> >> It looks correct to me, can we get a proper submission with
> >> signoffs etc.?
> >
> > Dave,
> > Looks like this patch was never resubmitted.
> >
> > Kyle, can you look at http://lists.openwall.net/netdev/2009/03/27/117
> > and resubmit the code you had then with my "Acked-by" added please?
> >
> > Or if you don't want to touch it, let me know and I'll resurrect it.
>
> I got tired of waiting for this resubmission (a month and a half) and
> just applied the most recent version of the patch to net-2.6.
>
> It looked correct to me too.
Thank you!
grant
^ permalink raw reply
* Re: [PATCH v2] Add MSG_WAITFORONE flag to recvmmsg
From: Eric Dumazet @ 2010-03-27 6:00 UTC (permalink / raw)
To: Brandon L Black
Cc: netdev, David S. Miller, Arnaldo Carvalho de Melo, Ulrich Drepper,
linux-kernel
In-Reply-To: <20100327021803.GA10866@xpc.home>
Le vendredi 26 mars 2010 à 21:18 -0500, Brandon L Black a écrit :
> From: Brandon L Black <blblack@gmail.com>
>
> Add new flag MSG_WAITFORONE for the recvmmsg() syscall.
> When this flag is specified for a blocking socket, recvmmsg()
> will only block until at least 1 packet is available. The
> default behavior is to block until all vlen packets are
> available. This flag has no effect on non-blocking sockets
> or when used in combination with MSG_DONTWAIT.
>
> Signed-off-by: Brandon L Black <blblack@gmail.com>
>
Acked-by: Eric Dumazet <eric.dumazet@gmail.com>
> ---
> diff --git a/include/linux/socket.h b/include/linux/socket.h
> index 7b3aae2..354cc56 100644
> --- a/include/linux/socket.h
> +++ b/include/linux/socket.h
> @@ -255,6 +255,7 @@ struct ucred {
> #define MSG_ERRQUEUE 0x2000 /* Fetch message from error queue */
> #define MSG_NOSIGNAL 0x4000 /* Do not generate SIGPIPE */
> #define MSG_MORE 0x8000 /* Sender will send more */
> +#define MSG_WAITFORONE 0x10000 /* recvmmsg(): block until 1+ packets avail */
>
> #define MSG_EOF MSG_FIN
>
> diff --git a/net/socket.c b/net/socket.c
> index 769c386..f55ffe9 100644
> --- a/net/socket.c
> +++ b/net/socket.c
> @@ -2135,6 +2135,10 @@ int __sys_recvmmsg(int fd, struct mmsghdr __user *mmsg, unsigned int vlen,
> break;
> ++datagrams;
>
> + /* MSG_WAITFORONE turns on MSG_DONTWAIT after one packet */
> + if (flags & MSG_WAITFORONE)
> + flags |= MSG_DONTWAIT;
> +
> if (timeout) {
> ktime_get_ts(timeout);
> *timeout = timespec_sub(end_time, *timeout);
> --
^ permalink raw reply
* Re: [PATCH v2] Add MSG_WAITFORONE flag to recvmmsg
From: Ulrich Drepper @ 2010-03-27 4:58 UTC (permalink / raw)
To: Brandon L Black
Cc: netdev, David S. Miller, Arnaldo Carvalho de Melo, linux-kernel
In-Reply-To: <20100327021803.GA10866@xpc.home>
On Fri, Mar 26, 2010 at 19:18, Brandon L Black <blblack@gmail.com> wrote:
> Add new flag MSG_WAITFORONE for the recvmmsg() syscall.
> When this flag is specified for a blocking socket, recvmmsg()
> will only block until at least 1 packet is available. The
> default behavior is to block until all vlen packets are
> available. This flag has no effect on non-blocking sockets
> or when used in combination with MSG_DONTWAIT.
>
> Signed-off-by: Brandon L Black <blblack@gmail.com>
This is useful and looks OK to me.
Acked-by: Ulrich Drepper <drepper@redhat.com>
^ permalink raw reply
* Re: [PATCH] e1000e: Use pr_<level> and netdev_<level>
From: David Miller @ 2010-03-27 4:05 UTC (permalink / raw)
To: jeffrey.t.kirsher; +Cc: netdev, gospo, joe, bruce.w.allan
In-Reply-To: <20100324225529.7104.17189.stgit@localhost.localdomain>
From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Date: Wed, 24 Mar 2010 15:55:30 -0700
> From: Bruce Allan <bruce.w.allan@intel.com>
>
> As an alternative to a quite large patch previously submitted by Joe
> Perches to make use of kernel logging API, this patch is much less
> intrusive.
>
> Convert e_<level> to netdev_<level>
> Use #define pr_fmt
> Convert a few printks to pr_<level>
>
> Cc: Joe Perches <joe@perches.com>
> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Applied to net-next-2.6
^ permalink raw reply
* Re: [PATCH] e1000e: do not modify tx_queue_len on link speed change
From: David Miller @ 2010-03-27 4:05 UTC (permalink / raw)
To: jeffrey.t.kirsher; +Cc: netdev, gospo, franco, emil.s.tantilov
In-Reply-To: <20100324225501.7104.28849.stgit@localhost.localdomain>
From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Date: Wed, 24 Mar 2010 15:55:02 -0700
> From: Emil Tantilov <emil.s.tantilov@intel.com>
>
> Previously the driver tweaked txqueuelen to avoid false Tx hang reports seen at half duplex.
> This had the effect of overriding user set values on link change/reset. Testing shows that
> adjusting only the timeout factor is sufficient to prevent Tx hang reports at half duplex.
>
> This patch removes all instances of tx_queue_len in the driver.
>
> Originally reported and patched by Franco Fichtner
> CC: Franco Fichtner <franco@lastsummer.de>
> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Applied to net-2.6
^ permalink raw reply
* Re: [net-2.6 PATCH] igbvf: do not modify tx_queue_len on link speed change
From: David Miller @ 2010-03-27 4:01 UTC (permalink / raw)
To: jeffrey.t.kirsher; +Cc: netdev, gospo, franco, emil.s.tantilov
In-Reply-To: <20100325221120.8756.51559.stgit@localhost.localdomain>
From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Date: Thu, 25 Mar 2010 15:11:48 -0700
> From: Emil Tantilov <emil.s.tantilov@intel.com>
>
> Previously the driver tweaked txqueuelen to avoid false Tx hang reports seen at half duplex.
> This had the effect of overriding user set values on link change/reset. Testing shows that
> adjusting only the timeout factor is sufficient to prevent Tx hang reports at half duplex.
>
> Based on e1000e patch by Franco Fichtner <franco@lastsummer.de>
>
> CC: Franco Fichtner <franco@lastsummer.de>
> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Applied.
^ permalink raw reply
* Re: [net-2.6 PATCH] ixgbe: fix bug with vlan strip in promsic mode
From: David Miller @ 2010-03-27 4:00 UTC (permalink / raw)
To: jeffrey.t.kirsher; +Cc: netdev, gospo, jesse.brandeburg
In-Reply-To: <20100325213428.8089.1879.stgit@localhost.localdomain>
Doesn't apply.
It depends upon the mc_list traversal conversions which are
absolutely not appropriate for net-2.6, and thus I only
applied to net-next-2.6
^ permalink raw reply
* Re: [PATCH 2/2] ipv4: Restart rt_intern_hash after emergency rebuild (v2)
From: David Miller @ 2010-03-27 3:58 UTC (permalink / raw)
To: nhorman; +Cc: xemul, dada1, netdev
In-Reply-To: <20100325131721.GA17675@shamino.rdu.redhat.com>
From: Neil Horman <nhorman@tuxdriver.com>
Date: Thu, 25 Mar 2010 09:17:21 -0400
> On Thu, Mar 25, 2010 at 10:51:22AM +0300, Pavel Emelyanov wrote:
>> The the rebuild changes the genid which in turn is used at
>> the hash calculation. Thus if we don't restart and go on with
>> inserting the rt will happen in wrong chain.
>>
>> (Fixed Neil's comment about the index passed into the rt_intern_hash)
>>
>> Signed-off-by: Pavel Emelyanov <xemul@openvz.org>
> Thanks! I think this is pretty reasonable.
> Reviewed-by: Neil Horman <nhorman@tuxdriver.com>
Applied, thanks.
^ permalink raw reply
* Re: [PATCH 1/2] ipv4: Cleanup struct net dereference in rt_intern_hash
From: David Miller @ 2010-03-27 3:58 UTC (permalink / raw)
To: xemul; +Cc: dada1, nhorman, netdev
In-Reply-To: <4BAA4F35.3000903@openvz.org>
From: Pavel Emelyanov <xemul@openvz.org>
Date: Wed, 24 Mar 2010 20:43:17 +0300
> There's no need in getting it 3 times and gcc isn't smart enough
> to understand this himself.
>
> This is just a cleanup before the fix (next patch).
>
> Signed-off-by: Pavel Emelyanov <xemul@openvz.org>
Applied.
^ permalink raw reply
* Re: [PATCH v2] Add MSG_WAITFORONE flag to recvmmsg
From: David Miller @ 2010-03-27 3:54 UTC (permalink / raw)
To: blblack; +Cc: netdev, acme, drepper, linux-kernel
In-Reply-To: <20100327021803.GA10866@xpc.home>
From: Brandon L Black <blblack@gmail.com>
Date: Fri, 26 Mar 2010 21:18:03 -0500
>
> From: Brandon L Black <blblack@gmail.com>
>
> Add new flag MSG_WAITFORONE for the recvmmsg() syscall.
> When this flag is specified for a blocking socket, recvmmsg()
> will only block until at least 1 packet is available. The
> default behavior is to block until all vlen packets are
> available. This flag has no effect on non-blocking sockets
> or when used in combination with MSG_DONTWAIT.
>
> Signed-off-by: Brandon L Black <blblack@gmail.com>
Arnaldo, please review this, thanks.
^ permalink raw reply
* Re: [PATCH] e1000e: Use pr_<level> and netdev_<level>
From: David Miller @ 2010-03-27 3:52 UTC (permalink / raw)
To: joe; +Cc: bruce.w.allan, jeffrey.t.kirsher, netdev, gospo
In-Reply-To: <1269475474.1541.20.camel@Joe-Laptop.home>
From: Joe Perches <joe@perches.com>
Date: Wed, 24 Mar 2010 17:04:34 -0700
> hw and adapter are locally scoped in each function here,
> but are not local to the macro. That can make conversions
> of macros to functions difficult.
This is pretty common practice in drivers though.
Especially for register accessors and whatnot, and I see no problem
doing it here.
All specifying these args explicitly will do is make the fingers move
one step closer to carpel tunnel. :-)
^ permalink raw reply
* Re: [PATCH] net: fix netlink address dumping in IPv4/IPv6
From: David Miller @ 2010-03-27 3:36 UTC (permalink / raw)
To: kaber; +Cc: netdev
In-Reply-To: <20100326.202828.165365437.davem@davemloft.net>
From: David Miller <davem@davemloft.net>
Date: Fri, 26 Mar 2010 20:28:28 -0700 (PDT)
>
> Applied, thanks.
BTW, you encoded this patch in such a way that:
1) patchwork didn't even notice it
2) it made more work for me to apply it
Putting just the commit message and the patch itself
as an attachment isn't going to work.
It ought to be quite simple:
Mail headers:
1) If you wrote the patch the normal "From: " in your
email takes care of everything. Else add a new
one at the top of the mail message body for the
actual author.
2) Make "Subject: " be the commit message header line.
Anything in leading "[]" brackets will be removed by
the git tools so you can say things like "[PATCH]" and
"[PATCH net-2.6]" there.
3) After any optional "From: " override for the patch author, the
content of your email body should start with the commit message.
4) If you want to make more comments that don't end up into the commit
message (like: "Dave this should go to -stable for 2.6.33 only")
add a line with "---" three dashes then on the following lines say
what you want to say
5) Then comes the patch.
This really should be trivial.
Don't use attachments, just:
--------------------------------------------------
From: Patrick McHardy <kaber@trash.net>
Subject: [PATCH whatever] Commit header line
Commit message
---
Any extra side notes.
net/ipv4/devinet.c | 2 +-
net/ipv6/addrconf.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/net/ipv4/devinet.c b/net/ipv4/devinet.c
index 51ca946..3feb2b3 100644
--- a/net/ipv4/devinet.c
+++ b/net/ipv4/devinet.c
@@ -1194,7 +1194,7 @@ static int inet_dump_ifaddr(struct sk_buff *skb, struct n
...
--------------------------------------------------
I really should be able to take your email and feed it
to "git am" and it should "just work". I can't do that
with what you're giving me.
^ permalink raw reply related
* Re: [PATCH] net: fix netlink address dumping in IPv4/IPv6
From: David Miller @ 2010-03-27 3:28 UTC (permalink / raw)
To: kaber; +Cc: netdev
In-Reply-To: <4BACEB4F.9060900@trash.net>
Applied, thanks.
^ permalink raw reply
* Re: Null dereference in uli526x_rx_packet()
From: David Miller @ 2010-03-27 3:21 UTC (permalink / raw)
To: grundler; +Cc: kyle, netdev, error27
In-Reply-To: <20100207071540.GA9908@lackof.org>
From: Grant Grundler <grundler@parisc-linux.org>
Date: Sun, 7 Feb 2010 00:15:40 -0700
> On Sat, Mar 28, 2009 at 11:59:31PM -0700, David Miller wrote:
> ...
>> > Patch below looks right to me. Clobbering the skb is certainly wrong.
>> >
>> > Acked-by: Grant Grundler <grundler@parisc-linux.org>
>>
>> It looks correct to me, can we get a proper submission with
>> signoffs etc.?
>
> Dave,
> Looks like this patch was never resubmitted.
>
> Kyle, can you look at http://lists.openwall.net/netdev/2009/03/27/117
> and resubmit the code you had then with my "Acked-by" added please?
>
> Or if you don't want to touch it, let me know and I'll resurrect it.
I got tired of waiting for this resubmission (a month and a half) and
just applied the most recent version of the patch to net-2.6.
It looked correct to me too.
^ permalink raw reply
* Re: [RFC PATCH] gianfar: fix undo of reserve()
From: David Miller @ 2010-03-27 3:16 UTC (permalink / raw)
To: ben; +Cc: netdev
In-Reply-To: <A6A1774AFD79E346AE6D49A33CB294530DC19FC4@EX-BE-017-SFO.shared.themessagecenter.com>
From: "Ben Menchaca (ben@bigfootnetworks.com)" <ben@bigfootnetworks.com>
Date: Wed, 24 Mar 2010 08:05:02 -0700
> From: Ben Menchaca <ben@bigfootnetworks.com>
>
> Fix undo of reserve() before RX recycle
>
> gfar_new_skb reserve()s space in the SKB to align it. If an error occurs,
> and the skb needs to be returned to the RX recycle queue, the current code
> attempts to reset head, but did not reset tail. This patch remembers the
> alignment amount, and reverses the reserve() when needed.
>
> Signed-off-by: Ben Menchaca <ben@bigfootnetworks.com>
Applied, thanks.
^ permalink raw reply
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