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* Re: TSC unstable due to TSC halts in idle?
From: Suresh Siddha @ 2010-05-14 23:15 UTC (permalink / raw)
  To: john stultz
  Cc: Jesper Dangaard Brouer, Thomas Gleixner,
	linux-kernel@vger.kernel.org, netdev, Brown, Len, Li, Shaohua,
	hawk@comx.dk
In-Reply-To: <AANLkTimeXEaUnzSBuilbQLHj_oho3ia9EgyPGpB7vJRI@mail.gmail.com>

On Fri, 2010-05-14 at 15:28 -0700, john stultz wrote:
> On Fri, May 14, 2010 at 1:13 PM, Jesper Dangaard Brouer <hawk@diku.dk> wrote:
> > I want to know, if its safe to enable the TSC clocksource, when the
> > kernel reports:
> >  "Marking TSC unstable due to TSC halts in idle"
> >
> > The system selects HPET (in current_clocksource), but I can still see
> > TSC as an available clocksource (in
> > /sys/devices/system/clocksource/clocksource0/available_clocksource).
> >
> > Is it safe to enable TSC manually (by changing current_clocksource)?
> > (my workload is 10Git/s routing, cannot survive with a slow clock)
> >
> >
> > Any trick to avoid this? (e.g. kernel config setting, or a /sys/ setting
> > which changes the minimum P-state?)
> 
> Might try booting with the max-cstate=1 option.

Jesper mentioned that it is xeon 5550. TSC's for that processor doesn't
stop in idle. Perhaps he is using an older kernel which doesn't detect
this fact. Jesper, more recent kernels should be able to use TSC as the
clocksource.

thanks,
suresh

^ permalink raw reply

* Re: [PATCH 2.6.34-rc6] net: Improve ks8851 snl transmit performance
From: Bill Fink @ 2010-05-14 23:22 UTC (permalink / raw)
  To: Ha, Tristram
  Cc: Arce, Abraham, Ben Dooks, David Miller, netdev, linux-kernel,
	Jan, Sebastien
In-Reply-To: <14385191E87B904DBD836449AA30269D021A66@MORGANITE.micrel.com>

On Wed, 12 May 2010, Ha, Tristram wrote:

> I use a web browser to send patches through my company's e-mail system.  The message is composed by cut and paste, so it may not conform to Linux standard.
> 
> The latest nuttcp default size for UDP is 1500 bytes, rather than 8192 bytes.  In my case, the transmit performance improves from 10 Mbps to 11.  Have you tried TCP?

Just a nuttcp correction.  The default unicast UDP buflen in any
recent nuttcp is the largest power of 2 less than the MSS of the
control connection.  This means that the default UDP buflen for a
1500 byte MTU link is 1024, while for 9000 byte jumbo capable
networks it would be 8192.  This was done to avoid IP fragmentation
by default in most common scenarios (can be overridden by explicitly
setting the buflen with the "-l" nuttcp option).

						-Bill



> -----Original Message-----
> From: Arce, Abraham [mailto:x0066660@ti.com]
> Sent: Thu 5/6/2010 10:02 PM
> To: Ha, Tristram; Ben Dooks
> Cc: David Miller; netdev@vger.kernel.org; linux-kernel@vger.kernel.org; Jan, Sebastien
> Subject: RE: [PATCH 2.6.34-rc6] net: Improve ks8851 snl transmit performance
>  
> Hi,
> 
> [snip]
> 
> > There is a driver option no_tx_opt so that the driver can revert to original
> > implementation.  This allows user to verify if the transmit performance
> > actually improves.
> 
> Should we limit patch description to 80 characters also?
> 
> > Signed-off-by: Tristram Ha <Tristram.Ha@micrel.com>
> > ---
> > This replaces the [patch 01/13] patch I submitted and was objected by David.
> > 
> > Other users with Micrel KSZ8851 SNL chip please verify the transmit
> > performance does improve or not.
> 
> Tested-by: Abraham Arce <x0066660@ti.com>
> 
> Executing some nuttcp scenarios:
> 
> - Without Patch -
> 
> # /testsuites/ethernet/bin/nuttcp -u -i -Ri50m <serverip>
>  1.2676 MB /   1.00 sec =   10.6330 Mbps     0 /  1298 ~drop/pkt  0.00 ~%loss
>  1.2705 MB /   1.00 sec =   10.6579 Mbps     0 /  1301 ~drop/pkt  0.00 ~%loss
>  1.2686 MB /   1.00 sec =   10.6414 Mbps     0 /  1299 ~drop/pkt  0.00 ~%loss
>  1.2695 MB /   1.00 sec =   10.6496 Mbps     0 /  1300 ~drop/pkt  0.00 ~%loss
>  1.2695 MB /   1.00 sec =   10.6496 Mbps     0 /  1300 ~drop/pkt  0.00 ~%loss
>  1.2686 MB /   1.00 sec =   10.6414 Mbps     0 /  1299 ~drop/pkt  0.00 ~%loss
>  1.2686 MB /   1.00 sec =   10.6414 Mbps     0 /  1299 ~drop/pkt  0.00 ~%loss
>  1.2646 MB /   1.00 sec =   10.6086 Mbps     0 /  1295 ~drop/pkt  0.00 ~%loss
>  1.2686 MB /   1.00 sec =   10.6412 Mbps     0 /  1299 ~drop/pkt  0.00 ~%loss
>  1.2695 MB /   1.00 sec =   10.6498 Mbps     0 /  1300 ~drop/pkt  0.00 ~%loss
> 
> 12.7314 MB /  10.02 sec =   10.6637 Mbps 4 %TX 0 %RX 0 / 13037 drop/pkt 0.00 %loss
> 
> - With Patch -
> 
> # /testsuites/ethernet/bin/nuttcp -u -i -Ri50m 10.87.231.229
>     1.2891 MB /   1.00 sec =   10.8133 Mbps     0 /  1320 ~drop/pkt  0.00 ~%loss
>     1.2900 MB /   1.00 sec =   10.8217 Mbps     0 /  1321 ~drop/pkt  0.00 ~%loss
>     1.2900 MB /   1.00 sec =   10.8217 Mbps     0 /  1321 ~drop/pkt  0.00 ~%loss
>     1.2910 MB /   1.00 sec =   10.8298 Mbps     0 /  1322 ~drop/pkt  0.00 ~%loss
>     1.2910 MB /   1.00 sec =   10.8299 Mbps     0 /  1322 ~drop/pkt  0.00 ~%loss
>     1.2900 MB /   1.00 sec =   10.8216 Mbps     0 /  1321 ~drop/pkt  0.00 ~%loss
>     1.2900 MB /   1.00 sec =   10.8216 Mbps     0 /  1321 ~drop/pkt  0.00 ~%loss
>     1.2891 MB /   1.00 sec =   10.8135 Mbps     0 /  1320 ~drop/pkt  0.00 ~%loss
>     1.2900 MB /   1.00 sec =   10.8216 Mbps     0 /  1321 ~drop/pkt  0.00 ~%loss
>     1.2910 MB /   1.00 sec =   10.8298 Mbps     0 /  1322 ~drop/pkt  0.00 ~%loss
> 
>    12.9492 MB /  10.02 sec =   10.8461 Mbps 4 %TX 0 %RX 0 / 13260 drop/pkt 0.00
> %loss
> 
> Also simulated heavy transmission consisting of 40 processes executed in parallel:
> 
>  - 20 ping instances using packet size of 32768
>  - 20 dd instances creating a 50MB file each under the nfs rootfs
> 
> If any specific test scenario/application is required please do let me know...
> 
> Best Regards
> Abraham

^ permalink raw reply

* Re: [net-next-2.6 V7 PATCH 1/2] Add netlink support for virtual port management (was iovnl)
From: Chris Wright @ 2010-05-14 23:43 UTC (permalink / raw)
  To: Williams, Mitch A
  Cc: Patrick McHardy, Chris Wright, Scott Feldman, Arnd Bergmann,
	davem@davemloft.net, shemminger@vyatta.com,
	netdev@vger.kernel.org
In-Reply-To: <EA929A9653AAE14F841771FB1DE5A1365FF39989D4@rrsmsx501.amr.corp.intel.com>

Hi Mitch,

* Williams, Mitch A (mitch.a.williams@intel.com) wrote:
> I'd really like to find a way to fix this, instead of having the functionality disabled.

I've got some patches that are close to complete.  I'll post them
shortly.  I'm able to query link from ip at this point.

thanks,
-chris

^ permalink raw reply

* Re: mmotm 2010-05-11 - dies in pm_qos_update_request()
From: mark gross @ 2010-05-14 23:43 UTC (permalink / raw)
  To: Rafael J. Wysocki
  Cc: Valdis.Kletnieks, Andrew Morton, David S. Miller, linux-kernel,
	e1000-devel, netdev
In-Reply-To: <201005140024.50279.rjw@sisk.pl>

On Fri, May 14, 2010 at 12:24:50AM +0200, Rafael J. Wysocki wrote:
> On Thursday 13 May 2010, Valdis.Kletnieks@vt.edu wrote:
> > On Wed, 12 May 2010 23:07:20 +0200, "Rafael J. Wysocki" said:
> > > On Wednesday 12 May 2010, Valdis.Kletnieks@vt.edu wrote:
> > > > On Tue, 11 May 2010 18:21:22 PDT, akpm@linux-foundation.org said:
> > > > > The mm-of-the-moment snapshot 2010-05-11-18-20 has been uploaded to
> > > > > 
> > > > >    http://userweb.kernel.org/~akpm/mmotm/
> > > > 
> > > > Dell Latitude E6500, x86_64 kernel.
> > > > 
> > > > Died a horrid death at boot in the e1000e driver.  Seems to be
> > > > something in linux-next.patch. Didn't get a netconsole trace for obvious
> > > > reasons...
> > > > 
> > > > Copied-by-hand traceback:
> > > > pm_qos_update_request()+0x22
> > > > e1000_configure+0x478
> > > > e1000_open_device+0xee
> > > > ? _raw_notifier_call_chain+0xf
> > > > __dev_open+0xec
> > > > dev_open+0x1b
> > > > netpoll_setup+0x28b
> > > > init_netconsole+0xbc
> > > > 
> > > > I suspect this commit:
> > > > 
> > > > commit 23606cf5d1192c2b17912cb2ef6e62f9b11de133
> > > > Author: Rafael J. Wysocki <rjw@sisk.pl>
> > > > Date:   Sun Mar 14 14:35:17 2010 +0000
> > > > 
> > > >     e1000e / PCI / PM: Add basic runtime PM support (rev. 4)
> > > 
> > > No, I don't think so.  I'm running -rc6 with this patch applied on a box with
> > > e1000e and it works just fine.
> > > 
> > > Please try to revert this one instead:
> > > 
> > > http://git.kernel.org/?p=linux/kernel/git/rafael/suspend-2.6.git;a=patch;h=ed77134bfccf5e75b6cbadab268e559dbe6a4ebb
> > 
> > Confirming - reverting that patch and doing the build fixup results in a
> > kernel that doesn't blow up in the e1000e driver...
> 
> Then I guess there's an initializations problem somewhere.
> 
> Mark, any chance to look into that any time soon?  If we don't resolve this
> before the merge window opens, I'm afraid I'll have to revert that commit
> from my tree.
>

I'll look at it right away.

I think I have an e1000e in my home box.

--mgross

 

^ permalink raw reply

* [PATCH] tbf: stop wanton destruction of children (v2)
From: Stephen Hemminger @ 2010-05-15  0:38 UTC (permalink / raw)
  To: Patrick McHardy; +Cc: David Miller, netdev
In-Reply-To: <4BEC2936.2060800@trash.net>

Several netem users use TBF for rate control. But every time the parameters
of TBF are changed it destroys the child qdisc, requiring reconfigation.
Better to just keep child qdisc and just notify it of changed limit.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>


--- a/net/sched/sch_tbf.c	2010-05-14 15:04:56.297095729 -0700
+++ b/net/sched/sch_tbf.c	2010-05-14 15:09:57.296733332 -0700
@@ -273,7 +273,11 @@ static int tbf_change(struct Qdisc* sch,
 	if (max_size < 0)
 		goto done;
 
-	if (qopt->limit > 0) {
+	if (q->qdisc != &noop_qdisc) {
+		err = fifo_set_limit(q->qdisc, qopt->limit);
+		if (err)
+			goto done;
+	} else if (qopt->limit > 0) {
 		child = fifo_create_dflt(sch, &bfifo_qdisc_ops, qopt->limit);
 		if (IS_ERR(child)) {
 			err = PTR_ERR(child);

^ permalink raw reply

* [net-next-2.6 V8 PATCH 0/2] Add virtual port netlink support
From: Scott Feldman @ 2010-05-15  1:04 UTC (permalink / raw)
  To: davem; +Cc: netdev, chrisw, arnd, kaber

[Add symmetrical set/get layout per Patrick McHardy suggestions]

The following series adds virtual port netlink support and adds an
implementation to Cisco's enic netdev driver:

	1/2: Adds virtual netlink RTM_SETLINK/RTM_GETLINK support, and
	     adds matching netdev ops net_{set|get}_vf_port.

	2/2: Adds enic support for net_{set|get}_vf_port for enic
	     dynamic devices.

Signed-off-by: Scott Feldman <scofeldm@cisco.com>
Signed-off-by: Roopa Prabhu<roprabhu@cisco.com>

^ permalink raw reply

* [net-next-2.6 V8 PATCH 1/2] Add netlink support for virtual port management (was iovnl)
From: Scott Feldman @ 2010-05-15  1:04 UTC (permalink / raw)
  To: davem; +Cc: netdev, chrisw, arnd, kaber
In-Reply-To: <20100515010415.21260.35219.stgit@savbu-pc100.cisco.com>

From: Scott Feldman <scofeldm@cisco.com>

Add new netdev ops ndo_{set|get}_vf_port to allow setting of
port-profile on a netdev interface.  Extends netlink socket RTM_SETLINK/
RTM_GETLINK with two new sub msgs called IFLA_VF_PORTS and IFLA_PORT_SELF
(added to end of IFLA_cmd list).  These are both nested atrtibutes
using this layout:

              [IFLA_NUM_VF]
              [IFLA_VF_PORTS]
                      [IFLA_VF_PORT]
                              [IFLA_PORT_*], ...
                      [IFLA_VF_PORT]
                              [IFLA_PORT_*], ...
                      ...
              [IFLA_PORT_SELF]
                      [IFLA_PORT_*], ...

These attributes are design to be set and get symmetrically.  VF_PORTS
is a list of VF_PORTs, one for each VF, when dealing with an SR-IOV
device.  PORT_SELF is for the PF of the SR-IOV device, in case it wants
to also have a port-profile, or for the case where the VF==PF, like in
enic patch 2/2 of this patch set.

A port-profile is used to configure/enable the external switch virtual port
backing the netdev interface, not to configure the host-facing side of the
netdev.  A port-profile is an identifier known to the switch.  How port-
profiles are installed on the switch or how available port-profiles are
made know to the host is outside the scope of this patch.

There are two types of port-profiles specs in the netlink msg.  The first spec
is for 802.1Qbg (pre-)standard, VDP protocol.  The second spec is for devices
that run a similar protocol as VDP but in firmware, thus hiding the protocol
details.  In either case, the specs have much in common and makes sense to
define the netlink msg as the union of the two specs.  For example, both specs
have a notition of associating/deassociating a port-profile.  And both specs
require some information from the hypervisor manager, such as client port
instance ID.

The general flow is the port-profile is applied to a host netdev interface
using RTM_SETLINK, the receiver of the RTM_SETLINK msg communicates with the
switch, and the switch virtual port backing the host netdev interface is
configured/enabled based on the settings defined by the port-profile.  What
those settings comprise, and how those settings are managed is again
outside the scope of this patch, since this patch only deals with the
first step in the flow.

Signed-off-by: Scott Feldman <scofeldm@cisco.com>
Signed-off-by: Roopa Prabhu<roprabhu@cisco.com>
---
 include/linux/if_link.h   |   75 ++++++++++++++++++++
 include/linux/netdevice.h |    8 ++
 net/core/rtnetlink.c      |  169 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 251 insertions(+), 1 deletions(-)

diff --git a/include/linux/if_link.h b/include/linux/if_link.h
index cfd420b..c4e80da 100644
--- a/include/linux/if_link.h
+++ b/include/linux/if_link.h
@@ -116,6 +116,8 @@ enum {
 	IFLA_VF_TX_RATE,	/* TX Bandwidth Allocation */
 	IFLA_VFINFO,
 	IFLA_STATS64,
+	IFLA_VF_PORTS,
+	IFLA_PORT_SELF,
 	__IFLA_MAX
 };
 
@@ -259,4 +261,77 @@ struct ifla_vf_info {
 	__u32 qos;
 	__u32 tx_rate;
 };
+
+/* VF ports management section
+ *
+ *	Nested layout of set/get msg is:
+ *
+ *		[IFLA_NUM_VF]
+ *		[IFLA_VF_PORTS]
+ *			[IFLA_VF_PORT]
+ *				[IFLA_PORT_*], ...
+ *			[IFLA_VF_PORT]
+ *				[IFLA_PORT_*], ...
+ *			...
+ *		[IFLA_PORT_SELF]
+ *			[IFLA_PORT_*], ...
+ */
+
+enum {
+	IFLA_VF_PORT_UNSPEC,
+	IFLA_VF_PORT,			/* nest */
+	__IFLA_VF_PORT_MAX,
+};
+
+#define IFLA_VF_PORT_MAX (__IFLA_VF_PORT_MAX - 1)
+
+enum {
+	IFLA_PORT_UNSPEC,
+	IFLA_PORT_VF,			/* __u32 */
+	IFLA_PORT_PROFILE,		/* string */
+	IFLA_PORT_VSI_TYPE,		/* 802.1Qbg (pre-)standard VDP */
+	IFLA_PORT_INSTANCE_UUID,	/* binary UUID */
+	IFLA_PORT_HOST_UUID,		/* binary UUID */
+	IFLA_PORT_REQUEST,		/* __u8 */
+	IFLA_PORT_RESPONSE,		/* __u16, output only */
+	__IFLA_PORT_MAX,
+};
+
+#define IFLA_PORT_MAX (__IFLA_PORT_MAX - 1)
+
+#define PORT_PROFILE_MAX	40
+#define PORT_UUID_MAX		16
+#define PORT_SELF_VF		-1
+
+enum {
+	PORT_REQUEST_PREASSOCIATE = 0,
+	PORT_REQUEST_PREASSOCIATE_RR,
+	PORT_REQUEST_ASSOCIATE,
+	PORT_REQUEST_DISASSOCIATE,
+};
+
+enum {
+	PORT_VDP_RESPONSE_SUCCESS = 0,
+	PORT_VDP_RESPONSE_INVALID_FORMAT,
+	PORT_VDP_RESPONSE_INSUFFICIENT_RESOURCES,
+	PORT_VDP_RESPONSE_UNUSED_VTID,
+	PORT_VDP_RESPONSE_VTID_VIOLATION,
+	PORT_VDP_RESPONSE_VTID_VERSION_VIOALTION,
+	PORT_VDP_RESPONSE_OUT_OF_SYNC,
+	/* 0x08-0xFF reserved for future VDP use */
+	PORT_PROFILE_RESPONSE_SUCCESS = 0x100,
+	PORT_PROFILE_RESPONSE_INPROGRESS,
+	PORT_PROFILE_RESPONSE_INVALID,
+	PORT_PROFILE_RESPONSE_BADSTATE,
+	PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES,
+	PORT_PROFILE_RESPONSE_ERROR,
+};
+
+struct ifla_port_vsi {
+	__u8 vsi_mgr_id;
+	__u8 vsi_type_id[3];
+	__u8 vsi_type_version;
+	__u8 pad[3];
+};
+
 #endif /* _LINUX_IF_LINK_H */
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 69022d4..324f6b8 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -686,6 +686,9 @@ struct netdev_rx_queue {
  * int (*ndo_set_vf_tx_rate)(struct net_device *dev, int vf, int rate);
  * int (*ndo_get_vf_config)(struct net_device *dev,
  *			    int vf, struct ifla_vf_info *ivf);
+ * int (*ndo_set_vf_port)(struct net_device *dev, int vf,
+ *			  struct nlattr *port[]);
+ * int (*ndo_get_vf_port)(struct net_device *dev, int vf, struct sk_buff *skb);
  */
 #define HAVE_NET_DEVICE_OPS
 struct net_device_ops {
@@ -735,6 +738,11 @@ struct net_device_ops {
 	int			(*ndo_get_vf_config)(struct net_device *dev,
 						     int vf,
 						     struct ifla_vf_info *ivf);
+	int			(*ndo_set_vf_port)(struct net_device *dev,
+						   int vf,
+						   struct nlattr *port[]);
+	int			(*ndo_get_vf_port)(struct net_device *dev,
+						   int vf, struct sk_buff *skb);
 #if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
 	int			(*ndo_fcoe_enable)(struct net_device *dev);
 	int			(*ndo_fcoe_disable)(struct net_device *dev);
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index 23a71cb..eb18f2a 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -653,6 +653,31 @@ static inline int rtnl_vfinfo_size(const struct net_device *dev)
 		return 0;
 }
 
+static size_t rtnl_port_size(const struct net_device *dev)
+{
+	size_t port_size = nla_total_size(4)		/* PORT_VF */
+		+ nla_total_size(PORT_PROFILE_MAX)	/* PORT_PROFILE */
+		+ nla_total_size(sizeof(struct ifla_port_vsi))
+							/* PORT_VSI_TYPE */
+		+ nla_total_size(PORT_UUID_MAX)		/* PORT_INSTANCE_UUID */
+		+ nla_total_size(PORT_UUID_MAX)		/* PORT_HOST_UUID */
+		+ nla_total_size(1)			/* PROT_VDP_REQUEST */
+		+ nla_total_size(2);			/* PORT_VDP_RESPONSE */
+	size_t vf_ports_size = nla_total_size(sizeof(struct nlattr));
+	size_t vf_port_size = nla_total_size(sizeof(struct nlattr))
+		+ port_size;
+	size_t port_self_size = nla_total_size(sizeof(struct nlattr))
+		+ port_size;
+
+	if (!dev->netdev_ops->ndo_get_vf_port || !dev->dev.parent)
+		return 0;
+	if (dev_num_vf(dev->dev.parent))
+		return port_self_size + vf_ports_size +
+			vf_port_size * dev_num_vf(dev->dev.parent);
+	else
+		return port_self_size;
+}
+
 static inline size_t if_nlmsg_size(const struct net_device *dev)
 {
 	return NLMSG_ALIGN(sizeof(struct ifinfomsg))
@@ -673,9 +698,82 @@ static inline size_t if_nlmsg_size(const struct net_device *dev)
 	       + nla_total_size(1) /* IFLA_LINKMODE */
 	       + nla_total_size(4) /* IFLA_NUM_VF */
 	       + nla_total_size(rtnl_vfinfo_size(dev)) /* IFLA_VFINFO */
+	       + rtnl_port_size(dev) /* IFLA_VF_PORTS + IFLA_PORT_SELF */
 	       + rtnl_link_get_size(dev); /* IFLA_LINKINFO */
 }
 
+static int rtnl_vf_ports_fill(struct sk_buff *skb, struct net_device *dev)
+{
+	struct nlattr *vf_ports;
+	struct nlattr *vf_port;
+	int vf;
+	int err;
+
+	vf_ports = nla_nest_start(skb, IFLA_VF_PORTS);
+	if (!vf_ports)
+		return -EMSGSIZE;
+
+	for (vf = 0; vf < dev_num_vf(dev->dev.parent); vf++) {
+		vf_port = nla_nest_start(skb, IFLA_VF_PORT);
+		if (!vf_port) {
+			nla_nest_cancel(skb, vf_ports);
+			return -EMSGSIZE;
+		}
+		NLA_PUT_U32(skb, IFLA_PORT_VF, vf);
+		err = dev->netdev_ops->ndo_get_vf_port(dev, vf, skb);
+		if (err) {
+nla_put_failure:
+			nla_nest_cancel(skb, vf_port);
+			continue;
+		}
+		nla_nest_end(skb, vf_port);
+	}
+
+	nla_nest_end(skb, vf_ports);
+
+	return 0;
+}
+
+static int rtnl_port_self_fill(struct sk_buff *skb, struct net_device *dev)
+{
+	struct nlattr *port_self;
+	int err;
+
+	port_self = nla_nest_start(skb, IFLA_PORT_SELF);
+	if (!port_self)
+		return -EMSGSIZE;
+
+	err = dev->netdev_ops->ndo_get_vf_port(dev, PORT_SELF_VF, skb);
+	if (err) {
+		nla_nest_cancel(skb, port_self);
+		return err;
+	}
+
+	nla_nest_end(skb, port_self);
+
+	return 0;
+}
+
+static int rtnl_port_fill(struct sk_buff *skb, struct net_device *dev)
+{
+	int err;
+
+	if (!dev->netdev_ops->ndo_get_vf_port || !dev->dev.parent)
+		return 0;
+
+	err = rtnl_port_self_fill(skb, dev);
+	if (err)
+		return err;
+
+	if (dev_num_vf(dev->dev.parent)) {
+		err = rtnl_vf_ports_fill(skb, dev);
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
 			    int type, u32 pid, u32 seq, u32 change,
 			    unsigned int flags)
@@ -747,17 +845,23 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
 		goto nla_put_failure;
 	copy_rtnl_link_stats64(nla_data(attr), stats);
 
+	if (dev->dev.parent)
+		NLA_PUT_U32(skb, IFLA_NUM_VF, dev_num_vf(dev->dev.parent));
+
 	if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent) {
 		int i;
 		struct ifla_vf_info ivi;
 
-		NLA_PUT_U32(skb, IFLA_NUM_VF, dev_num_vf(dev->dev.parent));
 		for (i = 0; i < dev_num_vf(dev->dev.parent); i++) {
 			if (dev->netdev_ops->ndo_get_vf_config(dev, i, &ivi))
 				break;
 			NLA_PUT(skb, IFLA_VFINFO, sizeof(ivi), &ivi);
 		}
 	}
+
+	if (rtnl_port_fill(skb, dev))
+		goto nla_put_failure;
+
 	if (dev->rtnl_link_ops) {
 		if (rtnl_link_fill(skb, dev) < 0)
 			goto nla_put_failure;
@@ -824,6 +928,8 @@ const struct nla_policy ifla_policy[IFLA_MAX+1] = {
 				    .len = sizeof(struct ifla_vf_vlan) },
 	[IFLA_VF_TX_RATE]	= { .type = NLA_BINARY,
 				    .len = sizeof(struct ifla_vf_tx_rate) },
+	[IFLA_VF_PORTS]		= { .type = NLA_NESTED },
+	[IFLA_PORT_SELF]	= { .type = NLA_NESTED },
 };
 EXPORT_SYMBOL(ifla_policy);
 
@@ -832,6 +938,20 @@ static const struct nla_policy ifla_info_policy[IFLA_INFO_MAX+1] = {
 	[IFLA_INFO_DATA]	= { .type = NLA_NESTED },
 };
 
+static const struct nla_policy ifla_port_policy[IFLA_PORT_MAX+1] = {
+	[IFLA_PORT_VF]		= { .type = NLA_U32 },
+	[IFLA_PORT_PROFILE]	= { .type = NLA_STRING,
+				    .len = PORT_PROFILE_MAX },
+	[IFLA_PORT_VSI_TYPE]	= { .type = NLA_BINARY,
+				    .len = sizeof(struct ifla_port_vsi)},
+	[IFLA_PORT_INSTANCE_UUID] = { .type = NLA_BINARY,
+				      .len = PORT_UUID_MAX },
+	[IFLA_PORT_HOST_UUID]	= { .type = NLA_STRING,
+				    .len = PORT_UUID_MAX },
+	[IFLA_PORT_REQUEST]	= { .type = NLA_U8, },
+	[IFLA_PORT_RESPONSE]	= { .type = NLA_U16, },
+};
+
 struct net *rtnl_link_get_net(struct net *src_net, struct nlattr *tb[])
 {
 	struct net *net;
@@ -1028,6 +1148,53 @@ static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
 	}
 	err = 0;
 
+	if (tb[IFLA_VF_PORTS]) {
+		struct nlattr *port[IFLA_PORT_MAX+1];
+		struct nlattr *attr;
+		int vf;
+		int rem;
+
+		err = -EOPNOTSUPP;
+		if (!ops->ndo_set_vf_port)
+			goto errout;
+
+		nla_for_each_nested(attr, tb[IFLA_VF_PORTS], rem) {
+			if (nla_type(attr) != IFLA_VF_PORT)
+				continue;
+			err = nla_parse_nested(port, IFLA_PORT_MAX,
+				attr, ifla_port_policy);
+			if (err < 0)
+				goto errout;
+			if (!port[IFLA_PORT_VF]) {
+				err = -EOPNOTSUPP;
+				goto errout;
+			}
+			vf = nla_get_u32(port[IFLA_PORT_VF]);
+			err = ops->ndo_set_vf_port(dev, vf, port);
+			if (err < 0)
+				goto errout;
+			modified = 1;
+		}
+	}
+	err = 0;
+
+	if (tb[IFLA_PORT_SELF]) {
+		struct nlattr *port[IFLA_PORT_MAX+1];
+
+		err = nla_parse_nested(port, IFLA_PORT_MAX,
+			tb[IFLA_PORT_SELF], ifla_port_policy);
+		if (err < 0)
+			goto errout;
+
+		err = -EOPNOTSUPP;
+		if (ops->ndo_set_vf_port)
+			err = ops->ndo_set_vf_port(dev, PORT_SELF_VF, port);
+		if (err < 0)
+			goto errout;
+		modified = 1;
+	}
+	err = 0;
+
 errout:
 	if (err < 0 && modified && net_ratelimit())
 		printk(KERN_WARNING "A link change request failed with "


^ permalink raw reply related

* [net-next-2.6 V8 PATCH 2/2] Add ndo_{set|get}_vf_port support for enic dynamic vnics
From: Scott Feldman @ 2010-05-15  1:04 UTC (permalink / raw)
  To: davem; +Cc: netdev, chrisw, arnd, kaber
In-Reply-To: <20100515010415.21260.35219.stgit@savbu-pc100.cisco.com>

From: Scott Feldman <scofeldm@cisco.com>

Add enic ndo_{set|get}_vf_port ops to support setting/getting
port-profile for enic dynamic devices.  Enic dynamic devices are just like
normal enic eth devices except dynamic enics require an extra configuration
step to assign a port-profile identifier to the interface before the
interface is useable.  Once a port-profile is assigned, link comes up on the
interface and is ready for I/O.  The port-profile is used to configure the
network port assigned to the interface.  The network port configuration
includes VLAN membership, QoS policies, and port security settings typical
of a data center network.

A dynamic enic initially has a zero-mac address.  Before a port-profile is
assigned, a valid non-zero unicast mac address should be assign to the
dynamic enic interface.

Signed-off-by: Scott Feldman <scofeldm@cisco.com>
Signed-off-by: Roopa Prabhu<roprabhu@cisco.com>
---
 drivers/net/enic/Makefile    |    2 
 drivers/net/enic/enic.h      |   10 +
 drivers/net/enic/enic_main.c |  330 ++++++++++++++++++++++++++++++++++++++++--
 drivers/net/enic/enic_res.c  |    5 -
 drivers/net/enic/enic_res.h  |    1 
 drivers/net/enic/vnic_dev.c  |   58 +++++++
 drivers/net/enic/vnic_dev.h  |    7 +
 drivers/net/enic/vnic_vic.c  |   73 +++++++++
 drivers/net/enic/vnic_vic.h  |   59 ++++++++
 9 files changed, 521 insertions(+), 24 deletions(-)

diff --git a/drivers/net/enic/Makefile b/drivers/net/enic/Makefile
index 391c3bc..e7b6c31 100644
--- a/drivers/net/enic/Makefile
+++ b/drivers/net/enic/Makefile
@@ -1,5 +1,5 @@
 obj-$(CONFIG_ENIC) := enic.o
 
 enic-y := enic_main.o vnic_cq.o vnic_intr.o vnic_wq.o \
-	enic_res.o vnic_dev.o vnic_rq.o
+	enic_res.o vnic_dev.o vnic_rq.o vnic_vic.o
 
diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h
index 5fa56f1..85f2a2e 100644
--- a/drivers/net/enic/enic.h
+++ b/drivers/net/enic/enic.h
@@ -34,7 +34,7 @@
 
 #define DRV_NAME		"enic"
 #define DRV_DESCRIPTION		"Cisco VIC Ethernet NIC Driver"
-#define DRV_VERSION		"1.3.1.1"
+#define DRV_VERSION		"1.3.1.1-pp"
 #define DRV_COPYRIGHT		"Copyright 2008-2009 Cisco Systems, Inc"
 #define PFX			DRV_NAME ": "
 
@@ -74,6 +74,13 @@ struct enic_msix_entry {
 	void *devid;
 };
 
+struct enic_port_profile {
+	u8 request;
+	char name[PORT_PROFILE_MAX];
+	u8 instance_uuid[PORT_UUID_MAX];
+	u8 host_uuid[PORT_UUID_MAX];
+};
+
 /* Per-instance private data structure */
 struct enic {
 	struct net_device *netdev;
@@ -95,6 +102,7 @@ struct enic {
 	u32 port_mtu;
 	u32 rx_coalesce_usecs;
 	u32 tx_coalesce_usecs;
+	struct enic_port_profile pp;
 
 	/* work queue cache line section */
 	____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c
index 1232887..e125113 100644
--- a/drivers/net/enic/enic_main.c
+++ b/drivers/net/enic/enic_main.c
@@ -29,6 +29,7 @@
 #include <linux/etherdevice.h>
 #include <linux/if_ether.h>
 #include <linux/if_vlan.h>
+#include <linux/if_link.h>
 #include <linux/ethtool.h>
 #include <linux/in.h>
 #include <linux/ip.h>
@@ -40,6 +41,7 @@
 #include "vnic_dev.h"
 #include "vnic_intr.h"
 #include "vnic_stats.h"
+#include "vnic_vic.h"
 #include "enic_res.h"
 #include "enic.h"
 
@@ -49,10 +51,12 @@
 #define ENIC_DESC_MAX_SPLITS		(MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
 
 #define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */
+#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN     0x0044  /* enet dynamic vnic */
 
 /* Supported devices */
 static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
+	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
 	{ 0, }	/* end of table */
 };
 
@@ -113,6 +117,11 @@ static const struct enic_stat enic_rx_stats[] = {
 static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
 static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
 
+static int enic_is_dynamic(struct enic *enic)
+{
+	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
+}
+
 static int enic_get_settings(struct net_device *netdev,
 	struct ethtool_cmd *ecmd)
 {
@@ -810,14 +819,78 @@ static void enic_reset_mcaddrs(struct enic *enic)
 
 static int enic_set_mac_addr(struct net_device *netdev, char *addr)
 {
-	if (!is_valid_ether_addr(addr))
-		return -EADDRNOTAVAIL;
+	struct enic *enic = netdev_priv(netdev);
+
+	if (enic_is_dynamic(enic)) {
+		if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
+			return -EADDRNOTAVAIL;
+	} else {
+		if (!is_valid_ether_addr(addr))
+			return -EADDRNOTAVAIL;
+	}
 
 	memcpy(netdev->dev_addr, addr, netdev->addr_len);
 
 	return 0;
 }
 
+static int enic_dev_add_station_addr(struct enic *enic)
+{
+	int err = 0;
+
+	if (is_valid_ether_addr(enic->netdev->dev_addr)) {
+		spin_lock(&enic->devcmd_lock);
+		err = vnic_dev_add_addr(enic->vdev, enic->netdev->dev_addr);
+		spin_unlock(&enic->devcmd_lock);
+	}
+
+	return err;
+}
+
+static int enic_dev_del_station_addr(struct enic *enic)
+{
+	int err = 0;
+
+	if (is_valid_ether_addr(enic->netdev->dev_addr)) {
+		spin_lock(&enic->devcmd_lock);
+		err = vnic_dev_del_addr(enic->vdev, enic->netdev->dev_addr);
+		spin_unlock(&enic->devcmd_lock);
+	}
+
+	return err;
+}
+
+static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
+{
+	struct enic *enic = netdev_priv(netdev);
+	struct sockaddr *saddr = p;
+	char *addr = saddr->sa_data;
+	int err;
+
+	if (netif_running(enic->netdev)) {
+		err = enic_dev_del_station_addr(enic);
+		if (err)
+			return err;
+	}
+
+	err = enic_set_mac_addr(netdev, addr);
+	if (err)
+		return err;
+
+	if (netif_running(enic->netdev)) {
+		err = enic_dev_add_station_addr(enic);
+		if (err)
+			return err;
+	}
+
+	return err;
+}
+
+static int enic_set_mac_address(struct net_device *netdev, void *p)
+{
+	return -EOPNOTSUPP;
+}
+
 /* netif_tx_lock held, BHs disabled */
 static void enic_set_multicast_list(struct net_device *netdev)
 {
@@ -922,6 +995,213 @@ static void enic_tx_timeout(struct net_device *netdev)
 	schedule_work(&enic->reset);
 }
 
+static int enic_vnic_dev_deinit(struct enic *enic)
+{
+	int err;
+
+	spin_lock(&enic->devcmd_lock);
+	err = vnic_dev_deinit(enic->vdev);
+	spin_unlock(&enic->devcmd_lock);
+
+	return err;
+}
+
+static int enic_dev_init_prov(struct enic *enic, struct vic_provinfo *vp)
+{
+	int err;
+
+	spin_lock(&enic->devcmd_lock);
+	err = vnic_dev_init_prov(enic->vdev,
+		(u8 *)vp, vic_provinfo_size(vp));
+	spin_unlock(&enic->devcmd_lock);
+
+	return err;
+}
+
+static int enic_dev_init_done(struct enic *enic, int *done, int *error)
+{
+	int err;
+
+	spin_lock(&enic->devcmd_lock);
+	err = vnic_dev_init_done(enic->vdev, done, error);
+	spin_unlock(&enic->devcmd_lock);
+
+	return err;
+}
+
+static int enic_set_port_profile(struct enic *enic, u8 request, u8 *mac,
+	char *name, u8 *instance_uuid, u8 *host_uuid)
+{
+	struct vic_provinfo *vp;
+	u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
+	unsigned short *uuid;
+	char uuid_str[38];
+	static char *uuid_fmt = "%04X%04X-%04X-%04X-%04X-%04X%04X%04X";
+	int err;
+
+	if (!name)
+		return -EINVAL;
+
+	if (!is_valid_ether_addr(mac))
+		return -EADDRNOTAVAIL;
+
+	vp = vic_provinfo_alloc(GFP_KERNEL, oui, VIC_PROVINFO_LINUX_TYPE);
+	if (!vp)
+		return -ENOMEM;
+
+	vic_provinfo_add_tlv(vp,
+		VIC_LINUX_PROV_TLV_PORT_PROFILE_NAME_STR,
+		strlen(name) + 1, name);
+
+	vic_provinfo_add_tlv(vp,
+		VIC_LINUX_PROV_TLV_CLIENT_MAC_ADDR,
+		ETH_ALEN, mac);
+
+	if (instance_uuid) {
+		uuid = (unsigned short *)instance_uuid;
+		sprintf(uuid_str, uuid_fmt,
+			uuid[0], uuid[1], uuid[2], uuid[3],
+			uuid[4], uuid[5], uuid[6], uuid[7]);
+		vic_provinfo_add_tlv(vp,
+			VIC_LINUX_PROV_TLV_CLIENT_UUID_STR,
+			sizeof(uuid_str), uuid_str);
+	}
+
+	if (host_uuid) {
+		uuid = (unsigned short *)host_uuid;
+		sprintf(uuid_str, uuid_fmt,
+			uuid[0], uuid[1], uuid[2], uuid[3],
+			uuid[4], uuid[5], uuid[6], uuid[7]);
+		vic_provinfo_add_tlv(vp,
+			VIC_LINUX_PROV_TLV_HOST_UUID_STR,
+			sizeof(uuid_str), uuid_str);
+	}
+
+	err = enic_vnic_dev_deinit(enic);
+	if (err)
+		goto err_out;
+
+	memset(&enic->pp, 0, sizeof(enic->pp));
+
+	err = enic_dev_init_prov(enic, vp);
+	if (err)
+		goto err_out;
+
+	enic->pp.request = request;
+	memcpy(enic->pp.name, name, PORT_PROFILE_MAX);
+	if (instance_uuid)
+		memcpy(enic->pp.instance_uuid,
+			instance_uuid, PORT_UUID_MAX);
+	if (host_uuid)
+		memcpy(enic->pp.host_uuid,
+			host_uuid, PORT_UUID_MAX);
+
+err_out:
+	vic_provinfo_free(vp);
+
+	return err;
+}
+
+static int enic_unset_port_profile(struct enic *enic)
+{
+	memset(&enic->pp, 0, sizeof(enic->pp));
+	return enic_vnic_dev_deinit(enic);
+}
+
+static int enic_set_vf_port(struct net_device *netdev, int vf,
+	struct nlattr *port[])
+{
+	struct enic *enic = netdev_priv(netdev);
+	char *name = NULL;
+	u8 *instance_uuid = NULL;
+	u8 *host_uuid = NULL;
+	u8 request = PORT_REQUEST_DISASSOCIATE;
+
+	/* don't support VFs, yet */
+	if (vf != PORT_SELF_VF)
+		return -EOPNOTSUPP;
+
+	if (port[IFLA_PORT_REQUEST])
+		request = nla_get_u8(port[IFLA_PORT_REQUEST]);
+
+	switch (request) {
+	case PORT_REQUEST_ASSOCIATE:
+
+		if (port[IFLA_PORT_PROFILE])
+			name = nla_data(port[IFLA_PORT_PROFILE]);
+
+		if (port[IFLA_PORT_INSTANCE_UUID])
+			instance_uuid =
+				nla_data(port[IFLA_PORT_INSTANCE_UUID]);
+
+		if (port[IFLA_PORT_HOST_UUID])
+			host_uuid = nla_data(port[IFLA_PORT_HOST_UUID]);
+
+		return enic_set_port_profile(enic, request,
+			netdev->dev_addr, name,
+			instance_uuid, host_uuid);
+
+	case PORT_REQUEST_DISASSOCIATE:
+
+		return enic_unset_port_profile(enic);
+
+	default:
+		break;
+	}
+
+	return -EOPNOTSUPP;
+}
+
+static int enic_get_vf_port(struct net_device *netdev, int vf,
+	struct sk_buff *skb)
+{
+	struct enic *enic = netdev_priv(netdev);
+	int err, error, done;
+	u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
+
+	/* don't support VFs, yet */
+	if (vf != PORT_SELF_VF)
+		return -EOPNOTSUPP;
+
+	err = enic_dev_init_done(enic, &done, &error);
+
+	if (err)
+		return err;
+
+	switch (error) {
+	case ERR_SUCCESS:
+		if (!done)
+			response = PORT_PROFILE_RESPONSE_INPROGRESS;
+		break;
+	case ERR_EINVAL:
+		response = PORT_PROFILE_RESPONSE_INVALID;
+		break;
+	case ERR_EBADSTATE:
+		response = PORT_PROFILE_RESPONSE_BADSTATE;
+		break;
+	case ERR_ENOMEM:
+		response = PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES;
+		break;
+	default:
+		response = PORT_PROFILE_RESPONSE_ERROR;
+		break;
+	}
+
+	NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
+	NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
+	NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
+		enic->pp.name);
+	NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
+		enic->pp.instance_uuid);
+	NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
+		enic->pp.host_uuid);
+
+	return 0;
+
+nla_put_failure:
+	return -EMSGSIZE;
+}
+
 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
 {
 	struct enic *enic = vnic_dev_priv(rq->vdev);
@@ -1440,9 +1720,7 @@ static int enic_open(struct net_device *netdev)
 	for (i = 0; i < enic->rq_count; i++)
 		vnic_rq_enable(&enic->rq[i]);
 
-	spin_lock(&enic->devcmd_lock);
-	enic_add_station_addr(enic);
-	spin_unlock(&enic->devcmd_lock);
+	enic_dev_add_station_addr(enic);
 	enic_set_multicast_list(netdev);
 
 	netif_wake_queue(netdev);
@@ -1489,6 +1767,8 @@ static int enic_stop(struct net_device *netdev)
 	netif_carrier_off(netdev);
 	netif_tx_disable(netdev);
 
+	enic_dev_del_station_addr(enic);
+
 	for (i = 0; i < enic->wq_count; i++) {
 		err = vnic_wq_disable(&enic->wq[i]);
 		if (err)
@@ -1774,14 +2054,34 @@ static void enic_clear_intr_mode(struct enic *enic)
 	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
 }
 
+static const struct net_device_ops enic_netdev_dynamic_ops = {
+	.ndo_open		= enic_open,
+	.ndo_stop		= enic_stop,
+	.ndo_start_xmit		= enic_hard_start_xmit,
+	.ndo_get_stats		= enic_get_stats,
+	.ndo_validate_addr	= eth_validate_addr,
+	.ndo_set_multicast_list	= enic_set_multicast_list,
+	.ndo_set_mac_address	= enic_set_mac_address_dynamic,
+	.ndo_change_mtu		= enic_change_mtu,
+	.ndo_vlan_rx_register	= enic_vlan_rx_register,
+	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
+	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
+	.ndo_tx_timeout		= enic_tx_timeout,
+	.ndo_set_vf_port	= enic_set_vf_port,
+	.ndo_get_vf_port	= enic_get_vf_port,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= enic_poll_controller,
+#endif
+};
+
 static const struct net_device_ops enic_netdev_ops = {
 	.ndo_open		= enic_open,
 	.ndo_stop		= enic_stop,
 	.ndo_start_xmit		= enic_hard_start_xmit,
 	.ndo_get_stats		= enic_get_stats,
 	.ndo_validate_addr	= eth_validate_addr,
-	.ndo_set_mac_address 	= eth_mac_addr,
 	.ndo_set_multicast_list	= enic_set_multicast_list,
+	.ndo_set_mac_address	= enic_set_mac_address,
 	.ndo_change_mtu		= enic_change_mtu,
 	.ndo_vlan_rx_register	= enic_vlan_rx_register,
 	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
@@ -2010,11 +2310,13 @@ static int __devinit enic_probe(struct pci_dev *pdev,
 
 	netif_carrier_off(netdev);
 
-	err = vnic_dev_init(enic->vdev, 0);
-	if (err) {
-		printk(KERN_ERR PFX
-			"vNIC dev init failed, aborting.\n");
-		goto err_out_dev_close;
+	if (!enic_is_dynamic(enic)) {
+		err = vnic_dev_init(enic->vdev, 0);
+		if (err) {
+			printk(KERN_ERR PFX
+				"vNIC dev init failed, aborting.\n");
+			goto err_out_dev_close;
+		}
 	}
 
 	err = enic_dev_init(enic);
@@ -2054,7 +2356,11 @@ static int __devinit enic_probe(struct pci_dev *pdev,
 	enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
 	enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
 
-	netdev->netdev_ops = &enic_netdev_ops;
+	if (enic_is_dynamic(enic))
+		netdev->netdev_ops = &enic_netdev_dynamic_ops;
+	else
+		netdev->netdev_ops = &enic_netdev_ops;
+
 	netdev->watchdog_timeo = 2 * HZ;
 	netdev->ethtool_ops = &enic_ethtool_ops;
 
diff --git a/drivers/net/enic/enic_res.c b/drivers/net/enic/enic_res.c
index 02839bf..9b18840 100644
--- a/drivers/net/enic/enic_res.c
+++ b/drivers/net/enic/enic_res.c
@@ -103,11 +103,6 @@ int enic_get_vnic_config(struct enic *enic)
 	return 0;
 }
 
-void enic_add_station_addr(struct enic *enic)
-{
-	vnic_dev_add_addr(enic->vdev, enic->mac_addr);
-}
-
 void enic_add_multicast_addr(struct enic *enic, u8 *addr)
 {
 	vnic_dev_add_addr(enic->vdev, addr);
diff --git a/drivers/net/enic/enic_res.h b/drivers/net/enic/enic_res.h
index abc1974..494664f 100644
--- a/drivers/net/enic/enic_res.h
+++ b/drivers/net/enic/enic_res.h
@@ -131,7 +131,6 @@ static inline void enic_queue_rq_desc(struct vnic_rq *rq,
 struct enic;
 
 int enic_get_vnic_config(struct enic *);
-void enic_add_station_addr(struct enic *enic);
 void enic_add_multicast_addr(struct enic *enic, u8 *addr);
 void enic_del_multicast_addr(struct enic *enic, u8 *addr);
 void enic_add_vlan(struct enic *enic, u16 vlanid);
diff --git a/drivers/net/enic/vnic_dev.c b/drivers/net/enic/vnic_dev.c
index d43a9d4..2b3e16d 100644
--- a/drivers/net/enic/vnic_dev.c
+++ b/drivers/net/enic/vnic_dev.c
@@ -530,7 +530,7 @@ void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
 		printk(KERN_ERR "Can't set packet filter\n");
 }
 
-void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
+int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
 {
 	u64 a0 = 0, a1 = 0;
 	int wait = 1000;
@@ -543,9 +543,11 @@ void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
 	err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
 	if (err)
 		printk(KERN_ERR "Can't add addr [%pM], %d\n", addr, err);
+
+	return err;
 }
 
-void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
+int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
 {
 	u64 a0 = 0, a1 = 0;
 	int wait = 1000;
@@ -558,6 +560,8 @@ void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
 	err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
 	if (err)
 		printk(KERN_ERR "Can't del addr [%pM], %d\n", addr, err);
+
+	return err;
 }
 
 int vnic_dev_raise_intr(struct vnic_dev *vdev, u16 intr)
@@ -682,6 +686,56 @@ int vnic_dev_init(struct vnic_dev *vdev, int arg)
 	return r;
 }
 
+int vnic_dev_init_done(struct vnic_dev *vdev, int *done, int *err)
+{
+	u64 a0 = 0, a1 = 0;
+	int wait = 1000;
+	int ret;
+
+	*done = 0;
+
+	ret = vnic_dev_cmd(vdev, CMD_INIT_STATUS, &a0, &a1, wait);
+	if (ret)
+		return ret;
+
+	*done = (a0 == 0);
+
+	*err = (a0 == 0) ? a1 : 0;
+
+	return 0;
+}
+
+int vnic_dev_init_prov(struct vnic_dev *vdev, u8 *buf, u32 len)
+{
+	u64 a0, a1 = len;
+	int wait = 1000;
+	u64 prov_pa;
+	void *prov_buf;
+	int ret;
+
+	prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
+	if (!prov_buf)
+		return -ENOMEM;
+
+	memcpy(prov_buf, buf, len);
+
+	a0 = prov_pa;
+
+	ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO, &a0, &a1, wait);
+
+	pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
+
+	return ret;
+}
+
+int vnic_dev_deinit(struct vnic_dev *vdev)
+{
+	u64 a0 = 0, a1 = 0;
+	int wait = 1000;
+
+	return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
+}
+
 int vnic_dev_link_status(struct vnic_dev *vdev)
 {
 	if (vdev->linkstatus)
diff --git a/drivers/net/enic/vnic_dev.h b/drivers/net/enic/vnic_dev.h
index f5be640..caccce3 100644
--- a/drivers/net/enic/vnic_dev.h
+++ b/drivers/net/enic/vnic_dev.h
@@ -103,8 +103,8 @@ int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats);
 int vnic_dev_hang_notify(struct vnic_dev *vdev);
 void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
 	int broadcast, int promisc, int allmulti);
-void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr);
-void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr);
+int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr);
+int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr);
 int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr);
 int vnic_dev_raise_intr(struct vnic_dev *vdev, u16 intr);
 int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
@@ -124,6 +124,9 @@ int vnic_dev_disable(struct vnic_dev *vdev);
 int vnic_dev_open(struct vnic_dev *vdev, int arg);
 int vnic_dev_open_done(struct vnic_dev *vdev, int *done);
 int vnic_dev_init(struct vnic_dev *vdev, int arg);
+int vnic_dev_init_done(struct vnic_dev *vdev, int *done, int *err);
+int vnic_dev_init_prov(struct vnic_dev *vdev, u8 *buf, u32 len);
+int vnic_dev_deinit(struct vnic_dev *vdev);
 int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg);
 int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done);
 void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
diff --git a/drivers/net/enic/vnic_vic.c b/drivers/net/enic/vnic_vic.c
new file mode 100644
index 0000000..d769772
--- /dev/null
+++ b/drivers/net/enic/vnic_vic.c
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+
+#include "vnic_vic.h"
+
+struct vic_provinfo *vic_provinfo_alloc(gfp_t flags, u8 *oui, u8 type)
+{
+	struct vic_provinfo *vp = kzalloc(VIC_PROVINFO_MAX_DATA, flags);
+
+	if (!vp || !oui)
+		return NULL;
+
+	memcpy(vp->oui, oui, sizeof(vp->oui));
+	vp->type = type;
+	vp->length = htonl(sizeof(vp->num_tlvs));
+
+	return vp;
+}
+
+void vic_provinfo_free(struct vic_provinfo *vp)
+{
+	kfree(vp);
+}
+
+int vic_provinfo_add_tlv(struct vic_provinfo *vp, u16 type, u16 length,
+	void *value)
+{
+	struct vic_provinfo_tlv *tlv;
+
+	if (!vp || !value)
+		return -EINVAL;
+
+	if (ntohl(vp->length) + sizeof(*tlv) + length >
+		VIC_PROVINFO_MAX_TLV_DATA)
+		return -ENOMEM;
+
+	tlv = (struct vic_provinfo_tlv *)((u8 *)vp->tlv +
+		ntohl(vp->length) - sizeof(vp->num_tlvs));
+
+	tlv->type = htons(type);
+	tlv->length = htons(length);
+	memcpy(tlv->value, value, length);
+
+	vp->num_tlvs = htonl(ntohl(vp->num_tlvs) + 1);
+	vp->length = htonl(ntohl(vp->length) + sizeof(*tlv) + length);
+
+	return 0;
+}
+
+size_t vic_provinfo_size(struct vic_provinfo *vp)
+{
+	return vp ?  ntohl(vp->length) + sizeof(*vp) - sizeof(vp->num_tlvs) : 0;
+}
diff --git a/drivers/net/enic/vnic_vic.h b/drivers/net/enic/vnic_vic.h
new file mode 100644
index 0000000..085c2a2
--- /dev/null
+++ b/drivers/net/enic/vnic_vic.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
+ *
+ * This program is free software; you may redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#ifndef _VNIC_VIC_H_
+#define _VNIC_VIC_H_
+
+/* Note: All integer fields in NETWORK byte order */
+
+/* Note: String field lengths include null char */
+
+#define VIC_PROVINFO_CISCO_OUI		{ 0x00, 0x00, 0x0c }
+#define VIC_PROVINFO_LINUX_TYPE		0x2
+
+enum vic_linux_prov_tlv_type {
+	VIC_LINUX_PROV_TLV_PORT_PROFILE_NAME_STR = 0,
+	VIC_LINUX_PROV_TLV_CLIENT_MAC_ADDR = 1,			/* u8[6] */
+	VIC_LINUX_PROV_TLV_CLIENT_NAME_STR = 2,
+	VIC_LINUX_PROV_TLV_HOST_UUID_STR = 8,
+	VIC_LINUX_PROV_TLV_CLIENT_UUID_STR = 9,
+};
+
+struct vic_provinfo {
+	u8 oui[3];		/* OUI of data provider */
+	u8 type;		/* provider-specific type */
+	u32 length;		/* length of data below */
+	u32 num_tlvs;		/* number of tlvs */
+	struct vic_provinfo_tlv {
+		u16 type;
+		u16 length;
+		u8 value[0];
+	} tlv[0];
+} __attribute__ ((packed));
+
+#define VIC_PROVINFO_MAX_DATA		1385
+#define VIC_PROVINFO_MAX_TLV_DATA (VIC_PROVINFO_MAX_DATA - \
+	sizeof(struct vic_provinfo))
+
+struct vic_provinfo *vic_provinfo_alloc(gfp_t flags, u8 *oui, u8 type);
+void vic_provinfo_free(struct vic_provinfo *vp);
+int vic_provinfo_add_tlv(struct vic_provinfo *vp, u16 type, u16 length,
+	void *value);
+size_t vic_provinfo_size(struct vic_provinfo *vp);
+
+#endif	/* _VNIC_VIC_H_ */


^ permalink raw reply related

* Re: [net-next-2.6 V8 PATCH 0/2] Add virtual port netlink support
From: Stephen Hemminger @ 2010-05-15  1:29 UTC (permalink / raw)
  To: Scott Feldman; +Cc: davem, netdev, chrisw, arnd, kaber
In-Reply-To: <20100515010415.21260.35219.stgit@savbu-pc100.cisco.com>

On Fri, 14 May 2010 18:04:23 -0700
Scott Feldman <scofeldm@cisco.com> wrote:

> [Add symmetrical set/get layout per Patrick McHardy suggestions]
> 
> The following series adds virtual port netlink support and adds an
> implementation to Cisco's enic netdev driver:
> 
> 	1/2: Adds virtual netlink RTM_SETLINK/RTM_GETLINK support, and
> 	     adds matching netdev ops net_{set|get}_vf_port.
> 
> 	2/2: Adds enic support for net_{set|get}_vf_port for enic
> 	     dynamic devices.
> 
> Signed-off-by: Scott Feldman <scofeldm@cisco.com>
> Signed-off-by: Roopa Prabhu<roprabhu@cisco.com>
> --
> To unsubscribe from this list: send the line "unsubscribe netdev" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

I assume there will be some documentation for this when the patch
to iproute for supporting this comes out.

^ permalink raw reply

* Re: [PATCH] skge: use the DMA state API instead of the pci equivalents
From: Stephen Hemminger @ 2010-05-15  1:33 UTC (permalink / raw)
  To: FUJITA Tomonori; +Cc: netdev
In-Reply-To: <20100428095730K.fujita.tomonori@lab.ntt.co.jp>

On Wed, 28 Apr 2010 09:57:04 +0900
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> wrote:

> Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>

Yes, this works fine. Sorry for the delay but that test system
was offline for several months and the disk went bad.

Acked-by: Stephen Hemminger <shemminger@vyatta.com>

^ permalink raw reply

* Re: [net-next-2.6 V8 PATCH 0/2] Add virtual port netlink support
From: Scott Feldman @ 2010-05-15  1:37 UTC (permalink / raw)
  To: Stephen Hemminger; +Cc: davem, netdev, chrisw, arnd, kaber
In-Reply-To: <20100514182957.4998bea4@nehalam>

On 5/14/10 6:29 PM, "Stephen Hemminger" <shemminger@vyatta.com> wrote:

> On Fri, 14 May 2010 18:04:23 -0700
> Scott Feldman <scofeldm@cisco.com> wrote:
> 
>> [Add symmetrical set/get layout per Patrick McHardy suggestions]
>> 
>> The following series adds virtual port netlink support and adds an
>> implementation to Cisco's enic netdev driver:
>> 
>> 1/2: Adds virtual netlink RTM_SETLINK/RTM_GETLINK support, and
>>     adds matching netdev ops net_{set|get}_vf_port.
>> 
>> 2/2: Adds enic support for net_{set|get}_vf_port for enic
>>     dynamic devices.
>> 
>> Signed-off-by: Scott Feldman <scofeldm@cisco.com>
>> Signed-off-by: Roopa Prabhu<roprabhu@cisco.com>
>> --
>> To unsubscribe from this list: send the line "unsubscribe netdev" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> I assume there will be some documentation for this when the patch
> to iproute for supporting this comes out.

Absolutely.  Been waiting to send iproute2 patch until dust has settled with
kernel patch.

-scott


^ permalink raw reply

* [patch] pm_qos update fixing mmotm 2010-05-11 -dies in pm_qos_update_request()
From: mgross @ 2010-05-15  2:19 UTC (permalink / raw)
  To: rjw, Valdis.Kletnieks, mgross
  Cc: akpm, davem, linux-kernel, e1000-devel, netdev, linux-pm

I apologize for the goofy email address.  

The following is a fix for the crash reported by Valdis.

The problem was that the original pm_qos silently fails when a request
update is passed to a parameter that has not been added to the list
yet.  It seems that the e1000e is doing this.  This update restores this
behavior.

I need to think about how to better handle such abuse, but for now this
restores the original behavior.

Signed-off-by: markgross <markgross@thegnar.org>
--mgross


>From 66700dc26ab7582bc7351541ba2e6241cc4b4144 Mon Sep 17 00:00:00 2001
From: mgross <mgross@mgross-desktop.(none)>
Date: Fri, 14 May 2010 19:05:44 -0700
Subject: [PATCH] PM QOS update
 This patch changes the string based list management to a handle base
 implementation to help with the hot path use of pm-qos, it also renames
 much of the API to use "request" as opposed to "requirement" that was
 used in the initial implementation.  I did this because request more
 accurately represents what it actually does.

Also, I added a string based ABI for users wanting to use a string
interface.  So if the user writes 0xDDDDDDDD formatted hex it will be
accepted by the interface.  (someone asked me for it and I don't think
it hurts anything.)

This patch updates some documentation input I got from Randy.

This version handles a use case where pm_qos update requests need to
silently not fail if the update is being sent to a handle that is null.
This is what happened in the initial version of pm-qos if you used a
string that wasn't in the list.

Signed-off-by: markgross <mgross@linux.intel.com>
---
 Documentation/power/pm_qos_interface.txt |   48 ++++---
 drivers/acpi/processor_idle.c            |    2 +-
 drivers/cpuidle/governors/ladder.c       |    2 +-
 drivers/cpuidle/governors/menu.c         |    2 +-
 drivers/net/e1000e/netdev.c              |   22 ++--
 drivers/net/igbvf/netdev.c               |    6 +-
 drivers/net/wireless/ipw2x00/ipw2100.c   |   11 +-
 include/linux/netdevice.h                |    4 +
 include/linux/pm_qos_params.h            |   14 +-
 include/sound/pcm.h                      |    3 +-
 kernel/pm_qos_params.c                   |  217 +++++++++++++++---------------
 net/mac80211/mlme.c                      |    2 +-
 sound/core/pcm.c                         |    3 -
 sound/core/pcm_native.c                  |   14 +-
 14 files changed, 179 insertions(+), 171 deletions(-)

diff --git a/Documentation/power/pm_qos_interface.txt b/Documentation/power/pm_qos_interface.txt
index c40866e..bfed898 100644
--- a/Documentation/power/pm_qos_interface.txt
+++ b/Documentation/power/pm_qos_interface.txt
@@ -18,44 +18,46 @@ and pm_qos_params.h.  This is done because having the available parameters
 being runtime configurable or changeable from a driver was seen as too easy to
 abuse.
 
-For each parameter a list of performance requirements is maintained along with
+For each parameter a list of performance requests is maintained along with
 an aggregated target value.  The aggregated target value is updated with
-changes to the requirement list or elements of the list.  Typically the
-aggregated target value is simply the max or min of the requirement values held
+changes to the request list or elements of the list.  Typically the
+aggregated target value is simply the max or min of the request values held
 in the parameter list elements.
 
 From kernel mode the use of this interface is simple:
-pm_qos_add_requirement(param_id, name, target_value):
-Will insert a named element in the list for that identified PM_QOS parameter
-with the target value.  Upon change to this list the new target is recomputed
-and any registered notifiers are called only if the target value is now
-different.
 
-pm_qos_update_requirement(param_id, name, new_target_value):
-Will search the list identified by the param_id for the named list element and
-then update its target value, calling the notification tree if the aggregated
-target is changed.  with that name is already registered.
+handle = pm_qos_add_request(param_class, target_value):
+Will insert an element into the list for that identified PM_QOS class with the
+target value.  Upon change to this list the new target is recomputed and any
+registered notifiers are called only if the target value is now different.
+Clients of pm_qos need to save the returned handle.
 
-pm_qos_remove_requirement(param_id, name):
-Will search the identified list for the named element and remove it, after
-removal it will update the aggregate target and call the notification tree if
-the target was changed as a result of removing the named requirement.
+void pm_qos_update_request(handle, new_target_value):
+Will update the list element pointed to by the handle with the new target value
+and recompute the new aggregated target, calling the notification tree if the
+target is changed.
+
+void pm_qos_remove_request(handle):
+Will remove the element.  After removal it will update the aggregate target and
+call the notification tree if the target was changed as a result of removing
+the request.
 
 
 From user mode:
-Only processes can register a pm_qos requirement.  To provide for automatic
-cleanup for process the interface requires the process to register its
-parameter requirements in the following way:
+Only processes can register a pm_qos request.  To provide for automatic
+cleanup of a process, the interface requires the process to register its
+parameter requests in the following way:
 
 To register the default pm_qos target for the specific parameter, the process
 must open one of /dev/[cpu_dma_latency, network_latency, network_throughput]
 
 As long as the device node is held open that process has a registered
-requirement on the parameter.  The name of the requirement is "process_<PID>"
-derived from the current->pid from within the open system call.
+request on the parameter.
 
-To change the requested target value the process needs to write a s32 value to
-the open device node.  This translates to a pm_qos_update_requirement call.
+To change the requested target value the process needs to write an s32 value to
+the open device node.  Alternatively the user mode program could write a hex
+string for the value using 10 char long format e.g. "0x12345678".  This
+translates to a pm_qos_update_request call.
 
 To remove the user mode request for a target value simply close the device
 node.
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 5939e7f..c3817e1 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -698,7 +698,7 @@ static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
 		   "max_cstate:              C%d\n"
 		   "maximum allowed latency: %d usec\n",
 		   pr->power.state ? pr->power.state - pr->power.states : 0,
-		   max_cstate, pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
+		   max_cstate, pm_qos_request(PM_QOS_CPU_DMA_LATENCY));
 
 	seq_puts(seq, "states:\n");
 
diff --git a/drivers/cpuidle/governors/ladder.c b/drivers/cpuidle/governors/ladder.c
index 1c1ceb4..12c9890 100644
--- a/drivers/cpuidle/governors/ladder.c
+++ b/drivers/cpuidle/governors/ladder.c
@@ -67,7 +67,7 @@ static int ladder_select_state(struct cpuidle_device *dev)
 	struct ladder_device *ldev = &__get_cpu_var(ladder_devices);
 	struct ladder_device_state *last_state;
 	int last_residency, last_idx = ldev->last_state_idx;
-	int latency_req = pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY);
+	int latency_req = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
 
 	/* Special case when user has set very strict latency requirement */
 	if (unlikely(latency_req == 0)) {
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index f8e57c6..b81ad9c 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -182,7 +182,7 @@ static u64 div_round64(u64 dividend, u32 divisor)
 static int menu_select(struct cpuidle_device *dev)
 {
 	struct menu_device *data = &__get_cpu_var(menu_devices);
-	int latency_req = pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY);
+	int latency_req = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
 	int i;
 	int multiplier;
 
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index dbf8178..d5d55c6 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -2524,12 +2524,12 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)
 			 * excessive C-state transition latencies result in
 			 * dropped transactions.
 			 */
-			pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
-						  adapter->netdev->name, 55);
+			pm_qos_update_request(
+				adapter->netdev->pm_qos_req, 55);
 		} else {
-			pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
-						  adapter->netdev->name,
-						  PM_QOS_DEFAULT_VALUE);
+			pm_qos_update_request(
+				adapter->netdev->pm_qos_req,
+				PM_QOS_DEFAULT_VALUE);
 		}
 	}
 
@@ -2824,8 +2824,8 @@ int e1000e_up(struct e1000_adapter *adapter)
 
 	/* DMA latency requirement to workaround early-receive/jumbo issue */
 	if (adapter->flags & FLAG_HAS_ERT)
-		pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
-		                       adapter->netdev->name,
+		adapter->netdev->pm_qos_req =
+			pm_qos_add_request(PM_QOS_CPU_DMA_LATENCY,
 				       PM_QOS_DEFAULT_VALUE);
 
 	/* hardware has been reset, we need to reload some things */
@@ -2887,9 +2887,11 @@ void e1000e_down(struct e1000_adapter *adapter)
 	e1000_clean_tx_ring(adapter);
 	e1000_clean_rx_ring(adapter);
 
-	if (adapter->flags & FLAG_HAS_ERT)
-		pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
-		                          adapter->netdev->name);
+	if (adapter->flags & FLAG_HAS_ERT) {
+		pm_qos_remove_request(
+			      adapter->netdev->pm_qos_req);
+		adapter->netdev->pm_qos_req = NULL;
+	}
 
 	/*
 	 * TODO: for power management, we could drop the link and
diff --git a/drivers/net/igbvf/netdev.c b/drivers/net/igbvf/netdev.c
index 1b1edad..f16e981 100644
--- a/drivers/net/igbvf/netdev.c
+++ b/drivers/net/igbvf/netdev.c
@@ -48,6 +48,7 @@
 #define DRV_VERSION "1.0.0-k0"
 char igbvf_driver_name[] = "igbvf";
 const char igbvf_driver_version[] = DRV_VERSION;
+struct pm_qos_request_list *igbvf_driver_pm_qos_req;
 static const char igbvf_driver_string[] =
 				"Intel(R) Virtual Function Network Driver";
 static const char igbvf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
@@ -2899,7 +2900,7 @@ static int __init igbvf_init_module(void)
 	printk(KERN_INFO "%s\n", igbvf_copyright);
 
 	ret = pci_register_driver(&igbvf_driver);
-	pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, igbvf_driver_name,
+	igbvf_driver_pm_qos_req = pm_qos_add_request(PM_QOS_CPU_DMA_LATENCY,
 	                       PM_QOS_DEFAULT_VALUE);
 
 	return ret;
@@ -2915,7 +2916,8 @@ module_init(igbvf_init_module);
 static void __exit igbvf_exit_module(void)
 {
 	pci_unregister_driver(&igbvf_driver);
-	pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, igbvf_driver_name);
+	pm_qos_remove_request(igbvf_driver_pm_qos_req);
+	igbvf_driver_pm_qos_req = NULL;
 }
 module_exit(igbvf_exit_module);
 
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index 9b72c45..2b05fe5 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -174,6 +174,8 @@ that only one external action is invoked at a time.
 #define DRV_DESCRIPTION	"Intel(R) PRO/Wireless 2100 Network Driver"
 #define DRV_COPYRIGHT	"Copyright(c) 2003-2006 Intel Corporation"
 
+struct pm_qos_request_list *ipw2100_pm_qos_req;
+
 /* Debugging stuff */
 #ifdef CONFIG_IPW2100_DEBUG
 #define IPW2100_RX_DEBUG	/* Reception debugging */
@@ -1739,7 +1741,7 @@ static int ipw2100_up(struct ipw2100_priv *priv, int deferred)
 	/* the ipw2100 hardware really doesn't want power management delays
 	 * longer than 175usec
 	 */
-	pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100", 175);
+	pm_qos_update_request(ipw2100_pm_qos_req, 175);
 
 	/* If the interrupt is enabled, turn it off... */
 	spin_lock_irqsave(&priv->low_lock, flags);
@@ -1887,8 +1889,7 @@ static void ipw2100_down(struct ipw2100_priv *priv)
 	ipw2100_disable_interrupts(priv);
 	spin_unlock_irqrestore(&priv->low_lock, flags);
 
-	pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100",
-			PM_QOS_DEFAULT_VALUE);
+	pm_qos_update_request(ipw2100_pm_qos_req, PM_QOS_DEFAULT_VALUE);
 
 	/* We have to signal any supplicant if we are disassociating */
 	if (associated)
@@ -6669,7 +6670,7 @@ static int __init ipw2100_init(void)
 	if (ret)
 		goto out;
 
-	pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100",
+	ipw2100_pm_qos_req = pm_qos_add_request(PM_QOS_CPU_DMA_LATENCY,
 			PM_QOS_DEFAULT_VALUE);
 #ifdef CONFIG_IPW2100_DEBUG
 	ipw2100_debug_level = debug;
@@ -6692,7 +6693,7 @@ static void __exit ipw2100_exit(void)
 			   &driver_attr_debug_level);
 #endif
 	pci_unregister_driver(&ipw2100_pci_driver);
-	pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100");
+	pm_qos_remove_request(ipw2100_pm_qos_req);
 }
 
 module_init(ipw2100_init);
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index fa8b476..3857517 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -31,6 +31,7 @@
 #include <linux/if_link.h>
 
 #ifdef __KERNEL__
+#include <linux/pm_qos_params.h>
 #include <linux/timer.h>
 #include <linux/delay.h>
 #include <linux/mm.h>
@@ -711,6 +712,9 @@ struct net_device {
 	 * the interface.
 	 */
 	char			name[IFNAMSIZ];
+
+	struct pm_qos_request_list *pm_qos_req;
+
 	/* device name hash chain */
 	struct hlist_node	name_hlist;
 	/* snmp alias */
diff --git a/include/linux/pm_qos_params.h b/include/linux/pm_qos_params.h
index d74f75e..8ba440e 100644
--- a/include/linux/pm_qos_params.h
+++ b/include/linux/pm_qos_params.h
@@ -14,12 +14,14 @@
 #define PM_QOS_NUM_CLASSES 4
 #define PM_QOS_DEFAULT_VALUE -1
 
-int pm_qos_add_requirement(int qos, char *name, s32 value);
-int pm_qos_update_requirement(int qos, char *name, s32 new_value);
-void pm_qos_remove_requirement(int qos, char *name);
+struct pm_qos_request_list;
 
-int pm_qos_requirement(int qos);
+struct pm_qos_request_list *pm_qos_add_request(int pm_qos_class, s32 value);
+void pm_qos_update_request(struct pm_qos_request_list *pm_qos_req,
+		s32 new_value);
+void pm_qos_remove_request(struct pm_qos_request_list *pm_qos_req);
 
-int pm_qos_add_notifier(int qos, struct notifier_block *notifier);
-int pm_qos_remove_notifier(int qos, struct notifier_block *notifier);
+int pm_qos_request(int pm_qos_class);
+int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier);
+int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier);
 
diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 8b611a5..dd76cde 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -29,6 +29,7 @@
 #include <linux/poll.h>
 #include <linux/mm.h>
 #include <linux/bitops.h>
+#include <linux/pm_qos_params.h>
 
 #define snd_pcm_substream_chip(substream) ((substream)->private_data)
 #define snd_pcm_chip(pcm) ((pcm)->private_data)
@@ -365,7 +366,7 @@ struct snd_pcm_substream {
 	int number;
 	char name[32];			/* substream name */
 	int stream;			/* stream (direction) */
-	char latency_id[20];		/* latency identifier */
+	struct pm_qos_request_list *latency_pm_qos_req; /* pm_qos request */
 	size_t buffer_bytes_max;	/* limit ring buffer size */
 	struct snd_dma_buffer dma_buffer;
 	unsigned int dma_buf_id;
diff --git a/kernel/pm_qos_params.c b/kernel/pm_qos_params.c
index 3db49b9..dfa1425 100644
--- a/kernel/pm_qos_params.c
+++ b/kernel/pm_qos_params.c
@@ -2,7 +2,7 @@
  * This module exposes the interface to kernel space for specifying
  * QoS dependencies.  It provides infrastructure for registration of:
  *
- * Dependents on a QoS value : register requirements
+ * Dependents on a QoS value : register requests
  * Watchers of QoS value : get notified when target QoS value changes
  *
  * This QoS design is best effort based.  Dependents register their QoS needs.
@@ -14,19 +14,21 @@
  * timeout: usec <-- currently not used.
  * throughput: kbs (kilo byte / sec)
  *
- * There are lists of pm_qos_objects each one wrapping requirements, notifiers
+ * There are lists of pm_qos_objects each one wrapping requests, notifiers
  *
- * User mode requirements on a QOS parameter register themselves to the
+ * User mode requests on a QOS parameter register themselves to the
  * subsystem by opening the device node /dev/... and writing there request to
  * the node.  As long as the process holds a file handle open to the node the
  * client continues to be accounted for.  Upon file release the usermode
- * requirement is removed and a new qos target is computed.  This way when the
- * requirement that the application has is cleaned up when closes the file
+ * request is removed and a new qos target is computed.  This way when the
+ * request that the application has is cleaned up when closes the file
  * pointer or exits the pm_qos_object will get an opportunity to clean up.
  *
  * Mark Gross <mgross@linux.intel.com>
  */
 
+/*#define DEBUG*/
+
 #include <linux/pm_qos_params.h>
 #include <linux/sched.h>
 #include <linux/spinlock.h>
@@ -42,25 +44,25 @@
 #include <linux/uaccess.h>
 
 /*
- * locking rule: all changes to requirements or notifiers lists
+ * locking rule: all changes to requests or notifiers lists
  * or pm_qos_object list and pm_qos_objects need to happen with pm_qos_lock
  * held, taken with _irqsave.  One lock to rule them all
  */
-struct requirement_list {
+struct pm_qos_request_list {
 	struct list_head list;
 	union {
 		s32 value;
 		s32 usec;
 		s32 kbps;
 	};
-	char *name;
+	int pm_qos_class;
 };
 
 static s32 max_compare(s32 v1, s32 v2);
 static s32 min_compare(s32 v1, s32 v2);
 
 struct pm_qos_object {
-	struct requirement_list requirements;
+	struct pm_qos_request_list requests;
 	struct blocking_notifier_head *notifiers;
 	struct miscdevice pm_qos_power_miscdev;
 	char *name;
@@ -72,7 +74,7 @@ struct pm_qos_object {
 static struct pm_qos_object null_pm_qos;
 static BLOCKING_NOTIFIER_HEAD(cpu_dma_lat_notifier);
 static struct pm_qos_object cpu_dma_pm_qos = {
-	.requirements = {LIST_HEAD_INIT(cpu_dma_pm_qos.requirements.list)},
+	.requests = {LIST_HEAD_INIT(cpu_dma_pm_qos.requests.list)},
 	.notifiers = &cpu_dma_lat_notifier,
 	.name = "cpu_dma_latency",
 	.default_value = 2000 * USEC_PER_SEC,
@@ -82,7 +84,7 @@ static struct pm_qos_object cpu_dma_pm_qos = {
 
 static BLOCKING_NOTIFIER_HEAD(network_lat_notifier);
 static struct pm_qos_object network_lat_pm_qos = {
-	.requirements = {LIST_HEAD_INIT(network_lat_pm_qos.requirements.list)},
+	.requests = {LIST_HEAD_INIT(network_lat_pm_qos.requests.list)},
 	.notifiers = &network_lat_notifier,
 	.name = "network_latency",
 	.default_value = 2000 * USEC_PER_SEC,
@@ -93,8 +95,7 @@ static struct pm_qos_object network_lat_pm_qos = {
 
 static BLOCKING_NOTIFIER_HEAD(network_throughput_notifier);
 static struct pm_qos_object network_throughput_pm_qos = {
-	.requirements =
-		{LIST_HEAD_INIT(network_throughput_pm_qos.requirements.list)},
+	.requests = {LIST_HEAD_INIT(network_throughput_pm_qos.requests.list)},
 	.notifiers = &network_throughput_notifier,
 	.name = "network_throughput",
 	.default_value = 0,
@@ -135,31 +136,34 @@ static s32 min_compare(s32 v1, s32 v2)
 }
 
 
-static void update_target(int target)
+static void update_target(int pm_qos_class)
 {
 	s32 extreme_value;
-	struct requirement_list *node;
+	struct pm_qos_request_list *node;
 	unsigned long flags;
 	int call_notifier = 0;
 
 	spin_lock_irqsave(&pm_qos_lock, flags);
-	extreme_value = pm_qos_array[target]->default_value;
+	extreme_value = pm_qos_array[pm_qos_class]->default_value;
 	list_for_each_entry(node,
-			&pm_qos_array[target]->requirements.list, list) {
-		extreme_value = pm_qos_array[target]->comparitor(
+			&pm_qos_array[pm_qos_class]->requests.list, list) {
+		extreme_value = pm_qos_array[pm_qos_class]->comparitor(
 				extreme_value, node->value);
 	}
-	if (atomic_read(&pm_qos_array[target]->target_value) != extreme_value) {
+	if (atomic_read(&pm_qos_array[pm_qos_class]->target_value) !=
+			extreme_value) {
 		call_notifier = 1;
-		atomic_set(&pm_qos_array[target]->target_value, extreme_value);
-		pr_debug(KERN_ERR "new target for qos %d is %d\n", target,
-			atomic_read(&pm_qos_array[target]->target_value));
+		atomic_set(&pm_qos_array[pm_qos_class]->target_value,
+				extreme_value);
+		pr_debug(KERN_ERR "new target for qos %d is %d\n", pm_qos_class,
+			atomic_read(&pm_qos_array[pm_qos_class]->target_value));
 	}
 	spin_unlock_irqrestore(&pm_qos_lock, flags);
 
 	if (call_notifier)
-		blocking_notifier_call_chain(pm_qos_array[target]->notifiers,
-			(unsigned long) extreme_value, NULL);
+		blocking_notifier_call_chain(
+				pm_qos_array[pm_qos_class]->notifiers,
+					(unsigned long) extreme_value, NULL);
 }
 
 static int register_pm_qos_misc(struct pm_qos_object *qos)
@@ -185,125 +189,113 @@ static int find_pm_qos_object_by_minor(int minor)
 }
 
 /**
- * pm_qos_requirement - returns current system wide qos expectation
+ * pm_qos_request - returns current system wide qos expectation
  * @pm_qos_class: identification of which qos value is requested
  *
  * This function returns the current target value in an atomic manner.
  */
-int pm_qos_requirement(int pm_qos_class)
+int pm_qos_request(int pm_qos_class)
 {
 	return atomic_read(&pm_qos_array[pm_qos_class]->target_value);
 }
-EXPORT_SYMBOL_GPL(pm_qos_requirement);
+EXPORT_SYMBOL_GPL(pm_qos_request);
 
 /**
- * pm_qos_add_requirement - inserts new qos request into the list
+ * pm_qos_add_request - inserts new qos request into the list
  * @pm_qos_class: identifies which list of qos request to us
- * @name: identifies the request
  * @value: defines the qos request
  *
  * This function inserts a new entry in the pm_qos_class list of requested qos
  * performance characteristics.  It recomputes the aggregate QoS expectations
- * for the pm_qos_class of parameters.
+ * for the pm_qos_class of parameters, and returns the pm_qos_request list
+ * element as a handle for use in updating and removal.  Call needs to save
+ * this handle for later use.
  */
-int pm_qos_add_requirement(int pm_qos_class, char *name, s32 value)
+struct pm_qos_request_list *pm_qos_add_request(int pm_qos_class, s32 value)
 {
-	struct requirement_list *dep;
+	struct pm_qos_request_list *dep;
 	unsigned long flags;
 
-	dep = kzalloc(sizeof(struct requirement_list), GFP_KERNEL);
+	dep = kzalloc(sizeof(struct pm_qos_request_list), GFP_KERNEL);
 	if (dep) {
 		if (value == PM_QOS_DEFAULT_VALUE)
 			dep->value = pm_qos_array[pm_qos_class]->default_value;
 		else
 			dep->value = value;
-		dep->name = kstrdup(name, GFP_KERNEL);
-		if (!dep->name)
-			goto cleanup;
+		dep->pm_qos_class = pm_qos_class;
 
 		spin_lock_irqsave(&pm_qos_lock, flags);
 		list_add(&dep->list,
-			&pm_qos_array[pm_qos_class]->requirements.list);
+			&pm_qos_array[pm_qos_class]->requests.list);
 		spin_unlock_irqrestore(&pm_qos_lock, flags);
 		update_target(pm_qos_class);
-
-		return 0;
 	}
 
-cleanup:
-	kfree(dep);
-	return -ENOMEM;
+	return dep;
 }
-EXPORT_SYMBOL_GPL(pm_qos_add_requirement);
+EXPORT_SYMBOL_GPL(pm_qos_add_request);
 
 /**
- * pm_qos_update_requirement - modifies an existing qos request
- * @pm_qos_class: identifies which list of qos request to us
- * @name: identifies the request
+ * pm_qos_update_request - modifies an existing qos request
+ * @pm_qos_req : handle to list element holding a pm_qos request to use
  * @value: defines the qos request
  *
- * Updates an existing qos requirement for the pm_qos_class of parameters along
+ * Updates an existing qos request for the pm_qos_class of parameters along
  * with updating the target pm_qos_class value.
  *
- * If the named request isn't in the list then no change is made.
+ * Attempts are made to make this code callable on hot code paths.
  */
-int pm_qos_update_requirement(int pm_qos_class, char *name, s32 new_value)
+void pm_qos_update_request(struct pm_qos_request_list *pm_qos_req,
+		s32 new_value)
 {
 	unsigned long flags;
-	struct requirement_list *node;
 	int pending_update = 0;
+	s32 temp;
 
-	spin_lock_irqsave(&pm_qos_lock, flags);
-	list_for_each_entry(node,
-		&pm_qos_array[pm_qos_class]->requirements.list, list) {
-		if (strcmp(node->name, name) == 0) {
-			if (new_value == PM_QOS_DEFAULT_VALUE)
-				node->value =
-				pm_qos_array[pm_qos_class]->default_value;
-			else
-				node->value = new_value;
+	if (pm_qos_req) { /*guard against callers passing in null */
+		spin_lock_irqsave(&pm_qos_lock, flags);
+		if (new_value == PM_QOS_DEFAULT_VALUE)
+			temp = pm_qos_array[pm_qos_req->pm_qos_class]->
+				default_value;
+		else
+			temp = new_value;
+
+		if (temp != pm_qos_req->value) {
 			pending_update = 1;
-			break;
+			pm_qos_req->value = temp;
 		}
+		spin_unlock_irqrestore(&pm_qos_lock, flags);
 	}
-	spin_unlock_irqrestore(&pm_qos_lock, flags);
 	if (pending_update)
-		update_target(pm_qos_class);
-
-	return 0;
+		update_target(pm_qos_req->pm_qos_class);
 }
-EXPORT_SYMBOL_GPL(pm_qos_update_requirement);
+EXPORT_SYMBOL_GPL(pm_qos_update_request);
 
 /**
- * pm_qos_remove_requirement - modifies an existing qos request
- * @pm_qos_class: identifies which list of qos request to us
- * @name: identifies the request
+ * pm_qos_remove_request - modifies an existing qos request
+ * @pm_qos_req: handle to request list element
  *
- * Will remove named qos request from pm_qos_class list of parameters and
- * recompute the current target value for the pm_qos_class.
+ * Will remove pm qos request from the list of requests and
+ * recompute the current target value for the pm_qos_class.  Call this
+ * on slow code paths.
  */
-void pm_qos_remove_requirement(int pm_qos_class, char *name)
+void pm_qos_remove_request(struct pm_qos_request_list *pm_qos_req)
 {
 	unsigned long flags;
-	struct requirement_list *node;
-	int pending_update = 0;
+	int qos_class;
+
+	if (pm_qos_req == NULL)
+		return;
+		/* silent return to keep pcm code cleaner */
 
+	qos_class = pm_qos_req->pm_qos_class;
 	spin_lock_irqsave(&pm_qos_lock, flags);
-	list_for_each_entry(node,
-		&pm_qos_array[pm_qos_class]->requirements.list, list) {
-		if (strcmp(node->name, name) == 0) {
-			kfree(node->name);
-			list_del(&node->list);
-			kfree(node);
-			pending_update = 1;
-			break;
-		}
-	}
+	list_del(&pm_qos_req->list);
+	kfree(pm_qos_req);
 	spin_unlock_irqrestore(&pm_qos_lock, flags);
-	if (pending_update)
-		update_target(pm_qos_class);
+	update_target(qos_class);
 }
-EXPORT_SYMBOL_GPL(pm_qos_remove_requirement);
+EXPORT_SYMBOL_GPL(pm_qos_remove_request);
 
 /**
  * pm_qos_add_notifier - sets notification entry for changes to target value
@@ -313,7 +305,7 @@ EXPORT_SYMBOL_GPL(pm_qos_remove_requirement);
  * will register the notifier into a notification chain that gets called
  * upon changes to the pm_qos_class target value.
  */
- int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier)
+int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier)
 {
 	int retval;
 
@@ -343,21 +335,16 @@ int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier)
 }
 EXPORT_SYMBOL_GPL(pm_qos_remove_notifier);
 
-#define PID_NAME_LEN 32
-
 static int pm_qos_power_open(struct inode *inode, struct file *filp)
 {
-	int ret;
 	long pm_qos_class;
-	char name[PID_NAME_LEN];
 
 	pm_qos_class = find_pm_qos_object_by_minor(iminor(inode));
 	if (pm_qos_class >= 0) {
-		filp->private_data = (void *)pm_qos_class;
-		snprintf(name, PID_NAME_LEN, "process_%d", current->pid);
-		ret = pm_qos_add_requirement(pm_qos_class, name,
-					PM_QOS_DEFAULT_VALUE);
-		if (ret >= 0)
+		filp->private_data = (void *) pm_qos_add_request(pm_qos_class,
+				PM_QOS_DEFAULT_VALUE);
+
+		if (filp->private_data)
 			return 0;
 	}
 	return -EPERM;
@@ -365,32 +352,40 @@ static int pm_qos_power_open(struct inode *inode, struct file *filp)
 
 static int pm_qos_power_release(struct inode *inode, struct file *filp)
 {
-	int pm_qos_class;
-	char name[PID_NAME_LEN];
+	struct pm_qos_request_list *req;
 
-	pm_qos_class = (long)filp->private_data;
-	snprintf(name, PID_NAME_LEN, "process_%d", current->pid);
-	pm_qos_remove_requirement(pm_qos_class, name);
+	req = (struct pm_qos_request_list *)filp->private_data;
+	pm_qos_remove_request(req);
 
 	return 0;
 }
 
+
 static ssize_t pm_qos_power_write(struct file *filp, const char __user *buf,
 		size_t count, loff_t *f_pos)
 {
 	s32 value;
-	int pm_qos_class;
-	char name[PID_NAME_LEN];
-
-	pm_qos_class = (long)filp->private_data;
-	if (count != sizeof(s32))
+	int x;
+	char ascii_value[11];
+	struct pm_qos_request_list *pm_qos_req;
+
+	if (count == sizeof(s32)) {
+		if (copy_from_user(&value, buf, sizeof(s32)))
+			return -EFAULT;
+	} else if (count == 11) { /* len('0x12345678/0') */
+		if (copy_from_user(ascii_value, buf, 11))
+			return -EFAULT;
+		x = sscanf(ascii_value, "%x", &value);
+		if (x != 1)
+			return -EINVAL;
+		pr_debug(KERN_ERR "%s, %d, 0x%x\n", ascii_value, x, value);
+	} else
 		return -EINVAL;
-	if (copy_from_user(&value, buf, sizeof(s32)))
-		return -EFAULT;
-	snprintf(name, PID_NAME_LEN, "process_%d", current->pid);
-	pm_qos_update_requirement(pm_qos_class, name, value);
 
-	return  sizeof(s32);
+	pm_qos_req = (struct pm_qos_request_list *)filp->private_data;
+	pm_qos_update_request(pm_qos_req, value);
+
+	return count;
 }
 
 
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c
index 875c8de..88f95e7 100644
--- a/net/mac80211/mlme.c
+++ b/net/mac80211/mlme.c
@@ -495,7 +495,7 @@ void ieee80211_recalc_ps(struct ieee80211_local *local, s32 latency)
 		s32 beaconint_us;
 
 		if (latency < 0)
-			latency = pm_qos_requirement(PM_QOS_NETWORK_LATENCY);
+			latency = pm_qos_request(PM_QOS_NETWORK_LATENCY);
 
 		beaconint_us = ieee80211_tu_to_usec(
 					found->vif.bss_conf.beacon_int);
diff --git a/sound/core/pcm.c b/sound/core/pcm.c
index 0d428d0..cbe815d 100644
--- a/sound/core/pcm.c
+++ b/sound/core/pcm.c
@@ -648,9 +648,6 @@ int snd_pcm_new_stream(struct snd_pcm *pcm, int stream, int substream_count)
 		substream->number = idx;
 		substream->stream = stream;
 		sprintf(substream->name, "subdevice #%i", idx);
-		snprintf(substream->latency_id, sizeof(substream->latency_id),
-			 "ALSA-PCM%d-%d%c%d", pcm->card->number, pcm->device,
-			 (stream ? 'c' : 'p'), idx);
 		substream->buffer_bytes_max = UINT_MAX;
 		if (prev == NULL)
 			pstr->substream = substream;
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 20b5982..192dd40 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -484,11 +484,13 @@ static int snd_pcm_hw_params(struct snd_pcm_substream *substream,
 	snd_pcm_timer_resolution_change(substream);
 	runtime->status->state = SNDRV_PCM_STATE_SETUP;
 
-	pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
-				substream->latency_id);
+	if (substream->latency_pm_qos_req) {
+		pm_qos_remove_request(substream->latency_pm_qos_req);
+		substream->latency_pm_qos_req = NULL;
+	}
 	if ((usecs = period_to_usecs(runtime)) >= 0)
-		pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
-					substream->latency_id, usecs);
+		substream->latency_pm_qos_req = pm_qos_add_request(
+					PM_QOS_CPU_DMA_LATENCY, usecs);
 	return 0;
  _error:
 	/* hardware might be unuseable from this time,
@@ -543,8 +545,8 @@ static int snd_pcm_hw_free(struct snd_pcm_substream *substream)
 	if (substream->ops->hw_free)
 		result = substream->ops->hw_free(substream);
 	runtime->status->state = SNDRV_PCM_STATE_OPEN;
-	pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
-		substream->latency_id);
+	pm_qos_remove_request(substream->latency_pm_qos_req);
+	substream->latency_pm_qos_req = NULL;
 	return result;
 }
 
-- 
1.6.3.3

^ permalink raw reply related

* Re: [net-next-2.6 V8 PATCH 1/2] Add netlink support for virtual port management (was iovnl)
From: Chris Wright @ 2010-05-15  3:11 UTC (permalink / raw)
  To: Scott Feldman; +Cc: davem, netdev, chrisw, arnd, kaber
In-Reply-To: <20100515010429.21260.46950.stgit@savbu-pc100.cisco.com>

* Scott Feldman (scofeldm@cisco.com) wrote:
> From: Scott Feldman <scofeldm@cisco.com>
> 
> Add new netdev ops ndo_{set|get}_vf_port to allow setting of
> port-profile on a netdev interface.  Extends netlink socket RTM_SETLINK/
> RTM_GETLINK with two new sub msgs called IFLA_VF_PORTS and IFLA_PORT_SELF
> (added to end of IFLA_cmd list).  These are both nested atrtibutes
> using this layout:
> 
>               [IFLA_NUM_VF]
>               [IFLA_VF_PORTS]
>                       [IFLA_VF_PORT]
>                               [IFLA_PORT_*], ...
>                       [IFLA_VF_PORT]
>                               [IFLA_PORT_*], ...
>                       ...
>               [IFLA_PORT_SELF]
>                       [IFLA_PORT_*], ...
> 
> These attributes are design to be set and get symmetrically.  VF_PORTS
> is a list of VF_PORTs, one for each VF, when dealing with an SR-IOV
> device.  PORT_SELF is for the PF of the SR-IOV device, in case it wants
> to also have a port-profile, or for the case where the VF==PF, like in
> enic patch 2/2 of this patch set.
> 
> A port-profile is used to configure/enable the external switch virtual port
> backing the netdev interface, not to configure the host-facing side of the
> netdev.  A port-profile is an identifier known to the switch.  How port-
> profiles are installed on the switch or how available port-profiles are
> made know to the host is outside the scope of this patch.
> 
> There are two types of port-profiles specs in the netlink msg.  The first spec
> is for 802.1Qbg (pre-)standard, VDP protocol.  The second spec is for devices
> that run a similar protocol as VDP but in firmware, thus hiding the protocol
> details.  In either case, the specs have much in common and makes sense to
> define the netlink msg as the union of the two specs.  For example, both specs
> have a notition of associating/deassociating a port-profile.  And both specs
> require some information from the hypervisor manager, such as client port
> instance ID.
> 
> The general flow is the port-profile is applied to a host netdev interface
> using RTM_SETLINK, the receiver of the RTM_SETLINK msg communicates with the
> switch, and the switch virtual port backing the host netdev interface is
> configured/enabled based on the settings defined by the port-profile.  What
> those settings comprise, and how those settings are managed is again
> outside the scope of this patch, since this patch only deals with the
> first step in the flow.
> 
> Signed-off-by: Scott Feldman <scofeldm@cisco.com>
> Signed-off-by: Roopa Prabhu<roprabhu@cisco.com>

Assuming the SR-IOV VFINFO changes go in there will be some minor patch
conflicts to be sorted out.

Acked-by: Chris Wright <chrisw@redhat.com>

^ permalink raw reply

* RE: why get different number of MSI-X vector for broadcom bnx2x every time
From: Jon Zhou @ 2010-05-15  3:12 UTC (permalink / raw)
  To: Dmitry Kravkov, netdev
In-Reply-To: <2DFD360E328B3941911E6D28B085D990107B83BB47@SJEXCHCCR01.corp.ad.broadcom.com>


hi Dmitry
the system,is the kernel(2.6.27) or the hardware?
thanks!
jon
________________________________________
From: Dmitry Kravkov [dmitry@broadcom.com]
Sent: Saturday, May 15, 2010 4:02 AM
To: Jon Zhou; netdev
Subject: RE: why get different number of MSI-X vector for broadcom bnx2x every time

Hi

Your system (from the log below) allowed bnx2x to use only 4 MSI-X vectors instead of 16 required by the driver.

Regards,
Dmitry

-----Original Message-----
From: netdev-owner@vger.kernel.org [mailto:netdev-owner@vger.kernel.org] On Behalf Of Jon Zhou
Sent: Friday, May 14, 2010 11:02 AM
To: netdev
Subject: why get different number of MSI-X vector for broadcom bnx2x every time

hi there:

bnx2x_enable_msix :

...
rc = pci_enable_msix(bp->pdev, &bp->msix_table[0],
                             BNX2X_NUM_QUEUES(bp) + offset);

        /*
         * reconfigure number of tx/rx queues according to available
         * MSI-X vectors
         */
        if (rc >= BNX2X_MIN_MSIX_VEC_CNT) {
                /* vectors available for FP */
                int fp_vec = rc - BNX2X_MSIX_VEC_FP_START;


sometimes I can run up the driver with 4 queues but most of time I can only get 2 queues
why?

May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_set_num_queues:8053(eth5)]set number of queues to 15
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7544(eth5)]msix_table[0].entry = 0 (slowpath)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7549(eth5)]msix_table[1].entry = 1 (CNIC)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[2].entry = 2 (fastpath #0)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[3].entry = 3 (fastpath #1)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[4].entry = 4 (fastpath #2)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[5].entry = 5 (fastpath #3)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[6].entry = 6 (fastpath #4)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[7].entry = 7 (fastpath #5)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[8].entry = 8 (fastpath #6)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[9].entry = 9 (fastpath #7)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[10].entry = 10 (fastpath #8)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[11].entry = 11 (fastpath #9)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[12].entry = 12 (fastpath #10)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[13].entry = 13 (fastpath #11)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[14].entry = 14 (fastpath #12)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[15].entry = 15 (fastpath #13)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[16].entry = 16 (fastpath #14)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7571(eth5)]Trying to use less MSI-X vectors: 4
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7584(eth5)]New queue configuration set: 2
May 14 01:40:16 ibm-bc-54 kernel: bnx2x: eth5: using MSI-X  IRQs: sp 4321  fp[0] 4319 ... fp[1] 4318
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_nic_init:6067(eth5)]queue[0]:  bnx2x_init_sb(ffff8803e6810780,ffff8803f9c4f000)  cl_id 0  sb 1  cos 0
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_nic_init:6067(eth5)]queue[1]:  bnx2x_init_sb(ffff8803e6810780,ffff8803fb006000)  cl_id 1  sb 2  cos 0
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_init_rx_rings:5305(eth5)]mtu 1500  rx_buf_size 1650

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^ permalink raw reply

* [PATCH] rtnetlink: make SR-IOV VF interface symmetric
From: Chris Wright @ 2010-05-15  3:14 UTC (permalink / raw)
  To: davem, kaber, mitch.a.williams; +Cc: arnd, scofeldm, shemminger, netdev

Now we have a set of nested attributes:

  IFLA_VFINFO_LIST (NESTED)
    IFLA_VF_INFO (NESTED)
      IFLA_VF_MAC
      IFLA_VF_VLAN
      IFLA_VF_TX_RATE

This allows a single set to operate on multiple attributes if desired.
Among other things, it means a dump can be replayed to set state.

The current interface has yet to be released, so this seems like
something to consider for 2.6.34.

Signed-off-by: Chris Wright <chrisw@sous-sol.org
---

Stephen, I'll send the iproute2 update as well

 include/linux/if_link.h |   23 ++++++-
 net/core/rtnetlink.c    |  159 ++++++++++++++++++++++++++++++++--------------
 2 files changed, 129 insertions(+), 53 deletions(-)

diff --git a/include/linux/if_link.h b/include/linux/if_link.h
index c9bf92c..d94963b 100644
--- a/include/linux/if_link.h
+++ b/include/linux/if_link.h
@@ -79,10 +79,7 @@ enum {
 	IFLA_NET_NS_PID,
 	IFLA_IFALIAS,
 	IFLA_NUM_VF,		/* Number of VFs if device is SR-IOV PF */
-	IFLA_VF_MAC,		/* Hardware queue specific attributes */
-	IFLA_VF_VLAN,
-	IFLA_VF_TX_RATE,	/* TX Bandwidth Allocation */
-	IFLA_VFINFO,
+	IFLA_VFINFO_LIST,
 	__IFLA_MAX
 };
 
@@ -203,6 +200,24 @@ enum macvlan_mode {
 
 /* SR-IOV virtual function managment section */
 
+enum {
+	IFLA_VF_INFO_UNSPEC,
+	IFLA_VF_INFO,
+	__IFLA_VF_INFO_MAX,
+};
+
+#define IFLA_VF_INFO_MAX (__IFLA_VF_INFO_MAX - 1)
+
+enum {
+	IFLA_VF_UNSPEC,
+	IFLA_VF_MAC,		/* Hardware queue specific attributes */
+	IFLA_VF_VLAN,
+	IFLA_VF_TX_RATE,	/* TX Bandwidth Allocation */
+	__IFLA_VF_MAX,
+};
+
+#define IFLA_VF_MAX (__IFLA_VF_MAX - 1)
+
 struct ifla_vf_mac {
 	__u32 vf;
 	__u8 mac[32]; /* MAX_ADDR_LEN */
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index fe776c9..074afcd 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -602,12 +602,19 @@ static void copy_rtnl_link_stats(struct rtnl_link_stats *a,
 	a->tx_compressed = b->tx_compressed;
 };
 
+/* All VF info */
 static inline int rtnl_vfinfo_size(const struct net_device *dev)
 {
-	if (dev->dev.parent && dev_is_pci(dev->dev.parent))
-		return dev_num_vf(dev->dev.parent) *
-			sizeof(struct ifla_vf_info);
-	else
+	if (dev->dev.parent && dev_is_pci(dev->dev.parent)) {
+		
+		int num_vfs = dev_num_vf(dev->dev.parent);
+		size_t size = nlmsg_total_size(sizeof(struct nlattr));
+		size += nlmsg_total_size(num_vfs * sizeof(struct nlattr));
+		size += num_vfs * (sizeof(struct ifla_vf_mac) +
+				  sizeof(struct ifla_vf_vlan) +
+				  sizeof(struct ifla_vf_tx_rate));
+		return size;
+	} else
 		return 0;
 }
 
@@ -629,7 +636,7 @@ static inline size_t if_nlmsg_size(const struct net_device *dev)
 	       + nla_total_size(1) /* IFLA_OPERSTATE */
 	       + nla_total_size(1) /* IFLA_LINKMODE */
 	       + nla_total_size(4) /* IFLA_NUM_VF */
-	       + nla_total_size(rtnl_vfinfo_size(dev)) /* IFLA_VFINFO */
+	       + rtnl_vfinfo_size(dev) /* IFLA_VFINFO_LIST */
 	       + rtnl_link_get_size(dev); /* IFLA_LINKINFO */
 }
 
@@ -700,14 +707,37 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev,
 
 	if (dev->netdev_ops->ndo_get_vf_config && dev->dev.parent) {
 		int i;
-		struct ifla_vf_info ivi;
 
-		NLA_PUT_U32(skb, IFLA_NUM_VF, dev_num_vf(dev->dev.parent));
-		for (i = 0; i < dev_num_vf(dev->dev.parent); i++) {
+		struct nlattr *vfinfo, *vf;
+		int num_vfs = dev_num_vf(dev->dev.parent);
+
+		NLA_PUT_U32(skb, IFLA_NUM_VF, num_vfs);
+		vfinfo = nla_nest_start(skb, IFLA_VFINFO_LIST);
+		if (!vfinfo)
+			goto nla_put_failure;
+		for (i = 0; i < num_vfs; i++) {
+			struct ifla_vf_info ivi;
+			struct ifla_vf_mac vf_mac;
+			struct ifla_vf_vlan vf_vlan;
+			struct ifla_vf_tx_rate vf_tx_rate;
 			if (dev->netdev_ops->ndo_get_vf_config(dev, i, &ivi))
 				break;
-			NLA_PUT(skb, IFLA_VFINFO, sizeof(ivi), &ivi);
+			vf_mac.vf = vf_vlan.vf = vf_tx_rate.vf = ivi.vf;
+			memcpy(vf_mac.mac, ivi.mac, sizeof(ivi.mac));
+			vf_vlan.vlan = ivi.vlan;
+			vf_vlan.qos = ivi.qos;
+			vf_tx_rate.rate = ivi.tx_rate;
+			vf = nla_nest_start(skb, IFLA_VF_INFO);
+			if (!vf) {
+				nla_nest_cancel(skb, vfinfo);
+				goto nla_put_failure;
+			}
+			NLA_PUT(skb, IFLA_VF_MAC, sizeof(vf_mac), &vf_mac);
+			NLA_PUT(skb, IFLA_VF_VLAN, sizeof(vf_vlan), &vf_vlan);
+			NLA_PUT(skb, IFLA_VF_TX_RATE, sizeof(vf_tx_rate), &vf_tx_rate);
+			nla_nest_end(skb, vf);
 		}
+		nla_nest_end(skb, vfinfo);
 	}
 	if (dev->rtnl_link_ops) {
 		if (rtnl_link_fill(skb, dev) < 0)
@@ -769,12 +799,7 @@ const struct nla_policy ifla_policy[IFLA_MAX+1] = {
 	[IFLA_LINKINFO]		= { .type = NLA_NESTED },
 	[IFLA_NET_NS_PID]	= { .type = NLA_U32 },
 	[IFLA_IFALIAS]	        = { .type = NLA_STRING, .len = IFALIASZ-1 },
-	[IFLA_VF_MAC]		= { .type = NLA_BINARY,
-				    .len = sizeof(struct ifla_vf_mac) },
-	[IFLA_VF_VLAN]		= { .type = NLA_BINARY,
-				    .len = sizeof(struct ifla_vf_vlan) },
-	[IFLA_VF_TX_RATE]	= { .type = NLA_BINARY,
-				    .len = sizeof(struct ifla_vf_tx_rate) },
+	[IFLA_VFINFO_LIST]	= {. type = NLA_NESTED },
 };
 EXPORT_SYMBOL(ifla_policy);
 
@@ -783,6 +808,19 @@ static const struct nla_policy ifla_info_policy[IFLA_INFO_MAX+1] = {
 	[IFLA_INFO_DATA]	= { .type = NLA_NESTED },
 };
 
+static const struct nla_policy ifla_vfinfo_policy[IFLA_VF_INFO_MAX+1] = {
+	[IFLA_VF_INFO]		= { .type = NLA_NESTED },
+};
+
+static const struct nla_policy ifla_vf_policy[IFLA_VF_MAX+1] = {
+	[IFLA_VF_MAC]		= { .type = NLA_BINARY,
+				    .len = sizeof(struct ifla_vf_mac) },
+	[IFLA_VF_VLAN]		= { .type = NLA_BINARY,
+				    .len = sizeof(struct ifla_vf_vlan) },
+	[IFLA_VF_TX_RATE]	= { .type = NLA_BINARY,
+				    .len = sizeof(struct ifla_vf_tx_rate) },
+};
+
 struct net *rtnl_link_get_net(struct net *src_net, struct nlattr *tb[])
 {
 	struct net *net;
@@ -812,6 +850,52 @@ static int validate_linkmsg(struct net_device *dev, struct nlattr *tb[])
 	return 0;
 }
 
+static int do_setvfinfo(struct net_device *dev, struct nlattr *attr)
+{
+	int rem, err = -EINVAL;
+	struct nlattr *vf;
+	const struct net_device_ops *ops = dev->netdev_ops;
+	
+	nla_for_each_nested(vf, attr, rem) {
+		switch (nla_type(vf)) {
+		case IFLA_VF_MAC: {
+			struct ifla_vf_mac *ivm;
+			ivm = nla_data(vf);
+			err = -EOPNOTSUPP;
+			if (ops->ndo_set_vf_mac)
+				err = ops->ndo_set_vf_mac(dev, ivm->vf,
+							  ivm->mac);
+			break;
+		}
+		case IFLA_VF_VLAN: {
+			struct ifla_vf_vlan *ivv;
+			ivv = nla_data(vf);
+			err = -EOPNOTSUPP;
+			if (ops->ndo_set_vf_vlan)
+				err = ops->ndo_set_vf_vlan(dev, ivv->vf,
+							   ivv->vlan,
+							   ivv->qos);
+			break;
+		}
+		case IFLA_VF_TX_RATE: {
+			struct ifla_vf_tx_rate *ivt;
+			ivt = nla_data(vf);
+			err = -EOPNOTSUPP;
+			if (ops->ndo_set_vf_tx_rate)
+				err = ops->ndo_set_vf_tx_rate(dev, ivt->vf,
+							      ivt->rate);
+			break;
+		}
+		default:
+			err = -EINVAL;
+			break;
+		}
+		if (err)
+			break;
+	}
+	return err;
+}
+
 static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
 		      struct nlattr **tb, char *ifname, int modified)
 {
@@ -942,40 +1026,17 @@ static int do_setlink(struct net_device *dev, struct ifinfomsg *ifm,
 		write_unlock_bh(&dev_base_lock);
 	}
 
-	if (tb[IFLA_VF_MAC]) {
-		struct ifla_vf_mac *ivm;
-		ivm = nla_data(tb[IFLA_VF_MAC]);
-		err = -EOPNOTSUPP;
-		if (ops->ndo_set_vf_mac)
-			err = ops->ndo_set_vf_mac(dev, ivm->vf, ivm->mac);
-		if (err < 0)
-			goto errout;
-		modified = 1;
-	}
-
-	if (tb[IFLA_VF_VLAN]) {
-		struct ifla_vf_vlan *ivv;
-		ivv = nla_data(tb[IFLA_VF_VLAN]);
-		err = -EOPNOTSUPP;
-		if (ops->ndo_set_vf_vlan)
-			err = ops->ndo_set_vf_vlan(dev, ivv->vf,
-						   ivv->vlan,
-						   ivv->qos);
-		if (err < 0)
-			goto errout;
-		modified = 1;
-	}
-	err = 0;
-
-	if (tb[IFLA_VF_TX_RATE]) {
-		struct ifla_vf_tx_rate *ivt;
-		ivt = nla_data(tb[IFLA_VF_TX_RATE]);
-		err = -EOPNOTSUPP;
-		if (ops->ndo_set_vf_tx_rate)
-			err = ops->ndo_set_vf_tx_rate(dev, ivt->vf, ivt->rate);
-		if (err < 0)
-			goto errout;
-		modified = 1;
+	if (tb[IFLA_VFINFO_LIST]) {
+		struct nlattr *attr;
+		int rem;
+		nla_for_each_nested(attr, tb[IFLA_VFINFO_LIST], rem) {
+			if (nla_type(attr) != IFLA_VF_INFO)
+				goto errout;
+			err = do_setvfinfo(dev, attr);
+			if (err < 0)
+				goto errout;
+			modified = 1;
+		}
 	}
 	err = 0;
 
-- 
1.6.5.2


^ permalink raw reply related

* Re: loosing IPMI-card by loading netconsole
From: Carsten Aulbert @ 2010-05-15  8:26 UTC (permalink / raw)
  To: "Brandeburg, Jesse"
  Cc: Tejun Heo, Ronciak, John, Henning Fehrmann, Kirsher, Jeffrey T,
	Allan, Bruce W, Waskiewicz Jr, Peter P, netdev@vger.kernel.org,
	Matt Mackall, e1000-devel
In-Reply-To: <1273857641.3057.20.camel@localhost.localdomain>

[-- Attachment #1: Type: Text/Plain, Size: 12411 bytes --]

Hi all,

I'll try to gather some information:

The system under question is Supermicro PSDML-LN2+ based, eth0 is a 82573E 
while eth1 is a 82573L. IPMI is piggy-bagged onto eth0, eth1 is our "data 
network" running with large jumbo frames:

# ifconfig
eth0      Link encap:Ethernet  HWaddr 00:30:48:96:e1:e2
          inet addr:172.26.1.26  Bcast:172.31.255.255  Mask:255.240.0.0
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:673128 errors:0 dropped:0 overruns:0 frame:0
          TX packets:104281 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:100
          RX bytes:46271457 (44.1 MiB)  TX bytes:8238586 (7.8 MiB)
          Memory:ee100000-ee120000

eth1      Link encap:Ethernet  HWaddr 00:30:48:96:e1:e3
          inet addr:10.10.1.26  Bcast:10.255.255.255  Mask:255.0.0.0
          UP BROADCAST RUNNING MULTICAST  MTU:9000  Metric:1
          RX packets:17660268 errors:0 dropped:72239 overruns:0 frame:0
          TX packets:10941117 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:86507558735 (80.5 GiB)  TX bytes:7011613344 (6.5 GiB)
          Memory:ee200000-ee220000



# ethtool -i eth0
driver: e1000e
version: 1.0.2-k2
firmware-version: 0.15-4
bus-info: 0000:0d:00.0

ethtool -i eth1
driver: e1000e
version: 1.0.2-k2
firmware-version: 0.5-7
bus-info: 0000:0e:00.0

lscpi:
0d:00.0 0200: 8086:108c (rev 03)
        Subsystem: 15d9:108c    
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR+ FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx- 
        Latency: 0, Cache Line Size: 64 bytes                                                                
        Interrupt: pin A routed to IRQ 29                                                                    
        Region 0: Memory at ee100000 (32-bit, non-prefetchable) [size=128K]                                  
        Region 2: I/O ports at 4000 [size=32]                                                                
        Capabilities: [c8] Power Management version 2                                                        
                Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA 
PME(D0+,D1-,D2-,D3hot+,D3cold+)                   
                Status: D0 PME-Enable- DSel=0 DScale=1 PME-                                                  
        Capabilities: [d0] Message Signalled Interrupts: Mask- 64bit+ 
Queue=0/0 Enable+                      
                Address: 00000000fee0f00c  Data: 41c1                                                        
        Capabilities: [e0] Express (v1) Endpoint, MSI 00                                                     
                DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, 
L1 <64us                      
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset-                                      
                DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ 
Unsupported+
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ 
TransPend-
                LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM unknown, 
Latency L0 <128ns, L1 <64us
                        ClockPM- Suprise- LLActRep- BwNot-
                LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- 
CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ 
DLActive- BWMgmt- ABWMgmt-
        Capabilities: [100] Advanced Error Reporting <?>
        Capabilities: [140] Device Serial Number e2-e1-96-ff-ff-48-30-00
        Kernel driver in use: e1000e
        Kernel modules: e1000e

0e:00.0 0200: 8086:109a
        Subsystem: 15d9:109a
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR+ FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Interrupt: pin A routed to IRQ 30
        Region 0: Memory at ee200000 (32-bit, non-prefetchable) [size=128K]
        Region 2: I/O ports at 5000 [size=32]
        Capabilities: [c8] Power Management version 2
                Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA 
PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=1 PME-
        Capabilities: [d0] Message Signalled Interrupts: Mask- 64bit+ 
Queue=0/0 Enable+
                Address: 00000000fee0f00c  Data: 41b1
        Capabilities: [e0] Express (v1) Endpoint, MSI 00
                DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, 
L1 <64us
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset-
                DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ 
Unsupported+
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ 
TransPend-
                LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM unknown, 
Latency L0 <128ns, L1 <64us
                        ClockPM+ Suprise- LLActRep- BwNot-
                LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- 
CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ 
DLActive- BWMgmt- ABWMgmt-
        Capabilities: [100] Advanced Error Reporting <?>
        Capabilities: [140] Device Serial Number e3-e1-96-ff-ff-48-30-00
        Kernel driver in use: e1000e
        Kernel modules: e1000e


***************************************************************************
OK, now the detailed parts:

IPMI is currently blocked, i.e. I can query the card locally via the kernel 
module, but not remotely. netconsole is loaded and working via eth1.

# ethtool -S eth0                                     
NIC statistics:                                                                 
     rx_packets: 673400                                                         
     tx_packets: 104323                                                         
     rx_bytes: 48982938                                                         
     tx_bytes: 8659194                                                          
     rx_broadcast: 619125                                                       
     tx_broadcast: 3                                                            
     rx_multicast: 2088                                                         
     tx_multicast: 0                                                            
     rx_errors: 0                                                               
     tx_errors: 0                                                               
     tx_dropped: 0                                                              
     multicast: 2088                                                            
     collisions: 0                                                              
     rx_length_errors: 0                                                        
     rx_over_errors: 0                                                          
     rx_crc_errors: 0                                                           
     rx_frame_errors: 0                                                         
     rx_no_buffer_count: 0                                                      
     rx_missed_errors: 0                                                        
     tx_aborted_errors: 0                                                       
     tx_carrier_errors: 0                                                       
     tx_fifo_errors: 0                                                          
     tx_heartbeat_errors: 0                                                     
     tx_window_errors: 0                                                        
     tx_abort_late_coll: 0                                                      
     tx_deferred_ok: 0                                                          
     tx_single_coll_ok: 0                                                       
     tx_multi_coll_ok: 0                                                        
     tx_timeout_count: 0                                                        
     tx_restart_queue: 0                                                        
     rx_long_length_errors: 0                                                   
     rx_short_length_errors: 0                                                  
     rx_align_errors: 0                                                         
     tx_tcp_seg_good: 0                                                         
     tx_tcp_seg_failed: 0                                                       
     rx_flow_control_xon: 0                                                     
     rx_flow_control_xoff: 0                                                    
     tx_flow_control_xon: 0                                                     
     tx_flow_control_xoff: 0                                                    
     rx_long_byte_count: 48982938                                               
     rx_csum_offload_good: 76752                                                
     rx_csum_offload_errors: 0                                                  
     rx_header_split: 0                                                         
     alloc_rx_buff_failed: 0                                                    
     tx_smbus: 2                                                                
     rx_smbus: 594496                                                           
     dropped_smbus: 0                                                           
     rx_dma_failed: 0                                                           
     tx_dma_failed: 0                                                           
n0126:/build/ethregs-1.7.2# ethtool -S eth1
NIC statistics:                            
     rx_packets: 17664653                  
     tx_packets: 10941353                  
     rx_bytes: 86578358008                 
     tx_bytes: 7055320722                  
     rx_broadcast: 4761580                 
     tx_broadcast: 1252
     rx_multicast: 0
     tx_multicast: 0
     rx_errors: 0
     tx_errors: 0
     tx_dropped: 0
     multicast: 0
     collisions: 0
     rx_length_errors: 0
     rx_over_errors: 0
     rx_crc_errors: 0
     rx_frame_errors: 0
     rx_no_buffer_count: 1985
     rx_missed_errors: 72239
     tx_aborted_errors: 0
     tx_carrier_errors: 0
     tx_fifo_errors: 0
     tx_heartbeat_errors: 0
     tx_window_errors: 0
     tx_abort_late_coll: 0
     tx_deferred_ok: 0
     tx_single_coll_ok: 0
     tx_multi_coll_ok: 0
     tx_timeout_count: 0
     tx_restart_queue: 1920
     rx_long_length_errors: 0
     rx_short_length_errors: 0
     rx_align_errors: 0
     tx_tcp_seg_good: 127295
     tx_tcp_seg_failed: 0
     rx_flow_control_xon: 0
     rx_flow_control_xoff: 0
     tx_flow_control_xon: 0
     tx_flow_control_xoff: 0
     rx_long_byte_count: 86578358008
     rx_csum_offload_good: 12907089
     rx_csum_offload_errors: 0
     rx_header_split: 750356
     alloc_rx_buff_failed: 0
     tx_smbus: 0
     rx_smbus: 0
     dropped_smbus: 0
     rx_dma_failed: 0
     tx_dma_failed: 0

ethreg result attached

******************************************************************************

After rebooting without netconsole the IPMI card was still not working, using 
the echo 1 > ... /remove command from Henning's original email suddenly made 
IPMI working again.

After that I rebooted the machine while watching the progress via ipmitool's 
sol activate, however during the boot sequence suddenly the kernel output 
slowed to a crawl. About 1-2 minutes later remote IPMI broke down again.

netconsole was NOT loaded, thus I don't think that this is really related.

OK, how to proceed?

e.g. how can I re-enable the interface once I issued

echo 1 > /sys/devices/pci0000:00/0000:00:1c.4/0000:0d:00.0/remove

Cheers

Carsten

[-- Attachment #2: ethregs.IPMInotworkingNOnetconsole --]
[-- Type: text/plain, Size: 41597 bytes --]

0e:00.0 (8086:109a)
Intel Corporation 82573L Gigabit Ethernet Controller
	Name           Value
	~~~~           ~~~~~
	CTRL           00140248
	STATUS         80080783
	EECD           06008318
	EERD           f7460012
	CTRL_EXT       28780000
	FLA            00000608
	MDIC           182a7800
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            000000c3
	ICS            00000000
	IMS            0000009d
	IMC            0000009d
	IAM            ffffffff
	RCTL           06078422
	FCTTV          00000680
	TCTL           3103f0fa
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    1000000a
	EXTCNF_SIZE    00000004
	PBA            0012000e
	PBS            00000020
	EEMNGCTL       80000000
	EEARBC         00000100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           0004db00
	ERT            00002100
	FCRTL          80002ff8
	FCRTH          00003000
	PSRCTL         04040401
	RDBAL          00eb8000
	RDBAH          00000002
	RDLEN          00002000
	RDH            0000005e
	RDT            0000005a
	RDTR           00000000
	RXDCTL         00010003
	RADV           00000008
	RDBAL1         00000000
	RDBAH1         00000200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           00000ae4
	TDFT           00000ae4
	TDFHS          00000ae4
	TDFTS          00000ae4
	TDFPC          00000000
	TDBAL          16bd1000
	TDBAH          00000002
	TDLEN          00001000
	TDH            00000076
	TDT            00000076
	TIDV           00000008
	TXDCTL         01410000
	TADV           00000020
	TARC0          00000403
	TDBAL1         80400000
	TDBAH1         00000000
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000000
	ICRXATC        00000000
	ICTXPTC        00000000
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00001300
	RFCTL          00038000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e3e1
	RAL[1]         005e0001
	RAH[1]         80000100
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        00000000
	RAH[15]        00020010
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
	VFTA[51]       00000000
	VFTA[52]       00000000
	VFTA[53]       00000000
	VFTA[54]       00000000
	VFTA[55]       00000000
	VFTA[56]       00000000
	VFTA[57]       00000000
	VFTA[58]       00000000
	VFTA[59]       00000000
	VFTA[60]       00000000
	VFTA[61]       00000000
	VFTA[62]       00000000
	VFTA[63]       00000000
	VFTA[64]       00000000
	VFTA[65]       00000000
	VFTA[66]       00000000
	VFTA[67]       00000000
	VFTA[68]       00000000
	VFTA[69]       00000000
	VFTA[70]       00000000
	VFTA[71]       00000000
	VFTA[72]       00000000
	VFTA[73]       00000000
	VFTA[74]       00000000
	VFTA[75]       00000000
	VFTA[76]       00000000
	VFTA[77]       00000000
	VFTA[78]       00000000
	VFTA[79]       00000000
	VFTA[80]       00000000
	VFTA[81]       00000000
	VFTA[82]       00000000
	VFTA[83]       00000000
	VFTA[84]       00000000
	VFTA[85]       00000000
	VFTA[86]       00000000
	VFTA[87]       00000000
	VFTA[88]       00000000
	VFTA[89]       00000000
	VFTA[90]       00000000
	VFTA[91]       00000000
	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
	VFTA[97]       00000000
	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
	VFTA[101]      00000000
	VFTA[102]      00000000
	VFTA[103]      00000000
	VFTA[104]      00000000
	VFTA[105]      00000000
	VFTA[106]      00000000
	VFTA[107]      00000000
	VFTA[108]      00000000
	VFTA[109]      00000000
	VFTA[110]      00000000
	VFTA[111]      00000000
	VFTA[112]      00000000
	VFTA[113]      00000000
	VFTA[114]      00000000
	VFTA[115]      00000000
	VFTA[116]      00000000
	VFTA[117]      00000000
	VFTA[118]      00000000
	VFTA[119]      00000000
	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           00000100
	IPAV           00000000
	MANC2H         00000000
	RSSIM          00000000
	RSSIR          00000001
	WUPL           9ce201fa
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         a1041046
	FWSM           00000000
	RETA[0]        00000015
	RETA[1]        0000006b
	RETA[2]        00000004
	RETA[3]        000000e2
	RETA[4]        00000070
	RETA[5]        00000077
	RETA[6]        00000018
	RETA[7]        00000001
	RETA[8]        00000029
	RETA[9]        00000069
	RETA[10]       00000004
	RETA[11]       00000081
	RETA[12]       00000040
	RETA[13]       0000001e
	RETA[14]       00000093
	RETA[15]       000000c3
	RETA[16]       0000001b
	RETA[17]       0000002f
	RETA[18]       00000002
	RETA[19]       000000f4
	RETA[20]       000000bd
	RETA[21]       000000b6
	RETA[22]       000000af
	RETA[23]       00000029
	RETA[24]       00000003
	RETA[25]       0000001e
	RETA[26]       00000011
	RETA[27]       000000a5
	RETA[28]       0000008f
	RETA[29]       0000000b
	RETA[30]       00000059
	RETA[31]       00000006
	RETA[32]       00000008
	RETA[33]       000000d8
	RETA[34]       00000099
	RETA[35]       000000fb
	RETA[36]       0000003c
	RETA[37]       0000006c
	RETA[38]       00000011
	RETA[39]       00000027
	RETA[40]       00000029
	RETA[41]       00000097
	RETA[42]       00000055
	RETA[43]       000000a2
	RETA[44]       00000019
	RETA[45]       0000006e
	RETA[46]       00000011
	RETA[47]       00000060
	RETA[48]       000000ef
	RETA[49]       000000c1
	RETA[50]       00000033
	RETA[51]       000000a2
	RETA[52]       00000007
	RETA[53]       0000008a
	RETA[54]       0000006c
	RETA[55]       000000c2
	RETA[56]       00000029
	RETA[57]       0000002e
	RETA[58]       0000008b
	RETA[59]       00000063
	RETA[60]       00000035
	RETA[61]       00000015
	RETA[62]       00000091
	RETA[63]       000000ec
	RETA[64]       00000045
	RETA[65]       0000003b
	RETA[66]       0000001d
	RETA[67]       00000040
	RETA[68]       000000c5
	RETA[69]       00000082
	RETA[70]       000000b3
	RETA[71]       000000b6
	RETA[72]       0000000a
	RETA[73]       0000009b
	RETA[74]       000000d2
	RETA[75]       000000d2
	RETA[76]       0000004a
	RETA[77]       0000004e
	RETA[78]       00000010
	RETA[79]       000000e0
	RETA[80]       0000003a
	RETA[81]       000000ae
	RETA[82]       0000000d
	RETA[83]       00000070
	RETA[84]       0000001a
	RETA[85]       000000e7
	RETA[86]       000000c7
	RETA[87]       000000a5
	RETA[88]       0000006d
	RETA[89]       0000002f
	RETA[90]       00000061
	RETA[91]       00000026
	RETA[92]       0000000f
	RETA[93]       0000001f
	RETA[94]       00000019
	RETA[95]       000000ed
	RETA[96]       00000059
	RETA[97]       00000003
	RETA[98]       00000058
	RETA[99]       000000c9
	RETA[100]      0000006d
	RETA[101]      000000aa
	RETA[102]      0000000b
	RETA[103]      00000063
	RETA[104]      000000cd
	RETA[105]      0000001f
	RETA[106]      00000018
	RETA[107]      00000042
	RETA[108]      00000079
	RETA[109]      0000000f
	RETA[110]      0000005b
	RETA[111]      00000042
	RETA[112]      00000049
	RETA[113]      0000006e
	RETA[114]      00000008
	RETA[115]      00000076
	RETA[116]      0000002d
	RETA[117]      00000059
	RETA[118]      00000047
	RETA[119]      000000a6
	RETA[120]      00000090
	RETA[121]      00000002
	RETA[122]      000000cb
	RETA[123]      00000049
	RETA[124]      00000093
	RETA[125]      00000009
	RETA[126]      00000016
	RETA[127]      000000f2
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000080
	FFLT[9]        00000000
	FFLT[10]       00000002
	FFLT[11]       00000000
	HICR           00000000
	FFMT[0]        00000006
	FFMT[1]        00000006
	FFMT[2]        00000009
	FFMT[3]        00000009
	FFMT[4]        0000000e
	FFMT[5]        0000000e
	FFMT[6]        0000000d
	FFMT[7]        0000000d
	FFMT[8]        0000000b
	FFMT[9]        0000000b
	FFMT[10]       0000000d
	FFMT[11]       0000000d
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       00000000
	FFMT[15]       00000000
	FFMT[16]       00000000
	FFMT[17]       00000000
	FFMT[18]       00000009
	FFMT[19]       00000009
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000006
	FFMT[23]       00000006
	FFMT[24]       00000003
	FFMT[25]       00000003
	FFMT[26]       00000004
	FFMT[27]       00000004
	FFMT[28]       00000005
	FFMT[29]       00000005
	FFMT[30]       0000000c
	FFMT[31]       0000000c
	FFMT[32]       00000000
	FFMT[33]       00000000
	FFMT[34]       00000008
	FFMT[35]       00000008
	FFMT[36]       00000002
	FFMT[37]       00000002
	FFMT[38]       0000000e
	FFMT[39]       0000000e
	FFMT[40]       00000003
	FFMT[41]       00000003
	FFMT[42]       0000000b
	FFMT[43]       0000000b
	FFMT[44]       00000001
	FFMT[45]       00000001
	FFMT[46]       00000005
	FFMT[47]       00000005
	FFMT[48]       00000003
	FFMT[49]       00000003
	FFMT[50]       00000001
	FFMT[51]       00000001
	FFMT[52]       0000000a
	FFMT[53]       0000000a
	FFMT[54]       00000003
	FFMT[55]       00000003
	FFMT[56]       00000001
	FFMT[57]       00000001
	FFMT[58]       0000000d
	FFMT[59]       0000000d
	FFMT[60]       00000008
	FFMT[61]       00000008
	FFMT[62]       00000002
	FFMT[63]       00000002
	FFMT[64]       00000002
	FFMT[65]       00000002
	FFMT[66]       00000007
	FFMT[67]       00000007
	FFMT[68]       00000004
	FFMT[69]       00000004
	FFMT[70]       00000006
	FFMT[71]       00000006
	FFMT[72]       0000000e
	FFMT[73]       0000000e
	FFMT[74]       0000000e
	FFMT[75]       0000000e
	FFMT[76]       0000000f
	FFMT[77]       0000000f
	FFMT[78]       00000002
	FFMT[79]       00000002
	FFMT[80]       00000000
	FFMT[81]       00000000
	FFMT[82]       0000000b
	FFMT[83]       0000000b
	FFMT[84]       00000009
	FFMT[85]       00000009
	FFMT[86]       00000009
	FFMT[87]       00000009
	FFMT[88]       0000000a
	FFMT[89]       0000000a
	FFMT[90]       0000000d
	FFMT[91]       0000000d
	FFMT[92]       00000005
	FFMT[93]       00000005
	FFMT[94]       00000006
	FFMT[95]       00000006
	FFMT[96]       00000003
	FFMT[97]       00000003
	FFMT[98]       0000000d
	FFMT[99]       0000000d
	FFMT[100]      00000009
	FFMT[101]      00000009
	FFMT[102]      0000000d
	FFMT[103]      0000000d
	FFMT[104]      00000001
	FFMT[105]      00000001
	FFMT[106]      0000000e
	FFMT[107]      0000000e
	FFMT[108]      0000000b
	FFMT[109]      0000000b
	FFMT[110]      00000000
	FFMT[111]      00000000
	FFMT[112]      00000001
	FFMT[113]      00000001
	FFMT[114]      00000000
	FFMT[115]      00000000
	FFMT[116]      00000008
	FFMT[117]      00000008
	FFMT[118]      0000000a
	FFMT[119]      0000000a
	FFMT[120]      00000001
	FFMT[121]      00000001
	FFMT[122]      00000006
	FFMT[123]      00000006
	FFMT[124]      00000002
	FFMT[125]      00000002
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        a6d21076
	FFVT[1]        a6d21076
	FFVT[2]        14fddf8e
	FFVT[3]        14fddf8e
	FFVT[4]        af998eff
	FFVT[5]        af998eff
	FFVT[6]        72ee35eb
	FFVT[7]        72ee35eb
	FFVT[8]        4595b5d0
	FFVT[9]        4595b5d0
	FFVT[10]       9ce2d272
	FFVT[11]       9ce2d272
	FFVT[12]       65ccdb20
	FFVT[13]       65ccdb20
	FFVT[14]       7a6d632f
	FFVT[15]       7a6d632f
	FFVT[16]       c9fd53bd
	FFVT[17]       c9fd53bd
	FFVT[18]       138adc2d
	FFVT[19]       138adc2d
	FFVT[20]       5a7c8912
	FFVT[21]       5a7c8912
	FFVT[22]       080da768
	FFVT[23]       080da768
	FFVT[24]       e00a93c6
	FFVT[25]       e00a93c6
	FFVT[26]       3d05bbe0
	FFVT[27]       3d05bbe0
	FFVT[28]       8dc0ad89
	FFVT[29]       8dc0ad89
	FFVT[30]       a0267e00
	FFVT[31]       a0267e00
	FFVT[32]       45f0b43f
	FFVT[33]       45f0b43f
	FFVT[34]       62120156
	FFVT[35]       62120156
	FFVT[36]       a6213b97
	FFVT[37]       a6213b97
	FFVT[38]       ea15b0b6
	FFVT[39]       ea15b0b6
	FFVT[40]       a4176212
	FFVT[41]       a4176212
	FFVT[42]       ae88d158
	FFVT[43]       ae88d158
	FFVT[44]       541de595
	FFVT[45]       541de595
	FFVT[46]       15d56ace
	FFVT[47]       15d56ace
	FFVT[48]       45824374
	FFVT[49]       45824374
	FFVT[50]       2ba17885
	FFVT[51]       2ba17885
	FFVT[52]       b63201ea
	FFVT[53]       b63201ea
	FFVT[54]       b1ff88da
	FFVT[55]       b1ff88da
	FFVT[56]       f24edcea
	FFVT[57]       f24edcea
	FFVT[58]       b068c2e7
	FFVT[59]       b068c2e7
	FFVT[60]       58a6584c
	FFVT[61]       58a6584c
	FFVT[62]       ca6624d0
	FFVT[63]       ca6624d0
	FFVT[64]       d66319d3
	FFVT[65]       d66319d3
	FFVT[66]       437f892f
	FFVT[67]       437f892f
	FFVT[68]       6298ced1
	FFVT[69]       6298ced1
	FFVT[70]       d8f20b8e
	FFVT[71]       d8f20b8e
	FFVT[72]       00a8562c
	FFVT[73]       00a8562c
	FFVT[74]       536016e4
	FFVT[75]       536016e4
	FFVT[76]       81723c11
	FFVT[77]       81723c11
	FFVT[78]       6baf812a
	FFVT[79]       6baf812a
	FFVT[80]       579813dc
	FFVT[81]       579813dc
	FFVT[82]       f1099664
	FFVT[83]       f1099664
	FFVT[84]       484724af
	FFVT[85]       484724af
	FFVT[86]       9473f82f
	FFVT[87]       9473f82f
	FFVT[88]       2086be8f
	FFVT[89]       2086be8f
	FFVT[90]       505baa7a
	FFVT[91]       505baa7a
	FFVT[92]       e106d4d4
	FFVT[93]       e106d4d4
	FFVT[94]       035cf124
	FFVT[95]       035cf124
	FFVT[96]       80e38b56
	FFVT[97]       80e38b56
	FFVT[98]       03ef854a
	FFVT[99]       03ef854a
	FFVT[100]      ece8d8c9
	FFVT[101]      ece8d8c9
	FFVT[102]      a1d4c1a9
	FFVT[103]      a1d4c1a9
	FFVT[104]      e800f0b6
	FFVT[105]      e800f0b6
	FFVT[106]      7019d873
	FFVT[107]      7019d873
	FFVT[108]      a45554ff
	FFVT[109]      a45554ff
	FFVT[110]      29f98242
	FFVT[111]      29f98242
	FFVT[112]      b517937f
	FFVT[113]      b517937f
	FFVT[114]      a4d35dd5
	FFVT[115]      a4d35dd5
	FFVT[116]      52328c1b
	FFVT[117]      52328c1b
	FFVT[118]      09f59e76
	FFVT[119]      09f59e76
	FFVT[120]      1968c620
	FFVT[121]      1968c620
	FFVT[122]      cba89964
	FFVT[123]      cba89964
	FFVT[124]      42dc73e1
	FFVT[125]      42dc73e1
	FFVT[126]      06efaa25
	FFVT[127]      06efaa25


0d:00.0 (8086:108c)
Intel Corporation 82573E Gigabit Ethernet Controller (Copper)
	Name           Value
	~~~~           ~~~~~
	CTRL           18140248
	STATUS         80080743
	EECD           02011b18
	EERD           ffff0026
	CTRL_EXT       28780000
	FLA            00000608
	MDIC           18316d4c
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            000003d0
	ICS            00000000
	IMS            0000009d
	IMC            0000009d
	IAM            ffffffff
	RCTL           04048002
	FCTTV          00000680
	TCTL           3103f0fa
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    10000008
	EXTCNF_SIZE    00000000
	PBA            000c0014
	PBS            00000020
	EEMNGCTL       800000f7
	EEARBC         00080100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           00012000
	ERT            00000000
	FCRTL          800047f8
	FCRTH          00004800
	PSRCTL         00040402
	RDBAL          15b98000
	RDBAH          00000002
	RDLEN          00001000
	RDH            0000008d
	RDT            0000008b
	RDTR           00000000
	RXDCTL         00010000
	RADV           00000008
	RDBAL1         00000000
	RDBAH1         01200200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           00000b16
	TDFT           00000b16
	TDFHS          00000b16
	TDFTS          00000b16
	TDFPC          00000000
	TDBAL          1602b000
	TDBAH          00000002
	TDLEN          00001000
	TDH            00000021
	TDT            00000021
	TIDV           00000008
	TXDCTL         01410000
	TADV           00000020
	TARC0          00000403
	TDBAL1         00800000
	TDBAH1         10000500
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000000
	ICRXATC        00000000
	ICTXPTC        00000000
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00000300
	RFCTL          00000000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e2e1
	RAL[1]         005e0001
	RAH[1]         80000100
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        96483000
	RAH[15]        0000e2e1
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
	VFTA[51]       00000000
	VFTA[52]       00000000
	VFTA[53]       00000000
	VFTA[54]       00000000
	VFTA[55]       00000000
	VFTA[56]       00000000
	VFTA[57]       00000000
	VFTA[58]       00000000
	VFTA[59]       00000000
	VFTA[60]       00000000
	VFTA[61]       00000000
	VFTA[62]       00000000
	VFTA[63]       00000000
	VFTA[64]       00000000
	VFTA[65]       00000000
	VFTA[66]       00000000
	VFTA[67]       00000000
	VFTA[68]       00000000
	VFTA[69]       00000000
	VFTA[70]       00000000
	VFTA[71]       00000000
	VFTA[72]       00000000
	VFTA[73]       00000000
	VFTA[74]       00000000
	VFTA[75]       00000000
	VFTA[76]       00000000
	VFTA[77]       00000000
	VFTA[78]       00000000
	VFTA[79]       00000000
	VFTA[80]       00000000
	VFTA[81]       00000000
	VFTA[82]       00000000
	VFTA[83]       00000000
	VFTA[84]       00000000
	VFTA[85]       00000000
	VFTA[86]       00000000
	VFTA[87]       00000000
	VFTA[88]       00000000
	VFTA[89]       00000000
	VFTA[90]       00000000
	VFTA[91]       00000000
	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
	VFTA[97]       00000000
	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
	VFTA[101]      00000000
	VFTA[102]      00000000
	VFTA[103]      00000000
	VFTA[104]      00000000
	VFTA[105]      00000000
	VFTA[106]      00000000
	VFTA[107]      00000000
	VFTA[108]      00000000
	VFTA[109]      00000000
	VFTA[110]      00000000
	VFTA[111]      00000000
	VFTA[112]      00000000
	VFTA[113]      00000000
	VFTA[114]      00000000
	VFTA[115]      00000000
	VFTA[116]      00000000
	VFTA[117]      00000000
	VFTA[118]      00000000
	VFTA[119]      00000000
	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           0022a300
	IPAV           00000000
	MANC2H         00000380
	RSSIM          00000000
	RSSIR          00000000
	WUPL           28167f49
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         01041046
	FWSM           00018044
	RETA[0]        0000008c
	RETA[1]        0000001f
	RETA[2]        00000082
	RETA[3]        00000086
	RETA[4]        0000009f
	RETA[5]        00000066
	RETA[6]        0000005a
	RETA[7]        0000004b
	RETA[8]        0000001e
	RETA[9]        000000af
	RETA[10]       000000dc
	RETA[11]       000000e5
	RETA[12]       0000002d
	RETA[13]       000000aa
	RETA[14]       0000009b
	RETA[15]       0000001c
	RETA[16]       00000053
	RETA[17]       000000e6
	RETA[18]       00000096
	RETA[19]       00000084
	RETA[20]       000000b1
	RETA[21]       0000006b
	RETA[22]       000000b7
	RETA[23]       000000de
	RETA[24]       00000010
	RETA[25]       000000d4
	RETA[26]       000000ef
	RETA[27]       00000034
	RETA[28]       00000038
	RETA[29]       0000000e
	RETA[30]       00000012
	RETA[31]       0000001d
	RETA[32]       00000001
	RETA[33]       0000004b
	RETA[34]       000000e3
	RETA[35]       0000001e
	RETA[36]       0000001b
	RETA[37]       0000009b
	RETA[38]       0000008e
	RETA[39]       00000068
	RETA[40]       00000015
	RETA[41]       000000e2
	RETA[42]       000000c7
	RETA[43]       000000c6
	RETA[44]       00000034
	RETA[45]       0000007a
	RETA[46]       000000b6
	RETA[47]       00000014
	RETA[48]       000000aa
	RETA[49]       0000006f
	RETA[50]       000000fa
	RETA[51]       00000085
	RETA[52]       00000032
	RETA[53]       0000004e
	RETA[54]       0000003f
	RETA[55]       0000004c
	RETA[56]       00000099
	RETA[57]       0000003d
	RETA[58]       000000f2
	RETA[59]       000000ae
	RETA[60]       00000011
	RETA[61]       0000006f
	RETA[62]       000000b7
	RETA[63]       0000000b
	RETA[64]       0000009b
	RETA[65]       00000007
	RETA[66]       0000000a
	RETA[67]       0000009a
	RETA[68]       000000a3
	RETA[69]       00000020
	RETA[70]       000000f3
	RETA[71]       00000084
	RETA[72]       0000004d
	RETA[73]       00000048
	RETA[74]       0000008b
	RETA[75]       00000021
	RETA[76]       000000c7
	RETA[77]       00000053
	RETA[78]       000000a3
	RETA[79]       0000008b
	RETA[80]       000000d4
	RETA[81]       0000004a
	RETA[82]       000000c2
	RETA[83]       000000c0
	RETA[84]       0000003b
	RETA[85]       00000069
	RETA[86]       00000082
	RETA[87]       0000005e
	RETA[88]       00000098
	RETA[89]       0000007a
	RETA[90]       00000017
	RETA[91]       00000084
	RETA[92]       000000ab
	RETA[93]       0000004a
	RETA[94]       000000c7
	RETA[95]       00000014
	RETA[96]       0000001d
	RETA[97]       0000006a
	RETA[98]       00000077
	RETA[99]       00000014
	RETA[100]      000000b9
	RETA[101]      0000000a
	RETA[102]      000000c2
	RETA[103]      0000003d
	RETA[104]      00000055
	RETA[105]      000000aa
	RETA[106]      000000b4
	RETA[107]      00000004
	RETA[108]      00000047
	RETA[109]      00000053
	RETA[110]      000000f7
	RETA[111]      00000016
	RETA[112]      0000008b
	RETA[113]      000000d3
	RETA[114]      000000b2
	RETA[115]      00000074
	RETA[116]      0000003b
	RETA[117]      0000002b
	RETA[118]      0000009d
	RETA[119]      00000016
	RETA[120]      0000002b
	RETA[121]      000000ce
	RETA[122]      0000008e
	RETA[123]      00000044
	RETA[124]      00000027
	RETA[125]      0000004b
	RETA[126]      000000c2
	RETA[127]      00000086
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000000
	FFLT[9]        00000000
	FFLT[10]       00000000
	FFLT[11]       00000000
	HICR           00000101
	FFMT[0]        0000000c
	FFMT[1]        0000000c
	FFMT[2]        0000000d
	FFMT[3]        0000000d
	FFMT[4]        0000000c
	FFMT[5]        0000000c
	FFMT[6]        0000000f
	FFMT[7]        0000000f
	FFMT[8]        00000001
	FFMT[9]        00000001
	FFMT[10]       00000006
	FFMT[11]       00000006
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       0000000c
	FFMT[15]       0000000c
	FFMT[16]       0000000e
	FFMT[17]       0000000e
	FFMT[18]       00000001
	FFMT[19]       00000001
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000001
	FFMT[23]       00000001
	FFMT[24]       00000000
	FFMT[25]       00000000
	FFMT[26]       00000001
	FFMT[27]       00000001
	FFMT[28]       00000002
	FFMT[29]       00000002
	FFMT[30]       0000000f
	FFMT[31]       0000000f
	FFMT[32]       00000001
	FFMT[33]       00000001
	FFMT[34]       00000003
	FFMT[35]       00000003
	FFMT[36]       0000000c
	FFMT[37]       0000000c
	FFMT[38]       00000002
	FFMT[39]       00000002
	FFMT[40]       00000008
	FFMT[41]       00000008
	FFMT[42]       0000000f
	FFMT[43]       0000000f
	FFMT[44]       00000008
	FFMT[45]       00000008
	FFMT[46]       00000004
	FFMT[47]       00000004
	FFMT[48]       00000006
	FFMT[49]       00000006
	FFMT[50]       00000007
	FFMT[51]       00000007
	FFMT[52]       00000002
	FFMT[53]       00000002
	FFMT[54]       0000000b
	FFMT[55]       0000000b
	FFMT[56]       00000008
	FFMT[57]       00000008
	FFMT[58]       00000003
	FFMT[59]       00000003
	FFMT[60]       00000004
	FFMT[61]       00000004
	FFMT[62]       00000000
	FFMT[63]       00000000
	FFMT[64]       00000001
	FFMT[65]       00000001
	FFMT[66]       0000000e
	FFMT[67]       0000000e
	FFMT[68]       00000007
	FFMT[69]       00000007
	FFMT[70]       0000000b
	FFMT[71]       0000000b
	FFMT[72]       00000006
	FFMT[73]       00000006
	FFMT[74]       00000009
	FFMT[75]       00000009
	FFMT[76]       00000009
	FFMT[77]       00000009
	FFMT[78]       00000009
	FFMT[79]       00000009
	FFMT[80]       0000000f
	FFMT[81]       0000000f
	FFMT[82]       00000009
	FFMT[83]       00000009
	FFMT[84]       0000000a
	FFMT[85]       0000000a
	FFMT[86]       00000000
	FFMT[87]       00000000
	FFMT[88]       0000000b
	FFMT[89]       0000000b
	FFMT[90]       00000003
	FFMT[91]       00000003
	FFMT[92]       00000001
	FFMT[93]       00000001
	FFMT[94]       00000004
	FFMT[95]       00000004
	FFMT[96]       0000000b
	FFMT[97]       0000000b
	FFMT[98]       0000000c
	FFMT[99]       0000000c
	FFMT[100]      0000000a
	FFMT[101]      0000000a
	FFMT[102]      00000009
	FFMT[103]      00000009
	FFMT[104]      00000000
	FFMT[105]      00000000
	FFMT[106]      00000003
	FFMT[107]      00000003
	FFMT[108]      00000006
	FFMT[109]      00000006
	FFMT[110]      00000008
	FFMT[111]      00000008
	FFMT[112]      0000000e
	FFMT[113]      0000000e
	FFMT[114]      00000007
	FFMT[115]      00000007
	FFMT[116]      0000000c
	FFMT[117]      0000000c
	FFMT[118]      00000007
	FFMT[119]      00000007
	FFMT[120]      00000009
	FFMT[121]      00000009
	FFMT[122]      00000001
	FFMT[123]      00000001
	FFMT[124]      00000001
	FFMT[125]      00000001
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        69386efe
	FFVT[1]        69386efe
	FFVT[2]        47dac1bd
	FFVT[3]        47dac1bd
	FFVT[4]        0af977e3
	FFVT[5]        0af977e3
	FFVT[6]        0bf35fcd
	FFVT[7]        0bf35fcd
	FFVT[8]        396325cb
	FFVT[9]        396325cb
	FFVT[10]       45fb2966
	FFVT[11]       45fb2966
	FFVT[12]       85fe3e31
	FFVT[13]       85fe3e31
	FFVT[14]       e6b90940
	FFVT[15]       e6b90940
	FFVT[16]       fcf5c382
	FFVT[17]       fcf5c382
	FFVT[18]       68b90289
	FFVT[19]       68b90289
	FFVT[20]       0fada5ed
	FFVT[21]       0fada5ed
	FFVT[22]       67f87890
	FFVT[23]       67f87890
	FFVT[24]       2dd69d55
	FFVT[25]       2dd69d55
	FFVT[26]       0f78a7b0
	FFVT[27]       0f78a7b0
	FFVT[28]       138d13f7
	FFVT[29]       138d13f7
	FFVT[30]       e302400a
	FFVT[31]       e302400a
	FFVT[32]       bc8ebaf7
	FFVT[33]       bc8ebaf7
	FFVT[34]       96fe79fb
	FFVT[35]       96fe79fb
	FFVT[36]       df5aa33b
	FFVT[37]       df5aa33b
	FFVT[38]       91212c9e
	FFVT[39]       91212c9e
	FFVT[40]       71c517b4
	FFVT[41]       71c517b4
	FFVT[42]       0bb6697f
	FFVT[43]       0bb6697f
	FFVT[44]       63018c23
	FFVT[45]       63018c23
	FFVT[46]       48a35d54
	FFVT[47]       48a35d54
	FFVT[48]       95f4d375
	FFVT[49]       95f4d375
	FFVT[50]       4699c679
	FFVT[51]       4699c679
	FFVT[52]       06e7adde
	FFVT[53]       06e7adde
	FFVT[54]       e31f1b6d
	FFVT[55]       e31f1b6d
	FFVT[56]       888919d6
	FFVT[57]       888919d6
	FFVT[58]       4751a142
	FFVT[59]       4751a142
	FFVT[60]       676fef06
	FFVT[61]       676fef06
	FFVT[62]       792d0e82
	FFVT[63]       792d0e82
	FFVT[64]       1066713d
	FFVT[65]       1066713d
	FFVT[66]       8f55fa4d
	FFVT[67]       8f55fa4d
	FFVT[68]       5fe46f1a
	FFVT[69]       5fe46f1a
	FFVT[70]       cacbc51e
	FFVT[71]       cacbc51e
	FFVT[72]       04470301
	FFVT[73]       04470301
	FFVT[74]       6b3dfea9
	FFVT[75]       6b3dfea9
	FFVT[76]       bd00be00
	FFVT[77]       bd00be00
	FFVT[78]       7079cb0c
	FFVT[79]       7079cb0c
	FFVT[80]       e7180acc
	FFVT[81]       e7180acc
	FFVT[82]       25755bec
	FFVT[83]       25755bec
	FFVT[84]       bcdd8914
	FFVT[85]       bcdd8914
	FFVT[86]       9ed3128d
	FFVT[87]       9ed3128d
	FFVT[88]       dc48587b
	FFVT[89]       dc48587b
	FFVT[90]       e9755ebf
	FFVT[91]       e9755ebf
	FFVT[92]       9ff23883
	FFVT[93]       9ff23883
	FFVT[94]       52d8233d
	FFVT[95]       52d8233d
	FFVT[96]       cdcf21c0
	FFVT[97]       cdcf21c0
	FFVT[98]       9069a69f
	FFVT[99]       9069a69f
	FFVT[100]      b52c57f5
	FFVT[101]      b52c57f5
	FFVT[102]      42977681
	FFVT[103]      42977681
	FFVT[104]      ab8b671a
	FFVT[105]      ab8b671a
	FFVT[106]      4edc0c8b
	FFVT[107]      4edc0c8b
	FFVT[108]      f41c47f0
	FFVT[109]      f41c47f0
	FFVT[110]      ab4edb12
	FFVT[111]      ab4edb12
	FFVT[112]      c096a36f
	FFVT[113]      c096a36f
	FFVT[114]      ed46c26a
	FFVT[115]      ed46c26a
	FFVT[116]      aca39e0b
	FFVT[117]      aca39e0b
	FFVT[118]      e01ed8b5
	FFVT[119]      e01ed8b5
	FFVT[120]      604c1ef5
	FFVT[121]      604c1ef5
	FFVT[122]      0dbbfeae
	FFVT[123]      0dbbfeae
	FFVT[124]      9478dbb7
	FFVT[125]      9478dbb7
	FFVT[126]      f95cfa23
	FFVT[127]      f95cfa23



[-- Attachment #3: ethregs.IPMInotworking --]
[-- Type: text/plain, Size: 41597 bytes --]

0e:00.0 (8086:109a)
Intel Corporation 82573L Gigabit Ethernet Controller
	Name           Value
	~~~~           ~~~~~
	CTRL           00140248
	STATUS         80080783
	EECD           06008318
	EERD           f7460012
	CTRL_EXT       28780000
	FLA            00000608
	MDIC           182a7800
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            000000c3
	ICS            00000000
	IMS            0000009d
	IMC            0000009d
	IAM            ffffffff
	RCTL           06078422
	FCTTV          00000680
	TCTL           3103f0fa
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    1000000a
	EXTCNF_SIZE    00000004
	PBA            0012000e
	PBS            00000020
	EEMNGCTL       80000000
	EEARBC         00000100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           0004db00
	ERT            00002100
	FCRTL          80002ff8
	FCRTH          00003000
	PSRCTL         04040401
	RDBAL          13a7e000
	RDBAH          00000002
	RDLEN          00002000
	RDH            00000004
	RDT            00000000
	RDTR           00000000
	RXDCTL         00010003
	RADV           00000008
	RDBAL1         00000000
	RDBAH1         00000200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           00000f8e
	TDFT           00000f8e
	TDFHS          00000f8e
	TDFTS          00000f8e
	TDFPC          00000000
	TDBAL          13986000
	TDBAH          00000002
	TDLEN          00001000
	TDH            000000bd
	TDT            000000bd
	TIDV           00000008
	TXDCTL         01410000
	TADV           00000020
	TARC0          00000403
	TDBAL1         80400000
	TDBAH1         00000000
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000000
	ICRXATC        00000000
	ICTXPTC        00000000
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00001300
	RFCTL          00038000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e3e1
	RAL[1]         005e0001
	RAH[1]         80000100
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        00000000
	RAH[15]        00020010
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
	VFTA[51]       00000000
	VFTA[52]       00000000
	VFTA[53]       00000000
	VFTA[54]       00000000
	VFTA[55]       00000000
	VFTA[56]       00000000
	VFTA[57]       00000000
	VFTA[58]       00000000
	VFTA[59]       00000000
	VFTA[60]       00000000
	VFTA[61]       00000000
	VFTA[62]       00000000
	VFTA[63]       00000000
	VFTA[64]       00000000
	VFTA[65]       00000000
	VFTA[66]       00000000
	VFTA[67]       00000000
	VFTA[68]       00000000
	VFTA[69]       00000000
	VFTA[70]       00000000
	VFTA[71]       00000000
	VFTA[72]       00000000
	VFTA[73]       00000000
	VFTA[74]       00000000
	VFTA[75]       00000000
	VFTA[76]       00000000
	VFTA[77]       00000000
	VFTA[78]       00000000
	VFTA[79]       00000000
	VFTA[80]       00000000
	VFTA[81]       00000000
	VFTA[82]       00000000
	VFTA[83]       00000000
	VFTA[84]       00000000
	VFTA[85]       00000000
	VFTA[86]       00000000
	VFTA[87]       00000000
	VFTA[88]       00000000
	VFTA[89]       00000000
	VFTA[90]       00000000
	VFTA[91]       00000000
	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
	VFTA[97]       00000000
	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
	VFTA[101]      00000000
	VFTA[102]      00000000
	VFTA[103]      00000000
	VFTA[104]      00000000
	VFTA[105]      00000000
	VFTA[106]      00000000
	VFTA[107]      00000000
	VFTA[108]      00000000
	VFTA[109]      00000000
	VFTA[110]      00000000
	VFTA[111]      00000000
	VFTA[112]      00000000
	VFTA[113]      00000000
	VFTA[114]      00000000
	VFTA[115]      00000000
	VFTA[116]      00000000
	VFTA[117]      00000000
	VFTA[118]      00000000
	VFTA[119]      00000000
	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           00000100
	IPAV           00000000
	MANC2H         00000000
	RSSIM          00000000
	RSSIR          00000001
	WUPL           9ce201fa
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         21041046
	FWSM           00000000
	RETA[0]        00000015
	RETA[1]        0000006b
	RETA[2]        00000004
	RETA[3]        000000e2
	RETA[4]        00000070
	RETA[5]        00000077
	RETA[6]        00000018
	RETA[7]        00000001
	RETA[8]        00000029
	RETA[9]        00000069
	RETA[10]       00000004
	RETA[11]       00000081
	RETA[12]       00000040
	RETA[13]       0000001e
	RETA[14]       00000093
	RETA[15]       000000c3
	RETA[16]       0000001b
	RETA[17]       0000002f
	RETA[18]       00000002
	RETA[19]       000000f4
	RETA[20]       000000bd
	RETA[21]       000000b6
	RETA[22]       000000af
	RETA[23]       00000029
	RETA[24]       00000003
	RETA[25]       0000001e
	RETA[26]       00000011
	RETA[27]       000000a5
	RETA[28]       0000008f
	RETA[29]       0000000b
	RETA[30]       00000059
	RETA[31]       00000006
	RETA[32]       00000008
	RETA[33]       000000d8
	RETA[34]       00000099
	RETA[35]       000000fb
	RETA[36]       0000003c
	RETA[37]       0000006c
	RETA[38]       00000011
	RETA[39]       00000027
	RETA[40]       00000029
	RETA[41]       00000097
	RETA[42]       00000055
	RETA[43]       000000a2
	RETA[44]       00000019
	RETA[45]       0000006e
	RETA[46]       00000011
	RETA[47]       00000060
	RETA[48]       000000ef
	RETA[49]       000000c1
	RETA[50]       00000033
	RETA[51]       000000a2
	RETA[52]       00000007
	RETA[53]       0000008a
	RETA[54]       0000006c
	RETA[55]       000000c2
	RETA[56]       00000029
	RETA[57]       0000002e
	RETA[58]       0000008b
	RETA[59]       00000063
	RETA[60]       00000035
	RETA[61]       00000015
	RETA[62]       00000091
	RETA[63]       000000ec
	RETA[64]       00000045
	RETA[65]       0000003b
	RETA[66]       0000001d
	RETA[67]       00000040
	RETA[68]       000000c5
	RETA[69]       00000082
	RETA[70]       000000b3
	RETA[71]       000000b6
	RETA[72]       0000000a
	RETA[73]       0000009b
	RETA[74]       000000d2
	RETA[75]       000000d2
	RETA[76]       0000004a
	RETA[77]       0000004e
	RETA[78]       00000010
	RETA[79]       000000e0
	RETA[80]       0000003a
	RETA[81]       000000ae
	RETA[82]       0000000d
	RETA[83]       00000070
	RETA[84]       0000001a
	RETA[85]       000000e7
	RETA[86]       000000c7
	RETA[87]       000000a5
	RETA[88]       0000006d
	RETA[89]       0000002f
	RETA[90]       00000061
	RETA[91]       00000026
	RETA[92]       0000000f
	RETA[93]       0000001f
	RETA[94]       00000019
	RETA[95]       000000ed
	RETA[96]       00000059
	RETA[97]       00000003
	RETA[98]       00000058
	RETA[99]       000000c9
	RETA[100]      0000006d
	RETA[101]      000000aa
	RETA[102]      0000000b
	RETA[103]      00000063
	RETA[104]      000000cd
	RETA[105]      0000001f
	RETA[106]      00000018
	RETA[107]      00000042
	RETA[108]      00000079
	RETA[109]      0000000f
	RETA[110]      0000005b
	RETA[111]      00000042
	RETA[112]      00000049
	RETA[113]      0000006e
	RETA[114]      00000008
	RETA[115]      00000076
	RETA[116]      0000002d
	RETA[117]      00000059
	RETA[118]      00000047
	RETA[119]      000000a6
	RETA[120]      00000090
	RETA[121]      00000002
	RETA[122]      000000cb
	RETA[123]      00000049
	RETA[124]      00000093
	RETA[125]      00000009
	RETA[126]      00000016
	RETA[127]      000000f2
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000080
	FFLT[9]        00000000
	FFLT[10]       00000002
	FFLT[11]       00000000
	HICR           00000000
	FFMT[0]        00000006
	FFMT[1]        00000006
	FFMT[2]        00000009
	FFMT[3]        00000009
	FFMT[4]        0000000e
	FFMT[5]        0000000e
	FFMT[6]        0000000d
	FFMT[7]        0000000d
	FFMT[8]        0000000b
	FFMT[9]        0000000b
	FFMT[10]       0000000d
	FFMT[11]       0000000d
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       00000000
	FFMT[15]       00000000
	FFMT[16]       00000000
	FFMT[17]       00000000
	FFMT[18]       00000009
	FFMT[19]       00000009
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000006
	FFMT[23]       00000006
	FFMT[24]       00000003
	FFMT[25]       00000003
	FFMT[26]       00000004
	FFMT[27]       00000004
	FFMT[28]       00000005
	FFMT[29]       00000005
	FFMT[30]       0000000c
	FFMT[31]       0000000c
	FFMT[32]       00000000
	FFMT[33]       00000000
	FFMT[34]       00000008
	FFMT[35]       00000008
	FFMT[36]       00000002
	FFMT[37]       00000002
	FFMT[38]       0000000e
	FFMT[39]       0000000e
	FFMT[40]       00000003
	FFMT[41]       00000003
	FFMT[42]       0000000b
	FFMT[43]       0000000b
	FFMT[44]       00000001
	FFMT[45]       00000001
	FFMT[46]       00000005
	FFMT[47]       00000005
	FFMT[48]       00000003
	FFMT[49]       00000003
	FFMT[50]       00000001
	FFMT[51]       00000001
	FFMT[52]       0000000a
	FFMT[53]       0000000a
	FFMT[54]       00000003
	FFMT[55]       00000003
	FFMT[56]       00000001
	FFMT[57]       00000001
	FFMT[58]       0000000d
	FFMT[59]       0000000d
	FFMT[60]       00000008
	FFMT[61]       00000008
	FFMT[62]       00000002
	FFMT[63]       00000002
	FFMT[64]       00000002
	FFMT[65]       00000002
	FFMT[66]       00000007
	FFMT[67]       00000007
	FFMT[68]       00000004
	FFMT[69]       00000004
	FFMT[70]       00000006
	FFMT[71]       00000006
	FFMT[72]       0000000e
	FFMT[73]       0000000e
	FFMT[74]       0000000e
	FFMT[75]       0000000e
	FFMT[76]       0000000f
	FFMT[77]       0000000f
	FFMT[78]       00000002
	FFMT[79]       00000002
	FFMT[80]       00000000
	FFMT[81]       00000000
	FFMT[82]       0000000b
	FFMT[83]       0000000b
	FFMT[84]       00000009
	FFMT[85]       00000009
	FFMT[86]       00000009
	FFMT[87]       00000009
	FFMT[88]       0000000a
	FFMT[89]       0000000a
	FFMT[90]       0000000d
	FFMT[91]       0000000d
	FFMT[92]       00000005
	FFMT[93]       00000005
	FFMT[94]       00000006
	FFMT[95]       00000006
	FFMT[96]       00000003
	FFMT[97]       00000003
	FFMT[98]       0000000d
	FFMT[99]       0000000d
	FFMT[100]      00000009
	FFMT[101]      00000009
	FFMT[102]      0000000d
	FFMT[103]      0000000d
	FFMT[104]      00000001
	FFMT[105]      00000001
	FFMT[106]      0000000e
	FFMT[107]      0000000e
	FFMT[108]      0000000b
	FFMT[109]      0000000b
	FFMT[110]      00000000
	FFMT[111]      00000000
	FFMT[112]      00000001
	FFMT[113]      00000001
	FFMT[114]      00000000
	FFMT[115]      00000000
	FFMT[116]      00000008
	FFMT[117]      00000008
	FFMT[118]      0000000a
	FFMT[119]      0000000a
	FFMT[120]      00000001
	FFMT[121]      00000001
	FFMT[122]      00000006
	FFMT[123]      00000006
	FFMT[124]      00000002
	FFMT[125]      00000002
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        a6d21076
	FFVT[1]        a6d21076
	FFVT[2]        14fddf8e
	FFVT[3]        14fddf8e
	FFVT[4]        af998eff
	FFVT[5]        af998eff
	FFVT[6]        72ee35eb
	FFVT[7]        72ee35eb
	FFVT[8]        4595b5d0
	FFVT[9]        4595b5d0
	FFVT[10]       9ce2d272
	FFVT[11]       9ce2d272
	FFVT[12]       65ccdb20
	FFVT[13]       65ccdb20
	FFVT[14]       7a6d632f
	FFVT[15]       7a6d632f
	FFVT[16]       c9fd53bd
	FFVT[17]       c9fd53bd
	FFVT[18]       138adc2d
	FFVT[19]       138adc2d
	FFVT[20]       5a7c8912
	FFVT[21]       5a7c8912
	FFVT[22]       080da768
	FFVT[23]       080da768
	FFVT[24]       e00a93c6
	FFVT[25]       e00a93c6
	FFVT[26]       3d05bbe0
	FFVT[27]       3d05bbe0
	FFVT[28]       8dc0ad89
	FFVT[29]       8dc0ad89
	FFVT[30]       a0267e00
	FFVT[31]       a0267e00
	FFVT[32]       45f0b43f
	FFVT[33]       45f0b43f
	FFVT[34]       62120156
	FFVT[35]       62120156
	FFVT[36]       a6213b97
	FFVT[37]       a6213b97
	FFVT[38]       ea15b0b6
	FFVT[39]       ea15b0b6
	FFVT[40]       a4176212
	FFVT[41]       a4176212
	FFVT[42]       ae88d158
	FFVT[43]       ae88d158
	FFVT[44]       541de595
	FFVT[45]       541de595
	FFVT[46]       15d56ace
	FFVT[47]       15d56ace
	FFVT[48]       45824374
	FFVT[49]       45824374
	FFVT[50]       2ba17885
	FFVT[51]       2ba17885
	FFVT[52]       b63201ea
	FFVT[53]       b63201ea
	FFVT[54]       b1ff88da
	FFVT[55]       b1ff88da
	FFVT[56]       f24edcea
	FFVT[57]       f24edcea
	FFVT[58]       b068c2e7
	FFVT[59]       b068c2e7
	FFVT[60]       58a6584c
	FFVT[61]       58a6584c
	FFVT[62]       ca6624d0
	FFVT[63]       ca6624d0
	FFVT[64]       d66319d3
	FFVT[65]       d66319d3
	FFVT[66]       437f892f
	FFVT[67]       437f892f
	FFVT[68]       6298ced1
	FFVT[69]       6298ced1
	FFVT[70]       d8f20b8e
	FFVT[71]       d8f20b8e
	FFVT[72]       00a8562c
	FFVT[73]       00a8562c
	FFVT[74]       536016e4
	FFVT[75]       536016e4
	FFVT[76]       81723c11
	FFVT[77]       81723c11
	FFVT[78]       6baf812a
	FFVT[79]       6baf812a
	FFVT[80]       579813dc
	FFVT[81]       579813dc
	FFVT[82]       f1099664
	FFVT[83]       f1099664
	FFVT[84]       484724af
	FFVT[85]       484724af
	FFVT[86]       9473f82f
	FFVT[87]       9473f82f
	FFVT[88]       2086be8f
	FFVT[89]       2086be8f
	FFVT[90]       505baa7a
	FFVT[91]       505baa7a
	FFVT[92]       e106d4d4
	FFVT[93]       e106d4d4
	FFVT[94]       035cf124
	FFVT[95]       035cf124
	FFVT[96]       80e38b56
	FFVT[97]       80e38b56
	FFVT[98]       03ef854a
	FFVT[99]       03ef854a
	FFVT[100]      ece8d8c9
	FFVT[101]      ece8d8c9
	FFVT[102]      a1d4c1a9
	FFVT[103]      a1d4c1a9
	FFVT[104]      e800f0b6
	FFVT[105]      e800f0b6
	FFVT[106]      7019d873
	FFVT[107]      7019d873
	FFVT[108]      a45554ff
	FFVT[109]      a45554ff
	FFVT[110]      29f98242
	FFVT[111]      29f98242
	FFVT[112]      b517937f
	FFVT[113]      b517937f
	FFVT[114]      a4d35dd5
	FFVT[115]      a4d35dd5
	FFVT[116]      52328c1b
	FFVT[117]      52328c1b
	FFVT[118]      09f59e76
	FFVT[119]      09f59e76
	FFVT[120]      1968c620
	FFVT[121]      1968c620
	FFVT[122]      cba89964
	FFVT[123]      cba89964
	FFVT[124]      42dc73e1
	FFVT[125]      42dc73e1
	FFVT[126]      06efaa25
	FFVT[127]      06efaa25


0d:00.0 (8086:108c)
Intel Corporation 82573E Gigabit Ethernet Controller (Copper)
	Name           Value
	~~~~           ~~~~~
	CTRL           18140248
	STATUS         80080743
	EECD           02011b18
	EERD           ffff0026
	CTRL_EXT       28780000
	FLA            00000608
	MDIC           18316d0c
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            000003d0
	ICS            00000000
	IMS            0000009d
	IMC            0000009d
	IAM            ffffffff
	RCTL           04048002
	FCTTV          00000680
	TCTL           3103f0fa
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    10000008
	EXTCNF_SIZE    00000000
	PBA            000c0014
	PBS            00000020
	EEMNGCTL       800000f7
	EEARBC         00080100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           00012000
	ERT            00000000
	FCRTL          800047f8
	FCRTH          00004800
	PSRCTL         00040402
	RDBAL          1310c000
	RDBAH          00000002
	RDLEN          00001000
	RDH            0000007e
	RDT            0000007c
	RDTR           00000000
	RXDCTL         00010000
	RADV           00000008
	RDBAL1         00000000
	RDBAH1         01200200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           00000bde
	TDFT           00000bde
	TDFHS          00000bde
	TDFTS          00000bde
	TDFPC          00000000
	TDBAL          16a50000
	TDBAH          00000002
	TDLEN          00001000
	TDH            00000086
	TDT            00000086
	TIDV           00000008
	TXDCTL         01410000
	TADV           00000020
	TARC0          00000403
	TDBAL1         00800000
	TDBAH1         10000500
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000000
	ICRXATC        00000000
	ICTXPTC        00000000
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00000300
	RFCTL          00000000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e2e1
	RAL[1]         005e0001
	RAH[1]         80000100
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        96483000
	RAH[15]        0000e2e1
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
	VFTA[51]       00000000
	VFTA[52]       00000000
	VFTA[53]       00000000
	VFTA[54]       00000000
	VFTA[55]       00000000
	VFTA[56]       00000000
	VFTA[57]       00000000
	VFTA[58]       00000000
	VFTA[59]       00000000
	VFTA[60]       00000000
	VFTA[61]       00000000
	VFTA[62]       00000000
	VFTA[63]       00000000
	VFTA[64]       00000000
	VFTA[65]       00000000
	VFTA[66]       00000000
	VFTA[67]       00000000
	VFTA[68]       00000000
	VFTA[69]       00000000
	VFTA[70]       00000000
	VFTA[71]       00000000
	VFTA[72]       00000000
	VFTA[73]       00000000
	VFTA[74]       00000000
	VFTA[75]       00000000
	VFTA[76]       00000000
	VFTA[77]       00000000
	VFTA[78]       00000000
	VFTA[79]       00000000
	VFTA[80]       00000000
	VFTA[81]       00000000
	VFTA[82]       00000000
	VFTA[83]       00000000
	VFTA[84]       00000000
	VFTA[85]       00000000
	VFTA[86]       00000000
	VFTA[87]       00000000
	VFTA[88]       00000000
	VFTA[89]       00000000
	VFTA[90]       00000000
	VFTA[91]       00000000
	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
	VFTA[97]       00000000
	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
	VFTA[101]      00000000
	VFTA[102]      00000000
	VFTA[103]      00000000
	VFTA[104]      00000000
	VFTA[105]      00000000
	VFTA[106]      00000000
	VFTA[107]      00000000
	VFTA[108]      00000000
	VFTA[109]      00000000
	VFTA[110]      00000000
	VFTA[111]      00000000
	VFTA[112]      00000000
	VFTA[113]      00000000
	VFTA[114]      00000000
	VFTA[115]      00000000
	VFTA[116]      00000000
	VFTA[117]      00000000
	VFTA[118]      00000000
	VFTA[119]      00000000
	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           0022a300
	IPAV           00000000
	MANC2H         00000380
	RSSIM          00000000
	RSSIR          00000000
	WUPL           28167f49
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         01041046
	FWSM           00018044
	RETA[0]        0000008c
	RETA[1]        0000001f
	RETA[2]        00000082
	RETA[3]        00000086
	RETA[4]        0000009f
	RETA[5]        00000066
	RETA[6]        0000005a
	RETA[7]        0000004b
	RETA[8]        0000001e
	RETA[9]        000000af
	RETA[10]       000000dc
	RETA[11]       000000e5
	RETA[12]       0000002d
	RETA[13]       000000aa
	RETA[14]       0000009b
	RETA[15]       0000001c
	RETA[16]       00000053
	RETA[17]       000000e6
	RETA[18]       00000096
	RETA[19]       00000084
	RETA[20]       000000b1
	RETA[21]       0000006b
	RETA[22]       000000b7
	RETA[23]       000000de
	RETA[24]       00000010
	RETA[25]       000000d4
	RETA[26]       000000ef
	RETA[27]       00000034
	RETA[28]       00000038
	RETA[29]       0000000e
	RETA[30]       00000012
	RETA[31]       0000001d
	RETA[32]       00000001
	RETA[33]       0000004b
	RETA[34]       000000e3
	RETA[35]       0000001e
	RETA[36]       0000001b
	RETA[37]       0000009b
	RETA[38]       0000008e
	RETA[39]       00000068
	RETA[40]       00000015
	RETA[41]       000000e2
	RETA[42]       000000c7
	RETA[43]       000000c6
	RETA[44]       00000034
	RETA[45]       0000007a
	RETA[46]       000000b6
	RETA[47]       00000014
	RETA[48]       000000aa
	RETA[49]       0000006f
	RETA[50]       000000fa
	RETA[51]       00000085
	RETA[52]       00000032
	RETA[53]       0000004e
	RETA[54]       0000003f
	RETA[55]       0000004c
	RETA[56]       00000099
	RETA[57]       0000003d
	RETA[58]       000000f2
	RETA[59]       000000ae
	RETA[60]       00000011
	RETA[61]       0000006f
	RETA[62]       000000b7
	RETA[63]       0000000b
	RETA[64]       0000009b
	RETA[65]       00000007
	RETA[66]       0000000a
	RETA[67]       0000009a
	RETA[68]       000000a3
	RETA[69]       00000020
	RETA[70]       000000f3
	RETA[71]       00000084
	RETA[72]       0000004d
	RETA[73]       00000048
	RETA[74]       0000008b
	RETA[75]       00000021
	RETA[76]       000000c7
	RETA[77]       00000053
	RETA[78]       000000a3
	RETA[79]       0000008b
	RETA[80]       000000d4
	RETA[81]       0000004a
	RETA[82]       000000c2
	RETA[83]       000000c0
	RETA[84]       0000003b
	RETA[85]       00000069
	RETA[86]       00000082
	RETA[87]       0000005e
	RETA[88]       00000098
	RETA[89]       0000007a
	RETA[90]       00000017
	RETA[91]       00000084
	RETA[92]       000000ab
	RETA[93]       0000004a
	RETA[94]       000000c7
	RETA[95]       00000014
	RETA[96]       0000001d
	RETA[97]       0000006a
	RETA[98]       00000077
	RETA[99]       00000014
	RETA[100]      000000b9
	RETA[101]      0000000a
	RETA[102]      000000c2
	RETA[103]      0000003d
	RETA[104]      00000055
	RETA[105]      000000aa
	RETA[106]      000000b4
	RETA[107]      00000004
	RETA[108]      00000047
	RETA[109]      00000053
	RETA[110]      000000f7
	RETA[111]      00000016
	RETA[112]      0000008b
	RETA[113]      000000d3
	RETA[114]      000000b2
	RETA[115]      00000074
	RETA[116]      0000003b
	RETA[117]      0000002b
	RETA[118]      0000009d
	RETA[119]      00000016
	RETA[120]      0000002b
	RETA[121]      000000ce
	RETA[122]      0000008e
	RETA[123]      00000044
	RETA[124]      00000027
	RETA[125]      0000004b
	RETA[126]      000000c2
	RETA[127]      00000086
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000000
	FFLT[9]        00000000
	FFLT[10]       00000000
	FFLT[11]       00000000
	HICR           00000109
	FFMT[0]        0000000c
	FFMT[1]        0000000c
	FFMT[2]        0000000d
	FFMT[3]        0000000d
	FFMT[4]        0000000c
	FFMT[5]        0000000c
	FFMT[6]        0000000f
	FFMT[7]        0000000f
	FFMT[8]        00000001
	FFMT[9]        00000001
	FFMT[10]       00000006
	FFMT[11]       00000006
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       0000000c
	FFMT[15]       0000000c
	FFMT[16]       0000000e
	FFMT[17]       0000000e
	FFMT[18]       00000001
	FFMT[19]       00000001
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000001
	FFMT[23]       00000001
	FFMT[24]       00000000
	FFMT[25]       00000000
	FFMT[26]       00000001
	FFMT[27]       00000001
	FFMT[28]       00000002
	FFMT[29]       00000002
	FFMT[30]       0000000f
	FFMT[31]       0000000f
	FFMT[32]       00000001
	FFMT[33]       00000001
	FFMT[34]       00000003
	FFMT[35]       00000003
	FFMT[36]       0000000c
	FFMT[37]       0000000c
	FFMT[38]       00000002
	FFMT[39]       00000002
	FFMT[40]       00000008
	FFMT[41]       00000008
	FFMT[42]       0000000f
	FFMT[43]       0000000f
	FFMT[44]       00000008
	FFMT[45]       00000008
	FFMT[46]       00000004
	FFMT[47]       00000004
	FFMT[48]       00000006
	FFMT[49]       00000006
	FFMT[50]       00000007
	FFMT[51]       00000007
	FFMT[52]       00000002
	FFMT[53]       00000002
	FFMT[54]       0000000b
	FFMT[55]       0000000b
	FFMT[56]       00000008
	FFMT[57]       00000008
	FFMT[58]       00000003
	FFMT[59]       00000003
	FFMT[60]       00000004
	FFMT[61]       00000004
	FFMT[62]       00000000
	FFMT[63]       00000000
	FFMT[64]       00000001
	FFMT[65]       00000001
	FFMT[66]       0000000e
	FFMT[67]       0000000e
	FFMT[68]       00000007
	FFMT[69]       00000007
	FFMT[70]       0000000b
	FFMT[71]       0000000b
	FFMT[72]       00000006
	FFMT[73]       00000006
	FFMT[74]       00000009
	FFMT[75]       00000009
	FFMT[76]       00000009
	FFMT[77]       00000009
	FFMT[78]       00000009
	FFMT[79]       00000009
	FFMT[80]       0000000f
	FFMT[81]       0000000f
	FFMT[82]       00000009
	FFMT[83]       00000009
	FFMT[84]       0000000a
	FFMT[85]       0000000a
	FFMT[86]       00000000
	FFMT[87]       00000000
	FFMT[88]       0000000b
	FFMT[89]       0000000b
	FFMT[90]       00000003
	FFMT[91]       00000003
	FFMT[92]       00000001
	FFMT[93]       00000001
	FFMT[94]       00000004
	FFMT[95]       00000004
	FFMT[96]       0000000b
	FFMT[97]       0000000b
	FFMT[98]       0000000c
	FFMT[99]       0000000c
	FFMT[100]      0000000a
	FFMT[101]      0000000a
	FFMT[102]      00000009
	FFMT[103]      00000009
	FFMT[104]      00000000
	FFMT[105]      00000000
	FFMT[106]      00000003
	FFMT[107]      00000003
	FFMT[108]      00000006
	FFMT[109]      00000006
	FFMT[110]      00000008
	FFMT[111]      00000008
	FFMT[112]      0000000e
	FFMT[113]      0000000e
	FFMT[114]      00000007
	FFMT[115]      00000007
	FFMT[116]      0000000c
	FFMT[117]      0000000c
	FFMT[118]      00000007
	FFMT[119]      00000007
	FFMT[120]      00000009
	FFMT[121]      00000009
	FFMT[122]      00000001
	FFMT[123]      00000001
	FFMT[124]      00000001
	FFMT[125]      00000001
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        69386efe
	FFVT[1]        69386efe
	FFVT[2]        47dac1bd
	FFVT[3]        47dac1bd
	FFVT[4]        0af977e3
	FFVT[5]        0af977e3
	FFVT[6]        0bf35fcd
	FFVT[7]        0bf35fcd
	FFVT[8]        396325cb
	FFVT[9]        396325cb
	FFVT[10]       45fb2966
	FFVT[11]       45fb2966
	FFVT[12]       85fe3e31
	FFVT[13]       85fe3e31
	FFVT[14]       e6b90940
	FFVT[15]       e6b90940
	FFVT[16]       fcf5c382
	FFVT[17]       fcf5c382
	FFVT[18]       68b90289
	FFVT[19]       68b90289
	FFVT[20]       0fada5ed
	FFVT[21]       0fada5ed
	FFVT[22]       67f87890
	FFVT[23]       67f87890
	FFVT[24]       2dd69d55
	FFVT[25]       2dd69d55
	FFVT[26]       0f78a7b0
	FFVT[27]       0f78a7b0
	FFVT[28]       138d13f7
	FFVT[29]       138d13f7
	FFVT[30]       e302400a
	FFVT[31]       e302400a
	FFVT[32]       bc8ebaf7
	FFVT[33]       bc8ebaf7
	FFVT[34]       96fe79fb
	FFVT[35]       96fe79fb
	FFVT[36]       df5aa33b
	FFVT[37]       df5aa33b
	FFVT[38]       91212c9e
	FFVT[39]       91212c9e
	FFVT[40]       71c517b4
	FFVT[41]       71c517b4
	FFVT[42]       0bb6697f
	FFVT[43]       0bb6697f
	FFVT[44]       63018c23
	FFVT[45]       63018c23
	FFVT[46]       48a35d54
	FFVT[47]       48a35d54
	FFVT[48]       95f4d375
	FFVT[49]       95f4d375
	FFVT[50]       4699c679
	FFVT[51]       4699c679
	FFVT[52]       06e7adde
	FFVT[53]       06e7adde
	FFVT[54]       e31f1b6d
	FFVT[55]       e31f1b6d
	FFVT[56]       888919d6
	FFVT[57]       888919d6
	FFVT[58]       4751a142
	FFVT[59]       4751a142
	FFVT[60]       676fef06
	FFVT[61]       676fef06
	FFVT[62]       792d0e82
	FFVT[63]       792d0e82
	FFVT[64]       1066713d
	FFVT[65]       1066713d
	FFVT[66]       8f55fa4d
	FFVT[67]       8f55fa4d
	FFVT[68]       5fe46f1a
	FFVT[69]       5fe46f1a
	FFVT[70]       cacbc51e
	FFVT[71]       cacbc51e
	FFVT[72]       04470301
	FFVT[73]       04470301
	FFVT[74]       6b3dfea9
	FFVT[75]       6b3dfea9
	FFVT[76]       bd00be00
	FFVT[77]       bd00be00
	FFVT[78]       7079cb0c
	FFVT[79]       7079cb0c
	FFVT[80]       e7180acc
	FFVT[81]       e7180acc
	FFVT[82]       25755bec
	FFVT[83]       25755bec
	FFVT[84]       bcdd8914
	FFVT[85]       bcdd8914
	FFVT[86]       9ed3128d
	FFVT[87]       9ed3128d
	FFVT[88]       dc48587b
	FFVT[89]       dc48587b
	FFVT[90]       e9755ebf
	FFVT[91]       e9755ebf
	FFVT[92]       9ff23883
	FFVT[93]       9ff23883
	FFVT[94]       52d8233d
	FFVT[95]       52d8233d
	FFVT[96]       cdcf21c0
	FFVT[97]       cdcf21c0
	FFVT[98]       9069a69f
	FFVT[99]       9069a69f
	FFVT[100]      b52c57f5
	FFVT[101]      b52c57f5
	FFVT[102]      42977681
	FFVT[103]      42977681
	FFVT[104]      ab8b671a
	FFVT[105]      ab8b671a
	FFVT[106]      4edc0c8b
	FFVT[107]      4edc0c8b
	FFVT[108]      f41c47f0
	FFVT[109]      f41c47f0
	FFVT[110]      ab4edb12
	FFVT[111]      ab4edb12
	FFVT[112]      c096a36f
	FFVT[113]      c096a36f
	FFVT[114]      ed46c26a
	FFVT[115]      ed46c26a
	FFVT[116]      aca39e0b
	FFVT[117]      aca39e0b
	FFVT[118]      e01ed8b5
	FFVT[119]      e01ed8b5
	FFVT[120]      604c1ef5
	FFVT[121]      604c1ef5
	FFVT[122]      0dbbfeae
	FFVT[123]      0dbbfeae
	FFVT[124]      9478dbb7
	FFVT[125]      9478dbb7
	FFVT[126]      f95cfa23
	FFVT[127]      f95cfa23



^ permalink raw reply

* Re: [PATCH] rtnetlink: make SR-IOV VF interface symmetric
From: Arnd Bergmann @ 2010-05-15  9:04 UTC (permalink / raw)
  To: Chris Wright; +Cc: davem, kaber, mitch.a.williams, scofeldm, shemminger, netdev
In-Reply-To: <20100515031416.GE15313@sequoia.sous-sol.org>

On Saturday 15 May 2010 05:14:16 Chris Wright wrote:
> Now we have a set of nested attributes:
> 
>   IFLA_VFINFO_LIST (NESTED)
>     IFLA_VF_INFO (NESTED)
>       IFLA_VF_MAC
>       IFLA_VF_VLAN
>       IFLA_VF_TX_RATE
> 
> This allows a single set to operate on multiple attributes if desired.
> Among other things, it means a dump can be replayed to set state.
> 
> The current interface has yet to be released, so this seems like
> something to consider for 2.6.34.
> 
> Signed-off-by: Chris Wright <chrisw@sous-sol.org

Very nice! This would be the minimum change to make the ABI conform
to the general rules, so it would be really good to have that.

Acked-by: Arnd Bergmann <arnd@arndb.de>

It does make the interface a bit strange (less than before), since the
new IFLA_VF_INFO now contains three nested attributes that each contain their
own vf number field, and we don't require that they are identical or that
each of the nested attributes inside VF_INFO appears only once.

How about a second patch that splits out an IFLA_VF_NUMBER attribute
and makes do_setvfinfo use nla_parse_nested instead of nla_for_each_nested
in order to tighten the rules on this some more?

	Arnd

^ permalink raw reply

* Re: [net-next-2.6 V8 PATCH 1/2] Add netlink support for virtual port management (was iovnl)
From: Arnd Bergmann @ 2010-05-15  9:07 UTC (permalink / raw)
  To: Chris Wright; +Cc: Scott Feldman, davem, netdev, kaber
In-Reply-To: <20100515031130.GD5798@x200.localdomain>

On Saturday 15 May 2010 05:11:30 Chris Wright wrote:
> * Scott Feldman (scofeldm@cisco.com) wrote:
> > From: Scott Feldman <scofeldm@cisco.com>
> > 
> > Add new netdev ops ndo_{set|get}_vf_port to allow setting of
> > port-profile on a netdev interface.  Extends netlink socket RTM_SETLINK/
> > RTM_GETLINK with two new sub msgs called IFLA_VF_PORTS and IFLA_PORT_SELF
> > (added to end of IFLA_cmd list).  These are both nested atrtibutes
> > using this layout:
> > 
> >               [IFLA_NUM_VF]
> >               [IFLA_VF_PORTS]
> >                       [IFLA_VF_PORT]
> >                               [IFLA_PORT_*], ...
> >                       [IFLA_VF_PORT]
> >                               [IFLA_PORT_*], ...
> >                       ...
> >               [IFLA_PORT_SELF]
> >                       [IFLA_PORT_*], ...
> > 
> > These attributes are design to be set and get symmetrically.  VF_PORTS
> > is a list of VF_PORTs, one for each VF, when dealing with an SR-IOV
> > device.  PORT_SELF is for the PF of the SR-IOV device, in case it wants
> > to also have a port-profile, or for the case where the VF==PF, like in
> > enic patch 2/2 of this patch set.
> > 
> > A port-profile is used to configure/enable the external switch virtual port
> > backing the netdev interface, not to configure the host-facing side of the
> > netdev.  A port-profile is an identifier known to the switch.  How port-
> > profiles are installed on the switch or how available port-profiles are
> > made know to the host is outside the scope of this patch.
> > 
> > There are two types of port-profiles specs in the netlink msg.  The first spec
> > is for 802.1Qbg (pre-)standard, VDP protocol.  The second spec is for devices
> > that run a similar protocol as VDP but in firmware, thus hiding the protocol
> > details.  In either case, the specs have much in common and makes sense to
> > define the netlink msg as the union of the two specs.  For example, both specs
> > have a notition of associating/deassociating a port-profile.  And both specs
> > require some information from the hypervisor manager, such as client port
> > instance ID.
> > 
> > The general flow is the port-profile is applied to a host netdev interface
> > using RTM_SETLINK, the receiver of the RTM_SETLINK msg communicates with the
> > switch, and the switch virtual port backing the host netdev interface is
> > configured/enabled based on the settings defined by the port-profile.  What
> > those settings comprise, and how those settings are managed is again
> > outside the scope of this patch, since this patch only deals with the
> > first step in the flow.
> > 
> > Signed-off-by: Scott Feldman <scofeldm@cisco.com>
> > Signed-off-by: Roopa Prabhu<roprabhu@cisco.com>
> 
> Assuming the SR-IOV VFINFO changes go in there will be some minor patch
> conflicts to be sorted out.

Right, I assume the best resolution then would be drop IFLA_VF_PORTS and
put the IFLA_VF_PORT attribute inside IFLA_VF_INFO, correct?

> Acked-by: Chris Wright <chrisw@redhat.com>

Acked-by: Arnd Bergmann <arnd@arndb.de>

^ permalink raw reply

* Re: loosing IPMI-card by loading netconsole
From: Tejun Heo @ 2010-05-15  9:10 UTC (permalink / raw)
  To: Carsten Aulbert
  Cc: e1000-devel, netdev@vger.kernel.org, Allan, Bruce W,
	Brandeburg, Jesse, Henning Fehrmann, Ronciak, John,
	Kirsher, Jeffrey T, Matt Mackall
In-Reply-To: <201005151026.20356.carsten.aulbert@aei.mpg.de>

On 05/15/2010 10:26 AM, Carsten Aulbert wrote:
> e.g. how can I re-enable the interface once I issued
> 
> echo 1 > /sys/devices/pci0000:00/0000:00:1c.4/0000:0d:00.0/remove

echo 1 > /sys/devices/pci0000:00/0000:00:1c.4/rescan

-- 
tejun

------------------------------------------------------------------------------

_______________________________________________
E1000-devel mailing list
E1000-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/e1000-devel
To learn more about Intel&#174; Ethernet, visit http://communities.intel.com/community/wired

^ permalink raw reply

* Re: loosing IPMI-card by loading netconsole
From: Carsten Aulbert @ 2010-05-15  9:36 UTC (permalink / raw)
  To: Tejun Heo
  Cc: e1000-devel, netdev@vger.kernel.org, Allan, Bruce W,
	Brandeburg, Jesse, Henning Fehrmann, Ronciak, John,
	Kirsher, Jeffrey T, Matt Mackall
In-Reply-To: <4BEE650F.3080701@kernel.org>

[-- Attachment #1: Type: Text/Plain, Size: 676 bytes --]

On Saturday 15 May 2010 11:10:39 Tejun Heo wrote:

> > echo 1 > /sys/devices/pci0000:00/0000:00:1c.4/0000:0d:00.0/remove
> 
> echo 1 > /sys/devices/pci0000:00/0000:00:1c.4/rescan
> 

D'oh

Ok, IPMI does not work remotely, after removing it does and still after 
rescanning (netconsole not loaded for the time being). At this point I ran 
ethtool -S for both interfaces as well as ethreg (suffix afterRescan).

then I only ran dhclient:
dhclient3 -pf /var/run/dhclient.eth0.pid -lf 
/var/lib/dhcp3/dhclient.eth0.leases eth0

and afterwards the IPMI connectivity was gone again.

Status files after this are also attached, suffix afterDHClient

Does this help?

Cheers

Carsten

[-- Attachment #2: ethtool_S_eth0.afterRescan --]
[-- Type: text/plain, Size: 1178 bytes --]

NIC statistics:
     rx_packets: 0
     tx_packets: 0
     rx_bytes: 0
     tx_bytes: 0
     rx_broadcast: 0
     tx_broadcast: 0
     rx_multicast: 0
     tx_multicast: 0
     rx_errors: 0
     tx_errors: 0
     tx_dropped: 0
     multicast: 0
     collisions: 0
     rx_length_errors: 0
     rx_over_errors: 0
     rx_crc_errors: 0
     rx_frame_errors: 0
     rx_no_buffer_count: 0
     rx_missed_errors: 0
     tx_aborted_errors: 0
     tx_carrier_errors: 0
     tx_fifo_errors: 0
     tx_heartbeat_errors: 0
     tx_window_errors: 0
     tx_abort_late_coll: 0
     tx_deferred_ok: 0
     tx_single_coll_ok: 0
     tx_multi_coll_ok: 0
     tx_timeout_count: 0
     tx_restart_queue: 0
     rx_long_length_errors: 0
     rx_short_length_errors: 0
     rx_align_errors: 0
     tx_tcp_seg_good: 0
     tx_tcp_seg_failed: 0
     rx_flow_control_xon: 0
     rx_flow_control_xoff: 0
     tx_flow_control_xon: 0
     tx_flow_control_xoff: 0
     rx_long_byte_count: 0
     rx_csum_offload_good: 0
     rx_csum_offload_errors: 0
     rx_header_split: 0
     alloc_rx_buff_failed: 0
     tx_smbus: 0
     rx_smbus: 0
     dropped_smbus: 0
     rx_dma_failed: 0
     tx_dma_failed: 0

[-- Attachment #3: ethtool_S_eth1.afterRescan --]
[-- Type: text/plain, Size: 1230 bytes --]

NIC statistics:
     rx_packets: 757689
     tx_packets: 531099
     rx_bytes: 4817824750
     tx_bytes: 643044246
     rx_broadcast: 63896
     tx_broadcast: 40
     rx_multicast: 0
     tx_multicast: 0
     rx_errors: 0
     tx_errors: 0
     tx_dropped: 0
     multicast: 0
     collisions: 0
     rx_length_errors: 0
     rx_over_errors: 0
     rx_crc_errors: 0
     rx_frame_errors: 0
     rx_no_buffer_count: 0
     rx_missed_errors: 0
     tx_aborted_errors: 0
     tx_carrier_errors: 0
     tx_fifo_errors: 0
     tx_heartbeat_errors: 0
     tx_window_errors: 0
     tx_abort_late_coll: 0
     tx_deferred_ok: 0
     tx_single_coll_ok: 0
     tx_multi_coll_ok: 0
     tx_timeout_count: 0
     tx_restart_queue: 0
     rx_long_length_errors: 0
     rx_short_length_errors: 0
     rx_align_errors: 0
     tx_tcp_seg_good: 9097
     tx_tcp_seg_failed: 0
     rx_flow_control_xon: 0
     rx_flow_control_xoff: 0
     tx_flow_control_xon: 0
     tx_flow_control_xoff: 0
     rx_long_byte_count: 4817824750
     rx_csum_offload_good: 693784
     rx_csum_offload_errors: 0
     rx_header_split: 7139
     alloc_rx_buff_failed: 0
     tx_smbus: 0
     rx_smbus: 0
     dropped_smbus: 0
     rx_dma_failed: 0
     tx_dma_failed: 0

[-- Attachment #4: ethtool_S_eth0.afterDHClient --]
[-- Type: text/plain, Size: 1201 bytes --]

NIC statistics:
     rx_packets: 613
     tx_packets: 46
     rx_bytes: 44804
     tx_bytes: 4280
     rx_broadcast: 464
     tx_broadcast: 3
     rx_multicast: 0
     tx_multicast: 0
     rx_errors: 0
     tx_errors: 0
     tx_dropped: 0
     multicast: 0
     collisions: 0
     rx_length_errors: 0
     rx_over_errors: 0
     rx_crc_errors: 0
     rx_frame_errors: 0
     rx_no_buffer_count: 0
     rx_missed_errors: 127
     tx_aborted_errors: 0
     tx_carrier_errors: 0
     tx_fifo_errors: 0
     tx_heartbeat_errors: 0
     tx_window_errors: 0
     tx_abort_late_coll: 0
     tx_deferred_ok: 0
     tx_single_coll_ok: 0
     tx_multi_coll_ok: 0
     tx_timeout_count: 0
     tx_restart_queue: 0
     rx_long_length_errors: 0
     rx_short_length_errors: 0
     rx_align_errors: 0
     tx_tcp_seg_good: 0
     tx_tcp_seg_failed: 0
     rx_flow_control_xon: 0
     rx_flow_control_xoff: 0
     tx_flow_control_xon: 0
     tx_flow_control_xoff: 0
     rx_long_byte_count: 44804
     rx_csum_offload_good: 24
     rx_csum_offload_errors: 0
     rx_header_split: 0
     alloc_rx_buff_failed: 0
     tx_smbus: 123
     rx_smbus: 716
     dropped_smbus: 0
     rx_dma_failed: 0
     tx_dma_failed: 0

[-- Attachment #5: ethregs.afterRescan --]
[-- Type: text/plain, Size: 41597 bytes --]

0e:00.0 (8086:109a)
Intel Corporation 82573L Gigabit Ethernet Controller
	Name           Value
	~~~~           ~~~~~
	CTRL           00140248
	STATUS         80080783
	EECD           06008318
	EERD           f7460012
	CTRL_EXT       28780000
	FLA            00000608
	MDIC           182a3800
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            000000c3
	ICS            00000000
	IMS            0000009d
	IMC            0000009d
	IAM            ffffffff
	RCTL           06078422
	FCTTV          00000680
	TCTL           3103f0fa
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    1000000a
	EXTCNF_SIZE    00000004
	PBA            0012000e
	PBS            00000020
	EEMNGCTL       80000000
	EEARBC         00000100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           0004db00
	ERT            00002100
	FCRTL          80002ff8
	FCRTH          00003000
	PSRCTL         04040401
	RDBAL          16b08000
	RDBAH          00000002
	RDLEN          00002000
	RDH            00000010
	RDT            0000000c
	RDTR           00000000
	RXDCTL         00010003
	RADV           00000008
	RDBAL1         00000000
	RDBAH1         00000200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           000009f0
	TDFT           000009f0
	TDFHS          000009f0
	TDFTS          000009f0
	TDFPC          00000000
	TDBAL          06c8c000
	TDBAH          00000002
	TDLEN          00001000
	TDH            00000083
	TDT            00000083
	TIDV           00000008
	TXDCTL         01410000
	TADV           00000020
	TARC0          00000403
	TDBAL1         80400000
	TDBAH1         00000000
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000053
	ICRXATC        00000000
	ICTXPTC        0000000d
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00001300
	RFCTL          00038000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e3e1
	RAL[1]         005e0001
	RAH[1]         80000100
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        00000000
	RAH[15]        00020010
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
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	VFTA[54]       00000000
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	VFTA[56]       00000000
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	VFTA[58]       00000000
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	VFTA[60]       00000000
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	VFTA[62]       00000000
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	VFTA[64]       00000000
	VFTA[65]       00000000
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	VFTA[68]       00000000
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	VFTA[70]       00000000
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	VFTA[72]       00000000
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	VFTA[74]       00000000
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	VFTA[80]       00000000
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	VFTA[84]       00000000
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	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
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	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
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	VFTA[118]      00000000
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	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           00000100
	IPAV           00000000
	MANC2H         00000000
	RSSIM          00000000
	RSSIR          00000001
	WUPL           9ce201fa
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         a1041046
	FWSM           00000000
	RETA[0]        00000015
	RETA[1]        0000006b
	RETA[2]        00000004
	RETA[3]        000000e2
	RETA[4]        00000070
	RETA[5]        00000077
	RETA[6]        00000018
	RETA[7]        00000001
	RETA[8]        00000029
	RETA[9]        00000069
	RETA[10]       00000004
	RETA[11]       00000081
	RETA[12]       00000040
	RETA[13]       0000001e
	RETA[14]       00000093
	RETA[15]       000000c3
	RETA[16]       0000001b
	RETA[17]       0000002f
	RETA[18]       00000002
	RETA[19]       000000f4
	RETA[20]       000000bd
	RETA[21]       000000b6
	RETA[22]       000000af
	RETA[23]       00000029
	RETA[24]       00000003
	RETA[25]       0000001e
	RETA[26]       00000011
	RETA[27]       000000a5
	RETA[28]       0000008f
	RETA[29]       0000000b
	RETA[30]       00000059
	RETA[31]       00000006
	RETA[32]       00000008
	RETA[33]       000000d8
	RETA[34]       00000099
	RETA[35]       000000fb
	RETA[36]       0000003c
	RETA[37]       0000006c
	RETA[38]       00000011
	RETA[39]       00000027
	RETA[40]       00000029
	RETA[41]       00000097
	RETA[42]       00000055
	RETA[43]       000000a2
	RETA[44]       00000019
	RETA[45]       0000006e
	RETA[46]       00000011
	RETA[47]       00000060
	RETA[48]       000000ef
	RETA[49]       000000c1
	RETA[50]       00000033
	RETA[51]       000000a2
	RETA[52]       00000007
	RETA[53]       0000008a
	RETA[54]       0000006c
	RETA[55]       000000c2
	RETA[56]       00000029
	RETA[57]       0000002e
	RETA[58]       0000008b
	RETA[59]       00000063
	RETA[60]       00000035
	RETA[61]       00000015
	RETA[62]       00000091
	RETA[63]       000000ec
	RETA[64]       00000045
	RETA[65]       0000003b
	RETA[66]       0000001d
	RETA[67]       00000040
	RETA[68]       000000c5
	RETA[69]       00000082
	RETA[70]       000000b3
	RETA[71]       000000b6
	RETA[72]       0000000a
	RETA[73]       0000009b
	RETA[74]       000000d2
	RETA[75]       000000d2
	RETA[76]       0000004a
	RETA[77]       0000004e
	RETA[78]       00000010
	RETA[79]       000000e0
	RETA[80]       0000003a
	RETA[81]       000000ae
	RETA[82]       0000000d
	RETA[83]       00000070
	RETA[84]       0000001a
	RETA[85]       000000e7
	RETA[86]       000000c7
	RETA[87]       000000a5
	RETA[88]       0000006d
	RETA[89]       0000002f
	RETA[90]       00000061
	RETA[91]       00000026
	RETA[92]       0000000f
	RETA[93]       0000001f
	RETA[94]       00000019
	RETA[95]       000000ed
	RETA[96]       00000059
	RETA[97]       00000003
	RETA[98]       00000058
	RETA[99]       000000c9
	RETA[100]      0000006d
	RETA[101]      000000aa
	RETA[102]      0000000b
	RETA[103]      00000063
	RETA[104]      000000cd
	RETA[105]      0000001f
	RETA[106]      00000018
	RETA[107]      00000042
	RETA[108]      00000079
	RETA[109]      0000000f
	RETA[110]      0000005b
	RETA[111]      00000042
	RETA[112]      00000049
	RETA[113]      0000006e
	RETA[114]      00000008
	RETA[115]      00000076
	RETA[116]      0000002d
	RETA[117]      00000059
	RETA[118]      00000047
	RETA[119]      000000a6
	RETA[120]      00000090
	RETA[121]      00000002
	RETA[122]      000000cb
	RETA[123]      00000049
	RETA[124]      00000093
	RETA[125]      00000009
	RETA[126]      00000016
	RETA[127]      000000f2
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000080
	FFLT[9]        00000000
	FFLT[10]       00000002
	FFLT[11]       00000000
	HICR           00000000
	FFMT[0]        00000006
	FFMT[1]        00000006
	FFMT[2]        00000009
	FFMT[3]        00000009
	FFMT[4]        0000000e
	FFMT[5]        0000000e
	FFMT[6]        0000000d
	FFMT[7]        0000000d
	FFMT[8]        0000000b
	FFMT[9]        0000000b
	FFMT[10]       0000000d
	FFMT[11]       0000000d
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       00000000
	FFMT[15]       00000000
	FFMT[16]       00000000
	FFMT[17]       00000000
	FFMT[18]       00000009
	FFMT[19]       00000009
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000006
	FFMT[23]       00000006
	FFMT[24]       00000003
	FFMT[25]       00000003
	FFMT[26]       00000004
	FFMT[27]       00000004
	FFMT[28]       00000005
	FFMT[29]       00000005
	FFMT[30]       0000000c
	FFMT[31]       0000000c
	FFMT[32]       00000000
	FFMT[33]       00000000
	FFMT[34]       00000008
	FFMT[35]       00000008
	FFMT[36]       00000002
	FFMT[37]       00000002
	FFMT[38]       0000000e
	FFMT[39]       0000000e
	FFMT[40]       00000003
	FFMT[41]       00000003
	FFMT[42]       0000000b
	FFMT[43]       0000000b
	FFMT[44]       00000001
	FFMT[45]       00000001
	FFMT[46]       00000005
	FFMT[47]       00000005
	FFMT[48]       00000003
	FFMT[49]       00000003
	FFMT[50]       00000001
	FFMT[51]       00000001
	FFMT[52]       0000000a
	FFMT[53]       0000000a
	FFMT[54]       00000003
	FFMT[55]       00000003
	FFMT[56]       00000001
	FFMT[57]       00000001
	FFMT[58]       0000000d
	FFMT[59]       0000000d
	FFMT[60]       00000008
	FFMT[61]       00000008
	FFMT[62]       00000002
	FFMT[63]       00000002
	FFMT[64]       00000002
	FFMT[65]       00000002
	FFMT[66]       00000007
	FFMT[67]       00000007
	FFMT[68]       00000004
	FFMT[69]       00000004
	FFMT[70]       00000006
	FFMT[71]       00000006
	FFMT[72]       0000000e
	FFMT[73]       0000000e
	FFMT[74]       0000000e
	FFMT[75]       0000000e
	FFMT[76]       0000000f
	FFMT[77]       0000000f
	FFMT[78]       00000002
	FFMT[79]       00000002
	FFMT[80]       00000000
	FFMT[81]       00000000
	FFMT[82]       0000000b
	FFMT[83]       0000000b
	FFMT[84]       00000009
	FFMT[85]       00000009
	FFMT[86]       00000009
	FFMT[87]       00000009
	FFMT[88]       0000000a
	FFMT[89]       0000000a
	FFMT[90]       0000000d
	FFMT[91]       0000000d
	FFMT[92]       00000005
	FFMT[93]       00000005
	FFMT[94]       00000006
	FFMT[95]       00000006
	FFMT[96]       00000003
	FFMT[97]       00000003
	FFMT[98]       0000000d
	FFMT[99]       0000000d
	FFMT[100]      00000009
	FFMT[101]      00000009
	FFMT[102]      0000000d
	FFMT[103]      0000000d
	FFMT[104]      00000001
	FFMT[105]      00000001
	FFMT[106]      0000000e
	FFMT[107]      0000000e
	FFMT[108]      0000000b
	FFMT[109]      0000000b
	FFMT[110]      00000000
	FFMT[111]      00000000
	FFMT[112]      00000001
	FFMT[113]      00000001
	FFMT[114]      00000000
	FFMT[115]      00000000
	FFMT[116]      00000008
	FFMT[117]      00000008
	FFMT[118]      0000000a
	FFMT[119]      0000000a
	FFMT[120]      00000001
	FFMT[121]      00000001
	FFMT[122]      00000006
	FFMT[123]      00000006
	FFMT[124]      00000002
	FFMT[125]      00000002
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        a6d21076
	FFVT[1]        a6d21076
	FFVT[2]        14fddf8e
	FFVT[3]        14fddf8e
	FFVT[4]        af998eff
	FFVT[5]        af998eff
	FFVT[6]        72ee35eb
	FFVT[7]        72ee35eb
	FFVT[8]        4595b5d0
	FFVT[9]        4595b5d0
	FFVT[10]       9ce2d272
	FFVT[11]       9ce2d272
	FFVT[12]       65ccdb20
	FFVT[13]       65ccdb20
	FFVT[14]       7a6d632f
	FFVT[15]       7a6d632f
	FFVT[16]       c9fd53bd
	FFVT[17]       c9fd53bd
	FFVT[18]       138adc2d
	FFVT[19]       138adc2d
	FFVT[20]       5a7c8912
	FFVT[21]       5a7c8912
	FFVT[22]       080da768
	FFVT[23]       080da768
	FFVT[24]       e00a93c6
	FFVT[25]       e00a93c6
	FFVT[26]       3d05bbe0
	FFVT[27]       3d05bbe0
	FFVT[28]       8dc0ad89
	FFVT[29]       8dc0ad89
	FFVT[30]       a0267e00
	FFVT[31]       a0267e00
	FFVT[32]       45f0b43f
	FFVT[33]       45f0b43f
	FFVT[34]       62120156
	FFVT[35]       62120156
	FFVT[36]       a6213b97
	FFVT[37]       a6213b97
	FFVT[38]       ea15b0b6
	FFVT[39]       ea15b0b6
	FFVT[40]       a4176212
	FFVT[41]       a4176212
	FFVT[42]       ae88d158
	FFVT[43]       ae88d158
	FFVT[44]       541de595
	FFVT[45]       541de595
	FFVT[46]       15d56ace
	FFVT[47]       15d56ace
	FFVT[48]       45824374
	FFVT[49]       45824374
	FFVT[50]       2ba17885
	FFVT[51]       2ba17885
	FFVT[52]       b63201ea
	FFVT[53]       b63201ea
	FFVT[54]       b1ff88da
	FFVT[55]       b1ff88da
	FFVT[56]       f24edcea
	FFVT[57]       f24edcea
	FFVT[58]       b068c2e7
	FFVT[59]       b068c2e7
	FFVT[60]       58a6584c
	FFVT[61]       58a6584c
	FFVT[62]       ca6624d0
	FFVT[63]       ca6624d0
	FFVT[64]       d66319d3
	FFVT[65]       d66319d3
	FFVT[66]       437f892f
	FFVT[67]       437f892f
	FFVT[68]       6298ced1
	FFVT[69]       6298ced1
	FFVT[70]       d8f20b8e
	FFVT[71]       d8f20b8e
	FFVT[72]       00a8562c
	FFVT[73]       00a8562c
	FFVT[74]       536016e4
	FFVT[75]       536016e4
	FFVT[76]       81723c11
	FFVT[77]       81723c11
	FFVT[78]       6baf812a
	FFVT[79]       6baf812a
	FFVT[80]       579813dc
	FFVT[81]       579813dc
	FFVT[82]       f1099664
	FFVT[83]       f1099664
	FFVT[84]       484724af
	FFVT[85]       484724af
	FFVT[86]       9473f82f
	FFVT[87]       9473f82f
	FFVT[88]       2086be8f
	FFVT[89]       2086be8f
	FFVT[90]       505baa7a
	FFVT[91]       505baa7a
	FFVT[92]       e106d4d4
	FFVT[93]       e106d4d4
	FFVT[94]       035cf124
	FFVT[95]       035cf124
	FFVT[96]       80e38b56
	FFVT[97]       80e38b56
	FFVT[98]       03ef854a
	FFVT[99]       03ef854a
	FFVT[100]      ece8d8c9
	FFVT[101]      ece8d8c9
	FFVT[102]      a1d4c1a9
	FFVT[103]      a1d4c1a9
	FFVT[104]      e800f0b6
	FFVT[105]      e800f0b6
	FFVT[106]      7019d873
	FFVT[107]      7019d873
	FFVT[108]      a45554ff
	FFVT[109]      a45554ff
	FFVT[110]      29f98242
	FFVT[111]      29f98242
	FFVT[112]      b517937f
	FFVT[113]      b517937f
	FFVT[114]      a4d35dd5
	FFVT[115]      a4d35dd5
	FFVT[116]      52328c1b
	FFVT[117]      52328c1b
	FFVT[118]      09f59e76
	FFVT[119]      09f59e76
	FFVT[120]      1968c620
	FFVT[121]      1968c620
	FFVT[122]      cba89964
	FFVT[123]      cba89964
	FFVT[124]      42dc73e1
	FFVT[125]      42dc73e1
	FFVT[126]      06efaa25
	FFVT[127]      06efaa25


0d:00.0 (8086:108c)
Intel Corporation 82573E Gigabit Ethernet Controller (Copper)
	Name           Value
	~~~~           ~~~~~
	CTRL           00140248
	STATUS         80080743
	EECD           02011b18
	EERD           ffff0026
	CTRL_EXT       00780000
	FLA            00000608
	MDIC           14390000
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            00000000
	ICS            00000044
	IMS            00000000
	IMC            00000000
	IAM            00000000
	RCTL           00000000
	FCTTV          00000680
	TCTL           30000008
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    10000008
	EXTCNF_SIZE    00000000
	PBA            000c0014
	PBS            00000020
	EEMNGCTL       800000f7
	EEARBC         00080100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           00012000
	ERT            00000000
	FCRTL          800047f8
	FCRTH          00004800
	PSRCTL         00040402
	RDBAL          148a0000
	RDBAH          00000002
	RDLEN          00000000
	RDH            00000000
	RDT            00000000
	RDTR           00000000
	RXDCTL         00010000
	RADV           00000000
	RDBAL1         00000000
	RDBAH1         01200200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           00000a00
	TDFT           00000a00
	TDFHS          00000a00
	TDFTS          00000a00
	TDFPC          00000000
	TDBAL          16a44000
	TDBAH          00000002
	TDLEN          00000000
	TDH            00000000
	TDT            00000000
	TIDV           00000000
	TXDCTL         01410000
	TADV           00000000
	TARC0          00000403
	TDBAL1         00800000
	TDBAH1         10000500
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000000
	ICRXATC        00000000
	ICTXPTC        00000000
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00000300
	RFCTL          00000000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e2e1
	RAL[1]         00000000
	RAH[1]         00000000
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        96483000
	RAH[15]        0000e2e1
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
	VFTA[51]       00000000
	VFTA[52]       00000000
	VFTA[53]       00000000
	VFTA[54]       00000000
	VFTA[55]       00000000
	VFTA[56]       00000000
	VFTA[57]       00000000
	VFTA[58]       00000000
	VFTA[59]       00000000
	VFTA[60]       00000000
	VFTA[61]       00000000
	VFTA[62]       00000000
	VFTA[63]       00000000
	VFTA[64]       00000000
	VFTA[65]       00000000
	VFTA[66]       00000000
	VFTA[67]       00000000
	VFTA[68]       00000000
	VFTA[69]       00000000
	VFTA[70]       00000000
	VFTA[71]       00000000
	VFTA[72]       00000000
	VFTA[73]       00000000
	VFTA[74]       00000000
	VFTA[75]       00000000
	VFTA[76]       00000000
	VFTA[77]       00000000
	VFTA[78]       00000000
	VFTA[79]       00000000
	VFTA[80]       00000000
	VFTA[81]       00000000
	VFTA[82]       00000000
	VFTA[83]       00000000
	VFTA[84]       00000000
	VFTA[85]       00000000
	VFTA[86]       00000000
	VFTA[87]       00000000
	VFTA[88]       00000000
	VFTA[89]       00000000
	VFTA[90]       00000000
	VFTA[91]       00000000
	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
	VFTA[97]       00000000
	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
	VFTA[101]      00000000
	VFTA[102]      00000000
	VFTA[103]      00000000
	VFTA[104]      00000000
	VFTA[105]      00000000
	VFTA[106]      00000000
	VFTA[107]      00000000
	VFTA[108]      00000000
	VFTA[109]      00000000
	VFTA[110]      00000000
	VFTA[111]      00000000
	VFTA[112]      00000000
	VFTA[113]      00000000
	VFTA[114]      00000000
	VFTA[115]      00000000
	VFTA[116]      00000000
	VFTA[117]      00000000
	VFTA[118]      00000000
	VFTA[119]      00000000
	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           0022a300
	IPAV           00000000
	MANC2H         00000380
	RSSIM          00000000
	RSSIR          00000000
	WUPL           28167f49
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         01041046
	FWSM           00018044
	RETA[0]        0000008c
	RETA[1]        0000001f
	RETA[2]        00000082
	RETA[3]        00000086
	RETA[4]        0000009f
	RETA[5]        00000066
	RETA[6]        0000005a
	RETA[7]        0000004b
	RETA[8]        0000001e
	RETA[9]        000000af
	RETA[10]       000000dc
	RETA[11]       000000e5
	RETA[12]       0000002d
	RETA[13]       000000aa
	RETA[14]       0000009b
	RETA[15]       0000001c
	RETA[16]       00000053
	RETA[17]       000000e6
	RETA[18]       00000096
	RETA[19]       00000084
	RETA[20]       000000b1
	RETA[21]       0000006b
	RETA[22]       000000b7
	RETA[23]       000000de
	RETA[24]       00000010
	RETA[25]       000000d4
	RETA[26]       000000ef
	RETA[27]       00000034
	RETA[28]       00000038
	RETA[29]       0000000e
	RETA[30]       00000012
	RETA[31]       0000001d
	RETA[32]       00000001
	RETA[33]       0000004b
	RETA[34]       000000e3
	RETA[35]       0000001e
	RETA[36]       0000001b
	RETA[37]       0000009b
	RETA[38]       0000008e
	RETA[39]       00000068
	RETA[40]       00000015
	RETA[41]       000000e2
	RETA[42]       000000c7
	RETA[43]       000000c6
	RETA[44]       00000034
	RETA[45]       0000007a
	RETA[46]       000000b6
	RETA[47]       00000014
	RETA[48]       000000aa
	RETA[49]       0000006f
	RETA[50]       000000fa
	RETA[51]       00000085
	RETA[52]       00000032
	RETA[53]       0000004e
	RETA[54]       0000003f
	RETA[55]       0000004c
	RETA[56]       00000099
	RETA[57]       0000003d
	RETA[58]       000000f2
	RETA[59]       000000ae
	RETA[60]       00000011
	RETA[61]       0000006f
	RETA[62]       000000b7
	RETA[63]       0000000b
	RETA[64]       0000009b
	RETA[65]       00000007
	RETA[66]       0000000a
	RETA[67]       0000009a
	RETA[68]       000000a3
	RETA[69]       00000020
	RETA[70]       000000f3
	RETA[71]       00000084
	RETA[72]       0000004d
	RETA[73]       00000048
	RETA[74]       0000008b
	RETA[75]       00000021
	RETA[76]       000000c7
	RETA[77]       00000053
	RETA[78]       000000a3
	RETA[79]       0000008b
	RETA[80]       000000d4
	RETA[81]       0000004a
	RETA[82]       000000c2
	RETA[83]       000000c0
	RETA[84]       0000003b
	RETA[85]       00000069
	RETA[86]       00000082
	RETA[87]       0000005e
	RETA[88]       00000098
	RETA[89]       0000007a
	RETA[90]       00000017
	RETA[91]       00000084
	RETA[92]       000000ab
	RETA[93]       0000004a
	RETA[94]       000000c7
	RETA[95]       00000014
	RETA[96]       0000001d
	RETA[97]       0000006a
	RETA[98]       00000077
	RETA[99]       00000014
	RETA[100]      000000b9
	RETA[101]      0000000a
	RETA[102]      000000c2
	RETA[103]      0000003d
	RETA[104]      00000055
	RETA[105]      000000aa
	RETA[106]      000000b4
	RETA[107]      00000004
	RETA[108]      00000047
	RETA[109]      00000053
	RETA[110]      000000f7
	RETA[111]      00000016
	RETA[112]      0000008b
	RETA[113]      000000d3
	RETA[114]      000000b2
	RETA[115]      00000074
	RETA[116]      0000003b
	RETA[117]      0000002b
	RETA[118]      0000009d
	RETA[119]      00000016
	RETA[120]      0000002b
	RETA[121]      000000ce
	RETA[122]      0000008e
	RETA[123]      00000044
	RETA[124]      00000027
	RETA[125]      0000004b
	RETA[126]      000000c2
	RETA[127]      00000086
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000000
	FFLT[9]        00000000
	FFLT[10]       00000000
	FFLT[11]       00000000
	HICR           00000101
	FFMT[0]        0000000c
	FFMT[1]        0000000c
	FFMT[2]        0000000d
	FFMT[3]        0000000d
	FFMT[4]        0000000c
	FFMT[5]        0000000c
	FFMT[6]        0000000f
	FFMT[7]        0000000f
	FFMT[8]        00000001
	FFMT[9]        00000001
	FFMT[10]       00000006
	FFMT[11]       00000006
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       0000000c
	FFMT[15]       0000000c
	FFMT[16]       0000000e
	FFMT[17]       0000000e
	FFMT[18]       00000001
	FFMT[19]       00000001
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000001
	FFMT[23]       00000001
	FFMT[24]       00000000
	FFMT[25]       00000000
	FFMT[26]       00000001
	FFMT[27]       00000001
	FFMT[28]       00000002
	FFMT[29]       00000002
	FFMT[30]       0000000f
	FFMT[31]       0000000f
	FFMT[32]       00000001
	FFMT[33]       00000001
	FFMT[34]       00000003
	FFMT[35]       00000003
	FFMT[36]       0000000c
	FFMT[37]       0000000c
	FFMT[38]       00000002
	FFMT[39]       00000002
	FFMT[40]       00000008
	FFMT[41]       00000008
	FFMT[42]       0000000f
	FFMT[43]       0000000f
	FFMT[44]       00000008
	FFMT[45]       00000008
	FFMT[46]       00000004
	FFMT[47]       00000004
	FFMT[48]       00000006
	FFMT[49]       00000006
	FFMT[50]       00000007
	FFMT[51]       00000007
	FFMT[52]       00000002
	FFMT[53]       00000002
	FFMT[54]       0000000b
	FFMT[55]       0000000b
	FFMT[56]       00000008
	FFMT[57]       00000008
	FFMT[58]       00000003
	FFMT[59]       00000003
	FFMT[60]       00000004
	FFMT[61]       00000004
	FFMT[62]       00000000
	FFMT[63]       00000000
	FFMT[64]       00000001
	FFMT[65]       00000001
	FFMT[66]       0000000e
	FFMT[67]       0000000e
	FFMT[68]       00000007
	FFMT[69]       00000007
	FFMT[70]       0000000b
	FFMT[71]       0000000b
	FFMT[72]       00000006
	FFMT[73]       00000006
	FFMT[74]       00000009
	FFMT[75]       00000009
	FFMT[76]       00000009
	FFMT[77]       00000009
	FFMT[78]       00000009
	FFMT[79]       00000009
	FFMT[80]       0000000f
	FFMT[81]       0000000f
	FFMT[82]       00000009
	FFMT[83]       00000009
	FFMT[84]       0000000a
	FFMT[85]       0000000a
	FFMT[86]       00000000
	FFMT[87]       00000000
	FFMT[88]       0000000b
	FFMT[89]       0000000b
	FFMT[90]       00000003
	FFMT[91]       00000003
	FFMT[92]       00000001
	FFMT[93]       00000001
	FFMT[94]       00000004
	FFMT[95]       00000004
	FFMT[96]       0000000b
	FFMT[97]       0000000b
	FFMT[98]       0000000c
	FFMT[99]       0000000c
	FFMT[100]      0000000a
	FFMT[101]      0000000a
	FFMT[102]      00000009
	FFMT[103]      00000009
	FFMT[104]      00000000
	FFMT[105]      00000000
	FFMT[106]      00000003
	FFMT[107]      00000003
	FFMT[108]      00000006
	FFMT[109]      00000006
	FFMT[110]      00000008
	FFMT[111]      00000008
	FFMT[112]      0000000e
	FFMT[113]      0000000e
	FFMT[114]      00000007
	FFMT[115]      00000007
	FFMT[116]      0000000c
	FFMT[117]      0000000c
	FFMT[118]      00000007
	FFMT[119]      00000007
	FFMT[120]      00000009
	FFMT[121]      00000009
	FFMT[122]      00000001
	FFMT[123]      00000001
	FFMT[124]      00000001
	FFMT[125]      00000001
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        69386efe
	FFVT[1]        69386efe
	FFVT[2]        47dac1bd
	FFVT[3]        47dac1bd
	FFVT[4]        0af977e3
	FFVT[5]        0af977e3
	FFVT[6]        0bf35fcd
	FFVT[7]        0bf35fcd
	FFVT[8]        396325cb
	FFVT[9]        396325cb
	FFVT[10]       45fb2966
	FFVT[11]       45fb2966
	FFVT[12]       85fe3e31
	FFVT[13]       85fe3e31
	FFVT[14]       e6b90940
	FFVT[15]       e6b90940
	FFVT[16]       fcf5c382
	FFVT[17]       fcf5c382
	FFVT[18]       68b90289
	FFVT[19]       68b90289
	FFVT[20]       0fada5ed
	FFVT[21]       0fada5ed
	FFVT[22]       67f87890
	FFVT[23]       67f87890
	FFVT[24]       2dd69d55
	FFVT[25]       2dd69d55
	FFVT[26]       0f78a7b0
	FFVT[27]       0f78a7b0
	FFVT[28]       138d13f7
	FFVT[29]       138d13f7
	FFVT[30]       e302400a
	FFVT[31]       e302400a
	FFVT[32]       bc8ebaf7
	FFVT[33]       bc8ebaf7
	FFVT[34]       96fe79fb
	FFVT[35]       96fe79fb
	FFVT[36]       df5aa33b
	FFVT[37]       df5aa33b
	FFVT[38]       91212c9e
	FFVT[39]       91212c9e
	FFVT[40]       71c517b4
	FFVT[41]       71c517b4
	FFVT[42]       0bb6697f
	FFVT[43]       0bb6697f
	FFVT[44]       63018c23
	FFVT[45]       63018c23
	FFVT[46]       48a35d54
	FFVT[47]       48a35d54
	FFVT[48]       95f4d375
	FFVT[49]       95f4d375
	FFVT[50]       4699c679
	FFVT[51]       4699c679
	FFVT[52]       06e7adde
	FFVT[53]       06e7adde
	FFVT[54]       e31f1b6d
	FFVT[55]       e31f1b6d
	FFVT[56]       888919d6
	FFVT[57]       888919d6
	FFVT[58]       4751a142
	FFVT[59]       4751a142
	FFVT[60]       676fef06
	FFVT[61]       676fef06
	FFVT[62]       792d0e82
	FFVT[63]       792d0e82
	FFVT[64]       1066713d
	FFVT[65]       1066713d
	FFVT[66]       8f55fa4d
	FFVT[67]       8f55fa4d
	FFVT[68]       5fe46f1a
	FFVT[69]       5fe46f1a
	FFVT[70]       cacbc51e
	FFVT[71]       cacbc51e
	FFVT[72]       04470301
	FFVT[73]       04470301
	FFVT[74]       6b3dfea9
	FFVT[75]       6b3dfea9
	FFVT[76]       bd00be00
	FFVT[77]       bd00be00
	FFVT[78]       7079cb0c
	FFVT[79]       7079cb0c
	FFVT[80]       e7180acc
	FFVT[81]       e7180acc
	FFVT[82]       25755bec
	FFVT[83]       25755bec
	FFVT[84]       bcdd8914
	FFVT[85]       bcdd8914
	FFVT[86]       9ed3128d
	FFVT[87]       9ed3128d
	FFVT[88]       dc48587b
	FFVT[89]       dc48587b
	FFVT[90]       e9755ebf
	FFVT[91]       e9755ebf
	FFVT[92]       9ff23883
	FFVT[93]       9ff23883
	FFVT[94]       52d8233d
	FFVT[95]       52d8233d
	FFVT[96]       cdcf21c0
	FFVT[97]       cdcf21c0
	FFVT[98]       9069a69f
	FFVT[99]       9069a69f
	FFVT[100]      b52c57f5
	FFVT[101]      b52c57f5
	FFVT[102]      42977681
	FFVT[103]      42977681
	FFVT[104]      ab8b671a
	FFVT[105]      ab8b671a
	FFVT[106]      4edc0c8b
	FFVT[107]      4edc0c8b
	FFVT[108]      f41c47f0
	FFVT[109]      f41c47f0
	FFVT[110]      ab4edb12
	FFVT[111]      ab4edb12
	FFVT[112]      c096a36f
	FFVT[113]      c096a36f
	FFVT[114]      ed46c26a
	FFVT[115]      ed46c26a
	FFVT[116]      aca39e0b
	FFVT[117]      aca39e0b
	FFVT[118]      e01ed8b5
	FFVT[119]      e01ed8b5
	FFVT[120]      604c1ef5
	FFVT[121]      604c1ef5
	FFVT[122]      0dbbfeae
	FFVT[123]      0dbbfeae
	FFVT[124]      9478dbb7
	FFVT[125]      9478dbb7
	FFVT[126]      f95cfa23
	FFVT[127]      f95cfa23



[-- Attachment #6: ethtool_S_eth1.afterDHClient --]
[-- Type: text/plain, Size: 1230 bytes --]

NIC statistics:
     rx_packets: 760292
     tx_packets: 531525
     rx_bytes: 4818013321
     tx_bytes: 643103670
     rx_broadcast: 65963
     tx_broadcast: 41
     rx_multicast: 0
     tx_multicast: 0
     rx_errors: 0
     tx_errors: 0
     tx_dropped: 0
     multicast: 0
     collisions: 0
     rx_length_errors: 0
     rx_over_errors: 0
     rx_crc_errors: 0
     rx_frame_errors: 0
     rx_no_buffer_count: 0
     rx_missed_errors: 0
     tx_aborted_errors: 0
     tx_carrier_errors: 0
     tx_fifo_errors: 0
     tx_heartbeat_errors: 0
     tx_window_errors: 0
     tx_abort_late_coll: 0
     tx_deferred_ok: 0
     tx_single_coll_ok: 0
     tx_multi_coll_ok: 0
     tx_timeout_count: 0
     tx_restart_queue: 0
     rx_long_length_errors: 0
     rx_short_length_errors: 0
     rx_align_errors: 0
     tx_tcp_seg_good: 9097
     tx_tcp_seg_failed: 0
     rx_flow_control_xon: 0
     rx_flow_control_xoff: 0
     tx_flow_control_xon: 0
     tx_flow_control_xoff: 0
     rx_long_byte_count: 4818013321
     rx_csum_offload_good: 694310
     rx_csum_offload_errors: 0
     rx_header_split: 7424
     alloc_rx_buff_failed: 0
     tx_smbus: 0
     rx_smbus: 0
     dropped_smbus: 0
     rx_dma_failed: 0
     tx_dma_failed: 0

[-- Attachment #7: ethregs.afterDHClient --]
[-- Type: text/plain, Size: 41597 bytes --]

0e:00.0 (8086:109a)
Intel Corporation 82573L Gigabit Ethernet Controller
	Name           Value
	~~~~           ~~~~~
	CTRL           00140248
	STATUS         80080783
	EECD           06008318
	EERD           f7460012
	CTRL_EXT       28780000
	FLA            00000608
	MDIC           182a3800
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            000000c3
	ICS            00000000
	IMS            0000009d
	IMC            0000009d
	IAM            ffffffff
	RCTL           06078422
	FCTTV          00000680
	TCTL           3103f0fa
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    1000000a
	EXTCNF_SIZE    00000004
	PBA            0012000e
	PBS            00000020
	EEMNGCTL       80000000
	EEARBC         00000100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           0004db00
	ERT            00002100
	FCRTL          80002ff8
	FCRTH          00003000
	PSRCTL         04040401
	RDBAL          16b08000
	RDBAH          00000002
	RDLEN          00002000
	RDH            0000007a
	RDT            00000076
	RDTR           00000000
	RXDCTL         00010003
	RADV           00000008
	RDBAL1         00000000
	RDBAH1         00000200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           00000968
	TDFT           00000968
	TDFHS          00000968
	TDFTS          00000968
	TDFPC          00000000
	TDBAL          06c8c000
	TDBAH          00000002
	TDLEN          00001000
	TDH            00000053
	TDT            00000053
	TIDV           00000008
	TXDCTL         01410000
	TADV           00000020
	TARC0          00000403
	TDBAL1         80400000
	TDBAH1         00000000
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000002
	ICRXATC        00000000
	ICTXPTC        00000000
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00001300
	RFCTL          00038000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e3e1
	RAL[1]         005e0001
	RAH[1]         80000100
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        00000000
	RAH[15]        00020010
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
	VFTA[51]       00000000
	VFTA[52]       00000000
	VFTA[53]       00000000
	VFTA[54]       00000000
	VFTA[55]       00000000
	VFTA[56]       00000000
	VFTA[57]       00000000
	VFTA[58]       00000000
	VFTA[59]       00000000
	VFTA[60]       00000000
	VFTA[61]       00000000
	VFTA[62]       00000000
	VFTA[63]       00000000
	VFTA[64]       00000000
	VFTA[65]       00000000
	VFTA[66]       00000000
	VFTA[67]       00000000
	VFTA[68]       00000000
	VFTA[69]       00000000
	VFTA[70]       00000000
	VFTA[71]       00000000
	VFTA[72]       00000000
	VFTA[73]       00000000
	VFTA[74]       00000000
	VFTA[75]       00000000
	VFTA[76]       00000000
	VFTA[77]       00000000
	VFTA[78]       00000000
	VFTA[79]       00000000
	VFTA[80]       00000000
	VFTA[81]       00000000
	VFTA[82]       00000000
	VFTA[83]       00000000
	VFTA[84]       00000000
	VFTA[85]       00000000
	VFTA[86]       00000000
	VFTA[87]       00000000
	VFTA[88]       00000000
	VFTA[89]       00000000
	VFTA[90]       00000000
	VFTA[91]       00000000
	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
	VFTA[97]       00000000
	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
	VFTA[101]      00000000
	VFTA[102]      00000000
	VFTA[103]      00000000
	VFTA[104]      00000000
	VFTA[105]      00000000
	VFTA[106]      00000000
	VFTA[107]      00000000
	VFTA[108]      00000000
	VFTA[109]      00000000
	VFTA[110]      00000000
	VFTA[111]      00000000
	VFTA[112]      00000000
	VFTA[113]      00000000
	VFTA[114]      00000000
	VFTA[115]      00000000
	VFTA[116]      00000000
	VFTA[117]      00000000
	VFTA[118]      00000000
	VFTA[119]      00000000
	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           00000100
	IPAV           00000000
	MANC2H         00000000
	RSSIM          00000000
	RSSIR          00000001
	WUPL           9ce201fa
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         21041046
	FWSM           00000000
	RETA[0]        00000015
	RETA[1]        0000006b
	RETA[2]        00000004
	RETA[3]        000000e2
	RETA[4]        00000070
	RETA[5]        00000077
	RETA[6]        00000018
	RETA[7]        00000001
	RETA[8]        00000029
	RETA[9]        00000069
	RETA[10]       00000004
	RETA[11]       00000081
	RETA[12]       00000040
	RETA[13]       0000001e
	RETA[14]       00000093
	RETA[15]       000000c3
	RETA[16]       0000001b
	RETA[17]       0000002f
	RETA[18]       00000002
	RETA[19]       000000f4
	RETA[20]       000000bd
	RETA[21]       000000b6
	RETA[22]       000000af
	RETA[23]       00000029
	RETA[24]       00000003
	RETA[25]       0000001e
	RETA[26]       00000011
	RETA[27]       000000a5
	RETA[28]       0000008f
	RETA[29]       0000000b
	RETA[30]       00000059
	RETA[31]       00000006
	RETA[32]       00000008
	RETA[33]       000000d8
	RETA[34]       00000099
	RETA[35]       000000fb
	RETA[36]       0000003c
	RETA[37]       0000006c
	RETA[38]       00000011
	RETA[39]       00000027
	RETA[40]       00000029
	RETA[41]       00000097
	RETA[42]       00000055
	RETA[43]       000000a2
	RETA[44]       00000019
	RETA[45]       0000006e
	RETA[46]       00000011
	RETA[47]       00000060
	RETA[48]       000000ef
	RETA[49]       000000c1
	RETA[50]       00000033
	RETA[51]       000000a2
	RETA[52]       00000007
	RETA[53]       0000008a
	RETA[54]       0000006c
	RETA[55]       000000c2
	RETA[56]       00000029
	RETA[57]       0000002e
	RETA[58]       0000008b
	RETA[59]       00000063
	RETA[60]       00000035
	RETA[61]       00000015
	RETA[62]       00000091
	RETA[63]       000000ec
	RETA[64]       00000045
	RETA[65]       0000003b
	RETA[66]       0000001d
	RETA[67]       00000040
	RETA[68]       000000c5
	RETA[69]       00000082
	RETA[70]       000000b3
	RETA[71]       000000b6
	RETA[72]       0000000a
	RETA[73]       0000009b
	RETA[74]       000000d2
	RETA[75]       000000d2
	RETA[76]       0000004a
	RETA[77]       0000004e
	RETA[78]       00000010
	RETA[79]       000000e0
	RETA[80]       0000003a
	RETA[81]       000000ae
	RETA[82]       0000000d
	RETA[83]       00000070
	RETA[84]       0000001a
	RETA[85]       000000e7
	RETA[86]       000000c7
	RETA[87]       000000a5
	RETA[88]       0000006d
	RETA[89]       0000002f
	RETA[90]       00000061
	RETA[91]       00000026
	RETA[92]       0000000f
	RETA[93]       0000001f
	RETA[94]       00000019
	RETA[95]       000000ed
	RETA[96]       00000059
	RETA[97]       00000003
	RETA[98]       00000058
	RETA[99]       000000c9
	RETA[100]      0000006d
	RETA[101]      000000aa
	RETA[102]      0000000b
	RETA[103]      00000063
	RETA[104]      000000cd
	RETA[105]      0000001f
	RETA[106]      00000018
	RETA[107]      00000042
	RETA[108]      00000079
	RETA[109]      0000000f
	RETA[110]      0000005b
	RETA[111]      00000042
	RETA[112]      00000049
	RETA[113]      0000006e
	RETA[114]      00000008
	RETA[115]      00000076
	RETA[116]      0000002d
	RETA[117]      00000059
	RETA[118]      00000047
	RETA[119]      000000a6
	RETA[120]      00000090
	RETA[121]      00000002
	RETA[122]      000000cb
	RETA[123]      00000049
	RETA[124]      00000093
	RETA[125]      00000009
	RETA[126]      00000016
	RETA[127]      000000f2
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000080
	FFLT[9]        00000000
	FFLT[10]       00000002
	FFLT[11]       00000000
	HICR           00000000
	FFMT[0]        00000006
	FFMT[1]        00000006
	FFMT[2]        00000009
	FFMT[3]        00000009
	FFMT[4]        0000000e
	FFMT[5]        0000000e
	FFMT[6]        0000000d
	FFMT[7]        0000000d
	FFMT[8]        0000000b
	FFMT[9]        0000000b
	FFMT[10]       0000000d
	FFMT[11]       0000000d
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       00000000
	FFMT[15]       00000000
	FFMT[16]       00000000
	FFMT[17]       00000000
	FFMT[18]       00000009
	FFMT[19]       00000009
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000006
	FFMT[23]       00000006
	FFMT[24]       00000003
	FFMT[25]       00000003
	FFMT[26]       00000004
	FFMT[27]       00000004
	FFMT[28]       00000005
	FFMT[29]       00000005
	FFMT[30]       0000000c
	FFMT[31]       0000000c
	FFMT[32]       00000000
	FFMT[33]       00000000
	FFMT[34]       00000008
	FFMT[35]       00000008
	FFMT[36]       00000002
	FFMT[37]       00000002
	FFMT[38]       0000000e
	FFMT[39]       0000000e
	FFMT[40]       00000003
	FFMT[41]       00000003
	FFMT[42]       0000000b
	FFMT[43]       0000000b
	FFMT[44]       00000001
	FFMT[45]       00000001
	FFMT[46]       00000005
	FFMT[47]       00000005
	FFMT[48]       00000003
	FFMT[49]       00000003
	FFMT[50]       00000001
	FFMT[51]       00000001
	FFMT[52]       0000000a
	FFMT[53]       0000000a
	FFMT[54]       00000003
	FFMT[55]       00000003
	FFMT[56]       00000001
	FFMT[57]       00000001
	FFMT[58]       0000000d
	FFMT[59]       0000000d
	FFMT[60]       00000008
	FFMT[61]       00000008
	FFMT[62]       00000002
	FFMT[63]       00000002
	FFMT[64]       00000002
	FFMT[65]       00000002
	FFMT[66]       00000007
	FFMT[67]       00000007
	FFMT[68]       00000004
	FFMT[69]       00000004
	FFMT[70]       00000006
	FFMT[71]       00000006
	FFMT[72]       0000000e
	FFMT[73]       0000000e
	FFMT[74]       0000000e
	FFMT[75]       0000000e
	FFMT[76]       0000000f
	FFMT[77]       0000000f
	FFMT[78]       00000002
	FFMT[79]       00000002
	FFMT[80]       00000000
	FFMT[81]       00000000
	FFMT[82]       0000000b
	FFMT[83]       0000000b
	FFMT[84]       00000009
	FFMT[85]       00000009
	FFMT[86]       00000009
	FFMT[87]       00000009
	FFMT[88]       0000000a
	FFMT[89]       0000000a
	FFMT[90]       0000000d
	FFMT[91]       0000000d
	FFMT[92]       00000005
	FFMT[93]       00000005
	FFMT[94]       00000006
	FFMT[95]       00000006
	FFMT[96]       00000003
	FFMT[97]       00000003
	FFMT[98]       0000000d
	FFMT[99]       0000000d
	FFMT[100]      00000009
	FFMT[101]      00000009
	FFMT[102]      0000000d
	FFMT[103]      0000000d
	FFMT[104]      00000001
	FFMT[105]      00000001
	FFMT[106]      0000000e
	FFMT[107]      0000000e
	FFMT[108]      0000000b
	FFMT[109]      0000000b
	FFMT[110]      00000000
	FFMT[111]      00000000
	FFMT[112]      00000001
	FFMT[113]      00000001
	FFMT[114]      00000000
	FFMT[115]      00000000
	FFMT[116]      00000008
	FFMT[117]      00000008
	FFMT[118]      0000000a
	FFMT[119]      0000000a
	FFMT[120]      00000001
	FFMT[121]      00000001
	FFMT[122]      00000006
	FFMT[123]      00000006
	FFMT[124]      00000002
	FFMT[125]      00000002
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        a6d21076
	FFVT[1]        a6d21076
	FFVT[2]        14fddf8e
	FFVT[3]        14fddf8e
	FFVT[4]        af998eff
	FFVT[5]        af998eff
	FFVT[6]        72ee35eb
	FFVT[7]        72ee35eb
	FFVT[8]        4595b5d0
	FFVT[9]        4595b5d0
	FFVT[10]       9ce2d272
	FFVT[11]       9ce2d272
	FFVT[12]       65ccdb20
	FFVT[13]       65ccdb20
	FFVT[14]       7a6d632f
	FFVT[15]       7a6d632f
	FFVT[16]       c9fd53bd
	FFVT[17]       c9fd53bd
	FFVT[18]       138adc2d
	FFVT[19]       138adc2d
	FFVT[20]       5a7c8912
	FFVT[21]       5a7c8912
	FFVT[22]       080da768
	FFVT[23]       080da768
	FFVT[24]       e00a93c6
	FFVT[25]       e00a93c6
	FFVT[26]       3d05bbe0
	FFVT[27]       3d05bbe0
	FFVT[28]       8dc0ad89
	FFVT[29]       8dc0ad89
	FFVT[30]       a0267e00
	FFVT[31]       a0267e00
	FFVT[32]       45f0b43f
	FFVT[33]       45f0b43f
	FFVT[34]       62120156
	FFVT[35]       62120156
	FFVT[36]       a6213b97
	FFVT[37]       a6213b97
	FFVT[38]       ea15b0b6
	FFVT[39]       ea15b0b6
	FFVT[40]       a4176212
	FFVT[41]       a4176212
	FFVT[42]       ae88d158
	FFVT[43]       ae88d158
	FFVT[44]       541de595
	FFVT[45]       541de595
	FFVT[46]       15d56ace
	FFVT[47]       15d56ace
	FFVT[48]       45824374
	FFVT[49]       45824374
	FFVT[50]       2ba17885
	FFVT[51]       2ba17885
	FFVT[52]       b63201ea
	FFVT[53]       b63201ea
	FFVT[54]       b1ff88da
	FFVT[55]       b1ff88da
	FFVT[56]       f24edcea
	FFVT[57]       f24edcea
	FFVT[58]       b068c2e7
	FFVT[59]       b068c2e7
	FFVT[60]       58a6584c
	FFVT[61]       58a6584c
	FFVT[62]       ca6624d0
	FFVT[63]       ca6624d0
	FFVT[64]       d66319d3
	FFVT[65]       d66319d3
	FFVT[66]       437f892f
	FFVT[67]       437f892f
	FFVT[68]       6298ced1
	FFVT[69]       6298ced1
	FFVT[70]       d8f20b8e
	FFVT[71]       d8f20b8e
	FFVT[72]       00a8562c
	FFVT[73]       00a8562c
	FFVT[74]       536016e4
	FFVT[75]       536016e4
	FFVT[76]       81723c11
	FFVT[77]       81723c11
	FFVT[78]       6baf812a
	FFVT[79]       6baf812a
	FFVT[80]       579813dc
	FFVT[81]       579813dc
	FFVT[82]       f1099664
	FFVT[83]       f1099664
	FFVT[84]       484724af
	FFVT[85]       484724af
	FFVT[86]       9473f82f
	FFVT[87]       9473f82f
	FFVT[88]       2086be8f
	FFVT[89]       2086be8f
	FFVT[90]       505baa7a
	FFVT[91]       505baa7a
	FFVT[92]       e106d4d4
	FFVT[93]       e106d4d4
	FFVT[94]       035cf124
	FFVT[95]       035cf124
	FFVT[96]       80e38b56
	FFVT[97]       80e38b56
	FFVT[98]       03ef854a
	FFVT[99]       03ef854a
	FFVT[100]      ece8d8c9
	FFVT[101]      ece8d8c9
	FFVT[102]      a1d4c1a9
	FFVT[103]      a1d4c1a9
	FFVT[104]      e800f0b6
	FFVT[105]      e800f0b6
	FFVT[106]      7019d873
	FFVT[107]      7019d873
	FFVT[108]      a45554ff
	FFVT[109]      a45554ff
	FFVT[110]      29f98242
	FFVT[111]      29f98242
	FFVT[112]      b517937f
	FFVT[113]      b517937f
	FFVT[114]      a4d35dd5
	FFVT[115]      a4d35dd5
	FFVT[116]      52328c1b
	FFVT[117]      52328c1b
	FFVT[118]      09f59e76
	FFVT[119]      09f59e76
	FFVT[120]      1968c620
	FFVT[121]      1968c620
	FFVT[122]      cba89964
	FFVT[123]      cba89964
	FFVT[124]      42dc73e1
	FFVT[125]      42dc73e1
	FFVT[126]      06efaa25
	FFVT[127]      06efaa25


0d:00.0 (8086:108c)
Intel Corporation 82573E Gigabit Ethernet Controller (Copper)
	Name           Value
	~~~~           ~~~~~
	CTRL           18140248
	STATUS         80080743
	EECD           02011b18
	EERD           ffff0026
	CTRL_EXT       28780000
	FLA            00000608
	MDIC           18316d4c
	FCAL           00c28001
	FCAH           00000100
	FCT            00008808
	VET            00008100
	ITR            000003d0
	ICS            00000000
	IMS            0000009d
	IMC            0000009d
	IAM            ffffffff
	RCTL           04048002
	FCTTV          00000680
	TCTL           3103f0fa
	TIPG           00602008
	AIT            00000000
	LEDCTL         00078406
	EXTCNF_CTRL    10000008
	EXTCNF_SIZE    00000000
	PBA            000c0014
	PBS            00000020
	EEMNGCTL       800000f7
	EEARBC         00080100
	FLASHT         00000002
	EEWR           00000002
	FLSWCTL        c0000000
	FLSWDATA       00000000
	FLSWCNT        00000000
	FLOP           00012000
	ERT            00000000
	FCRTL          800047f8
	FCRTH          00004800
	PSRCTL         00040402
	RDBAL          06d9e000
	RDBAH          00000002
	RDLEN          00001000
	RDH            000000fc
	RDT            000000fa
	RDTR           00000000
	RXDCTL         00010000
	RADV           00000008
	RDBAL1         00000000
	RDBAH1         01200200
	RDLEN1         00000000
	RDH1           00000000
	RDT1           00000000
	RSRPD          00000000
	RAID           00000000
	CPUVEC         00000000
	TDFH           00000cd0
	TDFT           00000cd0
	TDFHS          00000cd0
	TDFTS          00000cd0
	TDFPC          00000000
	TDBAL          f63f5000
	TDBAH          00000001
	TDLEN          00001000
	TDH            00000065
	TDT            00000065
	TIDV           00000008
	TXDCTL         01410000
	TADV           00000020
	TARC0          00000403
	TDBAL1         00800000
	TDBAH1         10000500
	TDLEN1         00000000
	TDH1           00000000
	TDT1           00000000
	TXDCTL1        00400000
	TARC1          00000403
	ICRXPTC        00000000
	ICRXATC        00000000
	ICTXPTC        00000000
	ICTXATC        00000000
	ICTXQEC        00000000
	ICTXQMTC       00000000
	ICRXDMTC       00000000
	ICRXOC         00000000
	RXCSUM         00000300
	RFCTL          00000000
	MTA[0]         00000000
	MTA[1]         00000000
	MTA[2]         00000000
	MTA[3]         00000000
	MTA[4]         00000000
	MTA[5]         00000000
	MTA[6]         00000000
	MTA[7]         00000000
	MTA[8]         00000000
	MTA[9]         00000000
	MTA[10]        00000000
	MTA[11]        00000000
	MTA[12]        00000000
	MTA[13]        00000000
	MTA[14]        00000000
	MTA[15]        00000000
	MTA[16]        00000000
	MTA[17]        00000000
	MTA[18]        00000000
	MTA[19]        00000000
	MTA[20]        00000000
	MTA[21]        00000000
	MTA[22]        00000000
	MTA[23]        00000000
	MTA[24]        00000000
	MTA[25]        00000000
	MTA[26]        00000000
	MTA[27]        00000000
	MTA[28]        00000000
	MTA[29]        00000000
	MTA[30]        00000000
	MTA[31]        00000000
	MTA[32]        00000000
	MTA[33]        00000000
	MTA[34]        00000000
	MTA[35]        00000000
	MTA[36]        00000000
	MTA[37]        00000000
	MTA[38]        00000000
	MTA[39]        00000000
	MTA[40]        00000000
	MTA[41]        00000000
	MTA[42]        00000000
	MTA[43]        00000000
	MTA[44]        00000000
	MTA[45]        00000000
	MTA[46]        00000000
	MTA[47]        00000000
	MTA[48]        00000000
	MTA[49]        00000000
	MTA[50]        00000000
	MTA[51]        00000000
	MTA[52]        00000000
	MTA[53]        00000000
	MTA[54]        00000000
	MTA[55]        00000000
	MTA[56]        00000000
	MTA[57]        00000000
	MTA[58]        00000000
	MTA[59]        00000000
	MTA[60]        00000000
	MTA[61]        00000000
	MTA[62]        00000000
	MTA[63]        00000000
	MTA[64]        00000000
	MTA[65]        00000000
	MTA[66]        00000000
	MTA[67]        00000000
	MTA[68]        00000000
	MTA[69]        00000000
	MTA[70]        00000000
	MTA[71]        00000000
	MTA[72]        00000000
	MTA[73]        00000000
	MTA[74]        00000000
	MTA[75]        00000000
	MTA[76]        00000000
	MTA[77]        00000000
	MTA[78]        00000000
	MTA[79]        00000000
	MTA[80]        00000000
	MTA[81]        00000000
	MTA[82]        00000000
	MTA[83]        00000000
	MTA[84]        00000000
	MTA[85]        00000000
	MTA[86]        00000000
	MTA[87]        00000000
	MTA[88]        00000000
	MTA[89]        00000000
	MTA[90]        00000000
	MTA[91]        00000000
	MTA[92]        00000000
	MTA[93]        00000000
	MTA[94]        00000000
	MTA[95]        00000000
	MTA[96]        00000000
	MTA[97]        00000000
	MTA[98]        00000000
	MTA[99]        00000000
	MTA[100]       00000000
	MTA[101]       00000000
	MTA[102]       00000000
	MTA[103]       00000000
	MTA[104]       00000000
	MTA[105]       00000000
	MTA[106]       00000000
	MTA[107]       00000000
	MTA[108]       00000000
	MTA[109]       00000000
	MTA[110]       00000000
	MTA[111]       00000000
	MTA[112]       00000000
	MTA[113]       00000000
	MTA[114]       00000000
	MTA[115]       00000000
	MTA[116]       00000000
	MTA[117]       00000000
	MTA[118]       00000000
	MTA[119]       00000000
	MTA[120]       00000000
	MTA[121]       00000000
	MTA[122]       00000000
	MTA[123]       00000000
	MTA[124]       00000000
	MTA[125]       00000000
	MTA[126]       00000000
	MTA[127]       00000000
	RAL[0]         96483000
	RAH[0]         8000e2e1
	RAL[1]         005e0001
	RAH[1]         80000100
	RAL[2]         00000000
	RAH[2]         00000000
	RAL[3]         00000000
	RAH[3]         00000000
	RAL[4]         00000000
	RAH[4]         00000000
	RAL[5]         00000000
	RAH[5]         00000000
	RAL[6]         00000000
	RAH[6]         00000000
	RAL[7]         00000000
	RAH[7]         00000000
	RAL[8]         00000000
	RAH[8]         00000000
	RAL[9]         00000000
	RAH[9]         00000000
	RAL[10]        00000000
	RAH[10]        00000000
	RAL[11]        00000000
	RAH[11]        00000000
	RAL[12]        00000000
	RAH[12]        00000000
	RAL[13]        00000000
	RAH[13]        00000000
	RAL[14]        00000000
	RAH[14]        00000000
	RAL[15]        96483000
	RAH[15]        0000e2e1
	VFTA[0]        00000000
	VFTA[1]        00000000
	VFTA[2]        00000000
	VFTA[3]        00000000
	VFTA[4]        00000000
	VFTA[5]        00000000
	VFTA[6]        00000000
	VFTA[7]        00000000
	VFTA[8]        00000000
	VFTA[9]        00000000
	VFTA[10]       00000000
	VFTA[11]       00000000
	VFTA[12]       00000000
	VFTA[13]       00000000
	VFTA[14]       00000000
	VFTA[15]       00000000
	VFTA[16]       00000000
	VFTA[17]       00000000
	VFTA[18]       00000000
	VFTA[19]       00000000
	VFTA[20]       00000000
	VFTA[21]       00000000
	VFTA[22]       00000000
	VFTA[23]       00000000
	VFTA[24]       00000000
	VFTA[25]       00000000
	VFTA[26]       00000000
	VFTA[27]       00000000
	VFTA[28]       00000000
	VFTA[29]       00000000
	VFTA[30]       00000000
	VFTA[31]       00000000
	VFTA[32]       00000000
	VFTA[33]       00000000
	VFTA[34]       00000000
	VFTA[35]       00000000
	VFTA[36]       00000000
	VFTA[37]       00000000
	VFTA[38]       00000000
	VFTA[39]       00000000
	VFTA[40]       00000000
	VFTA[41]       00000000
	VFTA[42]       00000000
	VFTA[43]       00000000
	VFTA[44]       00000000
	VFTA[45]       00000000
	VFTA[46]       00000000
	VFTA[47]       00000000
	VFTA[48]       00000000
	VFTA[49]       00000000
	VFTA[50]       00000000
	VFTA[51]       00000000
	VFTA[52]       00000000
	VFTA[53]       00000000
	VFTA[54]       00000000
	VFTA[55]       00000000
	VFTA[56]       00000000
	VFTA[57]       00000000
	VFTA[58]       00000000
	VFTA[59]       00000000
	VFTA[60]       00000000
	VFTA[61]       00000000
	VFTA[62]       00000000
	VFTA[63]       00000000
	VFTA[64]       00000000
	VFTA[65]       00000000
	VFTA[66]       00000000
	VFTA[67]       00000000
	VFTA[68]       00000000
	VFTA[69]       00000000
	VFTA[70]       00000000
	VFTA[71]       00000000
	VFTA[72]       00000000
	VFTA[73]       00000000
	VFTA[74]       00000000
	VFTA[75]       00000000
	VFTA[76]       00000000
	VFTA[77]       00000000
	VFTA[78]       00000000
	VFTA[79]       00000000
	VFTA[80]       00000000
	VFTA[81]       00000000
	VFTA[82]       00000000
	VFTA[83]       00000000
	VFTA[84]       00000000
	VFTA[85]       00000000
	VFTA[86]       00000000
	VFTA[87]       00000000
	VFTA[88]       00000000
	VFTA[89]       00000000
	VFTA[90]       00000000
	VFTA[91]       00000000
	VFTA[92]       00000000
	VFTA[93]       00000000
	VFTA[94]       00000000
	VFTA[95]       00000000
	VFTA[96]       00000000
	VFTA[97]       00000000
	VFTA[98]       00000000
	VFTA[99]       00000000
	VFTA[100]      00000000
	VFTA[101]      00000000
	VFTA[102]      00000000
	VFTA[103]      00000000
	VFTA[104]      00000000
	VFTA[105]      00000000
	VFTA[106]      00000000
	VFTA[107]      00000000
	VFTA[108]      00000000
	VFTA[109]      00000000
	VFTA[110]      00000000
	VFTA[111]      00000000
	VFTA[112]      00000000
	VFTA[113]      00000000
	VFTA[114]      00000000
	VFTA[115]      00000000
	VFTA[116]      00000000
	VFTA[117]      00000000
	VFTA[118]      00000000
	VFTA[119]      00000000
	VFTA[120]      00000000
	VFTA[121]      00000000
	VFTA[122]      00000000
	VFTA[123]      00000000
	VFTA[124]      00000000
	VFTA[125]      00000000
	VFTA[126]      00000000
	VFTA[127]      00000000
	WUC            00000000
	WUFC           00000000
	WUS            00000000
	MRQC           00000000
	MANC           0022a300
	IPAV           00000000
	MANC2H         00000380
	RSSIM          00000000
	RSSIR          00000000
	WUPL           28167f49
	GCR            0e000000
	GSCL_1         00000000
	GSCL_2         00000000
	GSCL_3         00000000
	GSCL_4         00000000
	FACTPS         01041046
	FWSM           00018044
	RETA[0]        0000008c
	RETA[1]        0000001f
	RETA[2]        00000082
	RETA[3]        00000086
	RETA[4]        0000009f
	RETA[5]        00000066
	RETA[6]        0000005a
	RETA[7]        0000004b
	RETA[8]        0000001e
	RETA[9]        000000af
	RETA[10]       000000dc
	RETA[11]       000000e5
	RETA[12]       0000002d
	RETA[13]       000000aa
	RETA[14]       0000009b
	RETA[15]       0000001c
	RETA[16]       00000053
	RETA[17]       000000e6
	RETA[18]       00000096
	RETA[19]       00000084
	RETA[20]       000000b1
	RETA[21]       0000006b
	RETA[22]       000000b7
	RETA[23]       000000de
	RETA[24]       00000010
	RETA[25]       000000d4
	RETA[26]       000000ef
	RETA[27]       00000034
	RETA[28]       00000038
	RETA[29]       0000000e
	RETA[30]       00000012
	RETA[31]       0000001d
	RETA[32]       00000001
	RETA[33]       0000004b
	RETA[34]       000000e3
	RETA[35]       0000001e
	RETA[36]       0000001b
	RETA[37]       0000009b
	RETA[38]       0000008e
	RETA[39]       00000068
	RETA[40]       00000015
	RETA[41]       000000e2
	RETA[42]       000000c7
	RETA[43]       000000c6
	RETA[44]       00000034
	RETA[45]       0000007a
	RETA[46]       000000b6
	RETA[47]       00000014
	RETA[48]       000000aa
	RETA[49]       0000006f
	RETA[50]       000000fa
	RETA[51]       00000085
	RETA[52]       00000032
	RETA[53]       0000004e
	RETA[54]       0000003f
	RETA[55]       0000004c
	RETA[56]       00000099
	RETA[57]       0000003d
	RETA[58]       000000f2
	RETA[59]       000000ae
	RETA[60]       00000011
	RETA[61]       0000006f
	RETA[62]       000000b7
	RETA[63]       0000000b
	RETA[64]       0000009b
	RETA[65]       00000007
	RETA[66]       0000000a
	RETA[67]       0000009a
	RETA[68]       000000a3
	RETA[69]       00000020
	RETA[70]       000000f3
	RETA[71]       00000084
	RETA[72]       0000004d
	RETA[73]       00000048
	RETA[74]       0000008b
	RETA[75]       00000021
	RETA[76]       000000c7
	RETA[77]       00000053
	RETA[78]       000000a3
	RETA[79]       0000008b
	RETA[80]       000000d4
	RETA[81]       0000004a
	RETA[82]       000000c2
	RETA[83]       000000c0
	RETA[84]       0000003b
	RETA[85]       00000069
	RETA[86]       00000082
	RETA[87]       0000005e
	RETA[88]       00000098
	RETA[89]       0000007a
	RETA[90]       00000017
	RETA[91]       00000084
	RETA[92]       000000ab
	RETA[93]       0000004a
	RETA[94]       000000c7
	RETA[95]       00000014
	RETA[96]       0000001d
	RETA[97]       0000006a
	RETA[98]       00000077
	RETA[99]       00000014
	RETA[100]      000000b9
	RETA[101]      0000000a
	RETA[102]      000000c2
	RETA[103]      0000003d
	RETA[104]      00000055
	RETA[105]      000000aa
	RETA[106]      000000b4
	RETA[107]      00000004
	RETA[108]      00000047
	RETA[109]      00000053
	RETA[110]      000000f7
	RETA[111]      00000016
	RETA[112]      0000008b
	RETA[113]      000000d3
	RETA[114]      000000b2
	RETA[115]      00000074
	RETA[116]      0000003b
	RETA[117]      0000002b
	RETA[118]      0000009d
	RETA[119]      00000016
	RETA[120]      0000002b
	RETA[121]      000000ce
	RETA[122]      0000008e
	RETA[123]      00000044
	RETA[124]      00000027
	RETA[125]      0000004b
	RETA[126]      000000c2
	RETA[127]      00000086
	RSSRK[0]       00000000
	RSSRK[1]       00000000
	RSSRK[2]       00000000
	RSSRK[3]       00000000
	RSSRK[4]       00000000
	RSSRK[5]       00000000
	RSSRK[6]       00000000
	RSSRK[7]       00000000
	RSSRK[8]       00000000
	RSSRK[9]       00000000
	RSSRK[10]      00000000
	RSSRK[11]      00000000
	RSSRK[12]      00000000
	RSSRK[13]      00000000
	RSSRK[14]      00000000
	RSSRK[15]      00000000
	RSSRK[16]      00000000
	RSSRK[17]      00000000
	RSSRK[18]      00000000
	RSSRK[19]      00000000
	RSSRK[20]      00000000
	RSSRK[21]      00000000
	RSSRK[22]      00000000
	RSSRK[23]      00000000
	RSSRK[24]      00000000
	RSSRK[25]      00000000
	RSSRK[26]      00000000
	RSSRK[27]      00000000
	RSSRK[28]      00000000
	RSSRK[29]      00000000
	RSSRK[30]      00000000
	RSSRK[31]      00000000
	RSSRK[32]      00000000
	RSSRK[33]      00000000
	RSSRK[34]      00000000
	RSSRK[35]      00000000
	RSSRK[36]      00000000
	RSSRK[37]      00000000
	RSSRK[38]      00000000
	RSSRK[39]      00000000
	FFLT[0]        00000000
	FFLT[1]        fffc0000
	FFLT[2]        00000000
	FFLT[3]        00000000
	FFLT[4]        00000000
	FFLT[5]        00000000
	FFLT[6]        00000000
	FFLT[7]        00000000
	FFLT[8]        00000000
	FFLT[9]        00000000
	FFLT[10]       00000000
	FFLT[11]       00000000
	HICR           00000109
	FFMT[0]        0000000c
	FFMT[1]        0000000c
	FFMT[2]        0000000d
	FFMT[3]        0000000d
	FFMT[4]        0000000c
	FFMT[5]        0000000c
	FFMT[6]        0000000f
	FFMT[7]        0000000f
	FFMT[8]        00000001
	FFMT[9]        00000001
	FFMT[10]       00000006
	FFMT[11]       00000006
	FFMT[12]       00000004
	FFMT[13]       00000004
	FFMT[14]       0000000c
	FFMT[15]       0000000c
	FFMT[16]       0000000e
	FFMT[17]       0000000e
	FFMT[18]       00000001
	FFMT[19]       00000001
	FFMT[20]       00000001
	FFMT[21]       00000001
	FFMT[22]       00000001
	FFMT[23]       00000001
	FFMT[24]       00000000
	FFMT[25]       00000000
	FFMT[26]       00000001
	FFMT[27]       00000001
	FFMT[28]       00000002
	FFMT[29]       00000002
	FFMT[30]       0000000f
	FFMT[31]       0000000f
	FFMT[32]       00000001
	FFMT[33]       00000001
	FFMT[34]       00000003
	FFMT[35]       00000003
	FFMT[36]       0000000c
	FFMT[37]       0000000c
	FFMT[38]       00000002
	FFMT[39]       00000002
	FFMT[40]       00000008
	FFMT[41]       00000008
	FFMT[42]       0000000f
	FFMT[43]       0000000f
	FFMT[44]       00000008
	FFMT[45]       00000008
	FFMT[46]       00000004
	FFMT[47]       00000004
	FFMT[48]       00000006
	FFMT[49]       00000006
	FFMT[50]       00000007
	FFMT[51]       00000007
	FFMT[52]       00000002
	FFMT[53]       00000002
	FFMT[54]       0000000b
	FFMT[55]       0000000b
	FFMT[56]       00000008
	FFMT[57]       00000008
	FFMT[58]       00000003
	FFMT[59]       00000003
	FFMT[60]       00000004
	FFMT[61]       00000004
	FFMT[62]       00000000
	FFMT[63]       00000000
	FFMT[64]       00000001
	FFMT[65]       00000001
	FFMT[66]       0000000e
	FFMT[67]       0000000e
	FFMT[68]       00000007
	FFMT[69]       00000007
	FFMT[70]       0000000b
	FFMT[71]       0000000b
	FFMT[72]       00000006
	FFMT[73]       00000006
	FFMT[74]       00000009
	FFMT[75]       00000009
	FFMT[76]       00000009
	FFMT[77]       00000009
	FFMT[78]       00000009
	FFMT[79]       00000009
	FFMT[80]       0000000f
	FFMT[81]       0000000f
	FFMT[82]       00000009
	FFMT[83]       00000009
	FFMT[84]       0000000a
	FFMT[85]       0000000a
	FFMT[86]       00000000
	FFMT[87]       00000000
	FFMT[88]       0000000b
	FFMT[89]       0000000b
	FFMT[90]       00000003
	FFMT[91]       00000003
	FFMT[92]       00000001
	FFMT[93]       00000001
	FFMT[94]       00000004
	FFMT[95]       00000004
	FFMT[96]       0000000b
	FFMT[97]       0000000b
	FFMT[98]       0000000c
	FFMT[99]       0000000c
	FFMT[100]      0000000a
	FFMT[101]      0000000a
	FFMT[102]      00000009
	FFMT[103]      00000009
	FFMT[104]      00000000
	FFMT[105]      00000000
	FFMT[106]      00000003
	FFMT[107]      00000003
	FFMT[108]      00000006
	FFMT[109]      00000006
	FFMT[110]      00000008
	FFMT[111]      00000008
	FFMT[112]      0000000e
	FFMT[113]      0000000e
	FFMT[114]      00000007
	FFMT[115]      00000007
	FFMT[116]      0000000c
	FFMT[117]      0000000c
	FFMT[118]      00000007
	FFMT[119]      00000007
	FFMT[120]      00000009
	FFMT[121]      00000009
	FFMT[122]      00000001
	FFMT[123]      00000001
	FFMT[124]      00000001
	FFMT[125]      00000001
	FFMT[126]      0000000f
	FFMT[127]      0000000f
	FFVT[0]        69386efe
	FFVT[1]        69386efe
	FFVT[2]        47dac1bd
	FFVT[3]        47dac1bd
	FFVT[4]        0af977e3
	FFVT[5]        0af977e3
	FFVT[6]        0bf35fcd
	FFVT[7]        0bf35fcd
	FFVT[8]        396325cb
	FFVT[9]        396325cb
	FFVT[10]       45fb2966
	FFVT[11]       45fb2966
	FFVT[12]       85fe3e31
	FFVT[13]       85fe3e31
	FFVT[14]       e6b90940
	FFVT[15]       e6b90940
	FFVT[16]       fcf5c382
	FFVT[17]       fcf5c382
	FFVT[18]       68b90289
	FFVT[19]       68b90289
	FFVT[20]       0fada5ed
	FFVT[21]       0fada5ed
	FFVT[22]       67f87890
	FFVT[23]       67f87890
	FFVT[24]       2dd69d55
	FFVT[25]       2dd69d55
	FFVT[26]       0f78a7b0
	FFVT[27]       0f78a7b0
	FFVT[28]       138d13f7
	FFVT[29]       138d13f7
	FFVT[30]       e302400a
	FFVT[31]       e302400a
	FFVT[32]       bc8ebaf7
	FFVT[33]       bc8ebaf7
	FFVT[34]       96fe79fb
	FFVT[35]       96fe79fb
	FFVT[36]       df5aa33b
	FFVT[37]       df5aa33b
	FFVT[38]       91212c9e
	FFVT[39]       91212c9e
	FFVT[40]       71c517b4
	FFVT[41]       71c517b4
	FFVT[42]       0bb6697f
	FFVT[43]       0bb6697f
	FFVT[44]       63018c23
	FFVT[45]       63018c23
	FFVT[46]       48a35d54
	FFVT[47]       48a35d54
	FFVT[48]       95f4d375
	FFVT[49]       95f4d375
	FFVT[50]       4699c679
	FFVT[51]       4699c679
	FFVT[52]       06e7adde
	FFVT[53]       06e7adde
	FFVT[54]       e31f1b6d
	FFVT[55]       e31f1b6d
	FFVT[56]       888919d6
	FFVT[57]       888919d6
	FFVT[58]       4751a142
	FFVT[59]       4751a142
	FFVT[60]       676fef06
	FFVT[61]       676fef06
	FFVT[62]       792d0e82
	FFVT[63]       792d0e82
	FFVT[64]       1066713d
	FFVT[65]       1066713d
	FFVT[66]       8f55fa4d
	FFVT[67]       8f55fa4d
	FFVT[68]       5fe46f1a
	FFVT[69]       5fe46f1a
	FFVT[70]       cacbc51e
	FFVT[71]       cacbc51e
	FFVT[72]       04470301
	FFVT[73]       04470301
	FFVT[74]       6b3dfea9
	FFVT[75]       6b3dfea9
	FFVT[76]       bd00be00
	FFVT[77]       bd00be00
	FFVT[78]       7079cb0c
	FFVT[79]       7079cb0c
	FFVT[80]       e7180acc
	FFVT[81]       e7180acc
	FFVT[82]       25755bec
	FFVT[83]       25755bec
	FFVT[84]       bcdd8914
	FFVT[85]       bcdd8914
	FFVT[86]       9ed3128d
	FFVT[87]       9ed3128d
	FFVT[88]       dc48587b
	FFVT[89]       dc48587b
	FFVT[90]       e9755ebf
	FFVT[91]       e9755ebf
	FFVT[92]       9ff23883
	FFVT[93]       9ff23883
	FFVT[94]       52d8233d
	FFVT[95]       52d8233d
	FFVT[96]       cdcf21c0
	FFVT[97]       cdcf21c0
	FFVT[98]       9069a69f
	FFVT[99]       9069a69f
	FFVT[100]      b52c57f5
	FFVT[101]      b52c57f5
	FFVT[102]      42977681
	FFVT[103]      42977681
	FFVT[104]      ab8b671a
	FFVT[105]      ab8b671a
	FFVT[106]      4edc0c8b
	FFVT[107]      4edc0c8b
	FFVT[108]      f41c47f0
	FFVT[109]      f41c47f0
	FFVT[110]      ab4edb12
	FFVT[111]      ab4edb12
	FFVT[112]      c096a36f
	FFVT[113]      c096a36f
	FFVT[114]      ed46c26a
	FFVT[115]      ed46c26a
	FFVT[116]      aca39e0b
	FFVT[117]      aca39e0b
	FFVT[118]      e01ed8b5
	FFVT[119]      e01ed8b5
	FFVT[120]      604c1ef5
	FFVT[121]      604c1ef5
	FFVT[122]      0dbbfeae
	FFVT[123]      0dbbfeae
	FFVT[124]      9478dbb7
	FFVT[125]      9478dbb7
	FFVT[126]      f95cfa23
	FFVT[127]      f95cfa23



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_______________________________________________
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To learn more about Intel&#174; Ethernet, visit http://communities.intel.com/community/wired

^ permalink raw reply

* Re: TSC unstable due to TSC halts in idle?
From: Jesper Dangaard Brouer @ 2010-05-15  9:54 UTC (permalink / raw)
  To: Suresh Siddha
  Cc: john stultz, Thomas Gleixner, linux-kernel@vger.kernel.org,
	netdev, Brown, Len, Li, Shaohua, hawk@comx.dk
In-Reply-To: <1273878957.2825.175.camel@sbs-t61.sc.intel.com>


On Fri, 14 May 2010, Suresh Siddha wrote:
> On Fri, 2010-05-14 at 15:28 -0700, john stultz wrote:
>> On Fri, May 14, 2010 at 1:13 PM, Jesper Dangaard Brouer <hawk@diku.dk> wrote:
>>> I want to know, if its safe to enable the TSC clocksource, when the
>>> kernel reports:
>>>  "Marking TSC unstable due to TSC halts in idle"
>>>
>>> The system selects HPET (in current_clocksource), but I can still see
>>> TSC as an available clocksource (in
>>> /sys/devices/system/clocksource/clocksource0/available_clocksource).
>>>
>>> Is it safe to enable TSC manually (by changing current_clocksource)?
>>> (my workload is 10Git/s routing, cannot survive with a slow clock)
>>>
>>>
>>> Any trick to avoid this? (e.g. kernel config setting, or a /sys/ setting
>>> which changes the minimum P-state?)
>>
>> Might try booting with the max-cstate=1 option.
>
> Jesper mentioned that it is xeon 5550. TSC's for that processor doesn't
> stop in idle.

Thanks, then it should be safe to force using TSC, even on this older 
kernel.


> Perhaps he is using an older kernel which doesn't detect this fact. 
> Jesper, more recent kernels should be able to use TSC as the 
> clocksource.

Guess this it the problem. As I'm running a standard Debian compiled 
kernel 2.6.26-2-amd64 (which comes with Debian lenny).  I'm not going to 
run with this kernel in production, as it doesn't have multiqueue support 
and doesn't support the NICs I'm using.

I'm already annoyed with this old kernel, as it doesn't support any of the 
NICs in the machine, not even the build in NICs in the HP370 G6 server.

I'll boot a new kernel on the machine Monday, and I'll complain if it 
didn't solve the issue, else consider this issue solved "in a newer kernel 
version".

Cheers,
   Jesper Brouer

--
-------------------------------------------------------------------
MSc. Master of Computer Science
Dept. of Computer Science, University of Copenhagen
Author of http://www.adsl-optimizer.dk
-------------------------------------------------------------------

^ permalink raw reply

* Re: [PATCH] rndis_host: Poll status channel before control channel
From: Ben Hutchings @ 2010-05-15 13:37 UTC (permalink / raw)
  To: David Miller; +Cc: dbrownell, john.carr, netdev, vzeeaxwl, herton
In-Reply-To: <20100512.234259.35058609.davem@davemloft.net>

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On Wed, 2010-05-12 at 23:42 -0700, David Miller wrote:
> From: Ben Hutchings <ben@decadent.org.uk>
> Date: Tue, 20 Apr 2010 00:08:28 +0100
> 
> > Some RNDIS devices don't respond on the control channel until polled
> > on the status channel.  In particular, this was reported to be the
> > case for the 2Wire HomePortal 1000SW.
> > 
> > This is roughly based on a patch by John Carr <john.carr@unrouted.co.uk>
> > which is reported to be needed for use with some Windows Mobile devices
> > and which is currently applied by Mandriva.
> > 
> > Reported-by: Mark Glassberg <vzeeaxwl@myfairpoint.net>
> > Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
> > Tested-by: Mark Glassberg <vzeeaxwl@myfairpoint.net>
> > ---
> > Note that this change hasn't yet been tested with any other RNDIS
> > devices.  John, can you confirm whether this also handles the WinMob
> > devices?
> 
> Still waiting for this to get tested.  Is there really nobody in the
> world with RNDIS devices who can test this patch?  If so, maybe that's
> a good reason to not apply it :-))))

This has been in Debian unstable since 1 May and I haven't seen any
fall-out yet.  However I acknowledge that absence of evidence is not
evidence of absence.

Ben.

-- 
Ben Hutchings
Once a job is fouled up, anything done to improve it makes it worse.

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^ permalink raw reply

* RE: why get different number of MSI-X vector for broadcom bnx2x every time
From: Dmitry Kravkov @ 2010-05-15 16:17 UTC (permalink / raw)
  To: Jon Zhou, netdev
In-Reply-To: <4A6A2125329CFD4D8CC40C9E8ABCAB9F2497D752C9@MILEXCH2.ds.jdsu.net>

Hi Jon

I mean the kernel
It was able to setup (only) 4 MSI-X vectors for some reason: return value of pci_enable_msix() was 4 


Regards
Dmitry

-----Original Message-----
From: Jon Zhou [mailto:Jon.Zhou@jdsu.com] 
Sent: Saturday, May 15, 2010 6:13 AM
To: Dmitry Kravkov; netdev
Subject: RE: why get different number of MSI-X vector for broadcom bnx2x every time


hi Dmitry
the system,is the kernel(2.6.27) or the hardware?
thanks!
jon
________________________________________
From: Dmitry Kravkov [dmitry@broadcom.com]
Sent: Saturday, May 15, 2010 4:02 AM
To: Jon Zhou; netdev
Subject: RE: why get different number of MSI-X vector for broadcom bnx2x every time

Hi

Your system (from the log below) allowed bnx2x to use only 4 MSI-X vectors instead of 16 required by the driver.

Regards,
Dmitry

-----Original Message-----
From: netdev-owner@vger.kernel.org [mailto:netdev-owner@vger.kernel.org] On Behalf Of Jon Zhou
Sent: Friday, May 14, 2010 11:02 AM
To: netdev
Subject: why get different number of MSI-X vector for broadcom bnx2x every time

hi there:

bnx2x_enable_msix :

...
rc = pci_enable_msix(bp->pdev, &bp->msix_table[0],
                             BNX2X_NUM_QUEUES(bp) + offset);

        /*
         * reconfigure number of tx/rx queues according to available
         * MSI-X vectors
         */
        if (rc >= BNX2X_MIN_MSIX_VEC_CNT) {
                /* vectors available for FP */
                int fp_vec = rc - BNX2X_MSIX_VEC_FP_START;


sometimes I can run up the driver with 4 queues but most of time I can only get 2 queues
why?

May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_set_num_queues:8053(eth5)]set number of queues to 15
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7544(eth5)]msix_table[0].entry = 0 (slowpath)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7549(eth5)]msix_table[1].entry = 1 (CNIC)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[2].entry = 2 (fastpath #0)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[3].entry = 3 (fastpath #1)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[4].entry = 4 (fastpath #2)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[5].entry = 5 (fastpath #3)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[6].entry = 6 (fastpath #4)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[7].entry = 7 (fastpath #5)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[8].entry = 8 (fastpath #6)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[9].entry = 9 (fastpath #7)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[10].entry = 10 (fastpath #8)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[11].entry = 11 (fastpath #9)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[12].entry = 12 (fastpath #10)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[13].entry = 13 (fastpath #11)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[14].entry = 14 (fastpath #12)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[15].entry = 15 (fastpath #13)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7556(eth5)]msix_table[16].entry = 16 (fastpath #14)
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7571(eth5)]Trying to use less MSI-X vectors: 4
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_enable_msix:7584(eth5)]New queue configuration set: 2
May 14 01:40:16 ibm-bc-54 kernel: bnx2x: eth5: using MSI-X  IRQs: sp 4321  fp[0] 4319 ... fp[1] 4318
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_nic_init:6067(eth5)]queue[0]:  bnx2x_init_sb(ffff8803e6810780,ffff8803f9c4f000)  cl_id 0  sb 1  cos 0
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_nic_init:6067(eth5)]queue[1]:  bnx2x_init_sb(ffff8803e6810780,ffff8803fb006000)  cl_id 1  sb 2  cos 0
May 14 01:40:16 ibm-bc-54 kernel: [bnx2x_init_rx_rings:5305(eth5)]mtu 1500  rx_buf_size 1650

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^ permalink raw reply

* cxgb4i_v3 submission
From: Rakesh Ranjan @ 2010-05-15 17:15 UTC (permalink / raw)
  To: NETDEVML, SCSIDEVML, OISCSIML
  Cc: LKML, Karen Xie, David Miller, James Bottomley, Mike Christie,
	Anish Bhatt, Rakesh Ranjan

Changes since cxgb4i_v2
1. Abastract libcxgbi library common part more properly.
2. Fixed few packet sequence calculation bugs.
3. compile-time initialization of cplhandlers

[PATCH 1/3] cxgb4i_v3: add build support
[PATCH 2/3] cxgb4i_v3: main driver files
[PATCH 3/3] cxgb4i_v3: iscsi and libcxgbi library for handling common part

Regards
Rakesh Ranjan

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* [PATCH 1/3] cxgb4i_v3: add build support
From: Rakesh Ranjan @ 2010-05-15 17:15 UTC (permalink / raw)
  To: NETDEVML, SCSIDEVML, OISCSIML
  Cc: LKML, Karen Xie, David Miller, James Bottomley, Mike Christie,
	Anish Bhatt, Rakesh Ranjan, Rakesh Ranjan
In-Reply-To: <1273943752-32486-1-git-send-email-rakesh-ut6Up61K2wZBDgjK7y7TUQ@public.gmane.org>

From: Rakesh Ranjan <rranjan-UJ4WrezqVcvwEYdC/TKypOqkaFVsf6Qi@public.gmane.org>


Signed-off-by: Rakesh Ranjan <rakesh-ut6Up61K2wZBDgjK7y7TUQ@public.gmane.org>
---
 drivers/scsi/Kconfig        |    1 +
 drivers/scsi/Makefile       |    1 +
 drivers/scsi/cxgb4i/Kbuild  |    4 ++++
 drivers/scsi/cxgb4i/Kconfig |    7 +++++++
 4 files changed, 13 insertions(+), 0 deletions(-)
 create mode 100644 drivers/scsi/cxgb4i/Kbuild
 create mode 100644 drivers/scsi/cxgb4i/Kconfig

diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 75f2336..fc3810a 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -371,6 +371,7 @@ config ISCSI_TCP
 	 http://open-iscsi.org
 
 source "drivers/scsi/cxgb3i/Kconfig"
+source "drivers/scsi/cxgb4i/Kconfig"
 source "drivers/scsi/bnx2i/Kconfig"
 source "drivers/scsi/be2iscsi/Kconfig"
 
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 1c7ac49..46dcdc8 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -133,6 +133,7 @@ obj-$(CONFIG_SCSI_STEX)		+= stex.o
 obj-$(CONFIG_SCSI_MVSAS)	+= mvsas/
 obj-$(CONFIG_PS3_ROM)		+= ps3rom.o
 obj-$(CONFIG_SCSI_CXGB3_ISCSI)	+= libiscsi.o libiscsi_tcp.o cxgb3i/
+obj-$(CONFIG_SCSI_CXGB4_ISCSI)	+= libiscsi.o libiscsi_tcp.o cxgb4i/
 obj-$(CONFIG_SCSI_BNX2_ISCSI)	+= libiscsi.o bnx2i/
 obj-$(CONFIG_BE2ISCSI)		+= libiscsi.o be2iscsi/
 obj-$(CONFIG_SCSI_PMCRAID)	+= pmcraid.o
diff --git a/drivers/scsi/cxgb4i/Kbuild b/drivers/scsi/cxgb4i/Kbuild
new file mode 100644
index 0000000..1cb87b9
--- /dev/null
+++ b/drivers/scsi/cxgb4i/Kbuild
@@ -0,0 +1,4 @@
+EXTRA_CFLAGS += -I$(srctree)/drivers/net/cxgb4
+
+cxgb4i-y := libcxgbi.o cxgb4i_snic.o cxgb4i_iscsi.o cxgb4i_offload.o cxgb4i_ddp.o
+obj-$(CONFIG_SCSI_CXGB4_ISCSI) += cxgb4i.o
diff --git a/drivers/scsi/cxgb4i/Kconfig b/drivers/scsi/cxgb4i/Kconfig
new file mode 100644
index 0000000..3f33dc2
--- /dev/null
+++ b/drivers/scsi/cxgb4i/Kconfig
@@ -0,0 +1,7 @@
+config SCSI_CXGB4_ISCSI
+	tristate "Chelsio T4 iSCSI support"
+	depends on CHELSIO_T4_DEPENDS
+	select CHELSIO_T4
+	select SCSI_ISCSI_ATTRS
+	---help---
+	This driver supports iSCSI offload for the Chelsio T4 series devices.
-- 
1.6.6.1

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