* [PATCH net-next 04/14] tg3: Don't access phy test ctrl reg for 5717+
From: Matt Carlson @ 2010-08-02 21:25 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
The phy test register location has been repurposed for 5717+ devices.
This patch changes the code to avoid this location for these devices.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 10 +++++++---
drivers/net/tg3.h | 4 ++++
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 7892b00..5d155c5 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -6929,9 +6929,13 @@ static int tg3_chip_reset(struct tg3 *tp)
val = GRC_MISC_CFG_CORECLK_RESET;
if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
- if (tr32(0x7e2c) == 0x60) {
- tw32(0x7e2c, 0x20);
- }
+ /* Force PCIe 1.0a mode */
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
+ !(tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
+ tr32(TG3_PCIE_PHY_TSTCTL) ==
+ (TG3_PCIE_PHY_TSTCTL_PCIE10 | TG3_PCIE_PHY_TSTCTL_PSCRAM))
+ tw32(TG3_PCIE_PHY_TSTCTL, TG3_PCIE_PHY_TSTCTL_PSCRAM);
+
if (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
tw32(GRC_MISC_CFG, (1 << 29));
val |= (1 << 29);
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index a544045..a7b8ec7 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1844,6 +1844,10 @@
#define TG3_PCIE_LNKCTL_L1_PLL_PD_DIS 0x00000080
/* 0x7d58 --> 0x7e70 unused */
+#define TG3_PCIE_PHY_TSTCTL 0x00007e2c
+#define TG3_PCIE_PHY_TSTCTL_PCIE10 0x00000040
+#define TG3_PCIE_PHY_TSTCTL_PSCRAM 0x00000020
+
#define TG3_PCIE_EIDLE_DELAY 0x00007e70
#define TG3_PCIE_EIDLE_DELAY_MASK 0x0000001f
#define TG3_PCIE_EIDLE_DELAY_13_CLKS 0x0000000c
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 09/14] tg3: Improve small packet performance
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson, Michael Chan
smp_mb() inside tg3_tx_avail() is used twice in the normal
tg3_start_xmit() path (see illustration below). The full memory
barrier is only necessary during race conditions with tx completion.
We can speed up the tx path by replacing smp_mb() in tg3_tx_avail()
with a compiler barrier. The compiler barrier is to force the
compiler to fetch the tx_prod and tx_cons from memory.
In the race condition between tg3_start_xmit() and tg3_tx(),
we have the following situation:
tg3_start_xmit() tg3_tx()
if (!tg3_tx_avail())
BUG();
...
if (!tg3_tx_avail())
netif_tx_stop_queue(); update_tx_index();
smp_mb(); smp_mb();
if (tg3_tx_avail()) if (netif_tx_queue_stopped() &&
netif_tx_wake_queue(); tg3_tx_avail())
With smp_mb() removed from tg3_tx_avail(), we need to add smp_mb() to
tg3_start_xmit() as shown above to properly order netif_tx_stop_queue()
and tg3_tx_avail() to check the ring index. If it is not strictly
ordered, the tx queue can be stopped forever.
This improves performance by about 3% with 2 ports running
bi-directional 64-byte packets.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 24 +++++++++++++++++++++++-
1 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 32e3a3d..820a7dd 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4386,7 +4386,8 @@ static void tg3_tx_recover(struct tg3 *tp)
static inline u32 tg3_tx_avail(struct tg3_napi *tnapi)
{
- smp_mb();
+ /* Tell compiler to fetch tx indices from memory. */
+ barrier();
return tnapi->tx_pending -
((tnapi->tx_prod - tnapi->tx_cons) & (TG3_TX_RING_SIZE - 1));
}
@@ -5670,6 +5671,13 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb,
tnapi->tx_prod = entry;
if (unlikely(tg3_tx_avail(tnapi) <= (MAX_SKB_FRAGS + 1))) {
netif_tx_stop_queue(txq);
+
+ /* netif_tx_stop_queue() must be done before checking
+ * checking tx index in tg3_tx_avail() below, because in
+ * tg3_tx(), we update tx index before checking for
+ * netif_tx_queue_stopped().
+ */
+ smp_mb();
if (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi))
netif_tx_wake_queue(txq);
}
@@ -5715,6 +5723,13 @@ static int tg3_tso_bug(struct tg3 *tp, struct sk_buff *skb)
/* Estimate the number of fragments in the worst case */
if (unlikely(tg3_tx_avail(&tp->napi[0]) <= frag_cnt_est)) {
netif_stop_queue(tp->dev);
+
+ /* netif_tx_stop_queue() must be done before checking
+ * checking tx index in tg3_tx_avail() below, because in
+ * tg3_tx(), we update tx index before checking for
+ * netif_tx_queue_stopped().
+ */
+ smp_mb();
if (tg3_tx_avail(&tp->napi[0]) <= frag_cnt_est)
return NETDEV_TX_BUSY;
@@ -5950,6 +5965,13 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
tnapi->tx_prod = entry;
if (unlikely(tg3_tx_avail(tnapi) <= (MAX_SKB_FRAGS + 1))) {
netif_tx_stop_queue(txq);
+
+ /* netif_tx_stop_queue() must be done before checking
+ * checking tx index in tg3_tx_avail() below, because in
+ * tg3_tx(), we update tx index before checking for
+ * netif_tx_queue_stopped().
+ */
+ smp_mb();
if (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi))
netif_tx_wake_queue(txq);
}
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 03/14] tg3: Create TG3_FLG3_5717_PLUS flag
From: Matt Carlson @ 2010-08-02 21:25 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson, Michael Chan
This patch creates a TG3_FLG3_5717_PLUS flag to collectively describe
the set of changes in the ASIC that will apply to all future chip
revisions.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 72 ++++++++++++++++------------------------------------
drivers/net/tg3.h | 1 +
2 files changed, 23 insertions(+), 50 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 12a2dd7..7892b00 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7075,9 +7075,7 @@ static int tg3_chip_reset(struct tg3 *tp)
if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
+ !(tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
val = tr32(0x7c00);
tw32(0x7c00, val | (1 << 25));
@@ -7750,9 +7748,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
if (err)
return err;
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
val = tr32(TG3PCI_DMA_RW_CTRL) &
~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0)
@@ -7915,9 +7911,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
BDINFO_FLAGS_DISABLED);
}
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) |
(TG3_RX_STD_DMA_SZ << 2);
else
@@ -7934,9 +7928,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tp->rx_jumbo_pending : 0;
tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx);
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
tw32(STD_REPLENISH_LWM, 32);
tw32(JMB_REPLENISH_LWM, 16);
}
@@ -8626,9 +8618,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
* Turn off MSI one shot mode. Otherwise this test has no
* observable way to know whether the interrupt was delivered.
*/
- if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
+ if ((tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE;
tw32(MSGINT_MODE, val);
@@ -8671,9 +8661,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
if (intr_ok) {
/* Reenable MSI one shot mode. */
- if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
+ if ((tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE;
tw32(MSGINT_MODE, val);
@@ -8968,11 +8956,8 @@ static int tg3_open(struct net_device *dev)
goto err_out2;
}
- if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 &&
- (tp->tg3_flags2 & TG3_FLG2_USING_MSI) &&
- (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) {
+ if (!(tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
+ (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
u32 val = tr32(PCIE_TRANSACTION_CFG);
tw32(PCIE_TRANSACTION_CFG,
@@ -12987,6 +12972,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
tp->pdev_peer = tg3_find_peer(tp);
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ tp->tg3_flags3 |= TG3_FLG3_5717_PLUS;
+
/* Intentionally exclude ASIC_REV_5906 */
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
@@ -12994,9 +12984,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ (tp->tg3_flags3 & TG3_FLG3_5717_PLUS))
tp->tg3_flags3 |= TG3_FLG3_5755_PLUS;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
@@ -13026,9 +13014,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
}
/* Determine TSO capabilities */
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3;
else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
@@ -13064,9 +13050,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
}
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
tp->irq_max = TG3_IRQ_MAX_VECS;
}
@@ -13081,9 +13065,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG;
}
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG;
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
@@ -13284,9 +13266,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ (tp->tg3_flags3 & TG3_FLG3_5717_PLUS))
tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
/* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
@@ -13365,9 +13345,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
!(tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
+ !(tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
@@ -13704,9 +13682,7 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
#endif
#endif
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
goto out;
}
@@ -13917,9 +13893,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
goto out;
if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
@@ -14117,9 +14091,7 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
{
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
+ if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER_5705;
tp->bufmgr_config.mbuf_mac_rx_low_water =
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 0432399..a544045 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2860,6 +2860,7 @@ struct tg3 {
#define TG3_FLG3_SHORT_DMA_BUG 0x00200000
#define TG3_FLG3_USE_JUMBO_BDFLAG 0x00400000
#define TG3_FLG3_L1PLLPD_EN 0x00800000
+#define TG3_FLG3_5717_PLUS 0x01000000
struct timer_list timer;
u16 timer_counter;
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 14/14] tg3: Update version to 3.113
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch updates the tg3 version to 3.113.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index a9d61ab..bc3af78 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -69,10 +69,10 @@
#define DRV_MODULE_NAME "tg3"
#define TG3_MAJ_NUM 3
-#define TG3_MIN_NUM 112
+#define TG3_MIN_NUM 113
#define DRV_MODULE_VERSION \
__stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)
-#define DRV_MODULE_RELDATE "July 11, 2010"
+#define DRV_MODULE_RELDATE "August 2, 2010"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 07/14] tg3: Detect APE firmware types
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch adds code to determine the APE firmware type and report this
along with the firmware version.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 9 ++++++++-
drivers/net/tg3.h | 2 ++
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 7c2c81a..a52f52f 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -12710,6 +12710,7 @@ static void __devinit tg3_read_dash_ver(struct tg3 *tp)
{
int vlen;
u32 apedata;
+ char *fwtype;
if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) ||
!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
@@ -12725,9 +12726,15 @@ static void __devinit tg3_read_dash_ver(struct tg3 *tp)
apedata = tg3_ape_read32(tp, TG3_APE_FW_VERSION);
+ if (tg3_ape_read32(tp, TG3_APE_FW_FEATURES) & TG3_APE_FW_FEATURE_NCSI)
+ fwtype = "NCSI";
+ else
+ fwtype = "DASH";
+
vlen = strlen(tp->fw_ver);
- snprintf(&tp->fw_ver[vlen], TG3_VER_SIZE - vlen, " DASH v%d.%d.%d.%d",
+ snprintf(&tp->fw_ver[vlen], TG3_VER_SIZE - vlen, " %s v%d.%d.%d.%d",
+ fwtype,
(apedata & APE_FW_VERSION_MAJMSK) >> APE_FW_VERSION_MAJSFT,
(apedata & APE_FW_VERSION_MINMSK) >> APE_FW_VERSION_MINSFT,
(apedata & APE_FW_VERSION_REVMSK) >> APE_FW_VERSION_REVSFT,
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index a7b8ec7..53b6def 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2161,6 +2161,8 @@
/* APE shared memory. Accessible through BAR1 */
#define TG3_APE_FW_STATUS 0x400c
#define APE_FW_STATUS_READY 0x00000100
+#define TG3_APE_FW_FEATURES 0x4010
+#define TG3_APE_FW_FEATURE_NCSI 0x00000002
#define TG3_APE_FW_VERSION 0x4018
#define APE_FW_VERSION_MAJMSK 0xff000000
#define APE_FW_VERSION_MAJSFT 24
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 08/14] tg3: Remove 5720, 5750, and 5750M
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
These devices were never released to the public.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 3 ---
include/linux/pci_ids.h | 3 ---
2 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index a52f52f..32e3a3d 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -221,12 +221,9 @@ static DEFINE_PCI_DEVICE_TABLE(tg3_pci_tbl) = {
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5901_2)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5704S_2)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705F)},
- {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5720)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5721)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5722)},
- {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5750)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751)},
- {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5750M)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751M)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751F)},
{PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5752)},
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index ae66851..9ac60da 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2053,7 +2053,6 @@
#define PCI_DEVICE_ID_NX2_57711E 0x1650
#define PCI_DEVICE_ID_TIGON3_5705 0x1653
#define PCI_DEVICE_ID_TIGON3_5705_2 0x1654
-#define PCI_DEVICE_ID_TIGON3_5720 0x1658
#define PCI_DEVICE_ID_TIGON3_5721 0x1659
#define PCI_DEVICE_ID_TIGON3_5722 0x165a
#define PCI_DEVICE_ID_TIGON3_5723 0x165b
@@ -2067,13 +2066,11 @@
#define PCI_DEVICE_ID_TIGON3_5754M 0x1672
#define PCI_DEVICE_ID_TIGON3_5755M 0x1673
#define PCI_DEVICE_ID_TIGON3_5756 0x1674
-#define PCI_DEVICE_ID_TIGON3_5750 0x1676
#define PCI_DEVICE_ID_TIGON3_5751 0x1677
#define PCI_DEVICE_ID_TIGON3_5715 0x1678
#define PCI_DEVICE_ID_TIGON3_5715S 0x1679
#define PCI_DEVICE_ID_TIGON3_5754 0x167a
#define PCI_DEVICE_ID_TIGON3_5755 0x167b
-#define PCI_DEVICE_ID_TIGON3_5750M 0x167c
#define PCI_DEVICE_ID_TIGON3_5751M 0x167d
#define PCI_DEVICE_ID_TIGON3_5751F 0x167e
#define PCI_DEVICE_ID_TIGON3_5787F 0x167f
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 13/14] tg3: Migrate tg3_flags to phy_flags
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch moves most of the phy related flag definitions over to the
phyflags member and changes the code accordingly.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 275 +++++++++++++++++++++++++++--------------------------
drivers/net/tg3.h | 36 ++++----
2 files changed, 159 insertions(+), 152 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index e0ff49b..a9d61ab 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -879,7 +879,7 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
unsigned int loops;
int ret;
- if ((tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) &&
+ if ((tp->phy_flags & TG3_PHYFLG_IS_FET) &&
(reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL))
return 0;
@@ -1175,7 +1175,7 @@ static int tg3_mdio_init(struct tg3 *tp)
case PHY_ID_BCMAC131:
phydev->interface = PHY_INTERFACE_MODE_MII;
phydev->dev_flags |= PHY_BRCM_AUTO_PWRDWN_ENABLE;
- tp->tg3_flags3 |= TG3_FLG3_PHY_IS_FET;
+ tp->phy_flags |= TG3_PHYFLG_IS_FET;
break;
}
@@ -1268,7 +1268,7 @@ static void tg3_ump_link_report(struct tg3 *tp)
tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 4, val);
val = 0;
- if (!(tp->tg3_flags2 & TG3_FLG2_MII_SERDES)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_MII_SERDES)) {
if (!tg3_readphy(tp, MII_CTRL1000, ®))
val = reg << 16;
if (!tg3_readphy(tp, MII_STAT1000, ®))
@@ -1376,7 +1376,7 @@ static void tg3_setup_flow_control(struct tg3 *tp, u32 lcladv, u32 rmtadv)
if (autoneg == AUTONEG_ENABLE &&
(tp->tg3_flags & TG3_FLAG_PAUSE_AUTONEG)) {
- if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)
flowctrl = tg3_resolve_flowctrl_1000X(lcladv, rmtadv);
else
flowctrl = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
@@ -1490,7 +1490,7 @@ static int tg3_phy_init(struct tg3 *tp)
{
struct phy_device *phydev;
- if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)
+ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED)
return 0;
/* Bring the PHY back to a known state. */
@@ -1510,7 +1510,7 @@ static int tg3_phy_init(struct tg3 *tp)
switch (phydev->interface) {
case PHY_INTERFACE_MODE_GMII:
case PHY_INTERFACE_MODE_RGMII:
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) {
phydev->supported &= (PHY_GBIT_FEATURES |
SUPPORTED_Pause |
SUPPORTED_Asym_Pause);
@@ -1527,7 +1527,7 @@ static int tg3_phy_init(struct tg3 *tp)
return -EINVAL;
}
- tp->tg3_flags3 |= TG3_FLG3_PHY_CONNECTED;
+ tp->phy_flags |= TG3_PHYFLG_IS_CONNECTED;
phydev->advertising = phydev->supported;
@@ -1538,7 +1538,7 @@ static void tg3_phy_start(struct tg3 *tp)
{
struct phy_device *phydev;
- if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED))
+ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED))
return;
phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR];
@@ -1558,7 +1558,7 @@ static void tg3_phy_start(struct tg3 *tp)
static void tg3_phy_stop(struct tg3 *tp)
{
- if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED))
+ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED))
return;
phy_stop(tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]);
@@ -1566,9 +1566,9 @@ static void tg3_phy_stop(struct tg3 *tp)
static void tg3_phy_fini(struct tg3 *tp)
{
- if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) {
phy_disconnect(tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]);
- tp->tg3_flags3 &= ~TG3_FLG3_PHY_CONNECTED;
+ tp->phy_flags &= ~TG3_PHYFLG_IS_CONNECTED;
}
}
@@ -1610,10 +1610,10 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
- (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
+ (tp->phy_flags & TG3_PHYFLG_MII_SERDES)))
return;
- if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
tg3_phy_fet_toggle_apd(tp, enable);
return;
}
@@ -1644,10 +1644,10 @@ static void tg3_phy_toggle_automdix(struct tg3 *tp, int enable)
u32 phy;
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
- (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES))
+ (tp->phy_flags & TG3_PHYFLG_ANY_SERDES))
return;
- if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
u32 ephy;
if (!tg3_readphy(tp, MII_TG3_FET_TEST, &ephy)) {
@@ -1683,7 +1683,7 @@ static void tg3_phy_set_wirespeed(struct tg3 *tp)
{
u32 val;
- if (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED)
+ if (tp->phy_flags & TG3_PHYFLG_NO_ETH_WIRE_SPEED)
return;
if (!tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x7007) &&
@@ -1984,37 +1984,37 @@ static int tg3_phy_reset(struct tg3 *tp)
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
- (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))
+ (tp->phy_flags & TG3_PHYFLG_MII_SERDES))
return 0;
tg3_phy_apply_otp(tp);
- if (tp->tg3_flags3 & TG3_FLG3_PHY_ENABLE_APD)
+ if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD)
tg3_phy_toggle_apd(tp, true);
else
tg3_phy_toggle_apd(tp, false);
out:
- if (tp->tg3_flags2 & TG3_FLG2_PHY_ADC_BUG) {
+ if (tp->phy_flags & TG3_PHYFLG_ADC_BUG) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
tg3_phydsp_write(tp, 0x201f, 0x2aaa);
tg3_phydsp_write(tp, 0x000a, 0x0323);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
}
- if (tp->tg3_flags2 & TG3_FLG2_PHY_5704_A0_BUG) {
+ if (tp->phy_flags & TG3_PHYFLG_5704_A0_BUG) {
tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
}
- if (tp->tg3_flags2 & TG3_FLG2_PHY_BER_BUG) {
+ if (tp->phy_flags & TG3_PHYFLG_BER_BUG) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
tg3_phydsp_write(tp, 0x000a, 0x310b);
tg3_phydsp_write(tp, 0x201f, 0x9506);
tg3_phydsp_write(tp, 0x401f, 0x14e2);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
- } else if (tp->tg3_flags2 & TG3_FLG2_PHY_JITTER_BUG) {
+ } else if (tp->phy_flags & TG3_PHYFLG_JITTER_BUG) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a);
- if (tp->tg3_flags2 & TG3_FLG2_PHY_ADJUST_TRIM) {
+ if (tp->phy_flags & TG3_PHYFLG_ADJUST_TRIM) {
tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b);
tg3_writephy(tp, MII_TG3_TEST1,
MII_TG3_TEST1_TRIM_EN | 0x4);
@@ -2199,7 +2199,7 @@ static void tg3_power_down_phy(struct tg3 *tp, bool do_low_power)
{
u32 val;
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
u32 sg_dig_ctrl = tr32(SG_DIG_CTRL);
u32 serdes_cfg = tr32(MAC_SERDES_CFG);
@@ -2218,7 +2218,7 @@ static void tg3_power_down_phy(struct tg3 *tp, bool do_low_power)
tw32_f(GRC_MISC_CFG, val | GRC_MISC_CFG_EPHY_IDDQ);
udelay(40);
return;
- } else if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
+ } else if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
u32 phytest;
if (!tg3_readphy(tp, MII_TG3_FET_TEST, &phytest)) {
u32 phy;
@@ -2255,7 +2255,7 @@ static void tg3_power_down_phy(struct tg3 *tp, bool do_low_power)
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 ||
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 &&
- (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
+ (tp->phy_flags & TG3_PHYFLG_MII_SERDES)))
return;
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX ||
@@ -2558,7 +2558,7 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
do_low_power = false;
- if ((tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) &&
+ if ((tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) &&
!(tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) {
struct phy_device *phydev;
u32 phyid, advertising;
@@ -2611,7 +2611,7 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
tp->link_config.orig_autoneg = tp->link_config.autoneg;
}
- if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) {
tp->link_config.speed = SPEED_10;
tp->link_config.duplex = DUPLEX_HALF;
tp->link_config.autoneg = AUTONEG_ENABLE;
@@ -2644,13 +2644,13 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
if (device_should_wake) {
u32 mac_mode;
- if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES)) {
if (do_low_power) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x5a);
udelay(40);
}
- if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES)
mac_mode = MAC_MODE_PORT_MODE_GMII;
else
mac_mode = MAC_MODE_PORT_MODE_MII;
@@ -2818,7 +2818,7 @@ static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8
break;
default:
- if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
*speed = (val & MII_TG3_AUX_STAT_100) ? SPEED_100 :
SPEED_10;
*duplex = (val & MII_TG3_AUX_STAT_FULL) ? DUPLEX_FULL :
@@ -2849,7 +2849,7 @@ static void tg3_phy_copper_begin(struct tg3 *tp)
tg3_writephy(tp, MII_ADVERTISE, new_adv);
} else if (tp->link_config.speed == SPEED_INVALID) {
- if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
+ if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
tp->link_config.advertising &=
~(ADVERTISED_1000baseT_Half |
ADVERTISED_1000baseT_Full);
@@ -2875,7 +2875,7 @@ static void tg3_phy_copper_begin(struct tg3 *tp)
new_adv |= MII_TG3_CTRL_ADV_1000_HALF;
if (tp->link_config.advertising & ADVERTISED_1000baseT_Full)
new_adv |= MII_TG3_CTRL_ADV_1000_FULL;
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY) &&
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY) &&
(tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
tp->pci_chip_rev_id == CHIPREV_ID_5701_B0))
new_adv |= (MII_TG3_CTRL_AS_MASTER |
@@ -3006,7 +3006,7 @@ static int tg3_copper_is_advertising_all(struct tg3 *tp, u32 mask)
if ((adv_reg & all_mask) != all_mask)
return 0;
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) {
u32 tg3_ctrl;
all_mask = 0;
@@ -3143,9 +3143,9 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
tg3_readphy(tp, MII_TG3_ISTAT, &dummy);
tg3_readphy(tp, MII_TG3_ISTAT, &dummy);
- if (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT)
+ if (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT)
tg3_writephy(tp, MII_TG3_IMASK, ~MII_TG3_INT_LINKCHG);
- else if (!(tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET))
+ else if (!(tp->phy_flags & TG3_PHYFLG_IS_FET))
tg3_writephy(tp, MII_TG3_IMASK, ~0);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
@@ -3161,7 +3161,7 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
current_speed = SPEED_INVALID;
current_duplex = DUPLEX_INVALID;
- if (tp->tg3_flags2 & TG3_FLG2_CAPACITIVE_COUPLING) {
+ if (tp->phy_flags & TG3_PHYFLG_CAPACITIVE_COUPLING) {
u32 val;
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4007);
@@ -3255,7 +3255,7 @@ relink:
tp->mac_mode |= MAC_MODE_PORT_MODE_MII;
else
tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
- } else if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET)
+ } else if (tp->phy_flags & TG3_PHYFLG_IS_FET)
tp->mac_mode |= MAC_MODE_PORT_MODE_MII;
else
tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
@@ -3806,7 +3806,7 @@ static int tg3_setup_fiber_hw_autoneg(struct tg3 *tp, u32 mac_status)
expected_sg_dig_ctrl |= SG_DIG_ASYM_PAUSE;
if (sg_dig_ctrl != expected_sg_dig_ctrl) {
- if ((tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT) &&
+ if ((tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT) &&
tp->serdes_counter &&
((mac_status & (MAC_STATUS_PCS_SYNCED |
MAC_STATUS_RCVD_CFG)) ==
@@ -3823,7 +3823,7 @@ restart_autoneg:
tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl);
tp->serdes_counter = SERDES_AN_TIMEOUT_5704S;
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
} else if (mac_status & (MAC_STATUS_PCS_SYNCED |
MAC_STATUS_SIGNAL_DET)) {
sg_dig_status = tr32(SG_DIG_STATUS);
@@ -3846,7 +3846,7 @@ restart_autoneg:
tg3_setup_flow_control(tp, local_adv, remote_adv);
current_link_up = 1;
tp->serdes_counter = 0;
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
} else if (!(sg_dig_status & SG_DIG_AUTONEG_COMPLETE)) {
if (tp->serdes_counter)
tp->serdes_counter--;
@@ -3873,8 +3873,8 @@ restart_autoneg:
!(mac_status & MAC_STATUS_RCVD_CFG)) {
tg3_setup_flow_control(tp, 0, 0);
current_link_up = 1;
- tp->tg3_flags2 |=
- TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags |=
+ TG3_PHYFLG_PARALLEL_DETECT;
tp->serdes_counter =
SERDES_PARALLEL_DET_TIMEOUT;
} else
@@ -3883,7 +3883,7 @@ restart_autoneg:
}
} else {
tp->serdes_counter = SERDES_AN_TIMEOUT_5704S;
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
}
out:
@@ -4100,7 +4100,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
err |= tg3_readphy(tp, MII_BMCR, &bmcr);
if ((tp->link_config.autoneg == AUTONEG_ENABLE) && !force_reset &&
- (tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) {
+ (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT)) {
/* do nothing, just check for link up at the end */
} else if (tp->link_config.autoneg == AUTONEG_ENABLE) {
u32 adv, new_adv;
@@ -4125,7 +4125,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED);
tp->serdes_counter = SERDES_AN_TIMEOUT_5714S;
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
return err;
}
@@ -4170,7 +4170,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
else
bmsr &= ~BMSR_LSTATUS;
}
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
}
}
@@ -4225,7 +4225,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
netif_carrier_on(tp->dev);
else {
netif_carrier_off(tp->dev);
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
}
tg3_link_report(tp);
}
@@ -4267,12 +4267,12 @@ static void tg3_serdes_parallel_detect(struct tg3 *tp)
bmcr &= ~BMCR_ANENABLE;
bmcr |= BMCR_SPEED1000 | BMCR_FULLDPLX;
tg3_writephy(tp, MII_BMCR, bmcr);
- tp->tg3_flags2 |= TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags |= TG3_PHYFLG_PARALLEL_DETECT;
}
}
} else if (netif_carrier_ok(tp->dev) &&
(tp->link_config.autoneg == AUTONEG_ENABLE) &&
- (tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) {
+ (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT)) {
u32 phy2;
/* Select expansion interrupt status register */
@@ -4286,7 +4286,7 @@ static void tg3_serdes_parallel_detect(struct tg3 *tp)
tg3_readphy(tp, MII_BMCR, &bmcr);
tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANENABLE);
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
}
}
@@ -4296,9 +4296,9 @@ static int tg3_setup_phy(struct tg3 *tp, int force_reset)
{
int err;
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
err = tg3_setup_fiber_phy(tp, force_reset);
- else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
+ else if (tp->phy_flags & TG3_PHYFLG_MII_SERDES)
err = tg3_setup_fiber_mii_phy(tp, force_reset);
else
err = tg3_setup_copper_phy(tp, force_reset);
@@ -7066,10 +7066,10 @@ static int tg3_chip_reset(struct tg3 *tp)
tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl);
}
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
tp->mac_mode = MAC_MODE_PORT_MODE_TBI;
tw32_f(MAC_MODE, tp->mac_mode);
- } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
+ } else if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) {
tp->mac_mode = MAC_MODE_PORT_MODE_GMII;
tw32_f(MAC_MODE, tp->mac_mode);
} else if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
@@ -8073,8 +8073,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
tw32(RCVLSC_MODE, RCVLSC_MODE_ENABLE | RCVLSC_MODE_ATTN_ENABLE);
- if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
- tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
+ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) {
+ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
/* reset to prevent losing 1st rx packet intermittently */
tw32_f(MAC_RX_MODE, RX_MODE_RESET);
udelay(10);
@@ -8087,7 +8087,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tp->mac_mode |= MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE |
MAC_MODE_TDE_ENABLE | MAC_MODE_RDE_ENABLE | MAC_MODE_FHDE_ENABLE;
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
- !(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
+ !(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700)
tp->mac_mode |= MAC_MODE_LINK_POLARITY;
tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR);
@@ -8272,16 +8272,16 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tw32(MAC_LED_CTRL, tp->led_ctrl);
tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB);
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
tw32_f(MAC_RX_MODE, RX_MODE_RESET);
udelay(10);
}
tw32_f(MAC_RX_MODE, tp->rx_mode);
udelay(10);
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) &&
- !(tp->tg3_flags2 & TG3_FLG2_SERDES_PREEMPHASIS)) {
+ !(tp->phy_flags & TG3_PHYFLG_SERDES_PREEMPHASIS)) {
/* Set drive transmission level to 1.2V */
/* only if the signal pre-emphasis bit is not set */
val = tr32(MAC_SERDES_CFG);
@@ -8303,12 +8303,12 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, val);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
- (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
+ (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)) {
/* Use hardware link auto-negotiation */
tp->tg3_flags2 |= TG3_FLG2_HW_AUTONEG;
}
- if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) &&
+ if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) &&
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714)) {
u32 tmp;
@@ -8331,8 +8331,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
if (err)
return err;
- if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
- !(tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) &&
+ !(tp->phy_flags & TG3_PHYFLG_IS_FET)) {
u32 tmp;
/* Clear CRC stats. */
@@ -8507,7 +8507,7 @@ static void tg3_timer(unsigned long __opaque)
mac_stat = tr32(MAC_STATUS);
phy_event = 0;
- if (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT) {
+ if (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT) {
if (mac_stat & MAC_STATUS_MI_INTERRUPT)
phy_event = 1;
} else if (mac_stat & MAC_STATUS_LNKSTATE_CHANGED)
@@ -8539,7 +8539,7 @@ static void tg3_timer(unsigned long __opaque)
}
tg3_setup_phy(tp, 0);
}
- } else if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) &&
+ } else if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) &&
(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) {
tg3_serdes_parallel_detect(tp);
}
@@ -9069,7 +9069,7 @@ static u64 calc_crc_errors(struct tg3 *tp)
{
struct tg3_hw_stats *hw_stats = tp->hw_stats;
- if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
+ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) &&
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)) {
u32 val;
@@ -9566,7 +9566,7 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
struct phy_device *phydev;
- if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED))
+ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED))
return -EAGAIN;
phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR];
return phy_ethtool_gset(phydev, cmd);
@@ -9574,11 +9574,11 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
cmd->supported = (SUPPORTED_Autoneg);
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY))
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY))
cmd->supported |= (SUPPORTED_1000baseT_Half |
SUPPORTED_1000baseT_Full);
- if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) {
cmd->supported |= (SUPPORTED_100baseT_Half |
SUPPORTED_100baseT_Full |
SUPPORTED_10baseT_Half |
@@ -9609,7 +9609,7 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
struct phy_device *phydev;
- if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED))
+ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED))
return -EAGAIN;
phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR];
return phy_ethtool_sset(phydev, cmd);
@@ -9629,11 +9629,11 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
ADVERTISED_Pause |
ADVERTISED_Asym_Pause;
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY))
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY))
mask |= ADVERTISED_1000baseT_Half |
ADVERTISED_1000baseT_Full;
- if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES))
+ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES))
mask |= ADVERTISED_100baseT_Half |
ADVERTISED_100baseT_Full |
ADVERTISED_10baseT_Half |
@@ -9654,7 +9654,7 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
cmd->advertising &= mask;
} else {
- if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) {
+ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES) {
if (cmd->speed != SPEED_1000)
return -EINVAL;
@@ -9790,11 +9790,11 @@ static int tg3_nway_reset(struct net_device *dev)
if (!netif_running(dev))
return -EAGAIN;
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
return -EINVAL;
if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
- if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED))
+ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED))
return -EAGAIN;
r = phy_start_aneg(tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]);
} else {
@@ -9805,7 +9805,7 @@ static int tg3_nway_reset(struct net_device *dev)
tg3_readphy(tp, MII_BMCR, &bmcr);
if (!tg3_readphy(tp, MII_BMCR, &bmcr) &&
((bmcr & BMCR_ANENABLE) ||
- (tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT))) {
+ (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT))) {
tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANRESTART |
BMCR_ANENABLE);
r = 0;
@@ -9940,7 +9940,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
else
tp->tg3_flags &= ~TG3_FLAG_PAUSE_AUTONEG;
- if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) {
u32 oldadv = phydev->advertising &
(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
if (oldadv != newadv) {
@@ -10269,7 +10269,7 @@ static int tg3_test_link(struct tg3 *tp)
if (!netif_running(tp->dev))
return -ENODEV;
- if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)
max = TG3_SERDES_TIMEOUT_SEC;
else
max = TG3_COPPER_TIMEOUT_SEC;
@@ -10631,7 +10631,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
MAC_MODE_PORT_INT_LPBACK;
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
mac_mode |= MAC_MODE_LINK_POLARITY;
- if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
+ if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
mac_mode |= MAC_MODE_PORT_MODE_MII;
else
mac_mode |= MAC_MODE_PORT_MODE_GMII;
@@ -10639,7 +10639,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
} else if (loopback_mode == TG3_PHY_LOOPBACK) {
u32 val;
- if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
tg3_phy_fet_toggle_apd(tp, false);
val = BMCR_LOOPBACK | BMCR_FULLDPLX | BMCR_SPEED100;
} else
@@ -10651,7 +10651,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
udelay(40);
mac_mode = tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK;
- if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
tg3_writephy(tp, MII_TG3_FET_PTEST,
MII_TG3_FET_PTEST_FRC_TX_LINK |
MII_TG3_FET_PTEST_FRC_TX_LOCK);
@@ -10663,7 +10663,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
mac_mode |= MAC_MODE_PORT_MODE_GMII;
/* reset to prevent losing 1st rx packet intermittently */
- if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
+ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) {
tw32_f(MAC_RX_MODE, RX_MODE_RESET);
udelay(10);
tw32_f(MAC_RX_MODE, tp->rx_mode);
@@ -10794,7 +10794,7 @@ static int tg3_test_loopback(struct tg3 *tp)
return TG3_LOOPBACK_FAILED;
/* Turn off gphy autopowerdown. */
- if (tp->tg3_flags3 & TG3_FLG3_PHY_ENABLE_APD)
+ if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD)
tg3_phy_toggle_apd(tp, false);
if (tp->tg3_flags & TG3_FLAG_CPMU_PRESENT) {
@@ -10831,14 +10831,14 @@ static int tg3_test_loopback(struct tg3 *tp)
tw32(TG3_CPMU_MUTEX_GNT, CPMU_MUTEX_GNT_DRIVER);
}
- if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
+ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) &&
!(tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB)) {
if (tg3_run_loopback(tp, TG3_PHY_LOOPBACK))
err |= TG3_PHY_LOOPBACK_FAILED;
}
/* Re-enable gphy autopowerdown. */
- if (tp->tg3_flags3 & TG3_FLG3_PHY_ENABLE_APD)
+ if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD)
tg3_phy_toggle_apd(tp, true);
return err;
@@ -10881,7 +10881,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
if (!err)
tg3_nvram_unlock(tp);
- if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES)
tg3_phy_reset(tp);
if (tg3_test_registers(tp) != 0) {
@@ -10930,7 +10930,7 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
struct phy_device *phydev;
- if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED))
+ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED))
return -EAGAIN;
phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR];
return phy_mii_ioctl(phydev, ifr, cmd);
@@ -10944,7 +10944,7 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
case SIOCGMIIREG: {
u32 mii_regval;
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
break; /* We have no PHY */
if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
@@ -10960,7 +10960,7 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
}
case SIOCSMIIREG:
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
break; /* We have no PHY */
if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
@@ -12091,9 +12091,9 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
tp->phy_id = eeprom_phy_id;
if (eeprom_phy_serdes) {
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
- tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
+ tp->phy_flags |= TG3_PHYFLG_PHY_SERDES;
else
- tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
+ tp->phy_flags |= TG3_PHYFLG_MII_SERDES;
}
if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
@@ -12177,7 +12177,7 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
(tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
tp->tg3_flags3 |= TG3_FLG3_ENABLE_APE;
- if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES &&
+ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES &&
!(nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL))
tp->tg3_flags &= ~TG3_FLAG_WOL_CAP;
@@ -12186,17 +12186,17 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
tp->tg3_flags |= TG3_FLAG_WOL_ENABLE;
if (cfg2 & (1 << 17))
- tp->tg3_flags2 |= TG3_FLG2_CAPACITIVE_COUPLING;
+ tp->phy_flags |= TG3_PHYFLG_CAPACITIVE_COUPLING;
/* serdes signal pre-emphasis in register 0x590 set by */
/* bootcode if bit 18 is set */
if (cfg2 & (1 << 18))
- tp->tg3_flags2 |= TG3_FLG2_SERDES_PREEMPHASIS;
+ tp->phy_flags |= TG3_PHYFLG_SERDES_PREEMPHASIS;
if (((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX)) &&
(cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN))
- tp->tg3_flags3 |= TG3_FLG3_PHY_ENABLE_APD;
+ tp->phy_flags |= TG3_PHYFLG_ENABLE_APD;
if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
@@ -12305,9 +12305,9 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
if (!err && TG3_KNOWN_PHY_ID(hw_phy_id_masked)) {
tp->phy_id = hw_phy_id;
if (hw_phy_id_masked == TG3_PHY_ID_BCM8002)
- tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
+ tp->phy_flags |= TG3_PHYFLG_PHY_SERDES;
else
- tp->tg3_flags2 &= ~TG3_FLG2_PHY_SERDES;
+ tp->phy_flags &= ~TG3_PHYFLG_PHY_SERDES;
} else {
if (tp->phy_id != TG3_PHY_ID_INVALID) {
/* Do nothing, phy ID already set up in
@@ -12326,11 +12326,11 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
tp->phy_id = p->phy_id;
if (!tp->phy_id ||
tp->phy_id == TG3_PHY_ID_BCM8002)
- tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
+ tp->phy_flags |= TG3_PHYFLG_PHY_SERDES;
}
}
- if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) &&
+ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) &&
!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) &&
!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
u32 bmsr, adv_reg, tg3_ctrl, mask;
@@ -12348,7 +12348,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
ADVERTISE_100HALF | ADVERTISE_100FULL |
ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
tg3_ctrl = 0;
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY)) {
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) {
tg3_ctrl = (MII_TG3_CTRL_ADV_1000_HALF |
MII_TG3_CTRL_ADV_1000_FULL);
if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
@@ -12363,7 +12363,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
if (!tg3_copper_is_advertising_all(tp, mask)) {
tg3_writephy(tp, MII_ADVERTISE, adv_reg);
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY))
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY))
tg3_writephy(tp, MII_TG3_CTRL, tg3_ctrl);
tg3_writephy(tp, MII_BMCR,
@@ -12372,7 +12372,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
tg3_phy_set_wirespeed(tp);
tg3_writephy(tp, MII_ADVERTISE, adv_reg);
- if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY))
+ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY))
tg3_writephy(tp, MII_TG3_CTRL, tg3_ctrl);
}
@@ -12385,13 +12385,13 @@ skip_phy_reset:
err = tg3_init_5401phy_dsp(tp);
}
- if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)
tp->link_config.advertising =
(ADVERTISED_1000baseT_Half |
ADVERTISED_1000baseT_Full |
ADVERTISED_Autoneg |
ADVERTISED_FIBRE);
- if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
+ if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
tp->link_config.advertising &=
~(ADVERTISED_1000baseT_Half |
ADVERTISED_1000baseT_Full);
@@ -13350,25 +13350,25 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
}
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
- tp->tg3_flags3 |= TG3_FLG3_PHY_IS_FET;
+ tp->phy_flags |= TG3_PHYFLG_IS_FET;
/* A few boards don't want Ethernet@WireSpeed phy feature */
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) &&
(tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) ||
- (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) ||
- (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES))
- tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED;
+ (tp->phy_flags & TG3_PHYFLG_IS_FET) ||
+ (tp->phy_flags & TG3_PHYFLG_ANY_SERDES))
+ tp->phy_flags |= TG3_PHYFLG_NO_ETH_WIRE_SPEED;
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5703_AX ||
GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5704_AX)
- tp->tg3_flags2 |= TG3_FLG2_PHY_ADC_BUG;
+ tp->phy_flags |= TG3_PHYFLG_ADC_BUG;
if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0)
- tp->tg3_flags2 |= TG3_FLG2_PHY_5704_A0_BUG;
+ tp->phy_flags |= TG3_PHYFLG_5704_A0_BUG;
if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
- !(tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) &&
+ !(tp->phy_flags & TG3_PHYFLG_IS_FET) &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 &&
!(tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
@@ -13378,11 +13378,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) {
if (tp->pdev->device != PCI_DEVICE_ID_TIGON3_5756 &&
tp->pdev->device != PCI_DEVICE_ID_TIGON3_5722)
- tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG;
+ tp->phy_flags |= TG3_PHYFLG_JITTER_BUG;
if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5755M)
- tp->tg3_flags2 |= TG3_FLG2_PHY_ADJUST_TRIM;
+ tp->phy_flags |= TG3_PHYFLG_ADJUST_TRIM;
} else
- tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG;
+ tp->phy_flags |= TG3_PHYFLG_BER_BUG;
}
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
@@ -13495,8 +13495,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->pdev->device == TG3PCI_DEVICE_TIGON3_57790 ||
tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795 ||
- (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET))
- tp->tg3_flags |= TG3_FLAG_10_100_ONLY;
+ (tp->phy_flags & TG3_PHYFLG_IS_FET))
+ tp->phy_flags |= TG3_PHYFLG_10_100_ONLY;
err = tg3_phy_probe(tp);
if (err) {
@@ -13508,13 +13508,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tg3_read_vpd(tp);
tg3_read_fw_ver(tp);
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
- tp->tg3_flags &= ~TG3_FLAG_USE_MI_INTERRUPT;
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
+ tp->phy_flags &= ~TG3_PHYFLG_USE_MI_INTERRUPT;
} else {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700)
- tp->tg3_flags |= TG3_FLAG_USE_MI_INTERRUPT;
+ tp->phy_flags |= TG3_PHYFLG_USE_MI_INTERRUPT;
else
- tp->tg3_flags &= ~TG3_FLAG_USE_MI_INTERRUPT;
+ tp->phy_flags &= ~TG3_PHYFLG_USE_MI_INTERRUPT;
}
/* 5700 {AX,BX} chips have a broken status block link
@@ -13532,13 +13532,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
*/
if (tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
- !(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
- tp->tg3_flags |= (TG3_FLAG_USE_MI_INTERRUPT |
- TG3_FLAG_USE_LINKCHG_REG);
+ !(tp->phy_flags & TG3_PHYFLG_PHY_SERDES)) {
+ tp->phy_flags |= TG3_PHYFLG_USE_MI_INTERRUPT;
+ tp->tg3_flags |= TG3_FLAG_USE_LINKCHG_REG;
}
/* For all SERDES we poll the MAC status register. */
- if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
+ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
tp->tg3_flags |= TG3_FLAG_POLL_SERDES;
else
tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
@@ -14641,24 +14641,31 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
tg3_bus_string(tp, str),
dev->dev_addr);
- if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) {
struct phy_device *phydev;
phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR];
netdev_info(dev,
"attached PHY driver [%s] (mii_bus:phy_addr=%s)\n",
phydev->drv->name, dev_name(&phydev->dev));
- } else
+ } else {
+ char *ethtype;
+
+ if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
+ ethtype = "10/100Base-TX";
+ else if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)
+ ethtype = "1000Base-SX";
+ else
+ ethtype = "10/100/1000Base-T";
+
netdev_info(dev, "attached PHY is %s (%s Ethernet) "
- "(WireSpeed[%d])\n", tg3_phy_string(tp),
- ((tp->tg3_flags & TG3_FLAG_10_100_ONLY) ? "10/100Base-TX" :
- ((tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) ? "1000Base-SX" :
- "10/100/1000Base-T")),
- (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED) == 0);
+ "(WireSpeed[%d])\n", tg3_phy_string(tp), ethtype,
+ (tp->phy_flags & TG3_PHYFLG_NO_ETH_WIRE_SPEED) == 0);
+ }
netdev_info(dev, "RXcsums[%d] LinkChgREG[%d] MIirq[%d] ASF[%d] TSOcap[%d]\n",
(tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0,
(tp->tg3_flags & TG3_FLAG_USE_LINKCHG_REG) != 0,
- (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT) != 0,
+ (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT) != 0,
(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0,
(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0);
netdev_info(dev, "dma_rwctrl[%08x] dma_mask[%d-bit]\n",
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 5d684d2..4937bd1 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2774,7 +2774,6 @@ struct tg3 {
#define TG3_FLAG_TXD_MBOX_HWBUG 0x00000002
#define TG3_FLAG_RX_CHECKSUMS 0x00000004
#define TG3_FLAG_USE_LINKCHG_REG 0x00000008
-#define TG3_FLAG_USE_MI_INTERRUPT 0x00000010
#define TG3_FLAG_ENABLE_ASF 0x00000020
#define TG3_FLAG_ASPM_WORKAROUND 0x00000040
#define TG3_FLAG_POLL_SERDES 0x00000080
@@ -2796,7 +2795,6 @@ struct tg3 {
#define TG3_FLAG_TX_RECOVERY_PENDING 0x00200000
#define TG3_FLAG_WOL_CAP 0x00400000
#define TG3_FLAG_JUMBO_RING_ENABLE 0x00800000
-#define TG3_FLAG_10_100_ONLY 0x01000000
#define TG3_FLAG_PAUSE_AUTONEG 0x02000000
#define TG3_FLAG_CPMU_PRESENT 0x04000000
#define TG3_FLAG_40BIT_DMA_BUG 0x08000000
@@ -2807,22 +2805,15 @@ struct tg3 {
u32 tg3_flags2;
#define TG3_FLG2_RESTART_TIMER 0x00000001
#define TG3_FLG2_TSO_BUG 0x00000002
-#define TG3_FLG2_NO_ETH_WIRE_SPEED 0x00000004
#define TG3_FLG2_IS_5788 0x00000008
#define TG3_FLG2_MAX_RXPEND_64 0x00000010
#define TG3_FLG2_TSO_CAPABLE 0x00000020
-#define TG3_FLG2_PHY_ADC_BUG 0x00000040
-#define TG3_FLG2_PHY_5704_A0_BUG 0x00000080
-#define TG3_FLG2_PHY_BER_BUG 0x00000100
#define TG3_FLG2_PCI_EXPRESS 0x00000200
#define TG3_FLG2_ASF_NEW_HANDSHAKE 0x00000400
#define TG3_FLG2_HW_AUTONEG 0x00000800
#define TG3_FLG2_IS_NIC 0x00001000
-#define TG3_FLG2_PHY_SERDES 0x00002000
-#define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000
#define TG3_FLG2_FLASH 0x00008000
#define TG3_FLG2_HW_TSO_1 0x00010000
-#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000
#define TG3_FLG2_5705_PLUS 0x00040000
#define TG3_FLG2_5750_PLUS 0x00080000
#define TG3_FLG2_HW_TSO_3 0x00100000
@@ -2830,10 +2821,6 @@ struct tg3 {
#define TG3_FLG2_USING_MSIX 0x00400000
#define TG3_FLG2_USING_MSI_OR_MSIX (TG3_FLG2_USING_MSI | \
TG3_FLG2_USING_MSIX)
-#define TG3_FLG2_MII_SERDES 0x00800000
-#define TG3_FLG2_ANY_SERDES (TG3_FLG2_PHY_SERDES | \
- TG3_FLG2_MII_SERDES)
-#define TG3_FLG2_PARALLEL_DETECT 0x01000000
#define TG3_FLG2_ICH_WORKAROUND 0x02000000
#define TG3_FLG2_5780_CLASS 0x04000000
#define TG3_FLG2_HW_TSO_2 0x08000000
@@ -2841,9 +2828,7 @@ struct tg3 {
TG3_FLG2_HW_TSO_2 | \
TG3_FLG2_HW_TSO_3)
#define TG3_FLG2_1SHOT_MSI 0x10000000
-#define TG3_FLG2_PHY_JITTER_BUG 0x20000000
#define TG3_FLG2_NO_FWARE_REPORTED 0x40000000
-#define TG3_FLG2_PHY_ADJUST_TRIM 0x80000000
u32 tg3_flags3;
#define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001
#define TG3_FLG3_ENABLE_APE 0x00000002
@@ -2851,15 +2836,12 @@ struct tg3 {
#define TG3_FLG3_5701_DMA_BUG 0x00000008
#define TG3_FLG3_USE_PHYLIB 0x00000010
#define TG3_FLG3_MDIOBUS_INITED 0x00000020
-#define TG3_FLG3_PHY_CONNECTED 0x00000080
#define TG3_FLG3_RGMII_INBAND_DISABLE 0x00000100
#define TG3_FLG3_RGMII_EXT_IBND_RX_EN 0x00000200
#define TG3_FLG3_RGMII_EXT_IBND_TX_EN 0x00000400
#define TG3_FLG3_CLKREQ_BUG 0x00000800
-#define TG3_FLG3_PHY_ENABLE_APD 0x00001000
#define TG3_FLG3_5755_PLUS 0x00002000
#define TG3_FLG3_NO_NVRAM 0x00004000
-#define TG3_FLG3_PHY_IS_FET 0x00010000
#define TG3_FLG3_ENABLE_RSS 0x00020000
#define TG3_FLG3_ENABLE_TSS 0x00040000
#define TG3_FLG3_4G_DMA_BNDRY_BUG 0x00080000
@@ -2966,6 +2948,24 @@ struct tg3 {
u32 phy_flags;
#define TG3_PHYFLG_IS_LOW_POWER 0x00000001
+#define TG3_PHYFLG_IS_CONNECTED 0x00000002
+#define TG3_PHYFLG_USE_MI_INTERRUPT 0x00000004
+#define TG3_PHYFLG_PHY_SERDES 0x00000010
+#define TG3_PHYFLG_MII_SERDES 0x00000020
+#define TG3_PHYFLG_ANY_SERDES (TG3_PHYFLG_PHY_SERDES | \
+ TG3_PHYFLG_MII_SERDES)
+#define TG3_PHYFLG_IS_FET 0x00000040
+#define TG3_PHYFLG_10_100_ONLY 0x00000080
+#define TG3_PHYFLG_ENABLE_APD 0x00000100
+#define TG3_PHYFLG_CAPACITIVE_COUPLING 0x00000200
+#define TG3_PHYFLG_NO_ETH_WIRE_SPEED 0x00000400
+#define TG3_PHYFLG_JITTER_BUG 0x00000800
+#define TG3_PHYFLG_ADJUST_TRIM 0x00001000
+#define TG3_PHYFLG_ADC_BUG 0x00002000
+#define TG3_PHYFLG_5704_A0_BUG 0x00004000
+#define TG3_PHYFLG_BER_BUG 0x00008000
+#define TG3_PHYFLG_SERDES_PREEMPHASIS 0x00010000
+#define TG3_PHYFLG_PARALLEL_DETECT 0x00020000
u32 led_ctrl;
u32 phy_otp;
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 10/14] tg3: Add error reporting to tg3_phydsp_write()
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch adds error reporting to the tg3_phydsp_write() function and
converts a few more locations to use this function over the inlined
equivalent.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 51 ++++++++++++++++++++-------------------------------
1 files changed, 20 insertions(+), 31 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 820a7dd..a9bca8a 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1572,10 +1572,15 @@ static void tg3_phy_fini(struct tg3 *tp)
}
}
-static void tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val)
+static int tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val)
{
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
+ int err;
+
+ err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
+ if (!err)
+ err = tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
+
+ return err;
}
static void tg3_phy_fet_toggle_apd(struct tg3 *tp, bool enable)
@@ -1872,8 +1877,7 @@ static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
/* Block the PHY control access. */
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8005);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0800);
+ tg3_phydsp_write(tp, 0x8005, 0x0800);
err = tg3_phy_write_and_check_testpat(tp, &do_phy_reset);
if (!err)
@@ -1884,8 +1888,7 @@ static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
if (err)
return err;
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8005);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0000);
+ tg3_phydsp_write(tp, 0x8005, 0x0000);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200);
tg3_writephy(tp, 0x16, 0x0000);
@@ -1994,10 +1997,8 @@ static int tg3_phy_reset(struct tg3 *tp)
out:
if (tp->tg3_flags2 & TG3_FLG2_PHY_ADC_BUG) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x201f);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x2aaa);
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0323);
+ tg3_phydsp_write(tp, 0x201f, 0x2aaa);
+ tg3_phydsp_write(tp, 0x000a, 0x0323);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
}
if (tp->tg3_flags2 & TG3_FLG2_PHY_5704_A0_BUG) {
@@ -2006,12 +2007,9 @@ out:
}
if (tp->tg3_flags2 & TG3_FLG2_PHY_BER_BUG) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x310b);
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x201f);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x9506);
- tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x401f);
- tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x14e2);
+ tg3_phydsp_write(tp, 0x000a, 0x310b);
+ tg3_phydsp_write(tp, 0x201f, 0x9506);
+ tg3_phydsp_write(tp, 0x401f, 0x14e2);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
} else if (tp->tg3_flags2 & TG3_FLG2_PHY_JITTER_BUG) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
@@ -2979,20 +2977,11 @@ static int tg3_init_5401phy_dsp(struct tg3 *tp)
/* Set Extended packet length bit */
err = tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20);
- err |= tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x0012);
- err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x1804);
-
- err |= tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x0013);
- err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x1204);
-
- err |= tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8006);
- err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0132);
-
- err |= tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8006);
- err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0232);
-
- err |= tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x201f);
- err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0a20);
+ err |= tg3_phydsp_write(tp, 0x0012, 0x1804);
+ err |= tg3_phydsp_write(tp, 0x0013, 0x1204);
+ err |= tg3_phydsp_write(tp, 0x8006, 0x0132);
+ err |= tg3_phydsp_write(tp, 0x8006, 0x0232);
+ err |= tg3_phydsp_write(tp, 0x201f, 0x0a20);
udelay(40);
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 11/14] tg3: Add phy-related preprocessor constants
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch replaces some instances of hardcoded phy register values with
preprocessor equivalents.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 46 ++++++++++++++++++++++++----------------------
drivers/net/tg3.h | 4 +++-
2 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index a9bca8a..281cd7a 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1742,7 +1742,7 @@ static int tg3_wait_macro_done(struct tg3 *tp)
while (limit--) {
u32 tmp32;
- if (!tg3_readphy(tp, 0x16, &tmp32)) {
+ if (!tg3_readphy(tp, MII_TG3_DSP_CONTROL, &tmp32)) {
if ((tmp32 & 0x1000) == 0)
break;
}
@@ -1768,13 +1768,13 @@ static int tg3_phy_write_and_check_testpat(struct tg3 *tp, int *resetp)
tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
(chan * 0x2000) | 0x0200);
- tg3_writephy(tp, 0x16, 0x0002);
+ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0002);
for (i = 0; i < 6; i++)
tg3_writephy(tp, MII_TG3_DSP_RW_PORT,
test_pat[chan][i]);
- tg3_writephy(tp, 0x16, 0x0202);
+ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0202);
if (tg3_wait_macro_done(tp)) {
*resetp = 1;
return -EBUSY;
@@ -1782,13 +1782,13 @@ static int tg3_phy_write_and_check_testpat(struct tg3 *tp, int *resetp)
tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
(chan * 0x2000) | 0x0200);
- tg3_writephy(tp, 0x16, 0x0082);
+ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0082);
if (tg3_wait_macro_done(tp)) {
*resetp = 1;
return -EBUSY;
}
- tg3_writephy(tp, 0x16, 0x0802);
+ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0802);
if (tg3_wait_macro_done(tp)) {
*resetp = 1;
return -EBUSY;
@@ -1828,10 +1828,10 @@ static int tg3_phy_reset_chanpat(struct tg3 *tp)
tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
(chan * 0x2000) | 0x0200);
- tg3_writephy(tp, 0x16, 0x0002);
+ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0002);
for (i = 0; i < 6; i++)
tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000);
- tg3_writephy(tp, 0x16, 0x0202);
+ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0202);
if (tg3_wait_macro_done(tp))
return -EBUSY;
}
@@ -1891,7 +1891,7 @@ static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
tg3_phydsp_write(tp, 0x8005, 0x0000);
tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200);
- tg3_writephy(tp, 0x16, 0x0000);
+ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0000);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
@@ -2002,8 +2002,8 @@ out:
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
}
if (tp->tg3_flags2 & TG3_FLG2_PHY_5704_A0_BUG) {
- tg3_writephy(tp, 0x1c, 0x8d68);
- tg3_writephy(tp, 0x1c, 0x8d68);
+ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
+ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
}
if (tp->tg3_flags2 & TG3_FLG2_PHY_BER_BUG) {
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
@@ -3134,9 +3134,9 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
tp->pci_chip_rev_id == CHIPREV_ID_5701_B0) {
/* 5701 {A0,B0} CRC bug workaround */
tg3_writephy(tp, 0x15, 0x0a75);
- tg3_writephy(tp, 0x1c, 0x8c68);
- tg3_writephy(tp, 0x1c, 0x8d68);
- tg3_writephy(tp, 0x1c, 0x8c68);
+ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8c68);
+ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
+ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8c68);
}
/* Clear pending interrupts... */
@@ -4249,13 +4249,14 @@ static void tg3_serdes_parallel_detect(struct tg3 *tp)
u32 phy1, phy2;
/* Select shadow register 0x1f */
- tg3_writephy(tp, 0x1c, 0x7c00);
- tg3_readphy(tp, 0x1c, &phy1);
+ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x7c00);
+ tg3_readphy(tp, MII_TG3_MISC_SHDW, &phy1);
/* Select expansion interrupt status register */
- tg3_writephy(tp, 0x17, 0x0f01);
- tg3_readphy(tp, 0x15, &phy2);
- tg3_readphy(tp, 0x15, &phy2);
+ tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
+ MII_TG3_DSP_EXP1_INT_STAT);
+ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
+ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
if ((phy1 & 0x10) && !(phy2 & 0x20)) {
/* We have signal detect and not receiving
@@ -4275,8 +4276,9 @@ static void tg3_serdes_parallel_detect(struct tg3 *tp)
u32 phy2;
/* Select expansion interrupt status register */
- tg3_writephy(tp, 0x17, 0x0f01);
- tg3_readphy(tp, 0x15, &phy2);
+ tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
+ MII_TG3_DSP_EXP1_INT_STAT);
+ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
if (phy2 & 0x20) {
u32 bmcr;
@@ -8337,7 +8339,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
if (!tg3_readphy(tp, MII_TG3_TEST1, &tmp)) {
tg3_writephy(tp, MII_TG3_TEST1,
tmp | MII_TG3_TEST1_CRC_EN);
- tg3_readphy(tp, 0x14, &tmp);
+ tg3_readphy(tp, MII_TG3_RXR_COUNTERS, &tmp);
}
}
}
@@ -9076,7 +9078,7 @@ static u64 calc_crc_errors(struct tg3 *tp)
if (!tg3_readphy(tp, MII_TG3_TEST1, &val)) {
tg3_writephy(tp, MII_TG3_TEST1,
val | MII_TG3_TEST1_CRC_EN);
- tg3_readphy(tp, 0x14, &val);
+ tg3_readphy(tp, MII_TG3_RXR_COUNTERS, &val);
} else
val = 0;
spin_unlock_bh(&tp->lock);
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 53b6def..d40c380 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2057,8 +2057,9 @@
#define MII_TG3_EXT_STAT 0x11 /* Extended status register */
#define MII_TG3_EXT_STAT_LPASS 0x0100
+#define MII_TG3_RXR_COUNTERS 0x14 /* Local/Remote Receiver Counts */
#define MII_TG3_DSP_RW_PORT 0x15 /* DSP coefficient read/write port */
-
+#define MII_TG3_DSP_CONTROL 0x16 /* DSP control register */
#define MII_TG3_DSP_ADDRESS 0x17 /* DSP address register */
#define MII_TG3_DSP_TAP1 0x0001
@@ -2066,6 +2067,7 @@
#define MII_TG3_DSP_AADJ1CH0 0x001f
#define MII_TG3_DSP_AADJ1CH3 0x601f
#define MII_TG3_DSP_AADJ1CH3_ADCCKADJ 0x0002
+#define MII_TG3_DSP_EXP1_INT_STAT 0x0f01
#define MII_TG3_DSP_EXP8 0x0f08
#define MII_TG3_DSP_EXP8_REJ2MHz 0x0001
#define MII_TG3_DSP_EXP8_AEDW 0x0200
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 12/14] tg3: Create phy_flags and migrate phy_is_low_power
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch deletes the link_config.phy_is_low_power flag and creates a
new phy_flags device member to store all phy related settings. All the
code is converted accordingly.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 35 +++++++++++++++++------------------
drivers/net/tg3.h | 4 +++-
2 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 281cd7a..e0ff49b 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1543,8 +1543,8 @@ static void tg3_phy_start(struct tg3 *tp)
phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR];
- if (tp->link_config.phy_is_low_power) {
- tp->link_config.phy_is_low_power = 0;
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) {
+ tp->phy_flags &= ~TG3_PHYFLG_IS_LOW_POWER;
phydev->speed = tp->link_config.orig_speed;
phydev->duplex = tp->link_config.orig_duplex;
phydev->autoneg = tp->link_config.orig_autoneg;
@@ -2559,13 +2559,13 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
do_low_power = false;
if ((tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) &&
- !tp->link_config.phy_is_low_power) {
+ !(tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) {
struct phy_device *phydev;
u32 phyid, advertising;
phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR];
- tp->link_config.phy_is_low_power = 1;
+ tp->phy_flags |= TG3_PHYFLG_IS_LOW_POWER;
tp->link_config.orig_speed = phydev->speed;
tp->link_config.orig_duplex = phydev->duplex;
@@ -2604,8 +2604,8 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
} else {
do_low_power = true;
- if (tp->link_config.phy_is_low_power == 0) {
- tp->link_config.phy_is_low_power = 1;
+ if (!(tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) {
+ tp->phy_flags |= TG3_PHYFLG_IS_LOW_POWER;
tp->link_config.orig_speed = tp->link_config.speed;
tp->link_config.orig_duplex = tp->link_config.duplex;
tp->link_config.orig_autoneg = tp->link_config.autoneg;
@@ -2836,7 +2836,7 @@ static void tg3_phy_copper_begin(struct tg3 *tp)
u32 new_adv;
int i;
- if (tp->link_config.phy_is_low_power) {
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) {
/* Entering low power mode. Disable gigabit and
* 100baseT advertisements.
*/
@@ -3237,7 +3237,7 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
}
relink:
- if (current_link_up == 0 || tp->link_config.phy_is_low_power) {
+ if (current_link_up == 0 || (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) {
u32 tmp;
tg3_phy_copper_begin(tp);
@@ -8320,8 +8320,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
}
if (!(tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB)) {
- if (tp->link_config.phy_is_low_power) {
- tp->link_config.phy_is_low_power = 0;
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) {
+ tp->phy_flags &= ~TG3_PHYFLG_IS_LOW_POWER;
tp->link_config.speed = tp->link_config.orig_speed;
tp->link_config.duplex = tp->link_config.orig_duplex;
tp->link_config.autoneg = tp->link_config.orig_autoneg;
@@ -9368,7 +9368,7 @@ static void tg3_get_regs(struct net_device *dev,
memset(p, 0, TG3_REGDUMP_LEN);
- if (tp->link_config.phy_is_low_power)
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
return;
tg3_full_lock(tp, 0);
@@ -9447,7 +9447,7 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM)
return -EINVAL;
- if (tp->link_config.phy_is_low_power)
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
return -EAGAIN;
offset = eeprom->offset;
@@ -9509,7 +9509,7 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
u8 *buf;
__be32 start, end;
- if (tp->link_config.phy_is_low_power)
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
return -EAGAIN;
if ((tp->tg3_flags3 & TG3_FLG3_NO_NVRAM) ||
@@ -10849,7 +10849,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
{
struct tg3 *tp = netdev_priv(dev);
- if (tp->link_config.phy_is_low_power)
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
tg3_set_power_state(tp, PCI_D0);
memset(data, 0, sizeof(u64) * TG3_NUM_TEST);
@@ -10917,7 +10917,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
if (irq_sync && !err2)
tg3_phy_start(tp);
}
- if (tp->link_config.phy_is_low_power)
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
tg3_set_power_state(tp, PCI_D3hot);
}
@@ -10947,7 +10947,7 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
break; /* We have no PHY */
- if (tp->link_config.phy_is_low_power)
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
return -EAGAIN;
spin_lock_bh(&tp->lock);
@@ -10963,7 +10963,7 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
break; /* We have no PHY */
- if (tp->link_config.phy_is_low_power)
+ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
return -EAGAIN;
spin_lock_bh(&tp->lock);
@@ -14109,7 +14109,6 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
tp->link_config.autoneg = AUTONEG_ENABLE;
tp->link_config.active_speed = SPEED_INVALID;
tp->link_config.active_duplex = DUPLEX_INVALID;
- tp->link_config.phy_is_low_power = 0;
tp->link_config.orig_speed = SPEED_INVALID;
tp->link_config.orig_duplex = DUPLEX_INVALID;
tp->link_config.orig_autoneg = AUTONEG_INVALID;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index d40c380..5d684d2 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2534,7 +2534,6 @@ struct tg3_link_config {
/* When we go in and out of low power mode we need
* to swap with this state.
*/
- int phy_is_low_power;
u16 orig_speed;
u8 orig_duplex;
u8 orig_autoneg;
@@ -2965,6 +2964,9 @@ struct tg3 {
(X) == TG3_PHY_ID_BCM57765 || (X) == TG3_PHY_ID_BCM5719C || \
(X) == TG3_PHY_ID_BCM8002)
+ u32 phy_flags;
+#define TG3_PHYFLG_IS_LOW_POWER 0x00000001
+
u32 led_ctrl;
u32 phy_otp;
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 01/14] tg3: Add 5784 ASIC rev to earlier PCIe MPS fix
From: Matt Carlson @ 2010-08-02 21:25 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
tg3 commit e7126997342560533317d8467e8516119ebcbd21 entitled
"tg3: Preserve PCIe MPS setting for new devs" attempted to ensure the
PCIe link negotiated Maximum Payload Size (MPS) setting was 128 bytes
for all devices that didn't support higher speeds. The 5784 device was
mistakenly added to this list when it shouldn't have. This patch
removes the 5784 ASIC rev devices from that list.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index b26a577..98ca0d2 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7002,8 +7002,7 @@ static int tg3_chip_reset(struct tg3 *tp)
* Older PCIe devices only support the 128 byte
* MPS setting. Enforce the restriction.
*/
- if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT) ||
- (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784))
+ if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT))
val16 &= ~PCI_EXP_DEVCTL_PAYLOAD;
pci_write_config_word(tp->pdev,
tp->pcie_cap + PCI_EXP_DEVCTL,
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 05/14] tg3: Manage gphy power for CPMU-less devs only
From: Matt Carlson @ 2010-08-02 21:25 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch changes the code to only manage the PCIe gphy power for
CPMU-less devices only. The CPMU takes over management for newer
chips.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 5d155c5..38979f2 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -6948,8 +6948,11 @@ static int tg3_chip_reset(struct tg3 *tp)
tr32(GRC_VCPU_EXT_CTRL) & ~GRC_VCPU_EXT_CTRL_HALT_CPU);
}
- if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
+ /* Manage gphy power for all CPMU absent PCIe devices. */
+ if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
+ !(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT))
val |= GRC_MISC_CFG_KEEP_GPHY_POWER;
+
tw32(GRC_MISC_CFG, val);
/* restore 5701 hardware bug workaround write method */
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 06/14] tg3: Restrict ASPM workaround devlist
From: Matt Carlson @ 2010-08-02 21:26 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
The ASPM workaround setting obtained from NVRAM only works with devices
older than 5717. This patch enforces the restriction.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
---
drivers/net/tg3.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 38979f2..7c2c81a 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -12188,7 +12188,9 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
(cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN))
tp->tg3_flags3 |= TG3_FLG3_PHY_ENABLE_APD;
- if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
+ if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
+ !(tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
u32 cfg3;
tg3_read_mem(tp, NIC_SRAM_DATA_CFG_3, &cfg3);
--
1.7.1
^ permalink raw reply related
* Re: [Bugme-new] [Bug 16383] New: Regression with e1000e from 2.6.34.1 to 2.6.35-rc5
From: Craig @ 2010-08-02 21:23 UTC (permalink / raw)
To: Tantilov, Emil S
Cc: Andrew Morton, Kirsher, Jeffrey T, Brandeburg, Jesse,
Allan, Bruce W, Duyck, Alexander H, Waskiewicz Jr, Peter P,
bugzilla-daemon@bugzilla.kernel.org,
bugme-daemon@bugzilla.kernel.org, netdev@vger.kernel.org
In-Reply-To: <EA929A9653AAE14F841771FB1DE5A1365FFE8449AA@rrsmsx501.amr.corp.intel.com>
>>> https://bugzilla.kernel.org/show_bug.cgi?id=16383
>>>
>>> Summary: Regression with e1000e from 2.6.34.1 to 2.6.35-rc5
>>> Product: Drivers
>>> Version: 2.5
>>> Kernel Version: 2.6.35
>>> Platform: All
>>> OS/Version: Linux
>>> Tree: Mainline
>>> Status: NEW
>>> Severity: high
>>> Priority: P1
>>> Component: Network
>>> AssignedTo: drivers_network@kernel-bugs.osdl.org
>>> ReportedBy: craig@haquarter.de
>>> Regression: Yes
>>>
>>>
>>> Networking stops working with 2.6.35 (tested rc-3 and rc5).
>>
>> This is a post-2.6.34 regression, guys. There's some more info in
>> bugzilla.
The e1000e works like a charm with 2.6.35, thanks everyone.
Best regards,
Craig
^ permalink raw reply
* Re: Re: why do we need printk on sending syn flood cookie?
From: Franchoze Eric @ 2010-08-02 21:14 UTC (permalink / raw)
To: Mitchell Erblich; +Cc: Florian Westphal, netdev
In-Reply-To: <667FAE9E-C5B5-4C26-B3AD-3C459CECA4AB@earthlink.net>
02.08.10, 22:10, "Mitchell Erblich" <erblichs@earthlink.net>:
>
> On Aug 2, 2010, at 9:11 AM, Franchoze Eric wrote:
>
> >
> >
> > 02.08.10, 12:17, "Florian Westphal" :
> >
> >> Franchoze Eric wrote:
> >>> Just sirious why do we need printk each 1 second (60*HZ) about possible syn-flood? It really floods dmesg. Is there something dengerous? I have suggestion to turn off printk about sending tcp cookie each 1 second.
> >>
> >> It is handled exactly like other printks in the networking path,
> >> e.g. receipt of tcp wscale == 15.
> >>
> >> Why does this need special treatment?
> >>
> >
> > For now I see "possible SYN flooding on port %d. Sending cookies.\n" message each second on my server. I know that there are a lot of SYNs and I know that kernel sends cookie. Why do I need so mach printk?
> > So I suggested add new value to /proc/sys/net/ipv4/tcp_syncookies, which will enable cookie but this printk will be turned off.
>
>
> Once print per sec is a very good GENERIC informative msg to an admin that
> this system either has some very small config'd or default values
> (normally set up as a percentage of memory or set sock option and/or .. )
> and/or that for some reason that a large number of SYNs are being rec'vd
> and/or that a number of connections are being un/intentionally being
> retried and/or dropped
>
There is no much settings to tune syn requests.
tcp_max_syn_backlog, tcp_synack_retries, tcp_abort_on_overflow
As for me, than I have about 3000 clients which do a little bit less then 3000 SYNs for nginx port.
I'm ok with sending syn cookies to clients. Also it's not possible to turn syncs off with setting
bigger value to tcp_max_syn_backlog and application works well so I would simple remove
this messages from dmesg.
If I limit syncs with iptables it starts to drop needed packets. So it's no solution. That's why I think that we need turn off
printk without turning off syn cookies.
> Remember each printk may only be a small fraction of the number of SYNs
> rcv'd and this fraction COULD depend on the Mb/Gb of the intf(s) or more
> likely some type of avg of summation of the number of network paths
> involved.
>
> Mitchell Erblich
>
>
>
> > --
> > To unsubscribe from this list: send the line "unsubscribe netdev" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
>
^ permalink raw reply
* Re: RFC: New BGF 'LOOP' instruction
From: Hagen Paul Pfeifer @ 2010-08-02 20:16 UTC (permalink / raw)
To: Paul LeoNerd Evans; +Cc: netdev
In-Reply-To: <20100802110334.GK11110@cel.leo>
* Paul LeoNerd Evans | 2010-08-02 12:03:34 [+0100]:
Hello Paul,
>Currently therefore, it is impossible to efficiently parse IPv6 packets
>without resorting to such annoying tricks as statically unrolling a loop
>into a long list of instructions. In IPv6's case this gets very large
>very quickly, as different header types have different lengths, or
>structure layouts.
>
>I propose to add a new instruction, "LOOP", with the following
>semantics:
>
> BPF_JMP|BPF_LOOP, jt
>
> If A == 0, fallthrough to the next instruction.
> (TODO: Or perhaps this should be considered a hard error which
> immediately aborts the filter, similar to divide by zero?)
> Otherwise:
> X += A.
> If X < len, jump backwards jt instructions.
> Otherwise, fallthrough to the next instruction
>
>The following static checks would be enforced:
>
> None of the 'jt' preceeding instructions before the LOOP instruction
> (i.e. the body of the loop) may themselves be LOOP instructions, nor may
> they be STX.
[..]
in principle I had no objectives against any BPF loop construct. But as said
this I question the significant advantages.
In general: BPF was constructed to address filters rules in a generic manner
and BPF does not contain any special protocol specific optimization - nor any
sophisticated connection tracking functionality. In general you should
pre-filter unneeded packets and shift the real high level filtering to some
post-processing step. tcpdump filter capabilities are limited and where never
designed to filter _any_ traffic. For example: you are lost if you want to match
transport layer fields like port number where the underlying IPv{4,6} packet
is fragmented.
Currently tcpdump/libpcap does not generate any IPv4 options or IPv6
extension header code. The following byte code is generated by applying a
"tcp" filter:
(000) ldh [12]
(001) jeq #0x86dd jt 2 jf 4
(002) ldb [20]
(003) jeq #0x6 jt 7 jf 8
(004) jeq #0x800 jt 5 jf 8
(005) ldb [23]
(006) jeq #0x6 jt 7 jf 8
(007) ret #96
(008) ret #0
Furthermore, I doubt that the loop provides any significant advantages.
IPv6 extension header parsing is not that straight forward. For example
check the IPSec AH Extension header where the extension header length
must interpreted differently because of a IPSec AH protcol defect. I assume
that a straight forward pcap encoded BPF opcode (composed of jump and load
instructions) is more efficient as an highly flexible loop construct.
Last but not least I am interested in a RFC patch as well as a pcap patch (see
pcap-opt.c). You should not underrate the effort to generate an generic IPv6
extension header opcode optimizer - without this the newly introduced opcode
is pointless.
Hagen
PS: the LOOP opcode must be secure against any ressource attack -> the loop
must be break after n iterations.
--
Hagen Paul Pfeifer <hagen@jauu.net> || http://jauu.net/
Telephone: +49 174 5455209 || Key Id: 0x98350C22
Key Fingerprint: 490F 557B 6C48 6D7E 5706 2EA2 4A22 8D45 9835 0C22
^ permalink raw reply
* [PATCH 25/28] netfilter: nf_nat: use local variable hdrlen
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Changli Gao <xiaosuo@gmail.com>
Use local variable hdrlen instead of ip_hdrlen(skb).
Signed-off-by: Changli Gao <xiaosuo@gmail.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
net/ipv4/netfilter/nf_nat_core.c | 18 +++++++-----------
1 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/net/ipv4/netfilter/nf_nat_core.c b/net/ipv4/netfilter/nf_nat_core.c
index 037a3a6..8c8632d 100644
--- a/net/ipv4/netfilter/nf_nat_core.c
+++ b/net/ipv4/netfilter/nf_nat_core.c
@@ -435,7 +435,7 @@ int nf_nat_icmp_reply_translation(struct nf_conn *ct,
if (!skb_make_writable(skb, hdrlen + sizeof(*inside)))
return 0;
- inside = (void *)skb->data + ip_hdrlen(skb);
+ inside = (void *)skb->data + hdrlen;
/* We're actually going to mangle it beyond trivial checksum
adjustment, so make sure the current checksum is correct. */
@@ -465,12 +465,10 @@ int nf_nat_icmp_reply_translation(struct nf_conn *ct,
/* rcu_read_lock()ed by nf_hook_slow */
l4proto = __nf_ct_l4proto_find(PF_INET, inside->ip.protocol);
- if (!nf_ct_get_tuple(skb,
- ip_hdrlen(skb) + sizeof(struct icmphdr),
- (ip_hdrlen(skb) +
+ if (!nf_ct_get_tuple(skb, hdrlen + sizeof(struct icmphdr),
+ (hdrlen +
sizeof(struct icmphdr) + inside->ip.ihl * 4),
- (u_int16_t)AF_INET,
- inside->ip.protocol,
+ (u_int16_t)AF_INET, inside->ip.protocol,
&inner, l3proto, l4proto))
return 0;
@@ -479,15 +477,13 @@ int nf_nat_icmp_reply_translation(struct nf_conn *ct,
pass all hooks (locally-generated ICMP). Consider incoming
packet: PREROUTING (DST manip), routing produces ICMP, goes
through POSTROUTING (which must correct the DST manip). */
- if (!manip_pkt(inside->ip.protocol, skb,
- ip_hdrlen(skb) + sizeof(inside->icmp),
- &ct->tuplehash[!dir].tuple,
- !manip))
+ if (!manip_pkt(inside->ip.protocol, skb, hdrlen + sizeof(inside->icmp),
+ &ct->tuplehash[!dir].tuple, !manip))
return 0;
if (skb->ip_summed != CHECKSUM_PARTIAL) {
/* Reloading "inside" here since manip_pkt inner. */
- inside = (void *)skb->data + ip_hdrlen(skb);
+ inside = (void *)skb->data + hdrlen;
inside->icmp.checksum = 0;
inside->icmp.checksum =
csum_fold(skb_checksum(skb, hdrlen,
--
1.7.1
^ permalink raw reply related
* [PATCH 28/28] netfilter: nf_conntrack_acct: use skb->len for accounting
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Changli Gao <xiaosuo@gmail.com>
use skb->len for accounting as xt_quota does. Since nf_conntrack works
at the network layer, skb_network_offset should always returns ZERO.
Signed-off-by: Changli Gao <xiaosuo@gmail.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
net/netfilter/nf_conntrack_core.c | 3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
index 16b41b4..df3eedb 100644
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
@@ -966,8 +966,7 @@ acct:
if (acct) {
spin_lock_bh(&ct->lock);
acct[CTINFO2DIR(ctinfo)].packets++;
- acct[CTINFO2DIR(ctinfo)].bytes +=
- skb->len - skb_network_offset(skb);
+ acct[CTINFO2DIR(ctinfo)].bytes += skb->len;
spin_unlock_bh(&ct->lock);
}
}
--
1.7.1
^ permalink raw reply related
* [PATCH 24/28] ipvs: provide default ip_vs_conn_{in,out}_get_proto
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Simon Horman <horms@verge.net.au>
This removes duplicate code by providing a default implementation
which is used by 3 of the 4 modules that provide these call.
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
include/net/ip_vs.h | 12 +++++++
net/netfilter/ipvs/ip_vs_conn.c | 45 ++++++++++++++++++++++++++
net/netfilter/ipvs/ip_vs_proto_sctp.c | 53 +------------------------------
net/netfilter/ipvs/ip_vs_proto_tcp.c | 50 +----------------------------
net/netfilter/ipvs/ip_vs_proto_udp.c | 56 +-------------------------------
5 files changed, 63 insertions(+), 153 deletions(-)
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 1f9e511..a4747a0 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -632,10 +632,22 @@ extern struct ip_vs_conn *ip_vs_ct_in_get
(int af, int protocol, const union nf_inet_addr *s_addr, __be16 s_port,
const union nf_inet_addr *d_addr, __be16 d_port);
+struct ip_vs_conn * ip_vs_conn_in_get_proto(int af, const struct sk_buff *skb,
+ struct ip_vs_protocol *pp,
+ const struct ip_vs_iphdr *iph,
+ unsigned int proto_off,
+ int inverse);
+
extern struct ip_vs_conn *ip_vs_conn_out_get
(int af, int protocol, const union nf_inet_addr *s_addr, __be16 s_port,
const union nf_inet_addr *d_addr, __be16 d_port);
+struct ip_vs_conn * ip_vs_conn_out_get_proto(int af, const struct sk_buff *skb,
+ struct ip_vs_protocol *pp,
+ const struct ip_vs_iphdr *iph,
+ unsigned int proto_off,
+ int inverse);
+
/* put back the conn without restarting its timer */
static inline void __ip_vs_conn_put(struct ip_vs_conn *cp)
{
diff --git a/net/netfilter/ipvs/ip_vs_conn.c b/net/netfilter/ipvs/ip_vs_conn.c
index 654544e..b71c69a 100644
--- a/net/netfilter/ipvs/ip_vs_conn.c
+++ b/net/netfilter/ipvs/ip_vs_conn.c
@@ -271,6 +271,29 @@ struct ip_vs_conn *ip_vs_conn_in_get
return cp;
}
+struct ip_vs_conn *
+ip_vs_conn_in_get_proto(int af, const struct sk_buff *skb,
+ struct ip_vs_protocol *pp,
+ const struct ip_vs_iphdr *iph,
+ unsigned int proto_off, int inverse)
+{
+ __be16 _ports[2], *pptr;
+
+ pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
+ if (pptr == NULL)
+ return NULL;
+
+ if (likely(!inverse))
+ return ip_vs_conn_in_get(af, iph->protocol,
+ &iph->saddr, pptr[0],
+ &iph->daddr, pptr[1]);
+ else
+ return ip_vs_conn_in_get(af, iph->protocol,
+ &iph->daddr, pptr[1],
+ &iph->saddr, pptr[0]);
+}
+EXPORT_SYMBOL_GPL(ip_vs_conn_in_get_proto);
+
/* Get reference to connection template */
struct ip_vs_conn *ip_vs_ct_in_get
(int af, int protocol, const union nf_inet_addr *s_addr, __be16 s_port,
@@ -356,6 +379,28 @@ struct ip_vs_conn *ip_vs_conn_out_get
return ret;
}
+struct ip_vs_conn *
+ip_vs_conn_out_get_proto(int af, const struct sk_buff *skb,
+ struct ip_vs_protocol *pp,
+ const struct ip_vs_iphdr *iph,
+ unsigned int proto_off, int inverse)
+{
+ __be16 _ports[2], *pptr;
+
+ pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
+ if (pptr == NULL)
+ return NULL;
+
+ if (likely(!inverse))
+ return ip_vs_conn_out_get(af, iph->protocol,
+ &iph->saddr, pptr[0],
+ &iph->daddr, pptr[1]);
+ else
+ return ip_vs_conn_out_get(af, iph->protocol,
+ &iph->daddr, pptr[1],
+ &iph->saddr, pptr[0]);
+}
+EXPORT_SYMBOL_GPL(ip_vs_conn_out_get_proto);
/*
* Put back the conn and restart its timer with its timeout
diff --git a/net/netfilter/ipvs/ip_vs_proto_sctp.c b/net/netfilter/ipvs/ip_vs_proto_sctp.c
index db55759..4c0855c 100644
--- a/net/netfilter/ipvs/ip_vs_proto_sctp.c
+++ b/net/netfilter/ipvs/ip_vs_proto_sctp.c
@@ -8,55 +8,6 @@
#include <net/sctp/checksum.h>
#include <net/ip_vs.h>
-
-static struct ip_vs_conn *
-sctp_conn_in_get(int af,
- const struct sk_buff *skb,
- struct ip_vs_protocol *pp,
- const struct ip_vs_iphdr *iph,
- unsigned int proto_off,
- int inverse)
-{
- __be16 _ports[2], *pptr;
-
- pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
- if (pptr == NULL)
- return NULL;
-
- if (likely(!inverse))
- return ip_vs_conn_in_get(af, iph->protocol,
- &iph->saddr, pptr[0],
- &iph->daddr, pptr[1]);
- else
- return ip_vs_conn_in_get(af, iph->protocol,
- &iph->daddr, pptr[1],
- &iph->saddr, pptr[0]);
-}
-
-static struct ip_vs_conn *
-sctp_conn_out_get(int af,
- const struct sk_buff *skb,
- struct ip_vs_protocol *pp,
- const struct ip_vs_iphdr *iph,
- unsigned int proto_off,
- int inverse)
-{
- __be16 _ports[2], *pptr;
-
- pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
- if (pptr == NULL)
- return NULL;
-
- if (likely(!inverse))
- return ip_vs_conn_out_get(af, iph->protocol,
- &iph->saddr, pptr[0],
- &iph->daddr, pptr[1]);
- else
- return ip_vs_conn_out_get(af, iph->protocol,
- &iph->daddr, pptr[1],
- &iph->saddr, pptr[0]);
-}
-
static int
sctp_conn_schedule(int af, struct sk_buff *skb, struct ip_vs_protocol *pp,
int *verdict, struct ip_vs_conn **cpp)
@@ -1169,8 +1120,8 @@ struct ip_vs_protocol ip_vs_protocol_sctp = {
.register_app = sctp_register_app,
.unregister_app = sctp_unregister_app,
.conn_schedule = sctp_conn_schedule,
- .conn_in_get = sctp_conn_in_get,
- .conn_out_get = sctp_conn_out_get,
+ .conn_in_get = ip_vs_conn_in_get_proto,
+ .conn_out_get = ip_vs_conn_out_get_proto,
.snat_handler = sctp_snat_handler,
.dnat_handler = sctp_dnat_handler,
.csum_check = sctp_csum_check,
diff --git a/net/netfilter/ipvs/ip_vs_proto_tcp.c b/net/netfilter/ipvs/ip_vs_proto_tcp.c
index 91d28e0..282d24d 100644
--- a/net/netfilter/ipvs/ip_vs_proto_tcp.c
+++ b/net/netfilter/ipvs/ip_vs_proto_tcp.c
@@ -27,52 +27,6 @@
#include <net/ip_vs.h>
-
-static struct ip_vs_conn *
-tcp_conn_in_get(int af, const struct sk_buff *skb, struct ip_vs_protocol *pp,
- const struct ip_vs_iphdr *iph, unsigned int proto_off,
- int inverse)
-{
- __be16 _ports[2], *pptr;
-
- pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
- if (pptr == NULL)
- return NULL;
-
- if (likely(!inverse)) {
- return ip_vs_conn_in_get(af, iph->protocol,
- &iph->saddr, pptr[0],
- &iph->daddr, pptr[1]);
- } else {
- return ip_vs_conn_in_get(af, iph->protocol,
- &iph->daddr, pptr[1],
- &iph->saddr, pptr[0]);
- }
-}
-
-static struct ip_vs_conn *
-tcp_conn_out_get(int af, const struct sk_buff *skb, struct ip_vs_protocol *pp,
- const struct ip_vs_iphdr *iph, unsigned int proto_off,
- int inverse)
-{
- __be16 _ports[2], *pptr;
-
- pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
- if (pptr == NULL)
- return NULL;
-
- if (likely(!inverse)) {
- return ip_vs_conn_out_get(af, iph->protocol,
- &iph->saddr, pptr[0],
- &iph->daddr, pptr[1]);
- } else {
- return ip_vs_conn_out_get(af, iph->protocol,
- &iph->daddr, pptr[1],
- &iph->saddr, pptr[0]);
- }
-}
-
-
static int
tcp_conn_schedule(int af, struct sk_buff *skb, struct ip_vs_protocol *pp,
int *verdict, struct ip_vs_conn **cpp)
@@ -721,8 +675,8 @@ struct ip_vs_protocol ip_vs_protocol_tcp = {
.register_app = tcp_register_app,
.unregister_app = tcp_unregister_app,
.conn_schedule = tcp_conn_schedule,
- .conn_in_get = tcp_conn_in_get,
- .conn_out_get = tcp_conn_out_get,
+ .conn_in_get = ip_vs_conn_in_get_proto,
+ .conn_out_get = ip_vs_conn_out_get_proto,
.snat_handler = tcp_snat_handler,
.dnat_handler = tcp_dnat_handler,
.csum_check = tcp_csum_check,
diff --git a/net/netfilter/ipvs/ip_vs_proto_udp.c b/net/netfilter/ipvs/ip_vs_proto_udp.c
index e7a6885..8553231 100644
--- a/net/netfilter/ipvs/ip_vs_proto_udp.c
+++ b/net/netfilter/ipvs/ip_vs_proto_udp.c
@@ -27,58 +27,6 @@
#include <net/ip.h>
#include <net/ip6_checksum.h>
-static struct ip_vs_conn *
-udp_conn_in_get(int af, const struct sk_buff *skb, struct ip_vs_protocol *pp,
- const struct ip_vs_iphdr *iph, unsigned int proto_off,
- int inverse)
-{
- struct ip_vs_conn *cp;
- __be16 _ports[2], *pptr;
-
- pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
- if (pptr == NULL)
- return NULL;
-
- if (likely(!inverse)) {
- cp = ip_vs_conn_in_get(af, iph->protocol,
- &iph->saddr, pptr[0],
- &iph->daddr, pptr[1]);
- } else {
- cp = ip_vs_conn_in_get(af, iph->protocol,
- &iph->daddr, pptr[1],
- &iph->saddr, pptr[0]);
- }
-
- return cp;
-}
-
-
-static struct ip_vs_conn *
-udp_conn_out_get(int af, const struct sk_buff *skb, struct ip_vs_protocol *pp,
- const struct ip_vs_iphdr *iph, unsigned int proto_off,
- int inverse)
-{
- struct ip_vs_conn *cp;
- __be16 _ports[2], *pptr;
-
- pptr = skb_header_pointer(skb, proto_off, sizeof(_ports), _ports);
- if (pptr == NULL)
- return NULL;
-
- if (likely(!inverse)) {
- cp = ip_vs_conn_out_get(af, iph->protocol,
- &iph->saddr, pptr[0],
- &iph->daddr, pptr[1]);
- } else {
- cp = ip_vs_conn_out_get(af, iph->protocol,
- &iph->daddr, pptr[1],
- &iph->saddr, pptr[0]);
- }
-
- return cp;
-}
-
-
static int
udp_conn_schedule(int af, struct sk_buff *skb, struct ip_vs_protocol *pp,
int *verdict, struct ip_vs_conn **cpp)
@@ -520,8 +468,8 @@ struct ip_vs_protocol ip_vs_protocol_udp = {
.init = udp_init,
.exit = udp_exit,
.conn_schedule = udp_conn_schedule,
- .conn_in_get = udp_conn_in_get,
- .conn_out_get = udp_conn_out_get,
+ .conn_in_get = ip_vs_conn_in_get_proto,
+ .conn_out_get = ip_vs_conn_out_get_proto,
.snat_handler = udp_snat_handler,
.dnat_handler = udp_dnat_handler,
.csum_check = udp_csum_check,
--
1.7.1
^ permalink raw reply related
* [PATCH 18/28] xt_quota: report initial quota value instead of current value to userspace
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Changli Gao <xiaosuo@gmail.com>
We should copy the initial value to userspace for iptables-save and
to allow removal of specific quota rules.
Signed-off-by: Changli Gao <xiaosuo@gmail.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
include/linux/netfilter/xt_quota.h | 2 +-
net/netfilter/xt_quota.c | 2 --
2 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/include/linux/netfilter/xt_quota.h b/include/linux/netfilter/xt_quota.h
index 8dc89df..b0d28c6 100644
--- a/include/linux/netfilter/xt_quota.h
+++ b/include/linux/netfilter/xt_quota.h
@@ -11,9 +11,9 @@ struct xt_quota_priv;
struct xt_quota_info {
u_int32_t flags;
u_int32_t pad;
+ aligned_u64 quota;
/* Used internally by the kernel */
- aligned_u64 quota;
struct xt_quota_priv *master;
};
diff --git a/net/netfilter/xt_quota.c b/net/netfilter/xt_quota.c
index 304b1fd..70eb2b4 100644
--- a/net/netfilter/xt_quota.c
+++ b/net/netfilter/xt_quota.c
@@ -36,8 +36,6 @@ quota_mt(const struct sk_buff *skb, struct xt_action_param *par)
/* we do not allow even small packets from now on */
priv->quota = 0;
}
- /* Copy quota back to matchinfo so that iptables can display it */
- q->quota = priv->quota;
spin_unlock_bh(&priv->lock);
return ret;
--
1.7.1
^ permalink raw reply related
* [PATCH 17/28] netfilter: xt_quota: use per-rule spin lock
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Changli Gao <xiaosuo@gmail.com>
Use per-rule spin lock to improve the scalability.
Signed-off-by: Changli Gao <xiaosuo@gmail.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
net/netfilter/xt_quota.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/net/netfilter/xt_quota.c b/net/netfilter/xt_quota.c
index b4f7dfe..304b1fd 100644
--- a/net/netfilter/xt_quota.c
+++ b/net/netfilter/xt_quota.c
@@ -11,7 +11,8 @@
#include <linux/netfilter/xt_quota.h>
struct xt_quota_priv {
- uint64_t quota;
+ spinlock_t lock;
+ uint64_t quota;
};
MODULE_LICENSE("GPL");
@@ -20,8 +21,6 @@ MODULE_DESCRIPTION("Xtables: countdown quota match");
MODULE_ALIAS("ipt_quota");
MODULE_ALIAS("ip6t_quota");
-static DEFINE_SPINLOCK(quota_lock);
-
static bool
quota_mt(const struct sk_buff *skb, struct xt_action_param *par)
{
@@ -29,7 +28,7 @@ quota_mt(const struct sk_buff *skb, struct xt_action_param *par)
struct xt_quota_priv *priv = q->master;
bool ret = q->flags & XT_QUOTA_INVERT;
- spin_lock_bh("a_lock);
+ spin_lock_bh(&priv->lock);
if (priv->quota >= skb->len) {
priv->quota -= skb->len;
ret = !ret;
@@ -39,7 +38,7 @@ quota_mt(const struct sk_buff *skb, struct xt_action_param *par)
}
/* Copy quota back to matchinfo so that iptables can display it */
q->quota = priv->quota;
- spin_unlock_bh("a_lock);
+ spin_unlock_bh(&priv->lock);
return ret;
}
@@ -55,6 +54,7 @@ static int quota_mt_check(const struct xt_mtchk_param *par)
if (q->master == NULL)
return -ENOMEM;
+ spin_lock_init(&q->master->lock);
q->master->quota = q->quota;
return 0;
}
--
1.7.1
^ permalink raw reply related
* [PATCH 16/28] netfilter: arptables: use arp_hdr_len()
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Changli Gao <xiaosuo@gmail.com>
use arp_hdr_len().
Signed-off-by: Changli Gao <xiaosuo@gmail.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
net/ipv4/netfilter/arp_tables.c | 5 +----
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/net/ipv4/netfilter/arp_tables.c b/net/ipv4/netfilter/arp_tables.c
index 16c0ba0..c868dd5 100644
--- a/net/ipv4/netfilter/arp_tables.c
+++ b/net/ipv4/netfilter/arp_tables.c
@@ -283,16 +283,13 @@ unsigned int arpt_do_table(struct sk_buff *skb,
arp = arp_hdr(skb);
do {
const struct arpt_entry_target *t;
- int hdr_len;
if (!arp_packet_match(arp, skb->dev, indev, outdev, &e->arp)) {
e = arpt_next_entry(e);
continue;
}
- hdr_len = sizeof(*arp) + (2 * sizeof(struct in_addr)) +
- (2 * skb->dev->addr_len);
- ADD_COUNTER(e->counters, hdr_len, 1);
+ ADD_COUNTER(e->counters, arp_hdr_len(skb->dev), 1);
t = arpt_get_target_c(e);
--
1.7.1
^ permalink raw reply related
* [PATCH 14/28] netfilter: add xt_cpu match
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Eric Dumazet <eric.dumazet@gmail.com>
In some situations a CPU match permits a better spreading of
connections, or select targets only for a given cpu.
With Remote Packet Steering or multiqueue NIC and appropriate IRQ
affinities, we can distribute trafic on available cpus, per session.
(all RX packets for a given flow is handled by a given cpu)
Some legacy applications being not SMP friendly, one way to scale a
server is to run multiple copies of them.
Instead of randomly choosing an instance, we can use the cpu number as a
key so that softirq handler for a whole instance is running on a single
cpu, maximizing cache effects in TCP/UDP stacks.
Using NAT for example, a four ways machine might run four copies of
server application, using a separate listening port for each instance,
but still presenting an unique external port :
iptables -t nat -A PREROUTING -p tcp --dport 80 -m cpu --cpu 0 \
-j REDIRECT --to-port 8080
iptables -t nat -A PREROUTING -p tcp --dport 80 -m cpu --cpu 1 \
-j REDIRECT --to-port 8081
iptables -t nat -A PREROUTING -p tcp --dport 80 -m cpu --cpu 2 \
-j REDIRECT --to-port 8082
iptables -t nat -A PREROUTING -p tcp --dport 80 -m cpu --cpu 3 \
-j REDIRECT --to-port 8083
Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
include/linux/netfilter/Kbuild | 3 +-
include/linux/netfilter/xt_cpu.h | 11 ++++++
net/netfilter/Kconfig | 9 +++++
net/netfilter/Makefile | 1 +
net/netfilter/xt_cpu.c | 63 ++++++++++++++++++++++++++++++++++++++
5 files changed, 86 insertions(+), 1 deletions(-)
create mode 100644 include/linux/netfilter/xt_cpu.h
create mode 100644 net/netfilter/xt_cpu.c
diff --git a/include/linux/netfilter/Kbuild b/include/linux/netfilter/Kbuild
index 0cb62c8..edeeabd 100644
--- a/include/linux/netfilter/Kbuild
+++ b/include/linux/netfilter/Kbuild
@@ -20,12 +20,13 @@ header-y += xt_TCPMSS.h
header-y += xt_TCPOPTSTRIP.h
header-y += xt_TEE.h
header-y += xt_TPROXY.h
+header-y += xt_cluster.h
header-y += xt_comment.h
header-y += xt_connbytes.h
header-y += xt_connlimit.h
header-y += xt_connmark.h
header-y += xt_conntrack.h
-header-y += xt_cluster.h
+header-y += xt_cpu.h
header-y += xt_dccp.h
header-y += xt_dscp.h
header-y += xt_esp.h
diff --git a/include/linux/netfilter/xt_cpu.h b/include/linux/netfilter/xt_cpu.h
new file mode 100644
index 0000000..93c7f11
--- /dev/null
+++ b/include/linux/netfilter/xt_cpu.h
@@ -0,0 +1,11 @@
+#ifndef _XT_CPU_H
+#define _XT_CPU_H
+
+#include <linux/types.h>
+
+struct xt_cpu_info {
+ __u32 cpu;
+ __u32 invert;
+};
+
+#endif /*_XT_CPU_H*/
diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig
index 551b584..4328825 100644
--- a/net/netfilter/Kconfig
+++ b/net/netfilter/Kconfig
@@ -663,6 +663,15 @@ config NETFILTER_XT_MATCH_CONNTRACK
To compile it as a module, choose M here. If unsure, say N.
+config NETFILTER_XT_MATCH_CPU
+ tristate '"cpu" match support'
+ depends on NETFILTER_ADVANCED
+ help
+ CPU matching allows you to match packets based on the CPU
+ currently handling the packet.
+
+ To compile it as a module, choose M here. If unsure, say N.
+
config NETFILTER_XT_MATCH_DCCP
tristate '"dccp" protocol match support'
depends on NETFILTER_ADVANCED
diff --git a/net/netfilter/Makefile b/net/netfilter/Makefile
index 4366c79..441050f 100644
--- a/net/netfilter/Makefile
+++ b/net/netfilter/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_NETFILTER_XT_MATCH_COMMENT) += xt_comment.o
obj-$(CONFIG_NETFILTER_XT_MATCH_CONNBYTES) += xt_connbytes.o
obj-$(CONFIG_NETFILTER_XT_MATCH_CONNLIMIT) += xt_connlimit.o
obj-$(CONFIG_NETFILTER_XT_MATCH_CONNTRACK) += xt_conntrack.o
+obj-$(CONFIG_NETFILTER_XT_MATCH_CPU) += xt_cpu.o
obj-$(CONFIG_NETFILTER_XT_MATCH_DCCP) += xt_dccp.o
obj-$(CONFIG_NETFILTER_XT_MATCH_DSCP) += xt_dscp.o
obj-$(CONFIG_NETFILTER_XT_MATCH_ESP) += xt_esp.o
diff --git a/net/netfilter/xt_cpu.c b/net/netfilter/xt_cpu.c
new file mode 100644
index 0000000..b39db8a
--- /dev/null
+++ b/net/netfilter/xt_cpu.c
@@ -0,0 +1,63 @@
+/* Kernel module to match running CPU */
+
+/*
+ * Might be used to distribute connections on several daemons, if
+ * RPS (Remote Packet Steering) is enabled or NIC is multiqueue capable,
+ * each RX queue IRQ affined to one CPU (1:1 mapping)
+ *
+ */
+
+/* (C) 2010 Eric Dumazet
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/skbuff.h>
+#include <linux/netfilter/xt_cpu.h>
+#include <linux/netfilter/x_tables.h>
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Eric Dumazet <eric.dumazet@gmail.com>");
+MODULE_DESCRIPTION("Xtables: CPU match");
+
+static int cpu_mt_check(const struct xt_mtchk_param *par)
+{
+ const struct xt_cpu_info *info = par->matchinfo;
+
+ if (info->invert & ~1)
+ return -EINVAL;
+ return 0;
+}
+
+static bool cpu_mt(const struct sk_buff *skb, struct xt_action_param *par)
+{
+ const struct xt_cpu_info *info = par->matchinfo;
+
+ return (info->cpu == smp_processor_id()) ^ info->invert;
+}
+
+static struct xt_match cpu_mt_reg __read_mostly = {
+ .name = "cpu",
+ .revision = 0,
+ .family = NFPROTO_UNSPEC,
+ .checkentry = cpu_mt_check,
+ .match = cpu_mt,
+ .matchsize = sizeof(struct xt_cpu_info),
+ .me = THIS_MODULE,
+};
+
+static int __init cpu_mt_init(void)
+{
+ return xt_register_match(&cpu_mt_reg);
+}
+
+static void __exit cpu_mt_exit(void)
+{
+ xt_unregister_match(&cpu_mt_reg);
+}
+
+module_init(cpu_mt_init);
+module_exit(cpu_mt_exit);
--
1.7.1
^ permalink raw reply related
* [PATCH 11/28] netfilter: xt_ipvs (netfilter matcher for IPVS)
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Hannes Eder <heder@google.com>
This implements the kernel-space side of the netfilter matcher xt_ipvs.
[ minor fixes by Simon Horman <horms@verge.net.au> ]
Signed-off-by: Hannes Eder <heder@google.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
[ Patrick: added xt_ipvs.h to Kbuild ]
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
include/linux/netfilter/Kbuild | 1 +
include/linux/netfilter/xt_ipvs.h | 27 +++++
net/netfilter/Kconfig | 10 ++
net/netfilter/Makefile | 1 +
net/netfilter/ipvs/ip_vs_proto.c | 1 +
net/netfilter/xt_ipvs.c | 189 +++++++++++++++++++++++++++++++++++++
6 files changed, 229 insertions(+), 0 deletions(-)
create mode 100644 include/linux/netfilter/xt_ipvs.h
create mode 100644 net/netfilter/xt_ipvs.c
diff --git a/include/linux/netfilter/Kbuild b/include/linux/netfilter/Kbuild
index b93b64d..0cb62c8 100644
--- a/include/linux/netfilter/Kbuild
+++ b/include/linux/netfilter/Kbuild
@@ -31,6 +31,7 @@ header-y += xt_dscp.h
header-y += xt_esp.h
header-y += xt_hashlimit.h
header-y += xt_iprange.h
+header-y += xt_ipvs.h
header-y += xt_helper.h
header-y += xt_length.h
header-y += xt_limit.h
diff --git a/include/linux/netfilter/xt_ipvs.h b/include/linux/netfilter/xt_ipvs.h
new file mode 100644
index 0000000..1167aeb
--- /dev/null
+++ b/include/linux/netfilter/xt_ipvs.h
@@ -0,0 +1,27 @@
+#ifndef _XT_IPVS_H
+#define _XT_IPVS_H
+
+enum {
+ XT_IPVS_IPVS_PROPERTY = 1 << 0, /* all other options imply this one */
+ XT_IPVS_PROTO = 1 << 1,
+ XT_IPVS_VADDR = 1 << 2,
+ XT_IPVS_VPORT = 1 << 3,
+ XT_IPVS_DIR = 1 << 4,
+ XT_IPVS_METHOD = 1 << 5,
+ XT_IPVS_VPORTCTL = 1 << 6,
+ XT_IPVS_MASK = (1 << 7) - 1,
+ XT_IPVS_ONCE_MASK = XT_IPVS_MASK & ~XT_IPVS_IPVS_PROPERTY
+};
+
+struct xt_ipvs_mtinfo {
+ union nf_inet_addr vaddr, vmask;
+ __be16 vport;
+ __u8 l4proto;
+ __u8 fwd_method;
+ __be16 vportctl;
+
+ __u8 invert;
+ __u8 bitmask;
+};
+
+#endif /* _XT_IPVS_H */
diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig
index 5fb8efa..551b584 100644
--- a/net/netfilter/Kconfig
+++ b/net/netfilter/Kconfig
@@ -742,6 +742,16 @@ config NETFILTER_XT_MATCH_IPRANGE
If unsure, say M.
+config NETFILTER_XT_MATCH_IPVS
+ tristate '"ipvs" match support'
+ depends on IP_VS
+ depends on NETFILTER_ADVANCED
+ depends on NF_CONNTRACK
+ help
+ This option allows you to match against IPVS properties of a packet.
+
+ If unsure, say N.
+
config NETFILTER_XT_MATCH_LENGTH
tristate '"length" match support'
depends on NETFILTER_ADVANCED
diff --git a/net/netfilter/Makefile b/net/netfilter/Makefile
index 36ef8e6..4366c79 100644
--- a/net/netfilter/Makefile
+++ b/net/netfilter/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_NETFILTER_XT_MATCH_HASHLIMIT) += xt_hashlimit.o
obj-$(CONFIG_NETFILTER_XT_MATCH_HELPER) += xt_helper.o
obj-$(CONFIG_NETFILTER_XT_MATCH_HL) += xt_hl.o
obj-$(CONFIG_NETFILTER_XT_MATCH_IPRANGE) += xt_iprange.o
+obj-$(CONFIG_NETFILTER_XT_MATCH_IPVS) += xt_ipvs.o
obj-$(CONFIG_NETFILTER_XT_MATCH_LENGTH) += xt_length.o
obj-$(CONFIG_NETFILTER_XT_MATCH_LIMIT) += xt_limit.o
obj-$(CONFIG_NETFILTER_XT_MATCH_MAC) += xt_mac.o
diff --git a/net/netfilter/ipvs/ip_vs_proto.c b/net/netfilter/ipvs/ip_vs_proto.c
index 2d3d5e4..027f654 100644
--- a/net/netfilter/ipvs/ip_vs_proto.c
+++ b/net/netfilter/ipvs/ip_vs_proto.c
@@ -98,6 +98,7 @@ struct ip_vs_protocol * ip_vs_proto_get(unsigned short proto)
return NULL;
}
+EXPORT_SYMBOL(ip_vs_proto_get);
/*
diff --git a/net/netfilter/xt_ipvs.c b/net/netfilter/xt_ipvs.c
new file mode 100644
index 0000000..7a4d66d
--- /dev/null
+++ b/net/netfilter/xt_ipvs.c
@@ -0,0 +1,189 @@
+/*
+ * xt_ipvs - kernel module to match IPVS connection properties
+ *
+ * Author: Hannes Eder <heder@google.com>
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/spinlock.h>
+#include <linux/skbuff.h>
+#ifdef CONFIG_IP_VS_IPV6
+#include <net/ipv6.h>
+#endif
+#include <linux/ip_vs.h>
+#include <linux/types.h>
+#include <linux/netfilter/x_tables.h>
+#include <linux/netfilter/x_tables.h>
+#include <linux/netfilter/xt_ipvs.h>
+#include <net/netfilter/nf_conntrack.h>
+
+#include <net/ip_vs.h>
+
+MODULE_AUTHOR("Hannes Eder <heder@google.com>");
+MODULE_DESCRIPTION("Xtables: match IPVS connection properties");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("ipt_ipvs");
+MODULE_ALIAS("ip6t_ipvs");
+
+/* borrowed from xt_conntrack */
+static bool ipvs_mt_addrcmp(const union nf_inet_addr *kaddr,
+ const union nf_inet_addr *uaddr,
+ const union nf_inet_addr *umask,
+ unsigned int l3proto)
+{
+ if (l3proto == NFPROTO_IPV4)
+ return ((kaddr->ip ^ uaddr->ip) & umask->ip) == 0;
+#ifdef CONFIG_IP_VS_IPV6
+ else if (l3proto == NFPROTO_IPV6)
+ return ipv6_masked_addr_cmp(&kaddr->in6, &umask->in6,
+ &uaddr->in6) == 0;
+#endif
+ else
+ return false;
+}
+
+static bool
+ipvs_mt(const struct sk_buff *skb, struct xt_action_param *par)
+{
+ const struct xt_ipvs_mtinfo *data = par->matchinfo;
+ /* ipvs_mt_check ensures that family is only NFPROTO_IPV[46]. */
+ const u_int8_t family = par->family;
+ struct ip_vs_iphdr iph;
+ struct ip_vs_protocol *pp;
+ struct ip_vs_conn *cp;
+ bool match = true;
+
+ if (data->bitmask == XT_IPVS_IPVS_PROPERTY) {
+ match = skb->ipvs_property ^
+ !!(data->invert & XT_IPVS_IPVS_PROPERTY);
+ goto out;
+ }
+
+ /* other flags than XT_IPVS_IPVS_PROPERTY are set */
+ if (!skb->ipvs_property) {
+ match = false;
+ goto out;
+ }
+
+ ip_vs_fill_iphdr(family, skb_network_header(skb), &iph);
+
+ if (data->bitmask & XT_IPVS_PROTO)
+ if ((iph.protocol == data->l4proto) ^
+ !(data->invert & XT_IPVS_PROTO)) {
+ match = false;
+ goto out;
+ }
+
+ pp = ip_vs_proto_get(iph.protocol);
+ if (unlikely(!pp)) {
+ match = false;
+ goto out;
+ }
+
+ /*
+ * Check if the packet belongs to an existing entry
+ */
+ cp = pp->conn_out_get(family, skb, pp, &iph, iph.len, 1 /* inverse */);
+ if (unlikely(cp == NULL)) {
+ match = false;
+ goto out;
+ }
+
+ /*
+ * We found a connection, i.e. ct != 0, make sure to call
+ * __ip_vs_conn_put before returning. In our case jump to out_put_con.
+ */
+
+ if (data->bitmask & XT_IPVS_VPORT)
+ if ((cp->vport == data->vport) ^
+ !(data->invert & XT_IPVS_VPORT)) {
+ match = false;
+ goto out_put_cp;
+ }
+
+ if (data->bitmask & XT_IPVS_VPORTCTL)
+ if ((cp->control != NULL &&
+ cp->control->vport == data->vportctl) ^
+ !(data->invert & XT_IPVS_VPORTCTL)) {
+ match = false;
+ goto out_put_cp;
+ }
+
+ if (data->bitmask & XT_IPVS_DIR) {
+ enum ip_conntrack_info ctinfo;
+ struct nf_conn *ct = nf_ct_get(skb, &ctinfo);
+
+ if (ct == NULL || nf_ct_is_untracked(ct)) {
+ match = false;
+ goto out_put_cp;
+ }
+
+ if ((ctinfo >= IP_CT_IS_REPLY) ^
+ !!(data->invert & XT_IPVS_DIR)) {
+ match = false;
+ goto out_put_cp;
+ }
+ }
+
+ if (data->bitmask & XT_IPVS_METHOD)
+ if (((cp->flags & IP_VS_CONN_F_FWD_MASK) == data->fwd_method) ^
+ !(data->invert & XT_IPVS_METHOD)) {
+ match = false;
+ goto out_put_cp;
+ }
+
+ if (data->bitmask & XT_IPVS_VADDR) {
+ if (ipvs_mt_addrcmp(&cp->vaddr, &data->vaddr,
+ &data->vmask, family) ^
+ !(data->invert & XT_IPVS_VADDR)) {
+ match = false;
+ goto out_put_cp;
+ }
+ }
+
+out_put_cp:
+ __ip_vs_conn_put(cp);
+out:
+ pr_debug("match=%d\n", match);
+ return match;
+}
+
+static int ipvs_mt_check(const struct xt_mtchk_param *par)
+{
+ if (par->family != NFPROTO_IPV4
+#ifdef CONFIG_IP_VS_IPV6
+ && par->family != NFPROTO_IPV6
+#endif
+ ) {
+ pr_info("protocol family %u not supported\n", par->family);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct xt_match xt_ipvs_mt_reg __read_mostly = {
+ .name = "ipvs",
+ .revision = 0,
+ .family = NFPROTO_UNSPEC,
+ .match = ipvs_mt,
+ .checkentry = ipvs_mt_check,
+ .matchsize = XT_ALIGN(sizeof(struct xt_ipvs_mtinfo)),
+ .me = THIS_MODULE,
+};
+
+static int __init ipvs_mt_init(void)
+{
+ return xt_register_match(&xt_ipvs_mt_reg);
+}
+
+static void __exit ipvs_mt_exit(void)
+{
+ xt_unregister_match(&xt_ipvs_mt_reg);
+}
+
+module_init(ipvs_mt_init);
+module_exit(ipvs_mt_exit);
--
1.7.1
^ permalink raw reply related
* [PATCH 09/28] netfilter: add CHECKSUM target
From: kaber @ 2010-08-02 19:57 UTC (permalink / raw)
To: davem; +Cc: netfilter-devel, netdev
In-Reply-To: <1280779065-9333-1-git-send-email-kaber@trash.net>
From: Michael S. Tsirkin <mst@redhat.com>
This adds a `CHECKSUM' target, which can be used in the iptables mangle
table.
You can use this target to compute and fill in the checksum in
a packet that lacks a checksum. This is particularly useful,
if you need to work around old applications such as dhcp clients,
that do not work well with checksum offloads, but don't want to
disable checksum offload in your device.
The problem happens in the field with virtualized applications.
For reference, see Red Hat bz 605555, as well as
http://www.spinics.net/lists/kvm/msg37660.html
Typical expected use (helps old dhclient binary running in a VM):
iptables -A POSTROUTING -t mangle -p udp --dport bootpc \
-j CHECKSUM --checksum-fill
Includes fixes by Jan Engelhardt <jengelh@medozas.de>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Patrick McHardy <kaber@trash.net>
---
include/linux/netfilter/xt_CHECKSUM.h | 18 ++++++++
net/netfilter/Kconfig | 16 +++++++
net/netfilter/Makefile | 1 +
net/netfilter/xt_CHECKSUM.c | 70 +++++++++++++++++++++++++++++++++
4 files changed, 105 insertions(+), 0 deletions(-)
create mode 100644 include/linux/netfilter/xt_CHECKSUM.h
create mode 100644 net/netfilter/xt_CHECKSUM.c
diff --git a/include/linux/netfilter/xt_CHECKSUM.h b/include/linux/netfilter/xt_CHECKSUM.h
new file mode 100644
index 0000000..3b4fb77
--- /dev/null
+++ b/include/linux/netfilter/xt_CHECKSUM.h
@@ -0,0 +1,18 @@
+/* Header file for iptables ipt_CHECKSUM target
+ *
+ * (C) 2002 by Harald Welte <laforge@gnumonks.org>
+ * (C) 2010 Red Hat Inc
+ * Author: Michael S. Tsirkin <mst@redhat.com>
+ *
+ * This software is distributed under GNU GPL v2, 1991
+*/
+#ifndef _IPT_CHECKSUM_TARGET_H
+#define _IPT_CHECKSUM_TARGET_H
+
+#define XT_CHECKSUM_OP_FILL 0x01 /* fill in checksum in IP header */
+
+struct xt_CHECKSUM_info {
+ __u8 operation; /* bitset of operations */
+};
+
+#endif /* _IPT_CHECKSUM_TARGET_H */
diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig
index aa2f106..5fb8efa 100644
--- a/net/netfilter/Kconfig
+++ b/net/netfilter/Kconfig
@@ -326,6 +326,22 @@ config NETFILTER_XT_CONNMARK
comment "Xtables targets"
+config NETFILTER_XT_TARGET_CHECKSUM
+ tristate "CHECKSUM target support"
+ depends on IP_NF_MANGLE || IP6_NF_MANGLE
+ depends on NETFILTER_ADVANCED
+ ---help---
+ This option adds a `CHECKSUM' target, which can be used in the iptables mangle
+ table.
+
+ You can use this target to compute and fill in the checksum in
+ a packet that lacks a checksum. This is particularly useful,
+ if you need to work around old applications such as dhcp clients,
+ that do not work well with checksum offloads, but don't want to disable
+ checksum offload in your device.
+
+ To compile it as a module, choose M here. If unsure, say N.
+
config NETFILTER_XT_TARGET_CLASSIFY
tristate '"CLASSIFY" target support'
depends on NETFILTER_ADVANCED
diff --git a/net/netfilter/Makefile b/net/netfilter/Makefile
index e28420a..36ef8e6 100644
--- a/net/netfilter/Makefile
+++ b/net/netfilter/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_NETFILTER_XT_MARK) += xt_mark.o
obj-$(CONFIG_NETFILTER_XT_CONNMARK) += xt_connmark.o
# targets
+obj-$(CONFIG_NETFILTER_XT_TARGET_CHECKSUM) += xt_CHECKSUM.o
obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIFY) += xt_CLASSIFY.o
obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o
obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o
diff --git a/net/netfilter/xt_CHECKSUM.c b/net/netfilter/xt_CHECKSUM.c
new file mode 100644
index 0000000..0f642ef
--- /dev/null
+++ b/net/netfilter/xt_CHECKSUM.c
@@ -0,0 +1,70 @@
+/* iptables module for the packet checksum mangling
+ *
+ * (C) 2002 by Harald Welte <laforge@netfilter.org>
+ * (C) 2010 Red Hat, Inc.
+ *
+ * Author: Michael S. Tsirkin <mst@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include <linux/module.h>
+#include <linux/skbuff.h>
+
+#include <linux/netfilter/x_tables.h>
+#include <linux/netfilter/xt_CHECKSUM.h>
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Michael S. Tsirkin <mst@redhat.com>");
+MODULE_DESCRIPTION("Xtables: checksum modification");
+MODULE_ALIAS("ipt_CHECKSUM");
+MODULE_ALIAS("ip6t_CHECKSUM");
+
+static unsigned int
+checksum_tg(struct sk_buff *skb, const struct xt_action_param *par)
+{
+ if (skb->ip_summed == CHECKSUM_PARTIAL)
+ skb_checksum_help(skb);
+
+ return XT_CONTINUE;
+}
+
+static int checksum_tg_check(const struct xt_tgchk_param *par)
+{
+ const struct xt_CHECKSUM_info *einfo = par->targinfo;
+
+ if (einfo->operation & ~XT_CHECKSUM_OP_FILL) {
+ pr_info("unsupported CHECKSUM operation %x\n", einfo->operation);
+ return -EINVAL;
+ }
+ if (!einfo->operation) {
+ pr_info("no CHECKSUM operation enabled\n");
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static struct xt_target checksum_tg_reg __read_mostly = {
+ .name = "CHECKSUM",
+ .family = NFPROTO_UNSPEC,
+ .target = checksum_tg,
+ .targetsize = sizeof(struct xt_CHECKSUM_info),
+ .table = "mangle",
+ .checkentry = checksum_tg_check,
+ .me = THIS_MODULE,
+};
+
+static int __init checksum_tg_init(void)
+{
+ return xt_register_target(&checksum_tg_reg);
+}
+
+static void __exit checksum_tg_exit(void)
+{
+ xt_unregister_target(&checksum_tg_reg);
+}
+
+module_init(checksum_tg_init);
+module_exit(checksum_tg_exit);
--
1.7.1
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox