* Re: [PATCH net-next 00/10] tg3: Bugfixes and enhancements
From: David Miller @ 2010-11-24 19:06 UTC (permalink / raw)
To: mcarlson; +Cc: netdev, andy
In-Reply-To: <1290623514-18193-1-git-send-email-mcarlson@broadcom.com>
From: "Matt Carlson" <mcarlson@broadcom.com>
Date: Wed, 24 Nov 2010 10:31:44 -0800
> This patchset applies some bugfixes and adds a few performance features
> for the 5719.
All applied, thanks a lot.
^ permalink raw reply
* Re: [PATCH 3/8] ethoc: enable interrupts after napi_complete
From: Laurent Chavey @ 2010-11-24 18:45 UTC (permalink / raw)
To: Jonas Bonn; +Cc: netdev, Adam Edvardsson
In-Reply-To: <1290606058-26703-4-git-send-email-jonas@southpole.se>
ethoc_rx can return a value == budget
if work_done == budget, interrupt
are not re-enabled
in net_rx_action, the check for budget <= 0 will
cause the poll loop to not be called, but will removed
the callback to be removed from the poll_list.
could this result in interrupt not being re-enabled ?
^ permalink raw reply
* [PATCH net-next 04/10] tg3: Fix 5719 internal FIFO overflow problem
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
Under load, there an internal FIFO can overflow on the 5719. The fix is
to scale back the PCIe maximum read request size based on the current
link speed and width.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 44 +++++++++++++++++++++++++++++++++++++++++---
drivers/net/tg3.h | 1 +
2 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 2624d71..226e60d 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -6985,7 +6985,7 @@ static void tg3_restore_pci_state(struct tg3 *tp)
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785) {
if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)
- pcie_set_readrq(tp->pdev, 4096);
+ pcie_set_readrq(tp->pdev, tp->pcie_readrq);
else {
pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
tp->pci_cacheline_sz);
@@ -7179,7 +7179,7 @@ static int tg3_chip_reset(struct tg3 *tp)
tp->pcie_cap + PCI_EXP_DEVCTL,
val16);
- pcie_set_readrq(tp->pdev, 4096);
+ pcie_set_readrq(tp->pdev, tp->pcie_readrq);
/* Clear error status */
pci_write_config_word(tp->pdev,
@@ -13366,7 +13366,45 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
- pcie_set_readrq(tp->pdev, 4096);
+ tp->pcie_readrq = 4096;
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
+ u16 word;
+
+ pci_read_config_word(tp->pdev,
+ tp->pcie_cap + PCI_EXP_LNKSTA,
+ &word);
+ switch (word & PCI_EXP_LNKSTA_CLS) {
+ case PCI_EXP_LNKSTA_CLS_2_5GB:
+ word &= PCI_EXP_LNKSTA_NLW;
+ word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
+ switch (word) {
+ case 2:
+ tp->pcie_readrq = 2048;
+ break;
+ case 4:
+ tp->pcie_readrq = 1024;
+ break;
+ }
+ break;
+
+ case PCI_EXP_LNKSTA_CLS_5_0GB:
+ word &= PCI_EXP_LNKSTA_NLW;
+ word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
+ switch (word) {
+ case 1:
+ tp->pcie_readrq = 2048;
+ break;
+ case 2:
+ tp->pcie_readrq = 1024;
+ break;
+ case 4:
+ tp->pcie_readrq = 512;
+ break;
+ }
+ }
+ }
+
+ pcie_set_readrq(tp->pdev, tp->pcie_readrq);
pci_read_config_word(tp->pdev,
tp->pcie_cap + PCI_EXP_LNKCTL,
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 06a4e7e..4107036 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2948,6 +2948,7 @@ struct tg3 {
int pcix_cap;
int pcie_cap;
};
+ int pcie_readrq;
struct mii_bus *mdio_bus;
int mdio_irq[PHY_MAX_ADDR];
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 02/10] tg3: Assign correct tx margin for 5719
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
Commit d309a46e42542223946d3a9e4e239fdc945cb53e, entitled
"tg3: 5719: Prevent tx data corruption", was supposed to contain the tx
margin adjustment but it looks like it somehow was omitted. This patch
fixes the problem.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 4 ++++
drivers/net/tg3.h | 2 ++
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index ca6b3cb..4dc0756 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -8206,6 +8206,10 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
(tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
val = tr32(TG3_RDMA_RSRVCTRL_REG);
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
+ val &= ~TG3_RDMA_RSRVCTRL_TXMRGN_MASK;
+ val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B;
+ }
tw32(TG3_RDMA_RSRVCTRL_REG,
val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX);
}
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 4a19748..06a4e7e 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1327,6 +1327,8 @@
#define TG3_RDMA_RSRVCTRL_REG 0x00004900
#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004
+#define TG3_RDMA_RSRVCTRL_TXMRGN_320B 0x28000000
+#define TG3_RDMA_RSRVCTRL_TXMRGN_MASK 0xffe00000
/* 0x4904 --> 0x4910 unused */
#define TG3_LSO_RD_DMA_CRPTEN_CTRL 0x00004910
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 08/10] tg3: use dma_alloc_coherent() instead of pci_alloc_consistent()
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson, Eric Dumazet
Using dma_alloc_coherent() permits to use GFP_KERNEL allocations instead
of GFP_ATOMIC ones. Its better when a machine is out of memory, because
this allows driver to sleep to get its memory and succeed its init,
especially when allocating high order pages.
Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 73 +++++++++++++++++++++++++++++-----------------------
1 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 75ebebc..3079e1f 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -6337,13 +6337,13 @@ static void tg3_rx_prodring_fini(struct tg3 *tp,
kfree(tpr->rx_jmb_buffers);
tpr->rx_jmb_buffers = NULL;
if (tpr->rx_std) {
- pci_free_consistent(tp->pdev, TG3_RX_STD_RING_BYTES(tp),
- tpr->rx_std, tpr->rx_std_mapping);
+ dma_free_coherent(&tp->pdev->dev, TG3_RX_STD_RING_BYTES(tp),
+ tpr->rx_std, tpr->rx_std_mapping);
tpr->rx_std = NULL;
}
if (tpr->rx_jmb) {
- pci_free_consistent(tp->pdev, TG3_RX_JMB_RING_BYTES(tp),
- tpr->rx_jmb, tpr->rx_jmb_mapping);
+ dma_free_coherent(&tp->pdev->dev, TG3_RX_JMB_RING_BYTES(tp),
+ tpr->rx_jmb, tpr->rx_jmb_mapping);
tpr->rx_jmb = NULL;
}
}
@@ -6356,8 +6356,10 @@ static int tg3_rx_prodring_init(struct tg3 *tp,
if (!tpr->rx_std_buffers)
return -ENOMEM;
- tpr->rx_std = pci_alloc_consistent(tp->pdev, TG3_RX_STD_RING_BYTES(tp),
- &tpr->rx_std_mapping);
+ tpr->rx_std = dma_alloc_coherent(&tp->pdev->dev,
+ TG3_RX_STD_RING_BYTES(tp),
+ &tpr->rx_std_mapping,
+ GFP_KERNEL);
if (!tpr->rx_std)
goto err_out;
@@ -6368,9 +6370,10 @@ static int tg3_rx_prodring_init(struct tg3 *tp,
if (!tpr->rx_jmb_buffers)
goto err_out;
- tpr->rx_jmb = pci_alloc_consistent(tp->pdev,
- TG3_RX_JMB_RING_BYTES(tp),
- &tpr->rx_jmb_mapping);
+ tpr->rx_jmb = dma_alloc_coherent(&tp->pdev->dev,
+ TG3_RX_JMB_RING_BYTES(tp),
+ &tpr->rx_jmb_mapping,
+ GFP_KERNEL);
if (!tpr->rx_jmb)
goto err_out;
}
@@ -6489,7 +6492,7 @@ static void tg3_free_consistent(struct tg3 *tp)
struct tg3_napi *tnapi = &tp->napi[i];
if (tnapi->tx_ring) {
- pci_free_consistent(tp->pdev, TG3_TX_RING_BYTES,
+ dma_free_coherent(&tp->pdev->dev, TG3_TX_RING_BYTES,
tnapi->tx_ring, tnapi->tx_desc_mapping);
tnapi->tx_ring = NULL;
}
@@ -6498,25 +6501,26 @@ static void tg3_free_consistent(struct tg3 *tp)
tnapi->tx_buffers = NULL;
if (tnapi->rx_rcb) {
- pci_free_consistent(tp->pdev, TG3_RX_RCB_RING_BYTES(tp),
- tnapi->rx_rcb,
- tnapi->rx_rcb_mapping);
+ dma_free_coherent(&tp->pdev->dev,
+ TG3_RX_RCB_RING_BYTES(tp),
+ tnapi->rx_rcb,
+ tnapi->rx_rcb_mapping);
tnapi->rx_rcb = NULL;
}
tg3_rx_prodring_fini(tp, &tnapi->prodring);
if (tnapi->hw_status) {
- pci_free_consistent(tp->pdev, TG3_HW_STATUS_SIZE,
- tnapi->hw_status,
- tnapi->status_mapping);
+ dma_free_coherent(&tp->pdev->dev, TG3_HW_STATUS_SIZE,
+ tnapi->hw_status,
+ tnapi->status_mapping);
tnapi->hw_status = NULL;
}
}
if (tp->hw_stats) {
- pci_free_consistent(tp->pdev, sizeof(struct tg3_hw_stats),
- tp->hw_stats, tp->stats_mapping);
+ dma_free_coherent(&tp->pdev->dev, sizeof(struct tg3_hw_stats),
+ tp->hw_stats, tp->stats_mapping);
tp->hw_stats = NULL;
}
}
@@ -6529,9 +6533,10 @@ static int tg3_alloc_consistent(struct tg3 *tp)
{
int i;
- tp->hw_stats = pci_alloc_consistent(tp->pdev,
- sizeof(struct tg3_hw_stats),
- &tp->stats_mapping);
+ tp->hw_stats = dma_alloc_coherent(&tp->pdev->dev,
+ sizeof(struct tg3_hw_stats),
+ &tp->stats_mapping,
+ GFP_KERNEL);
if (!tp->hw_stats)
goto err_out;
@@ -6541,9 +6546,10 @@ static int tg3_alloc_consistent(struct tg3 *tp)
struct tg3_napi *tnapi = &tp->napi[i];
struct tg3_hw_status *sblk;
- tnapi->hw_status = pci_alloc_consistent(tp->pdev,
- TG3_HW_STATUS_SIZE,
- &tnapi->status_mapping);
+ tnapi->hw_status = dma_alloc_coherent(&tp->pdev->dev,
+ TG3_HW_STATUS_SIZE,
+ &tnapi->status_mapping,
+ GFP_KERNEL);
if (!tnapi->hw_status)
goto err_out;
@@ -6564,9 +6570,10 @@ static int tg3_alloc_consistent(struct tg3 *tp)
if (!tnapi->tx_buffers)
goto err_out;
- tnapi->tx_ring = pci_alloc_consistent(tp->pdev,
- TG3_TX_RING_BYTES,
- &tnapi->tx_desc_mapping);
+ tnapi->tx_ring = dma_alloc_coherent(&tp->pdev->dev,
+ TG3_TX_RING_BYTES,
+ &tnapi->tx_desc_mapping,
+ GFP_KERNEL);
if (!tnapi->tx_ring)
goto err_out;
}
@@ -6599,9 +6606,10 @@ static int tg3_alloc_consistent(struct tg3 *tp)
if (!i && (tp->tg3_flags3 & TG3_FLG3_ENABLE_RSS))
continue;
- tnapi->rx_rcb = pci_alloc_consistent(tp->pdev,
- TG3_RX_RCB_RING_BYTES(tp),
- &tnapi->rx_rcb_mapping);
+ tnapi->rx_rcb = dma_alloc_coherent(&tp->pdev->dev,
+ TG3_RX_RCB_RING_BYTES(tp),
+ &tnapi->rx_rcb_mapping,
+ GFP_KERNEL);
if (!tnapi->rx_rcb)
goto err_out;
@@ -14208,7 +14216,8 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
u32 *buf, saved_dma_rwctrl;
int ret = 0;
- buf = pci_alloc_consistent(tp->pdev, TEST_BUFFER_SIZE, &buf_dma);
+ buf = dma_alloc_coherent(&tp->pdev->dev, TEST_BUFFER_SIZE,
+ &buf_dma, GFP_KERNEL);
if (!buf) {
ret = -ENOMEM;
goto out_nofree;
@@ -14392,7 +14401,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
}
out:
- pci_free_consistent(tp->pdev, TEST_BUFFER_SIZE, buf, buf_dma);
+ dma_free_coherent(&tp->pdev->dev, TEST_BUFFER_SIZE, buf, buf_dma);
out_nofree:
return ret;
}
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 03/10] tg3: Always turn on APE features in mac_mode reg
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
The APE needs certain bits in the mac_mode register to be enabled for
traffic to flow correctly. This patch changes the code to always enable
these bits in the presence of the APE.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 37 ++++++++++++++++++-------------------
1 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 4dc0756..2624d71 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -2728,12 +2728,10 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)))
mac_mode |= MAC_MODE_KEEP_FRAME_IN_WOL;
- if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
- mac_mode |= tp->mac_mode &
- (MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN);
- if (mac_mode & MAC_MODE_APE_TX_EN)
- mac_mode |= MAC_MODE_TDE_ENABLE;
- }
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
+ mac_mode |= MAC_MODE_APE_TX_EN |
+ MAC_MODE_APE_RX_EN |
+ MAC_MODE_TDE_ENABLE;
tw32_f(MAC_MODE, mac_mode);
udelay(100);
@@ -7222,19 +7220,21 @@ static int tg3_chip_reset(struct tg3 *tp)
tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl);
}
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
+ tp->mac_mode = MAC_MODE_APE_TX_EN |
+ MAC_MODE_APE_RX_EN |
+ MAC_MODE_TDE_ENABLE;
+
if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
- tp->mac_mode = MAC_MODE_PORT_MODE_TBI;
- tw32_f(MAC_MODE, tp->mac_mode);
+ tp->mac_mode |= MAC_MODE_PORT_MODE_TBI;
+ val = tp->mac_mode;
} else if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) {
- tp->mac_mode = MAC_MODE_PORT_MODE_GMII;
- tw32_f(MAC_MODE, tp->mac_mode);
- } else if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
- tp->mac_mode &= (MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN);
- if (tp->mac_mode & MAC_MODE_APE_TX_EN)
- tp->mac_mode |= MAC_MODE_TDE_ENABLE;
- tw32_f(MAC_MODE, tp->mac_mode);
+ tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
+ val = tp->mac_mode;
} else
- tw32_f(MAC_MODE, 0);
+ val = 0;
+
+ tw32_f(MAC_MODE, val);
udelay(40);
tg3_ape_unlock(tp, TG3_APE_LOCK_GRC);
@@ -8287,7 +8287,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
}
if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
- tp->mac_mode &= MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
+ tp->mac_mode = MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
else
tp->mac_mode = 0;
tp->mac_mode |= MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE |
@@ -13729,8 +13729,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
/* Preserve the APE MAC_MODE bits */
if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
- tp->mac_mode = tr32(MAC_MODE) |
- MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
+ tp->mac_mode = MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
else
tp->mac_mode = TG3_DEF_MAC_MODE;
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 07/10] tg3: Reenable TSS for 5719
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
All TSS bugs have been fixed in the 5719. This patch reenables the
feature.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 4fa8ee3..75ebebc 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -9037,8 +9037,14 @@ static bool tg3_enable_msix(struct tg3 *tp)
pci_disable_msix(tp->pdev);
return false;
}
- if (tp->irq_cnt > 1)
+
+ if (tp->irq_cnt > 1) {
tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS;
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
+ tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS;
+ netif_set_real_num_tx_queues(tp->dev, tp->irq_cnt - 1);
+ }
+ }
return true;
}
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 10/10] tg3: Remove tg3_config_info definition
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This structure isn't used anywhere in the driver.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.h | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 2938d18..59b0e09 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2564,10 +2564,6 @@ struct ring_info {
DEFINE_DMA_UNMAP_ADDR(mapping);
};
-struct tg3_config_info {
- u32 flags;
-};
-
struct tg3_link_config {
/* Describes what we're trying to get. */
u32 advertising;
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 09/10] tg3: Enable phy APD for 5717 and later asic revs
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch enables the gphy autopowerdown feature in the phy for all
new devices that support it.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 3079e1f..afb79db 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -12431,8 +12431,9 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
if (cfg2 & (1 << 18))
tp->phy_flags |= TG3_PHYFLG_SERDES_PREEMPHASIS;
- if (((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
- GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX)) &&
+ if (((tp->tg3_flags3 & TG3_FLG3_5717_PLUS) ||
+ ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
+ GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX))) &&
(cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN))
tp->phy_flags |= TG3_PHYFLG_ENABLE_APD;
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 01/10] tg3: Apply 10Mbps fix to all 57765 revisions
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
Commit a977dbe8445b8a81d6127c4aa9112a2c29a1a008, entitled
"tg3: Reduce 57765 core clock when link at 10Mbps" needs to be applied
to all revisions of the 57765 asic rev, not just the A0 revision.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 21 ++++++++++++---------
1 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 30ccbb6..ca6b3cb 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7860,18 +7860,21 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tw32(GRC_MODE, grc_mode);
}
- if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0) {
- u32 grc_mode = tr32(GRC_MODE);
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
+ if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0) {
+ u32 grc_mode = tr32(GRC_MODE);
- /* Access the lower 1K of PL PCIE block registers. */
- val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK;
- tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL);
+ /* Access the lower 1K of PL PCIE block registers. */
+ val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK;
+ tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL);
- val = tr32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL5);
- tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL5,
- val | TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ);
+ val = tr32(TG3_PCIE_TLDLPL_PORT +
+ TG3_PCIE_PL_LO_PHYCTL5);
+ tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL5,
+ val | TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ);
- tw32(GRC_MODE, grc_mode);
+ tw32(GRC_MODE, grc_mode);
+ }
val = tr32(TG3_CPMU_LSPD_10MB_CLK);
val &= ~CPMU_LSPD_10MB_MACCLK_MASK;
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 00/10] tg3: Bugfixes and enhancements
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patchset applies some bugfixes and adds a few performance features
for the 5719.
^ permalink raw reply
* [PATCH net-next 05/10] tg3: Reorg tg3_napi members
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
This patch reorders and realigns the tg3_napi members for a ~3-4%
performance improvement on small packet performance tests.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.h | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 4107036..2938d18 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2715,17 +2715,17 @@ struct tg3_napi {
u32 last_irq_tag;
u32 int_mbox;
u32 coal_now;
- u32 tx_prod;
- u32 tx_cons;
- u32 tx_pending;
- u32 prodmbox;
- u32 consmbox;
+ u32 consmbox ____cacheline_aligned;
u32 rx_rcb_ptr;
u16 *rx_rcb_prod_idx;
struct tg3_rx_prodring_set prodring;
-
struct tg3_rx_buffer_desc *rx_rcb;
+
+ u32 tx_prod ____cacheline_aligned;
+ u32 tx_cons;
+ u32 tx_pending;
+ u32 prodmbox;
struct tg3_tx_buffer_desc *tx_ring;
struct ring_info *tx_buffers;
--
1.7.2.2
^ permalink raw reply related
* [PATCH net-next 06/10] tg3: Enable mult rd DMA engine on 5719
From: Matt Carlson @ 2010-11-24 18:31 UTC (permalink / raw)
To: davem; +Cc: netdev, andy, mcarlson
The multiple DMA read engine bugs have been fixed on the 5719. This
patch reenables support for this feature.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/tg3.c | 3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 226e60d..4fa8ee3 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -8165,8 +8165,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB |
RDMAC_MODE_LNGREAD_ENAB);
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
--
1.7.2.2
^ permalink raw reply related
* Re: [PATCH] ipv6: add special mode forwarding=2 to send RS while configured as router
From: Daniel Roesen @ 2010-11-24 18:03 UTC (permalink / raw)
To: netdev, davem, yoshfuji
In-Reply-To: <20100903130420.GB28460@bombadil.infradead.org>
Hi,
On Fri, Sep 03, 2010 at 09:04:20AM -0400, Thomas Graf wrote:
> Similar to accepting router advertisement, the IPv6 stack does not send router
> solicitations if forwarding is enabled.
>
> This patch enables this behavior to be overruled by setting forwarding to the
> special value 2.
Wouldn't it be more elegant to use accept_ra=2 as trigger instead of a new special
value for the forwarding option?
Best regards,
Daniel
--
CLUE-RIPE -- Jabber: dr@cluenet.de -- dr@IRCnet -- PGP: 0xA85C8AA0
^ permalink raw reply
* Re: [PATCH 2/3] econet: Move to staging
From: Greg KH @ 2010-11-24 18:04 UTC (permalink / raw)
To: Ben Hutchings; +Cc: David Miller, netdev, devel, Debian kernel maintainers
In-Reply-To: <1290484348.6770.1329.camel@localhost>
On Tue, Nov 23, 2010 at 03:52:28AM +0000, Ben Hutchings wrote:
> Recent review has revealed several bugs in obscure protocol
> implementations that can be exploited by local users for denial of
> service or privilege escalation.
>
> The econet protocol (PF_ECONET) is unmaintained. There appear to be
> no published applications for it, and it has never progressed beyond
> 'experimental' status.
>
> This protocol generally should not be enabled by distributions, since
> the cost of a security flaw affecting all installed systems presumably
> outweighs the benefit to the few (if any) legitimate users.
>
> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
> ---
> drivers/staging/Kconfig | 2 ++
> net/Kconfig | 1 -
> 2 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
> index dd94cb2..a9dd984 100644
> --- a/drivers/staging/Kconfig
> +++ b/drivers/staging/Kconfig
> @@ -177,5 +177,7 @@ source "drivers/staging/speakup/Kconfig"
>
> source "net/decnet/Kconfig"
>
> +source "net/econet/Kconfig"
> +
> endif # !STAGING_EXCLUDE_BUILD
> endif # STAGING
> diff --git a/net/Kconfig b/net/Kconfig
> index 9e4fc29..059c9f1 100644
> --- a/net/Kconfig
> +++ b/net/Kconfig
> @@ -205,7 +205,6 @@ source "net/ipx/Kconfig"
> source "drivers/net/appletalk/Kconfig"
> source "net/x25/Kconfig"
> source "net/lapb/Kconfig"
> -source "net/econet/Kconfig"
No, please move the code itself to drivers/staging/ so we know to then
delete it after a few kernel versions.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH 4/8] ethoc: prevent overflow of rx counter
From: Eric Dumazet @ 2010-11-24 17:34 UTC (permalink / raw)
To: Jonas Bonn; +Cc: netdev
In-Reply-To: <1290606058-26703-5-git-send-email-jonas@southpole.se>
Le mercredi 24 novembre 2010 à 14:40 +0100, Jonas Bonn a écrit :
> Rewind cur_rx to prevent it from overflowing.
>
> Signed-off-by: Jonas Bonn <jonas@southpole.se>
> ---
> drivers/net/ethoc.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
> index 53c03f2..7d1b5d8 100644
> --- a/drivers/net/ethoc.c
> +++ b/drivers/net/ethoc.c
> @@ -408,6 +408,9 @@ static int ethoc_rx(struct net_device *dev, int limit)
> struct ethoc *priv = netdev_priv(dev);
> int count;
>
> + /* Prevent overflow of priv->cur_rx by rewinding it */
> + priv->cur_rx = priv->cur_rx % priv->num_rx;
> +
> for (count = 0; count < limit; ++count) {
> unsigned int entry;
> struct ethoc_bd bd;
Hmm... please try following code instead (no divides)
diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
index c5a2fe0..591b698 100644
--- a/drivers/net/ethoc.c
+++ b/drivers/net/ethoc.c
@@ -413,7 +413,7 @@ static int ethoc_rx(struct net_device *dev, int limit)
unsigned int entry;
struct ethoc_bd bd;
- entry = priv->num_tx + (priv->cur_rx % priv->num_rx);
+ entry = priv->num_tx + priv->cur_rx;
ethoc_read_bd(priv, entry, &bd);
if (bd.stat & RX_BD_EMPTY)
break;
@@ -446,7 +446,8 @@ static int ethoc_rx(struct net_device *dev, int limit)
bd.stat &= ~RX_BD_STATS;
bd.stat |= RX_BD_EMPTY;
ethoc_write_bd(priv, entry, &bd);
- priv->cur_rx++;
+ if (++priv->cur_rx == priv->num_rx)
+ priv->cur_rx = 0;
}
return count;
^ permalink raw reply related
* Re: pull request: wireless-2.6 2010-11-23
From: David Miller @ 2010-11-24 17:22 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, netdev, linux-kernel
In-Reply-To: <20101123210518.GB2372@tuxdriver.com>
From: "John W. Linville" <linville@tuxdriver.com>
Date: Tue, 23 Nov 2010 16:05:19 -0500
> Dave,
>
> Here are some fixes intended for 2.6.37 -- a collection of one-liners! :-)
>
> The carl9170 patch fixes a NULL pointer dereference. The b43-pci-bridge
> one just adds a device ID. The ath9k patch fixes a timeout that also
> triggers a warning in dmesg. Finally, the b43 patch fixes a resource
> leak on an error path.
>
> Please let me know if there are problems!
Pulled, thanks John.
^ permalink raw reply
* Re: [PATCH] af_unix: limit unix_tot_inflight
From: David Miller @ 2010-11-24 17:14 UTC (permalink / raw)
To: eric.dumazet; +Cc: andi, vegard.nossum, linux-kernel, akpm, eugene, netdev
In-Reply-To: <1290611906.3464.66.camel@edumazet-laptop>
From: Eric Dumazet <eric.dumazet@gmail.com>
Date: Wed, 24 Nov 2010 16:18:26 +0100
> 4) If we autotune a limit at boot time as a lowmem percentage, some guys
> then want a /proc/sys/net/core/max_unix_inflight sysctl , just for
> completeness. One extra sysctl...
>
> I cant see valid uses but programs designed to stress our stack.
I agree completely with Eric's analysis.
I would even consider setting this threshold lower. :-)
Anyways, consider Eric's patch applied.
^ permalink raw reply
* Re: [PATCH] infiniband: remove dev_base_lock use
From: David Miller @ 2010-11-24 17:09 UTC (permalink / raw)
To: rdreier-FYB4Gu1CFyUAvxtiuMwx3w
Cc: eric.dumazet-Re5JQEeQqe8AvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA, rolandd-FYB4Gu1CFyUAvxtiuMwx3w,
sean.hefty-ral2JQCrhuEAvxtiuMwx3w,
hal.rosenstock-Re5JQEeQqe8AvxtiuMwx3w,
linux-rdma-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <adalj4ihcsa.fsf-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org>
From: Roland Dreier <rdreier-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org>
Date: Wed, 24 Nov 2010 09:06:13 -0800
> > David, it seems no infiniband guy commented this patch, could you take
> > it in your tree ?
>
> Sorry... in any case this looks fine. If all prerequisites are upstream
> then I'm happy to take through my tree, but if Dave wants to take it:
>
> Acked-by: Roland Dreier <rolandd-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org>
I'd rather take it because it opens up some further simplifications
Eric wants to perform.
So I'll apply this to net-next-2.6, thanks for the review Roland.
--
To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH net-next-2.6 8/17 v3] can: EG20T PCH: Change Copyright and module description
From: David Miller @ 2010-11-24 17:07 UTC (permalink / raw)
To: mkl-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, wg-5Yr1BZd7O62+XT7JhA+gdA,
joel.clark-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, chripell-VaTbYqLCNhc,
qi.wang-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <4CED14B0.9060208-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
From: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Date: Wed, 24 Nov 2010 14:35:44 +0100
> On 11/24/2010 01:19 PM, Tomoya MORINAGA wrote:
>> Currently, Copyright and module description are not formal.
>
> As David pointed out in an older version of this series, this patch does
> more than the subject indicates. Please fix.
Many patches still have this problem.
I'm getting really upset about this.
Look, it's simple. Make sure your patch commit message describes
everything the patch is doing.
And in many of the cases where the commit message is not accurate, it
is actually the cases that the changes not documented are totally
unrelated and need to be split up into a different change.
I strongly suspect that the pch_can folks became extremely frustrated
doing these patch split-ups. They find them pointless and they feel
that we're putting an unnecessary burdon upon them, and are having
trouble understanding why we require this and why it's so incredibly
important.
So they worked on this task with the most minimum of effort and care,
which is extremely unfortunate.
We will continue to push back until they get things correct, so all
they do by being lazy and careless is make more work for everyone,
including themselves.
^ permalink raw reply
* Re: [PATCH] infiniband: remove dev_base_lock use
From: Roland Dreier @ 2010-11-24 17:06 UTC (permalink / raw)
To: Eric Dumazet
Cc: David Miller, netdev, Roland Dreier, Sean Hefty, Hal Rosenstock,
linux-rdma-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1290606468.3464.38.camel@edumazet-laptop>
> David, it seems no infiniband guy commented this patch, could you take
> it in your tree ?
Sorry... in any case this looks fine. If all prerequisites are upstream
then I'm happy to take through my tree, but if Dave wants to take it:
Acked-by: Roland Dreier <rolandd-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org>
--
To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH net-next-2.6 1/17 v2] can: EG20T PCH: Separate Interface Register(IF1/IF2)
From: David Miller @ 2010-11-24 16:57 UTC (permalink / raw)
To: mkl-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, wg-5Yr1BZd7O62+XT7JhA+gdA,
joel.clark-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, chripell-VaTbYqLCNhc,
qi.wang-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <20101124.085554.193704043.davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
From: David Miller <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
Date: Wed, 24 Nov 2010 08:55:54 -0800 (PST)
> From: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Date: Wed, 24 Nov 2010 11:44:21 +0100
>
>> On 11/24/2010 08:33 AM, Tomoya MORINAGA wrote:
>>> Separate interface register from whole of register structure.
>>> CAN register of Intel PCH EG20T has 2 sets of interface register.
>>> To reduce whole of code size, separate interface register.
>>> As a result, the number of function also can be reduced.
>>
>> I failed to apply your series to david's net-2.6/master. Please resubmit.
>
> It applies to net-next-2.6 since that is where I applied his previous
> two patches.
And geese Marc, I just noticed he even said "net-next-2.6" explicitly
in the subject lines.... :-/
^ permalink raw reply
* Re: [PATCH net-next-2.6 1/17 v2] can: EG20T PCH: Separate Interface Register(IF1/IF2)
From: David Miller @ 2010-11-24 16:55 UTC (permalink / raw)
To: mkl-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, wg-5Yr1BZd7O62+XT7JhA+gdA,
joel.clark-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w, chripell-VaTbYqLCNhc,
qi.wang-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <4CECEC85.1050009-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
From: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Date: Wed, 24 Nov 2010 11:44:21 +0100
> On 11/24/2010 08:33 AM, Tomoya MORINAGA wrote:
>> Separate interface register from whole of register structure.
>> CAN register of Intel PCH EG20T has 2 sets of interface register.
>> To reduce whole of code size, separate interface register.
>> As a result, the number of function also can be reduced.
>
> I failed to apply your series to david's net-2.6/master. Please resubmit.
It applies to net-next-2.6 since that is where I applied his previous
two patches.
^ permalink raw reply
* Re: [PATCH] arch/tile: fix rwlock so would-be write lockers don't block new readers
From: Cypher Wu @ 2010-11-24 16:37 UTC (permalink / raw)
To: Chris Metcalf; +Cc: linux-kernel, Américo Wang, Eric Dumazet, netdev
In-Reply-To: <4CED1C87.7010500@tilera.com>
2010/11/24 Chris Metcalf <cmetcalf@tilera.com>:
> On 11/23/2010 9:53 PM, Cypher Wu wrote:
>> 2010/11/24 Chris Metcalf <cmetcalf@tilera.com>:
>>> On 11/22/2010 8:36 PM, Cypher Wu wrote:
>>>> Say, if core A try to write_lock() rwlock and current_ticket_ is 0 and
>>>> it write next_ticket_ to 1, when it processing the lock, core B try to
>>>> write_lock() again and write next_ticket_ to 2, then when A
>>>> write_unlock() it seen that (current_ticket_+1) is not equal to
>>>> next_ticket_, so it increment current_ticket_, and core B get the
>>>> lock. If core A try write_lock again before core B write_unlock, it
>>>> will increment next_ticket_ to 3. And so on.
>>>> This may rarely happened, I've tested it yesterday for several hours
>>>> it goes very well under pressure.
>>> This should be OK when it happens (other than starving out the readers, but
>>> that was the decision made by doing a ticket lock in the first place).
>>> Even if we wrap around 255 back to zero on the tickets, the ticket queue
>>> will work correctly. The key is not to need more than 256 concurrent write
>>> lock waiters, which we don't.
>> If we count on that, should we make 'my_ticket_ = (val >>
>> WR_NEXT_SHIFT) & WR_MASK;'
>
> No, it's OK. As the comment for the declaration of "my_ticket_" says, the
> trailing underscore reminds us that the high bits are garbage, and when we
> use the value, we do the mask: "((my_ticket_ - curr_) & WR_MASK)". It
> turned out doing the mask here made the most sense from a code-generation
> point of view, partly just because of the possibility of the counter wrapping.
>
> --
> Chris Metcalf, Tilera Corp.
> http://www.tilera.com
>
>
If wrap does occurr direct subtraction may cause problem, but
write_lock() is usually only lock very little code, and since two
issue of that call will take us so many cycles that one the same core
the time eslapsed will be enough that wrap will never occurr.
--
Cyberman Wu
http://www.meganovo.com
^ permalink raw reply
* Re: [PATCH 4/8] ethoc: prevent overflow of rx counter
From: Ben Hutchings @ 2010-11-24 16:30 UTC (permalink / raw)
To: Jonas Bonn; +Cc: netdev
In-Reply-To: <1290606058-26703-5-git-send-email-jonas@southpole.se>
On Wed, 2010-11-24 at 14:40 +0100, Jonas Bonn wrote:
> Rewind cur_rx to prevent it from overflowing.
>
> Signed-off-by: Jonas Bonn <jonas@southpole.se>
> ---
> drivers/net/ethoc.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
> index 53c03f2..7d1b5d8 100644
> --- a/drivers/net/ethoc.c
> +++ b/drivers/net/ethoc.c
> @@ -408,6 +408,9 @@ static int ethoc_rx(struct net_device *dev, int limit)
> struct ethoc *priv = netdev_priv(dev);
> int count;
>
> + /* Prevent overflow of priv->cur_rx by rewinding it */
> + priv->cur_rx = priv->cur_rx % priv->num_rx;
> +
Division is expensive; you should either use masking (if priv->num_rx is
guaranteed to be a power of 2) or check for overflow whenever you
increment priv->cur_rx:
if (++priv->cur_rx == priv->num_rx)
priv->cur_rx = 0;
Ben.
> for (count = 0; count < limit; ++count) {
> unsigned int entry;
> struct ethoc_bd bd;
--
Ben Hutchings, Senior Software Engineer, Solarflare Communications
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.
^ permalink raw reply
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