* Re: Fwd: Simple kernel attack using socketpair. easy, 100% reproductiblle, works under guest. no way to protect :(
From: Eric Dumazet @ 2010-11-26 8:59 UTC (permalink / raw)
To: Shan Wei
Cc: Марк Коренберг,
David Miller, netdev
In-Reply-To: <1290759748.2855.4.camel@edumazet-laptop>
Le vendredi 26 novembre 2010 à 09:22 +0100, Eric Dumazet a écrit :
> Le vendredi 26 novembre 2010 à 15:41 +0800, Shan Wei a écrit :
> > Eric Dumazet wrote, at 11/25/2010 10:11 PM:
> > > @@ -1845,6 +1871,7 @@ static int unix_stream_recvmsg(struct kiocb *iocb, struct socket *sock,
> > > unix_state_lock(sk);
> > > skb = skb_dequeue(&sk->sk_receive_queue);
> > > if (skb == NULL) {
> > > + unix_sk(sk)->recursion_level = 0;
> >
> > For SOCK_SEQPACKET type, no need to clear recursion_level counter?
> >
> >
>
> There is no need actually to clear it at all.
>
> If an application has a complex setup with a dependence tree of unix
> sockets, it will break if messages are not read fast enough.
>
> So, maybe I should remove this line so that underlying problem comes
> into surface immediately, rather than while in stress load.
>
>
The whole sendfd feature is fundamentally flawed, since its not a "give
this file to another user", but "give a pointer to file structure"
As soon as you can pass af_unix sockets, you cannot know if the
intransit "refs to file structure" are going to be consumed by one or
other user. So a per user limit is not possible.
I am not sure it is fixable at all, unless adding a complete graph
structure between af_unix sockets that used the sendfd() mechanism.
(Its a NxN relationship... pretty hard to track)
Yes, we can add limits (global wide), but they could break legacy apps,
and a single user could lock in one fd all the tokens.
^ permalink raw reply
* Re: DMA Quirks for skge.c
From: Stanislaw Gruszka @ 2010-11-26 9:21 UTC (permalink / raw)
To: Shannon Wynter; +Cc: Stephen Hemminger, netdev
In-Reply-To: <4CEF565A.6060803@jumbolotteries.com>
Hi
(cc Stephen and netdev)
On Fri, Nov 26, 2010 at 04:40:26PM +1000, Shannon Wynter wrote:
> Hi there.
>
> I truly thank you for resolving the problem with the Gigabyte board
> as without your fix I never would have been able to pinpoint the
> issue I was having with my network card after upgrading my memory.
>
> I submit to you a patch that adds the ASUS A8N-SLI Premium board to
> the list of poorly built boards.
>
> I do wonder if it might be an idea to also add a module parameter
> that forces 32 bit.
Maybe for debug purposes it will be useful, but I dislike situation when
users have to use module options to make hardware work. Anyway Stephen
said that he works on better solution for that problem ...
> Kind regards
>
> Shannon
> diff -uNr linux-2.6.37-rc3.old/drivers/net/skge.c linux-2.6.37-rc3.new//drivers/net/skge.c
> --- linux-2.6.37-rc3.old/drivers/net/skge.c 2010-11-26 08:35:21.000000000 +1000
> +++ linux-2.6.37-rc3.new//drivers/net/skge.c 2010-11-26 08:58:52.000000000 +1000
> @@ -4158,6 +4158,13 @@
> DMI_MATCH(DMI_BOARD_NAME, "nForce"),
> },
> },
> + {
> + .ident = "ASUSTeK A8N-SLI Premium",
> + .matches = {
> + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
> + DMI_MATCH(DMI_BOARD_NAME, "A8N-SLI Premium"),
> + },
> + },
> {}
> };
Add Signed-off-by line and repost patch according to MAINTAINERS
file (to Stephen and netdev).
Thanks
Stanislaw
^ permalink raw reply
* [PATCH] ucc_geth: fix ucc halt problem in half duplex mode
From: Li Yang @ 2010-11-26 9:29 UTC (permalink / raw)
To: linuxppc-dev, netdev, davem
Cc: Anton Vorontsov, Jean-Denis Boyer, Andreas Schmitz
In commit 58933c64(ucc_geth: Fix the wrong the Rx/Tx FIFO size),
the UCC_GETH_UTFTT_INIT is set to 512 based on the recommendation
of the QE Reference Manual. But that will sometimes cause tx halt
while working in half duplex mode.
According to errata draft QE_GENERAL-A003(High Tx Virtual FIFO
threshold size can cause UCC to halt), setting UTFTT less than
[(UTFS x (M - 8)/M) - 128] will prevent this from happening
(M is the minimum buffer size).
The patch changes UTFTT back to 256.
Signed-off-by: Li Yang <leoli@freescale.com>
Cc: Jean-Denis Boyer <jdboyer@media5corp.com>
Cc: Andreas Schmitz <Andreas.Schmitz@riedel.net>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/net/ucc_geth.h | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 05a9558..a78b9c0 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -899,7 +899,8 @@ struct ucc_geth_hardware_statistics {
#define UCC_GETH_UTFS_INIT 512 /* Tx virtual FIFO size
*/
#define UCC_GETH_UTFET_INIT 256 /* 1/2 utfs */
-#define UCC_GETH_UTFTT_INIT 512
+#define UCC_GETH_UTFTT_INIT 256 /* 1/2 utfs
+ due to errata */
/* Gigabit Ethernet (1000 Mbps) */
#define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/ /* Rx virtual
FIFO size */
--
1.6.6-rc1.GIT
^ permalink raw reply related
* Re: [PATCH] net: Fix __inet_inherit_port() to correctly increment bsockets and num_owners
From: Nagendra Tomar @ 2010-11-26 9:40 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, davem
In-Reply-To: <1290759801.2855.5.camel@edumazet-laptop>
--- On Fri, 26/11/10, Eric Dumazet <eric.dumazet@gmail.com> wrote:
>
> OK so you'll have to make a proof, because current code
> seems to work ;)
>
>
ok, so I printed hashinfo->bsockets and tb->num_owners inside __inet_put_port() and I could see both of them to be -ve. All we need to do is establish and terminate a connection. I used netcat for that.
The only place 'bsockets' and 'num_owners' are used is inet_csk_get_port() and the only effect that they might have is on the choice of the port to be used for binding.
'bsockets' is used as a hint to stop searching for a free port (and instead share an already used port) when we know that all the ports could be used up.
'num_owners' is used to find the port which is least shared (to balance the 'owners' list) in case we need to share a port.
Since both of these are used as optimizations (in the bind path), they do not affect correctness and hence the code works even with these values not being updated correctly.
Thanks,
Tomar
^ permalink raw reply
* Re: [PATCH net-next-2.6 06/19 v5] can: EG20T PCH: Fix endianness issue
From: Marc Kleine-Budde @ 2010-11-26 9:52 UTC (permalink / raw)
To: Tomoya MORINAGA
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w, Samuel Ortiz,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, Wolfgang Grandegger,
joel.clark-ral2JQCrhuEAvxtiuMwx3w, David S. Miller,
Christian Pellegrin, qi.wang-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <4CEF178C.2050506-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
[-- Attachment #1.1: Type: text/plain, Size: 15584 bytes --]
On 11/26/2010 03:12 AM, Tomoya MORINAGA wrote:
> Fix endianness issue.
> there is endianness issue both Tx and Rx.
> Currently, data is set like below.
> Register:
> MSB--LSB
> x x D0 D1
> x x D2 D3
> x x D4 D5
> x x D6 D7
>
> But Data to be sent must be set like below.
> Register:
> MSB--LSB
> x x D1 D0
> x x D3 D2
> x x D5 D4
> x x D7 D6 (x means reserved area.)
I whish you just fix the endianess issue in this patch. Makes it more
readable.
> For easy to read, some sub-functions are created.
>
> Modify complex "goto" to do~while.
This should go into a separate patch. Please don't introduce the
next_flag variable that you remove in a later patch.
>
> Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
> ---
> drivers/net/can/pch_can.c | 304 +++++++++++++++++++++++----------------------
> 1 files changed, 155 insertions(+), 149 deletions(-)
>
> diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
> index 6437e60..0ac2a75 100644
> --- a/drivers/net/can/pch_can.c
> +++ b/drivers/net/can/pch_can.c
> @@ -134,10 +134,7 @@ struct pch_can_if_regs {
> u32 id1;
> u32 id2;
> u32 mcont;
> - u32 dataa1;
> - u32 dataa2;
> - u32 datab1;
> - u32 datab2;
> + u32 data[4];
> u32 rsv[13];
> };
>
> @@ -420,10 +417,10 @@ static void pch_can_clear_buffers(struct pch_can_priv *priv)
> iowrite32(0x0, &priv->regs->ifregs[0].id1);
> iowrite32(0x0, &priv->regs->ifregs[0].id2);
> iowrite32(0x0, &priv->regs->ifregs[0].mcont);
> - iowrite32(0x0, &priv->regs->ifregs[0].dataa1);
> - iowrite32(0x0, &priv->regs->ifregs[0].dataa2);
> - iowrite32(0x0, &priv->regs->ifregs[0].datab1);
> - iowrite32(0x0, &priv->regs->ifregs[0].datab2);
> + iowrite32(0x0, &priv->regs->ifregs[0].data[0]);
> + iowrite32(0x0, &priv->regs->ifregs[0].data[1]);
> + iowrite32(0x0, &priv->regs->ifregs[0].data[2]);
> + iowrite32(0x0, &priv->regs->ifregs[0].data[3]);
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
> PCH_CMASK_ARB | PCH_CMASK_CTRL,
> &priv->regs->ifregs[0].cmask);
> @@ -437,10 +434,10 @@ static void pch_can_clear_buffers(struct pch_can_priv *priv)
> iowrite32(0x0, &priv->regs->ifregs[1].id1);
> iowrite32(0x0, &priv->regs->ifregs[1].id2);
> iowrite32(0x0, &priv->regs->ifregs[1].mcont);
> - iowrite32(0x0, &priv->regs->ifregs[1].dataa1);
> - iowrite32(0x0, &priv->regs->ifregs[1].dataa2);
> - iowrite32(0x0, &priv->regs->ifregs[1].datab1);
> - iowrite32(0x0, &priv->regs->ifregs[1].datab2);
> + iowrite32(0x0, &priv->regs->ifregs[1].data[0]);
> + iowrite32(0x0, &priv->regs->ifregs[1].data[1]);
> + iowrite32(0x0, &priv->regs->ifregs[1].data[2]);
> + iowrite32(0x0, &priv->regs->ifregs[1].data[3]);
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
> PCH_CMASK_ARB | PCH_CMASK_CTRL,
> &priv->regs->ifregs[1].cmask);
> @@ -697,190 +694,202 @@ static irqreturn_t pch_can_interrupt(int irq, void *dev_id)
> return IRQ_HANDLED;
> }
>
> -static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
> +static void pch_fifo_thresh(struct pch_can_priv *priv, int obj_id)
> +{
> + if (obj_id < PCH_FIFO_THRESH) {
> + iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL |
> + PCH_CMASK_ARB, &priv->regs->ifregs[0].cmask);
> +
> + /* Clearing the Dir bit. */
> + pch_can_bit_clear(&priv->regs->ifregs[0].id2, PCH_ID2_DIR);
> +
> + /* Clearing NewDat & IntPnd */
> + pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> + PCH_IF_MCONT_INTPND);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_id);
> + } else if (obj_id > PCH_FIFO_THRESH) {
> + pch_can_int_clr(priv, obj_id);
> + } else if (obj_id == PCH_FIFO_THRESH) {
> + int cnt;
> + for (cnt = 0; cnt < PCH_FIFO_THRESH; cnt++)
> + pch_can_int_clr(priv, cnt + 1);
> + }
> +}
> +
> +static int pch_can_rx_msg_lost(struct net_device *ndev, int obj_id)
> +{
> + struct pch_can_priv *priv = netdev_priv(ndev);
> + struct net_device_stats *stats = &(priv->ndev->stats);
> + struct sk_buff *skb;
> + struct can_frame *cf;
> +
> + netdev_dbg(priv->ndev, "Msg Obj is overwritten.\n");
> + pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> + PCH_IF_MCONT_MSGLOST);
> + iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
> + &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_id);
> +
> + skb = alloc_can_err_skb(ndev, &cf);
> + if (!skb)
> + return -ENOMEM;
> +
> + cf->can_id |= CAN_ERR_CRTL;
> + cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
> + stats->rx_over_errors++;
> + stats->rx_errors++;
> +
> + netif_receive_skb(skb);
> +
> + return 0;
> +}
> +
> +static int pch_can_rx_normal(struct net_device *ndev, u32 obj_num, int quota)
> {
> u32 reg;
> canid_t id;
> - u32 ide;
> - u32 rtr;
> - int i, j, k;
> int rcv_pkts = 0;
> + int rtn;
> + int next_flag = 0;
> struct sk_buff *skb;
> struct can_frame *cf;
> struct pch_can_priv *priv = netdev_priv(ndev);
> struct net_device_stats *stats = &(priv->ndev->stats);
> + int i;
> + u32 id2;
> + u16 data_reg;
>
> - /* Reading the messsage object from the Message RAM */
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
> - pch_can_check_if_busy(&priv->regs->ifregs[0].creq, int_stat);
> + do {
> + /* Reading the messsage object from the Message RAM */
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_num);
>
> - /* Reading the MCONT register. */
> - reg = ioread32(&priv->regs->ifregs[0].mcont);
> - reg &= 0xffff;
> + /* Reading the MCONT register. */
> + reg = ioread32(&priv->regs->ifregs[0].mcont);
> +
> + if (reg & PCH_IF_MCONT_EOB)
> + break;
>
> - for (k = int_stat; !(reg & PCH_IF_MCONT_EOB); k++) {
> /* If MsgLost bit set. */
> if (reg & PCH_IF_MCONT_MSGLOST) {
> - dev_err(&priv->ndev->dev, "Msg Obj is overwritten.\n");
> - pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> - PCH_IF_MCONT_MSGLOST);
> - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
> - &priv->regs->ifregs[0].cmask);
> - pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
> -
> - skb = alloc_can_err_skb(ndev, &cf);
> + rtn = pch_can_rx_msg_lost(ndev, obj_num);
> + if (!rtn)
> + netdev_err(ndev, "Can't get memory\n");
Your logic is broken, the function returns 0 on success, which makes it
print a error message.
In an OOM situation the system is under pressure anyway. On low end
systems it not good to print a message to the log. AFAICS no other can
driver does this.
> + rcv_pkts++;
> + quota--;
> + next_flag = 1;
> + } else if (!(reg & PCH_IF_MCONT_NEWDAT))
> + next_flag = 1;
Please don't introduce the next_flag, that is removed in a later patch.
> +
> + if (!next_flag) {
> + skb = alloc_can_skb(priv->ndev, &cf);
> if (!skb)
> return -ENOMEM;
>
> - priv->can.can_stats.error_passive++;
> - priv->can.state = CAN_STATE_ERROR_PASSIVE;
> - cf->can_id |= CAN_ERR_CRTL;
> - cf->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;
> - cf->data[2] |= CAN_ERR_PROT_OVERLOAD;
> - stats->rx_packets++;
> - stats->rx_bytes += cf->can_dlc;
> + /* Get Received data */
> + id2 = ioread32(&priv->regs->ifregs[0].id2);
> + if (id2 & PCH_ID2_XTD) {
> + id = (ioread32(&priv->regs->ifregs[0].id1) &
> + 0xffff);
> + id |= (((id2) & 0x1fff) << 16);
> + cf->can_id = id | CAN_EFF_FLAG;
> + } else {
> + id = ((id2 & (CAN_SFF_MASK << 2)) >> 2);
id = (id2 >> 2) & CAN_SFF_MASK;
this is IMHO more readable.
> + cf->can_id = id;
> + }
> +
> + if (id2 & PCH_ID2_DIR)
> + cf->can_id |= CAN_RTR_FLAG;
> +
> + cf->can_dlc = get_can_dlc((ioread32(&priv->regs->
> + ifregs[0].mcont)) & 0xF);
> +
> + for (i = 0; i < cf->can_dlc; i += 2) {
> + data_reg = ioread16(&priv->regs->ifregs[0].
> + data[i / 2]);
> + cf->data[i] = data_reg & 0xff;
& 0xff isn't needed, as cf->data is 8 bit wide.
> + cf->data[i + 1] = data_reg >> 8;
> + }
>
> netif_receive_skb(skb);
> rcv_pkts++;
> - goto RX_NEXT;
> - }
> - if (!(reg & PCH_IF_MCONT_NEWDAT))
> - goto RX_NEXT;
> -
> - skb = alloc_can_skb(priv->ndev, &cf);
> - if (!skb)
> - return -ENOMEM;
> -
> - /* Get Received data */
> - ide = ((ioread32(&priv->regs->ifregs[0].id2)) & PCH_ID2_XTD) >>
> - 14;
> - if (ide) {
> - id = (ioread32(&priv->regs->ifregs[0].id1) & 0xffff);
> - id |= (((ioread32(&priv->regs->ifregs[0].id2)) &
> - 0x1fff) << 16);
> - cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG;
> - } else {
> - id = (((ioread32(&priv->regs->ifregs[0].id2)) &
> - (CAN_SFF_MASK << 2)) >> 2);
> - cf->can_id = (id & CAN_SFF_MASK);
> - }
> + stats->rx_packets++;
> + quota--;
> + stats->rx_bytes += cf->can_dlc;
>
> - rtr = (ioread32(&priv->regs->ifregs[0].id2) & PCH_ID2_DIR);
> - if (rtr) {
> - cf->can_dlc = 0;
> - cf->can_id |= CAN_RTR_FLAG;
> - } else {
> - cf->can_dlc =
> - ((ioread32(&priv->regs->ifregs[0].mcont)) & 0x0f);
> + pch_fifo_thresh(priv, obj_num);
> }
> + obj_num++;
> + next_flag = 0;
> + } while (quota > 0);
>
> - for (i = 0, j = 0; i < cf->can_dlc; j++) {
> - reg = ioread32(&priv->regs->ifregs[0].dataa1 + j*4);
> - cf->data[i++] = cpu_to_le32(reg & 0xff);
> - if (i == cf->can_dlc)
> - break;
> - cf->data[i++] = cpu_to_le32((reg >> 8) & 0xff);
> - }
> + return rcv_pkts;
> +}
>
> - netif_receive_skb(skb);
> - rcv_pkts++;
> - stats->rx_packets++;
> - stats->rx_bytes += cf->can_dlc;
> -
> - if (k < PCH_FIFO_THRESH) {
> - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL |
> - PCH_CMASK_ARB, &priv->regs->ifregs[0].cmask);
> -
> - /* Clearing the Dir bit. */
> - pch_can_bit_clear(&priv->regs->ifregs[0].id2,
> - PCH_ID2_DIR);
> -
> - /* Clearing NewDat & IntPnd */
> - pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> - PCH_IF_MCONT_INTPND);
> - pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
> - } else if (k > PCH_FIFO_THRESH) {
> - pch_can_int_clr(priv, k);
> - } else if (k == PCH_FIFO_THRESH) {
> - int cnt;
> - for (cnt = 0; cnt < PCH_FIFO_THRESH; cnt++)
> - pch_can_int_clr(priv, cnt+1);
> - }
> -RX_NEXT:
> - /* Reading the messsage object from the Message RAM */
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
> - pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
> - reg = ioread32(&priv->regs->ifregs[0].mcont);
> - }
> +static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat)
> +{
> + struct pch_can_priv *priv = netdev_priv(ndev);
> + struct net_device_stats *stats = &(priv->ndev->stats);
> + u32 dlc;
>
> - return rcv_pkts;
> + can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);
> + iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
> + &priv->regs->ifregs[1].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq, int_stat);
> + dlc = get_can_dlc(ioread32(&priv->regs->ifregs[1].mcont) &
> + PCH_IF_MCONT_DLC);
> + stats->tx_bytes += dlc;
> + stats->tx_packets++;
> + if (int_stat == PCH_TX_OBJ_END)
> + netif_wake_queue(ndev);
> }
> +
> static int pch_can_rx_poll(struct napi_struct *napi, int quota)
> {
> struct net_device *ndev = napi->dev;
> struct pch_can_priv *priv = netdev_priv(ndev);
> - struct net_device_stats *stats = &(priv->ndev->stats);
> - u32 dlc;
> u32 int_stat;
> int rcv_pkts = 0;
> u32 reg_stat;
>
> int_stat = pch_can_int_pending(priv);
> if (!int_stat)
> - return 0;
> + goto end;
>
> -INT_STAT:
> - if (int_stat == PCH_STATUS_INT) {
> + if ((int_stat == PCH_STATUS_INT) && (quota > 0)) {
> reg_stat = ioread32(&priv->regs->stat);
> if (reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) {
> - if ((reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL)
> + if (reg_stat & PCH_BUS_OFF ||
> + (reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL) {
> pch_can_error(ndev, reg_stat);
> + quota--;
> + }
> }
>
> - if (reg_stat & PCH_TX_OK) {
> - iowrite32(PCH_CMASK_RX_TX_GET,
> - &priv->regs->ifregs[1].cmask);
> - pch_can_check_if_busy(&priv->regs->ifregs[1].creq,
> - ioread32(&priv->regs->intr));
> + if (reg_stat & PCH_TX_OK)
> pch_can_bit_clear(&priv->regs->stat, PCH_TX_OK);
> - }
>
> if (reg_stat & PCH_RX_OK)
> pch_can_bit_clear(&priv->regs->stat, PCH_RX_OK);
>
> int_stat = pch_can_int_pending(priv);
> - if (int_stat == PCH_STATUS_INT)
> - goto INT_STAT;
> }
>
> -MSG_OBJ:
> + if (quota == 0)
> + goto end;
> +
> if ((int_stat >= PCH_RX_OBJ_START) && (int_stat <= PCH_RX_OBJ_END)) {
> - rcv_pkts = pch_can_rx_normal(ndev, int_stat);
> - if (rcv_pkts < 0)
> - return 0;
> + rcv_pkts += pch_can_rx_normal(ndev, int_stat, quota);
> + quota -= rcv_pkts;
> + if (quota < 0)
> + goto end;
> } else if ((int_stat >= PCH_TX_OBJ_START) &&
> (int_stat <= PCH_TX_OBJ_END)) {
> /* Handle transmission interrupt */
> - can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);
> - iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
> - &priv->regs->ifregs[1].cmask);
> - dlc = ioread32(&priv->regs->ifregs[1].mcont) &
> - PCH_IF_MCONT_DLC;
> - pch_can_check_if_busy(&priv->regs->ifregs[1].creq, int_stat);
> - if (dlc > 8)
> - dlc = 8;
> - stats->tx_bytes += dlc;
> - stats->tx_packets++;
> - if (int_stat == PCH_TX_OBJ_END)
> - netif_wake_queue(ndev);
> + pch_can_tx_complete(ndev, int_stat);
> }
>
> - int_stat = pch_can_int_pending(priv);
> - if (int_stat == PCH_STATUS_INT)
> - goto INT_STAT;
> - else if (int_stat >= 1 && int_stat <= 32)
> - goto MSG_OBJ;
> -
> +end:
> napi_complete(napi);
> pch_can_set_int_enables(priv, PCH_CAN_ALL);
>
The following hunk is a nice and clean patch. It fixes the endianess
issue, nothing more.
> @@ -1013,10 +1022,10 @@ static int pch_close(struct net_device *ndev)
>
> static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
> {
> - int i, j;
> struct pch_can_priv *priv = netdev_priv(ndev);
> struct can_frame *cf = (struct can_frame *)skb->data;
> int tx_buffer_avail = 0;
> + int i;
>
> if (can_dropped_invalid_skb(ndev, skb))
> return NETDEV_TX_OK;
> @@ -1057,13 +1066,10 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
> if (cf->can_id & CAN_RTR_FLAG)
> pch_can_bit_clear(&priv->regs->ifregs[1].id2, PCH_ID2_DIR);
>
> - for (i = 0, j = 0; i < cf->can_dlc; j++) {
> - iowrite32(le32_to_cpu(cf->data[i++]),
> - (&priv->regs->ifregs[1].dataa1) + j*4);
> - if (i == cf->can_dlc)
> - break;
> - iowrite32(le32_to_cpu(cf->data[i++] << 8),
> - (&priv->regs->ifregs[1].dataa1) + j*4);
> + /* Copy data to register */
> + for (i = 0; i < cf->can_dlc; i += 2) {
> + iowrite16(cf->data[i] | (cf->data[i + 1] << 8),
> + &priv->regs->ifregs[1].data[i / 2]);
> }
>
> can_put_echo_skb(skb, ndev, tx_buffer_avail - PCH_RX_OBJ_END - 1);
cheers, Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #1.2: OpenPGP digital signature --]
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_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core
^ permalink raw reply
* Re: [PATCH net-next-2.6 01/19 v5] can: EG20T PCH: Separate Interface Register(IF1/IF2)
From: Marc Kleine-Budde @ 2010-11-26 9:58 UTC (permalink / raw)
To: Tomoya MORINAGA
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w, Samuel Ortiz,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, Wolfgang Grandegger,
joel.clark-ral2JQCrhuEAvxtiuMwx3w, David S. Miller,
Christian Pellegrin, qi.wang-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <4CEF150A.7080409-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
[-- Attachment #1.1: Type: text/plain, Size: 30724 bytes --]
On 11/26/2010 03:01 AM, Tomoya MORINAGA wrote:
> Separate interface register from whole of register structure.
> CAN register of Intel PCH EG20T has 2 sets of interface register.
> To reduce whole of code size, separate interface register.
> As a result, the number of function also can be reduced.
nitpick: it's unusual to have leading whitespace in the patch description.
Please fix the description and add by Acked-by.
cheers, Marc
>
> Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
> ---
> drivers/net/can/pch_can.c | 445 ++++++++++++++++++++-------------------------
> 1 files changed, 201 insertions(+), 244 deletions(-)
>
> diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
> index 238622a..dae8ed1 100644
> --- a/drivers/net/can/pch_can.c
> +++ b/drivers/net/can/pch_can.c
> @@ -113,6 +113,11 @@
>
> #define PCH_FIFO_THRESH 16
>
> +enum pch_ifreg {
> + PCH_RX_IFREG,
> + PCH_TX_IFREG,
> +};
> +
\o/
> enum pch_can_mode {
> PCH_CAN_ENABLE,
> PCH_CAN_DISABLE,
> @@ -122,6 +127,21 @@ enum pch_can_mode {
> PCH_CAN_RUN
> };
>
> +struct pch_can_if_regs {
> + u32 creq;
> + u32 cmask;
> + u32 mask1;
> + u32 mask2;
> + u32 id1;
> + u32 id2;
> + u32 mcont;
> + u32 dataa1;
> + u32 dataa2;
> + u32 datab1;
> + u32 datab2;
> + u32 rsv[13];
> +};
> +
> struct pch_can_regs {
> u32 cont;
> u32 stat;
> @@ -130,38 +150,21 @@ struct pch_can_regs {
> u32 intr;
> u32 opt;
> u32 brpe;
> - u32 reserve1;
> - u32 if1_creq;
> - u32 if1_cmask;
> - u32 if1_mask1;
> - u32 if1_mask2;
> - u32 if1_id1;
> - u32 if1_id2;
> - u32 if1_mcont;
> - u32 if1_dataa1;
> - u32 if1_dataa2;
> - u32 if1_datab1;
> - u32 if1_datab2;
> - u32 reserve2;
> - u32 reserve3[12];
> - u32 if2_creq;
> - u32 if2_cmask;
> - u32 if2_mask1;
> - u32 if2_mask2;
> - u32 if2_id1;
> - u32 if2_id2;
> - u32 if2_mcont;
> - u32 if2_dataa1;
> - u32 if2_dataa2;
> - u32 if2_datab1;
> - u32 if2_datab2;
> - u32 reserve4;
> - u32 reserve5[20];
> + u32 reserve;
> + struct pch_can_if_regs ifregs[2]; /* [0]=if1 [1]=if2 */
> + u32 reserve1[8];
> u32 treq1;
> u32 treq2;
> - u32 reserve6[2];
> - u32 reserve7[56];
> - u32 reserve8[3];
> + u32 reserve2[6];
> + u32 data1;
> + u32 data2;
> + u32 reserve3[6];
> + u32 canipend1;
> + u32 canipend2;
> + u32 reserve4[6];
> + u32 canmval1;
> + u32 canmval2;
> + u32 reserve5[37];
> u32 srst;
> };
>
> @@ -303,143 +306,87 @@ static void pch_can_check_if_busy(u32 __iomem *creq_addr, u32 num)
> pr_err("%s:IF1 BUSY Flag is set forever.\n", __func__);
> }
>
> -static void pch_can_set_rx_enable(struct pch_can_priv *priv, u32 buff_num,
> - u32 set)
> +static void pch_can_set_rxtx(struct pch_can_priv *priv, u32 buff_num,
> + u32 set, enum pch_ifreg dir)
> {
> unsigned long flags;
> + u32 ie;
> +
> + if (dir)
> + ie = PCH_IF_MCONT_TXIE;
> + else
> + ie = PCH_IF_MCONT_RXIE;
>
> spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> /* Reading the receive buffer data from RAM to Interface1 registers */
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, buff_num);
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
>
> /* Setting the IF1MASK1 register to access MsgVal and RxIE bits */
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_ARB | PCH_CMASK_CTRL,
> - &priv->regs->if1_cmask);
> + &priv->regs->ifregs[dir].cmask);
>
> if (set == PCH_ENABLE) {
> /* Setting the MsgVal and RxIE bits */
> - pch_can_bit_set(&priv->regs->if1_mcont, PCH_IF_MCONT_RXIE);
> - pch_can_bit_set(&priv->regs->if1_id2, PCH_ID_MSGVAL);
> + pch_can_bit_set(&priv->regs->ifregs[dir].mcont, ie);
> + pch_can_bit_set(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
>
> } else if (set == PCH_DISABLE) {
> /* Resetting the MsgVal and RxIE bits */
> - pch_can_bit_clear(&priv->regs->if1_mcont, PCH_IF_MCONT_RXIE);
> - pch_can_bit_clear(&priv->regs->if1_id2, PCH_ID_MSGVAL);
> + pch_can_bit_clear(&priv->regs->ifregs[dir].mcont, ie);
> + pch_can_bit_clear(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
> }
>
> - pch_can_check_if_busy(&priv->regs->if1_creq, buff_num);
> + pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
> spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> }
>
> -static void pch_can_rx_enable_all(struct pch_can_priv *priv)
> -{
> - int i;
> -
> - /* Traversing to obtain the object configured as receivers. */
> - for (i = 0; i < PCH_OBJ_NUM; i++) {
> - if (priv->msg_obj[i] == PCH_MSG_OBJ_RX)
> - pch_can_set_rx_enable(priv, i + 1, PCH_ENABLE);
> - }
> -}
>
> -static void pch_can_rx_disable_all(struct pch_can_priv *priv)
> +static void pch_can_set_rx_all(struct pch_can_priv *priv, u32 set)
> {
> int i;
>
> /* Traversing to obtain the object configured as receivers. */
> for (i = 0; i < PCH_OBJ_NUM; i++) {
> if (priv->msg_obj[i] == PCH_MSG_OBJ_RX)
> - pch_can_set_rx_enable(priv, i + 1, PCH_DISABLE);
> - }
> -}
> -
> -static void pch_can_set_tx_enable(struct pch_can_priv *priv, u32 buff_num,
> - u32 set)
> -{
> - unsigned long flags;
> -
> - spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> - /* Reading the Msg buffer from Message RAM to Interface2 registers. */
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if2_cmask);
> - pch_can_check_if_busy(&priv->regs->if2_creq, buff_num);
> -
> - /* Setting the IF2CMASK register for accessing the
> - MsgVal and TxIE bits */
> - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_ARB | PCH_CMASK_CTRL,
> - &priv->regs->if2_cmask);
> -
> - if (set == PCH_ENABLE) {
> - /* Setting the MsgVal and TxIE bits */
> - pch_can_bit_set(&priv->regs->if2_mcont, PCH_IF_MCONT_TXIE);
> - pch_can_bit_set(&priv->regs->if2_id2, PCH_ID_MSGVAL);
> - } else if (set == PCH_DISABLE) {
> - /* Resetting the MsgVal and TxIE bits. */
> - pch_can_bit_clear(&priv->regs->if2_mcont, PCH_IF_MCONT_TXIE);
> - pch_can_bit_clear(&priv->regs->if2_id2, PCH_ID_MSGVAL);
> - }
> -
> - pch_can_check_if_busy(&priv->regs->if2_creq, buff_num);
> - spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> -}
> -
> -static void pch_can_tx_enable_all(struct pch_can_priv *priv)
> -{
> - int i;
> -
> - /* Traversing to obtain the object configured as transmit object. */
> - for (i = 0; i < PCH_OBJ_NUM; i++) {
> - if (priv->msg_obj[i] == PCH_MSG_OBJ_TX)
> - pch_can_set_tx_enable(priv, i + 1, PCH_ENABLE);
> + pch_can_set_rxtx(priv, i + 1, set, PCH_RX_IFREG);
> }
> }
>
> -static void pch_can_tx_disable_all(struct pch_can_priv *priv)
> +static void pch_can_set_tx_all(struct pch_can_priv *priv, u32 set)
> {
> int i;
>
> /* Traversing to obtain the object configured as transmit object. */
> for (i = 0; i < PCH_OBJ_NUM; i++) {
> if (priv->msg_obj[i] == PCH_MSG_OBJ_TX)
> - pch_can_set_tx_enable(priv, i + 1, PCH_DISABLE);
> + pch_can_set_rxtx(priv, i + 1, set, PCH_TX_IFREG);
> }
> }
>
> -static void pch_can_get_rx_enable(struct pch_can_priv *priv, u32 buff_num,
> - u32 *enable)
> +static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
> + enum pch_ifreg dir)
> {
> unsigned long flags;
> + u32 ie, enable;
>
> - spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, buff_num);
> -
> - if (((ioread32(&priv->regs->if1_id2)) & PCH_ID_MSGVAL) &&
> - ((ioread32(&priv->regs->if1_mcont)) &
> - PCH_IF_MCONT_RXIE))
> - *enable = PCH_ENABLE;
> + if (dir)
> + ie = PCH_IF_MCONT_RXIE;
> else
> - *enable = PCH_DISABLE;
> - spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> -}
> -
> -static void pch_can_get_tx_enable(struct pch_can_priv *priv, u32 buff_num,
> - u32 *enable)
> -{
> - unsigned long flags;
> + ie = PCH_IF_MCONT_TXIE;
>
> spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if2_cmask);
> - pch_can_check_if_busy(&priv->regs->if2_creq, buff_num);
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
>
> - if (((ioread32(&priv->regs->if2_id2)) & PCH_ID_MSGVAL) &&
> - ((ioread32(&priv->regs->if2_mcont)) &
> - PCH_IF_MCONT_TXIE)) {
> - *enable = PCH_ENABLE;
> + if (((ioread32(&priv->regs->ifregs[dir].id2)) & PCH_ID_MSGVAL) &&
> + ((ioread32(&priv->regs->ifregs[dir].mcont)) & ie)) {
> + enable = PCH_ENABLE;
> } else {
> - *enable = PCH_DISABLE;
> + enable = PCH_DISABLE;
> }
> spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> + return enable;
> }
>
> static int pch_can_int_pending(struct pch_can_priv *priv)
> @@ -453,15 +400,17 @@ static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
> unsigned long flags;
>
> spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, buffer_num);
> - iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL, &priv->regs->if1_cmask);
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
> + iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
> + &priv->regs->ifregs[0].cmask);
> if (set == PCH_ENABLE)
> - pch_can_bit_clear(&priv->regs->if1_mcont, PCH_IF_MCONT_EOB);
> + pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> + PCH_IF_MCONT_EOB);
> else
> - pch_can_bit_set(&priv->regs->if1_mcont, PCH_IF_MCONT_EOB);
> + pch_can_bit_set(&priv->regs->ifregs[0].mcont, PCH_IF_MCONT_EOB);
>
> - pch_can_check_if_busy(&priv->regs->if1_creq, buffer_num);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
> spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> }
>
> @@ -471,10 +420,10 @@ static void pch_can_get_rx_buffer_link(struct pch_can_priv *priv,
> unsigned long flags;
>
> spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, buffer_num);
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
>
> - if (ioread32(&priv->regs->if1_mcont) & PCH_IF_MCONT_EOB)
> + if (ioread32(&priv->regs->ifregs[0].mcont) & PCH_IF_MCONT_EOB)
> *link = PCH_DISABLE;
> else
> *link = PCH_ENABLE;
> @@ -486,37 +435,37 @@ static void pch_can_clear_buffers(struct pch_can_priv *priv)
> int i;
>
> for (i = 0; i < PCH_RX_OBJ_NUM; i++) {
> - iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->if1_cmask);
> - iowrite32(0xffff, &priv->regs->if1_mask1);
> - iowrite32(0xffff, &priv->regs->if1_mask2);
> - iowrite32(0x0, &priv->regs->if1_id1);
> - iowrite32(0x0, &priv->regs->if1_id2);
> - iowrite32(0x0, &priv->regs->if1_mcont);
> - iowrite32(0x0, &priv->regs->if1_dataa1);
> - iowrite32(0x0, &priv->regs->if1_dataa2);
> - iowrite32(0x0, &priv->regs->if1_datab1);
> - iowrite32(0x0, &priv->regs->if1_datab2);
> + iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->ifregs[0].cmask);
> + iowrite32(0xffff, &priv->regs->ifregs[0].mask1);
> + iowrite32(0xffff, &priv->regs->ifregs[0].mask2);
> + iowrite32(0x0, &priv->regs->ifregs[0].id1);
> + iowrite32(0x0, &priv->regs->ifregs[0].id2);
> + iowrite32(0x0, &priv->regs->ifregs[0].mcont);
> + iowrite32(0x0, &priv->regs->ifregs[0].dataa1);
> + iowrite32(0x0, &priv->regs->ifregs[0].dataa2);
> + iowrite32(0x0, &priv->regs->ifregs[0].datab1);
> + iowrite32(0x0, &priv->regs->ifregs[0].datab2);
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
> PCH_CMASK_ARB | PCH_CMASK_CTRL,
> - &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, i+1);
> + &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, i+1);
> }
>
> for (i = i; i < PCH_OBJ_NUM; i++) {
> - iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->if2_cmask);
> - iowrite32(0xffff, &priv->regs->if2_mask1);
> - iowrite32(0xffff, &priv->regs->if2_mask2);
> - iowrite32(0x0, &priv->regs->if2_id1);
> - iowrite32(0x0, &priv->regs->if2_id2);
> - iowrite32(0x0, &priv->regs->if2_mcont);
> - iowrite32(0x0, &priv->regs->if2_dataa1);
> - iowrite32(0x0, &priv->regs->if2_dataa2);
> - iowrite32(0x0, &priv->regs->if2_datab1);
> - iowrite32(0x0, &priv->regs->if2_datab2);
> + iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->ifregs[1].cmask);
> + iowrite32(0xffff, &priv->regs->ifregs[1].mask1);
> + iowrite32(0xffff, &priv->regs->ifregs[1].mask2);
> + iowrite32(0x0, &priv->regs->ifregs[1].id1);
> + iowrite32(0x0, &priv->regs->ifregs[1].id2);
> + iowrite32(0x0, &priv->regs->ifregs[1].mcont);
> + iowrite32(0x0, &priv->regs->ifregs[1].dataa1);
> + iowrite32(0x0, &priv->regs->ifregs[1].dataa2);
> + iowrite32(0x0, &priv->regs->ifregs[1].datab1);
> + iowrite32(0x0, &priv->regs->ifregs[1].datab2);
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
> PCH_CMASK_ARB | PCH_CMASK_CTRL,
> - &priv->regs->if2_cmask);
> - pch_can_check_if_busy(&priv->regs->if2_creq, i+1);
> + &priv->regs->ifregs[1].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq, i+1);
> }
> }
>
> @@ -530,58 +479,60 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
> for (i = 0; i < PCH_OBJ_NUM; i++) {
> if (priv->msg_obj[i] == PCH_MSG_OBJ_RX) {
> iowrite32(PCH_CMASK_RX_TX_GET,
> - &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, i+1);
> + &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, i+1);
>
> - iowrite32(0x0, &priv->regs->if1_id1);
> - iowrite32(0x0, &priv->regs->if1_id2);
> + iowrite32(0x0, &priv->regs->ifregs[0].id1);
> + iowrite32(0x0, &priv->regs->ifregs[0].id2);
>
> - pch_can_bit_set(&priv->regs->if1_mcont,
> + pch_can_bit_set(&priv->regs->ifregs[0].mcont,
> PCH_IF_MCONT_UMASK);
>
> /* Set FIFO mode set to 0 except last Rx Obj*/
> - pch_can_bit_clear(&priv->regs->if1_mcont,
> + pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> PCH_IF_MCONT_EOB);
> /* In case FIFO mode, Last EoB of Rx Obj must be 1 */
> if (i == (PCH_RX_OBJ_NUM - 1))
> - pch_can_bit_set(&priv->regs->if1_mcont,
> + pch_can_bit_set(&priv->regs->ifregs[0].mcont,
> PCH_IF_MCONT_EOB);
>
> - iowrite32(0, &priv->regs->if1_mask1);
> - pch_can_bit_clear(&priv->regs->if1_mask2,
> + iowrite32(0, &priv->regs->ifregs[0].mask1);
> + pch_can_bit_clear(&priv->regs->ifregs[0].mask2,
> 0x1fff | PCH_MASK2_MDIR_MXTD);
>
> /* Setting CMASK for writing */
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
> PCH_CMASK_ARB | PCH_CMASK_CTRL,
> - &priv->regs->if1_cmask);
> + &priv->regs->ifregs[0].cmask);
>
> - pch_can_check_if_busy(&priv->regs->if1_creq, i+1);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, i+1);
> } else if (priv->msg_obj[i] == PCH_MSG_OBJ_TX) {
> iowrite32(PCH_CMASK_RX_TX_GET,
> - &priv->regs->if2_cmask);
> - pch_can_check_if_busy(&priv->regs->if2_creq, i+1);
> + &priv->regs->ifregs[1].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq, i+1);
>
> /* Resetting DIR bit for reception */
> - iowrite32(0x0, &priv->regs->if2_id1);
> - iowrite32(0x0, &priv->regs->if2_id2);
> - pch_can_bit_set(&priv->regs->if2_id2, PCH_ID2_DIR);
> + iowrite32(0x0, &priv->regs->ifregs[1].id1);
> + iowrite32(0x0, &priv->regs->ifregs[1].id2);
> + pch_can_bit_set(&priv->regs->ifregs[1].id2,
> + PCH_ID2_DIR);
>
> /* Setting EOB bit for transmitter */
> - iowrite32(PCH_IF_MCONT_EOB, &priv->regs->if2_mcont);
> + iowrite32(PCH_IF_MCONT_EOB,
> + &priv->regs->ifregs[1].mcont);
>
> - pch_can_bit_set(&priv->regs->if2_mcont,
> + pch_can_bit_set(&priv->regs->ifregs[1].mcont,
> PCH_IF_MCONT_UMASK);
>
> - iowrite32(0, &priv->regs->if2_mask1);
> - pch_can_bit_clear(&priv->regs->if2_mask2, 0x1fff);
> + iowrite32(0, &priv->regs->ifregs[1].mask1);
> + pch_can_bit_clear(&priv->regs->ifregs[1].mask2, 0x1fff);
>
> /* Setting CMASK for writing */
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
> PCH_CMASK_ARB | PCH_CMASK_CTRL,
> - &priv->regs->if2_cmask);
> + &priv->regs->ifregs[1].cmask);
>
> - pch_can_check_if_busy(&priv->regs->if2_creq, i+1);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq, i+1);
> }
> }
> spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> @@ -611,10 +562,10 @@ static void pch_can_release(struct pch_can_priv *priv)
> pch_can_set_int_enables(priv, PCH_CAN_NONE);
>
> /* Disabling all the receive object. */
> - pch_can_rx_disable_all(priv);
> + pch_can_set_rx_all(priv, 0);
>
> /* Disabling all the transmit object. */
> - pch_can_tx_disable_all(priv);
> + pch_can_set_tx_all(priv, 0);
> }
>
> /* This function clears interrupt(s) from the CAN device. */
> @@ -630,31 +581,31 @@ static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)
> /* Setting CMASK for clearing interrupts for
> frame transmission. */
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB,
> - &priv->regs->if2_cmask);
> + &priv->regs->ifregs[1].cmask);
>
> /* Resetting the ID registers. */
> - pch_can_bit_set(&priv->regs->if2_id2,
> + pch_can_bit_set(&priv->regs->ifregs[1].id2,
> PCH_ID2_DIR | (0x7ff << 2));
> - iowrite32(0x0, &priv->regs->if2_id1);
> + iowrite32(0x0, &priv->regs->ifregs[1].id1);
>
> /* Claring NewDat, TxRqst & IntPnd */
> - pch_can_bit_clear(&priv->regs->if2_mcont,
> + pch_can_bit_clear(&priv->regs->ifregs[1].mcont,
> PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND |
> PCH_IF_MCONT_TXRQXT);
> - pch_can_check_if_busy(&priv->regs->if2_creq, mask);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq, mask);
> } else if (priv->msg_obj[mask - 1] == PCH_MSG_OBJ_RX) {
> /* Setting CMASK for clearing the reception interrupts. */
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB,
> - &priv->regs->if1_cmask);
> + &priv->regs->ifregs[0].cmask);
>
> /* Clearing the Dir bit. */
> - pch_can_bit_clear(&priv->regs->if1_id2, PCH_ID2_DIR);
> + pch_can_bit_clear(&priv->regs->ifregs[0].id2, PCH_ID2_DIR);
>
> /* Clearing NewDat & IntPnd */
> - pch_can_bit_clear(&priv->regs->if1_mcont,
> + pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND);
>
> - pch_can_check_if_busy(&priv->regs->if1_creq, mask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, mask);
> }
> }
>
> @@ -685,8 +636,8 @@ static void pch_can_error(struct net_device *ndev, u32 status)
> return;
>
> if (status & PCH_BUS_OFF) {
> - pch_can_tx_disable_all(priv);
> - pch_can_rx_disable_all(priv);
> + pch_can_set_tx_all(priv, 0);
> + pch_can_set_rx_all(priv, 0);
> state = CAN_STATE_BUS_OFF;
> cf->can_id |= CAN_ERR_BUSOFF;
> can_bus_off(ndev);
> @@ -783,22 +734,22 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
> struct net_device_stats *stats = &(priv->ndev->stats);
>
> /* Reading the messsage object from the Message RAM */
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, int_stat);
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, int_stat);
>
> /* Reading the MCONT register. */
> - reg = ioread32(&priv->regs->if1_mcont);
> + reg = ioread32(&priv->regs->ifregs[0].mcont);
> reg &= 0xffff;
>
> for (k = int_stat; !(reg & PCH_IF_MCONT_EOB); k++) {
> /* If MsgLost bit set. */
> if (reg & PCH_IF_MCONT_MSGLOST) {
> dev_err(&priv->ndev->dev, "Msg Obj is overwritten.\n");
> - pch_can_bit_clear(&priv->regs->if1_mcont,
> + pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> PCH_IF_MCONT_MSGLOST);
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
> - &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, k);
> + &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
>
> skb = alloc_can_err_skb(ndev, &cf);
> if (!skb)
> @@ -824,29 +775,30 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
> return -ENOMEM;
>
> /* Get Received data */
> - ide = ((ioread32(&priv->regs->if1_id2)) & PCH_ID2_XTD) >> 14;
> + ide = ((ioread32(&priv->regs->ifregs[0].id2)) & PCH_ID2_XTD) >>
> + 14;
> if (ide) {
> - id = (ioread32(&priv->regs->if1_id1) & 0xffff);
> - id |= (((ioread32(&priv->regs->if1_id2)) &
> + id = (ioread32(&priv->regs->ifregs[0].id1) & 0xffff);
> + id |= (((ioread32(&priv->regs->ifregs[0].id2)) &
> 0x1fff) << 16);
> cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG;
> } else {
> - id = (((ioread32(&priv->regs->if1_id2)) &
> - (CAN_SFF_MASK << 2)) >> 2);
> + id = (((ioread32(&priv->regs->ifregs[0].id2)) &
> + (CAN_SFF_MASK << 2)) >> 2);
> cf->can_id = (id & CAN_SFF_MASK);
> }
>
> - rtr = (ioread32(&priv->regs->if1_id2) & PCH_ID2_DIR);
> + rtr = (ioread32(&priv->regs->ifregs[0].id2) & PCH_ID2_DIR);
> if (rtr) {
> cf->can_dlc = 0;
> cf->can_id |= CAN_RTR_FLAG;
> } else {
> - cf->can_dlc = ((ioread32(&priv->regs->if1_mcont)) &
> - 0x0f);
> + cf->can_dlc = ((ioread32(&priv->regs->ifregs[0].mcont))
> + & 0x0f);
> }
>
> for (i = 0, j = 0; i < cf->can_dlc; j++) {
> - reg = ioread32(&priv->regs->if1_dataa1 + j*4);
> + reg = ioread32(&priv->regs->ifregs[0].dataa1 + j*4);
> cf->data[i++] = cpu_to_le32(reg & 0xff);
> if (i == cf->can_dlc)
> break;
> @@ -860,15 +812,16 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
>
> if (k < PCH_FIFO_THRESH) {
> iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL |
> - PCH_CMASK_ARB, &priv->regs->if1_cmask);
> + PCH_CMASK_ARB, &priv->regs->ifregs[0].cmask);
>
> /* Clearing the Dir bit. */
> - pch_can_bit_clear(&priv->regs->if1_id2, PCH_ID2_DIR);
> + pch_can_bit_clear(&priv->regs->ifregs[0].id2,
> + PCH_ID2_DIR);
>
> /* Clearing NewDat & IntPnd */
> - pch_can_bit_clear(&priv->regs->if1_mcont,
> + pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
> PCH_IF_MCONT_INTPND);
> - pch_can_check_if_busy(&priv->regs->if1_creq, k);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
> } else if (k > PCH_FIFO_THRESH) {
> pch_can_int_clr(priv, k);
> } else if (k == PCH_FIFO_THRESH) {
> @@ -878,9 +831,9 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
> }
> RX_NEXT:
> /* Reading the messsage object from the Message RAM */
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if1_cmask);
> - pch_can_check_if_busy(&priv->regs->if1_creq, k + 1);
> - reg = ioread32(&priv->regs->if1_mcont);
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k + 1);
> + reg = ioread32(&priv->regs->ifregs[0].mcont);
> }
>
> return rcv_pkts;
> @@ -910,8 +863,9 @@ INT_STAT:
>
> if (reg_stat & PCH_TX_OK) {
> spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if2_cmask);
> - pch_can_check_if_busy(&priv->regs->if2_creq,
> + iowrite32(PCH_CMASK_RX_TX_GET,
> + &priv->regs->ifregs[1].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq,
> ioread32(&priv->regs->intr));
> spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> pch_can_bit_clear(&priv->regs->stat, PCH_TX_OK);
> @@ -938,10 +892,11 @@ MSG_OBJ:
> can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_NUM - 1);
> spin_lock_irqsave(&priv->msgif_reg_lock, flags);
> iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
> - &priv->regs->if2_cmask);
> - dlc = ioread32(&priv->regs->if2_mcont) &
> + &priv->regs->ifregs[1].cmask);
> + dlc = ioread32(&priv->regs->ifregs[1].mcont) &
> PCH_IF_MCONT_DLC;
> - pch_can_check_if_busy(&priv->regs->if2_creq, int_stat);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq,
> + int_stat);
> spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
> if (dlc > 8)
> dlc = 8;
> @@ -996,8 +951,8 @@ static void pch_can_start(struct net_device *ndev)
> pch_set_bittiming(ndev);
> pch_can_set_optmode(priv);
>
> - pch_can_tx_enable_all(priv);
> - pch_can_rx_enable_all(priv);
> + pch_can_set_tx_all(priv, 1);
> + pch_can_set_rx_all(priv, 1);
>
> /* Setting the CAN to run mode. */
> pch_can_set_run_mode(priv, PCH_CAN_RUN);
> @@ -1125,54 +1080,55 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
> spin_lock_irqsave(&priv->msgif_reg_lock, flags);
>
> /* Reading the Msg Obj from the Msg RAM to the Interface register. */
> - iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->if2_cmask);
> - pch_can_check_if_busy(&priv->regs->if2_creq, tx_buffer_avail);
> + iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[1].cmask);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq, tx_buffer_avail);
>
> /* Setting the CMASK register. */
> - pch_can_bit_set(&priv->regs->if2_cmask, PCH_CMASK_ALL);
> + pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL);
>
> /* If ID extended is set. */
> - pch_can_bit_clear(&priv->regs->if2_id1, 0xffff);
> - pch_can_bit_clear(&priv->regs->if2_id2, 0x1fff | PCH_ID2_XTD);
> + pch_can_bit_clear(&priv->regs->ifregs[1].id1, 0xffff);
> + pch_can_bit_clear(&priv->regs->ifregs[1].id2, 0x1fff | PCH_ID2_XTD);
> if (cf->can_id & CAN_EFF_FLAG) {
> - pch_can_bit_set(&priv->regs->if2_id1, cf->can_id & 0xffff);
> - pch_can_bit_set(&priv->regs->if2_id2,
> + pch_can_bit_set(&priv->regs->ifregs[1].id1,
> + cf->can_id & 0xffff);
> + pch_can_bit_set(&priv->regs->ifregs[1].id2,
> ((cf->can_id >> 16) & 0x1fff) | PCH_ID2_XTD);
> } else {
> - pch_can_bit_set(&priv->regs->if2_id1, 0);
> - pch_can_bit_set(&priv->regs->if2_id2,
> + pch_can_bit_set(&priv->regs->ifregs[1].id1, 0);
> + pch_can_bit_set(&priv->regs->ifregs[1].id2,
> (cf->can_id & CAN_SFF_MASK) << 2);
> }
>
> /* If remote frame has to be transmitted.. */
> if (cf->can_id & CAN_RTR_FLAG)
> - pch_can_bit_clear(&priv->regs->if2_id2, PCH_ID2_DIR);
> + pch_can_bit_clear(&priv->regs->ifregs[1].id2, PCH_ID2_DIR);
>
> for (i = 0, j = 0; i < cf->can_dlc; j++) {
> iowrite32(le32_to_cpu(cf->data[i++]),
> - (&priv->regs->if2_dataa1) + j*4);
> + (&priv->regs->ifregs[1].dataa1) + j*4);
> if (i == cf->can_dlc)
> break;
> iowrite32(le32_to_cpu(cf->data[i++] << 8),
> - (&priv->regs->if2_dataa1) + j*4);
> + (&priv->regs->ifregs[1].dataa1) + j*4);
> }
>
> can_put_echo_skb(skb, ndev, tx_buffer_avail - PCH_RX_OBJ_NUM - 1);
>
> /* Updating the size of the data. */
> - pch_can_bit_clear(&priv->regs->if2_mcont, 0x0f);
> - pch_can_bit_set(&priv->regs->if2_mcont, cf->can_dlc);
> + pch_can_bit_clear(&priv->regs->ifregs[1].mcont, 0x0f);
> + pch_can_bit_set(&priv->regs->ifregs[1].mcont, cf->can_dlc);
>
> /* Clearing IntPend, NewDat & TxRqst */
> - pch_can_bit_clear(&priv->regs->if2_mcont,
> + pch_can_bit_clear(&priv->regs->ifregs[1].mcont,
> PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND |
> PCH_IF_MCONT_TXRQXT);
>
> /* Setting NewDat, TxRqst bits */
> - pch_can_bit_set(&priv->regs->if2_mcont,
> + pch_can_bit_set(&priv->regs->ifregs[1].mcont,
> PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT);
>
> - pch_can_check_if_busy(&priv->regs->if2_creq, tx_buffer_avail);
> + pch_can_check_if_busy(&priv->regs->ifregs[1].creq, tx_buffer_avail);
>
> spin_unlock_irqrestore(&priv->msgif_reg_lock, flags);
>
> @@ -1234,25 +1190,25 @@ static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
> /* Save Tx buffer enable state */
> for (i = 0; i < PCH_OBJ_NUM; i++) {
> if (priv->msg_obj[i] == PCH_MSG_OBJ_TX)
> - pch_can_get_tx_enable(priv, i + 1,
> - &(priv->tx_enable[i]));
> + priv->tx_enable[i] = pch_can_get_rxtx_ir(priv, i + 1,
> + PCH_TX_IFREG);
> }
>
> /* Disable all Transmit buffers */
> - pch_can_tx_disable_all(priv);
> + pch_can_set_tx_all(priv, 0);
>
> /* Save Rx buffer enable state */
> for (i = 0; i < PCH_OBJ_NUM; i++) {
> if (priv->msg_obj[i] == PCH_MSG_OBJ_RX) {
> - pch_can_get_rx_enable(priv, i + 1,
> - &(priv->rx_enable[i]));
> + priv->rx_enable[i] = pch_can_get_rxtx_ir(priv, i + 1,
> + PCH_RX_IFREG);
> pch_can_get_rx_buffer_link(priv, i + 1,
> &(priv->rx_link[i]));
> }
> }
>
> /* Disable all Receive buffers */
> - pch_can_rx_disable_all(priv);
> + pch_can_set_rx_all(priv, 0);
> retval = pci_save_state(pdev);
> if (retval) {
> dev_err(&pdev->dev, "pci_save_state failed.\n");
> @@ -1301,10 +1257,9 @@ static int pch_can_resume(struct pci_dev *pdev)
>
> /* Enabling the transmit buffer. */
> for (i = 0; i < PCH_OBJ_NUM; i++) {
> - if (priv->msg_obj[i] == PCH_MSG_OBJ_TX) {
> - pch_can_set_tx_enable(priv, i + 1,
> - priv->tx_enable[i]);
> - }
> + if (priv->msg_obj[i] == PCH_MSG_OBJ_TX)
> + pch_can_set_rxtx(priv, i, priv->tx_enable[i],
> + PCH_TX_IFREG);
> }
>
> /* Configuring the receive buffer and enabling them. */
> @@ -1315,7 +1270,9 @@ static int pch_can_resume(struct pci_dev *pdev)
> priv->rx_link[i]);
>
> /* Restore buffer enables */
> - pch_can_set_rx_enable(priv, i + 1, priv->rx_enable[i]);
> + pch_can_set_rxtx(priv, i, priv->rx_enable[i],
> + PCH_RX_IFREG);
> +
> }
> }
>
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
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_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core
^ permalink raw reply
* Re: [PATCH net-next-2.6 01/19 v5] can: EG20T PCH: Separate Interface Register(IF1/IF2)
From: Marc Kleine-Budde @ 2010-11-26 10:04 UTC (permalink / raw)
To: Tomoya MORINAGA
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w, Samuel Ortiz,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA, Christian Pellegrin,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w, David S. Miller,
Wolfgang Grandegger, qi.wang-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <4CEF84BE.7000101-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
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On 11/26/2010 10:58 AM, Marc Kleine-Budde wrote:
> On 11/26/2010 03:01 AM, Tomoya MORINAGA wrote:
>> Separate interface register from whole of register structure.
>> CAN register of Intel PCH EG20T has 2 sets of interface register.
>> To reduce whole of code size, separate interface register.
>> As a result, the number of function also can be reduced.
>
> nitpick: it's unusual to have leading whitespace in the patch description.
maybe it's a problem of your mailer.
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
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_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core
^ permalink raw reply
* Re: [PATCH] net: Fix __inet_inherit_port() to correctly increment bsockets and num_owners
From: Eric Dumazet @ 2010-11-26 10:47 UTC (permalink / raw)
To: Nagendra Tomar; +Cc: netdev, davem, Evgeniy Polyakov
In-Reply-To: <751926.73238.qm@web53707.mail.re2.yahoo.com>
From: Nagendra Tomar <tomer_iisc@yahoo.com>
Le vendredi 26 novembre 2010 à 01:40 -0800, Nagendra Tomar a écrit :
>
> --- On Fri, 26/11/10, Eric Dumazet <eric.dumazet@gmail.com> wrote:
>
> >
> > OK so you'll have to make a proof, because current code
> > seems to work ;)
> >
> >
>
> ok, so I printed hashinfo->bsockets and tb->num_owners inside
> __inet_put_port() and I could see both of them to be -ve. All we need
> to do is establish and terminate a connection. I used netcat for that.
>
> The only place 'bsockets' and 'num_owners' are used is
> inet_csk_get_port() and the only effect that they might have is on the
> choice of the port to be used for binding.
> 'bsockets' is used as a hint to stop searching for a free port (and
> instead share an already used port) when we know that all the ports
> could be used up.
> 'num_owners' is used to find the port which is least shared (to
> balance the 'owners' list) in case we need to share a port.
>
> Since both of these are used as optimizations (in the bind path), they
> do not affect correctness and hence the code works even with these
> values not being updated correctly.
Hmm, thanks for clarification.
bsockets / mnum_owners iscount is indeed an 'optimization' problem.
Problem is your patch is not applicable to current tree.
In order to submit it to stable team, you should first post a patch for
next/current kernel (net-next-2.6 tree).
David will decide if its net-2.6 material or not.
You could add in your changelog the problem comes from commit
a9d8f9110d7e953c (inet: Allowing more than 64k connections and heavily
optimize bind(0)), included in 2.6.30, to ease stable team work.
On current tree your patch would be :
diff --git a/net/ipv4/inet_hashtables.c b/net/ipv4/inet_hashtables.c
index 1b344f3..3c0369a 100644
--- a/net/ipv4/inet_hashtables.c
+++ b/net/ipv4/inet_hashtables.c
@@ -133,8 +133,7 @@ int __inet_inherit_port(struct sock *sk, struct sock *child)
}
}
}
- sk_add_bind_node(child, &tb->owners);
- inet_csk(child)->icsk_bind_hash = tb;
+ inet_bind_hash(child, tb, port);
spin_unlock(&head->lock);
return 0;
^ permalink raw reply related
* Re: [PATCH] net: Fix __inet_inherit_port() to correctly increment bsockets and num_owners
From: Nagendra Tomar @ 2010-11-26 11:01 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, davem, Evgeniy Polyakov
In-Reply-To: <1290768477.2855.97.camel@edumazet-laptop>
--- On Fri, 26/11/10, Eric Dumazet <eric.dumazet@gmail.com> wrote:
>
> Problem is your patch is not applicable to current tree.
>
> In order to submit it to stable team, you should first post
> a patch for
> next/current kernel (net-next-2.6 tree).
>
Thanks, Erik.
I'd made the patch against 2.6.36.1 which is the latest stable kernel per kernel.org. I thought that was the right kernel version to make a patch against.
I do not use git. Shall I make a patch against linux-next as it appears in kernel.org.
> David will decide if its net-2.6 material or not.
>
> You could add in your changelog the problem comes from
> commit
> a9d8f9110d7e953c (inet: Allowing more than 64k connections
> and heavily
> optimize bind(0)), included in 2.6.30, to ease stable team
> work.
>
> On current tree your patch would be :
>
> diff --git a/net/ipv4/inet_hashtables.c
> b/net/ipv4/inet_hashtables.c
> index 1b344f3..3c0369a 100644
> --- a/net/ipv4/inet_hashtables.c
> +++ b/net/ipv4/inet_hashtables.c
> @@ -133,8 +133,7 @@ int __inet_inherit_port(struct sock
> *sk, struct sock *child)
>
> }
> }
> }
> - sk_add_bind_node(child,
> &tb->owners);
> - inet_csk(child)->icsk_bind_hash =
> tb;
> + inet_bind_hash(child, tb, port);
> spin_unlock(&head->lock);
>
> return 0;
>
>
>
Thanks,
Tomar
^ permalink raw reply
* Re: [PATCH] net: Fix __inet_inherit_port() to correctly increment bsockets and num_owners
From: Evgeniy Polyakov @ 2010-11-26 11:07 UTC (permalink / raw)
To: Eric Dumazet; +Cc: Nagendra Tomar, netdev, davem
In-Reply-To: <1290768477.2855.97.camel@edumazet-laptop>
Hi.
On Fri, Nov 26, 2010 at 11:47:57AM +0100, Eric Dumazet (eric.dumazet@gmail.com) wrote:
> > ok, so I printed hashinfo->bsockets and tb->num_owners inside
> > __inet_put_port() and I could see both of them to be -ve. All we need
> > to do is establish and terminate a connection. I used netcat for that.
> >
> > The only place 'bsockets' and 'num_owners' are used is
> > inet_csk_get_port() and the only effect that they might have is on the
> > choice of the port to be used for binding.
> > 'bsockets' is used as a hint to stop searching for a free port (and
> > instead share an already used port) when we know that all the ports
> > could be used up.
> > 'num_owners' is used to find the port which is least shared (to
> > balance the 'owners' list) in case we need to share a port.
> >
> > Since both of these are used as optimizations (in the bind path), they
> > do not affect correctness and hence the code works even with these
> > values not being updated correctly.
>
> Hmm, thanks for clarification.
>
> bsockets / mnum_owners iscount is indeed an 'optimization' problem.
>
> Problem is your patch is not applicable to current tree.
>
> In order to submit it to stable team, you should first post a patch for
> next/current kernel (net-next-2.6 tree).
>
> David will decide if its net-2.6 material or not.
>
> You could add in your changelog the problem comes from commit
> a9d8f9110d7e953c (inet: Allowing more than 64k connections and heavily
> optimize bind(0)), included in 2.6.30, to ease stable team work.
Frankly I did not find how those optimizations made a bug as well as
what is this bug about from given description, but I'm glad it is resolved now :)
--
Evgeniy Polyakov
^ permalink raw reply
* Re: [PATCH] net: Fix __inet_inherit_port() to correctly increment bsockets and num_owners
From: Nagendra Tomar @ 2010-11-26 11:20 UTC (permalink / raw)
To: Eric Dumazet, Evgeniy Polyakov; +Cc: netdev, davem
In-Reply-To: <20101126110726.GA5648@ioremap.net>
--- On Fri, 26/11/10, Evgeniy Polyakov <zbr@ioremap.net> wrote:
> Frankly I did not find how those optimizations made a bug
> as well as
> what is this bug about from given description, but I'm glad
> it is resolved now :)
>
I'm not sure of what all went into the "optimization" patch, but the bug is not due to the optimization per-se. As my original post says, it is due to the 'bsockets' and 'num_owners' not being incremented inside __inet_inherit_port(), where it should have been, as __inet_put_port() decrements them on port release, which causes the imbalance.
Thanks,
Tomar
^ permalink raw reply
* [PATCH] net/r8169: Correct the ram code for RTL8111D(L)
From: Hayes Wang @ 2010-11-26 11:54 UTC (permalink / raw)
To: romieu; +Cc: netdev, linux-kernel, Hayes Wang
Correct the binary code (Low pass filter & DLY_CAP fine tune from uC).
The incorrect ram code would make the nic working abnormally.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/r8169.c | 141 +++++++++++++++++++++++++++++++++++++++++----------
1 files changed, 113 insertions(+), 28 deletions(-)
mode change 100644 => 100755 drivers/net/r8169.c
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
old mode 100644
new mode 100755
index 7d33ef4..c069381
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1718,6 +1718,7 @@ static void rtl8168c_4_hw_phy_config(void __iomem *ioaddr)
static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
{
static const struct phy_reg phy_reg_init_0[] = {
+ /* Channel Estimation */
{ 0x1f, 0x0001 },
{ 0x06, 0x4064 },
{ 0x07, 0x2863 },
@@ -1734,19 +1735,33 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
{ 0x12, 0xf49f },
{ 0x13, 0x070b },
{ 0x1a, 0x05ad },
- { 0x14, 0x94c0 }
- };
- static const struct phy_reg phy_reg_init_1[] = {
+ { 0x14, 0x94c0 },
+
+ /*
+ * Tx Error Issue
+ * enhance line driver power
+ */
{ 0x1f, 0x0002 },
{ 0x06, 0x5561 },
{ 0x1f, 0x0005 },
{ 0x05, 0x8332 },
- { 0x06, 0x5561 }
+ { 0x06, 0x5561 },
+
+ /*
+ * Can not link to 1Gbps with bad cable
+ * Decrease SNR threshold form 21.07dB to 19.04dB
+ */
+ { 0x1f, 0x0001 },
+ { 0x17, 0x0cc0 },
+
+ { 0x1f, 0x0000 },
+ { 0x0d, 0xf880 }
};
static const struct phy_reg phy_reg_init_2[] = {
+ /* Low pass filter & DLY_CAP fine tune from uC */
{ 0x1f, 0x0005 },
- { 0x05, 0xffc2 },
- { 0x1f, 0x0005 },
+ { 0x05, 0xfff6 },
+ { 0x06, 0x0080 },
{ 0x05, 0x8000 },
{ 0x06, 0xf8f9 },
{ 0x06, 0xfaef },
@@ -2084,29 +2099,51 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
{ 0x06, 0xff01 },
{ 0x06, 0x4edd },
{ 0x06, 0xff01 },
- { 0x05, 0x83d4 },
- { 0x06, 0x8000 },
+ { 0x06, 0xf8fa },
+ { 0x06, 0xfbef },
+ { 0x06, 0x79bf },
+ { 0x06, 0xf822 },
+ { 0x06, 0xd819 },
+ { 0x06, 0xd958 },
+ { 0x06, 0x849f },
+ { 0x06, 0x09bf },
+ { 0x06, 0x82be },
+ { 0x06, 0xd682 },
+ { 0x06, 0xc602 },
+ { 0x06, 0x014f },
+ { 0x06, 0xef97 },
+ { 0x06, 0xfffe },
+ { 0x06, 0xfc05 },
+ { 0x06, 0x17ff },
+ { 0x06, 0xfe01 },
+ { 0x06, 0x1700 },
+ { 0x06, 0x0102 },
{ 0x05, 0x83d8 },
{ 0x06, 0x8051 },
- { 0x02, 0x6010 },
+ { 0x05, 0x83d6 },
+ { 0x06, 0x82a0 },
+ { 0x05, 0x83d4 },
+ { 0x06, 0x8000 },
+ { 0x02, 0x2010 },
{ 0x03, 0xdc00 },
+ { 0x1f, 0x0000 },
+ { 0x0b, 0x0600 },
+ { 0x1f, 0x0005 },
{ 0x05, 0xfff6 },
{ 0x06, 0x00fc },
- { 0x1f, 0x0000 },
-
- { 0x1f, 0x0000 },
- { 0x0d, 0xf880 },
{ 0x1f, 0x0000 }
};
rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
+ /*
+ * Rx Error Issue
+ * Fine Tune Switching regulator parameter
+ */
mdio_write(ioaddr, 0x1f, 0x0002);
mdio_plus_minus(ioaddr, 0x0b, 0x0010, 0x00ef);
mdio_plus_minus(ioaddr, 0x0c, 0xa200, 0x5d00);
- rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
-
if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
static const struct phy_reg phy_reg_init[] = {
{ 0x1f, 0x0002 },
@@ -2147,20 +2184,28 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}
+ /* RSET couple improve */
mdio_write(ioaddr, 0x1f, 0x0002);
mdio_patch(ioaddr, 0x0d, 0x0300);
mdio_patch(ioaddr, 0x0f, 0x0010);
+ /* Fine tune PLL performance */
mdio_write(ioaddr, 0x1f, 0x0002);
mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
- rtl_phy_write(ioaddr, phy_reg_init_2, ARRAY_SIZE(phy_reg_init_2));
+ mdio_write(ioaddr, 0x1F, 0x0005);
+ mdio_write(ioaddr, 0x05, 0x001B);
+ if (mdio_read(ioaddr, 0x06) == 0xBF00)
+ rtl_phy_write(ioaddr, phy_reg_init_2, ARRAY_SIZE(phy_reg_init_2));
+
+ mdio_write(ioaddr, 0x1f, 0x0000);
}
static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
{
static const struct phy_reg phy_reg_init_0[] = {
+ /* Channel Estimation */
{ 0x1f, 0x0001 },
{ 0x06, 0x4064 },
{ 0x07, 0x2863 },
@@ -2179,16 +2224,31 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
{ 0x1a, 0x05ad },
{ 0x14, 0x94c0 },
+ /*
+ * Tx Error Issue
+ * enhance line driver power
+ */
{ 0x1f, 0x0002 },
{ 0x06, 0x5561 },
{ 0x1f, 0x0005 },
{ 0x05, 0x8332 },
- { 0x06, 0x5561 }
+ { 0x06, 0x5561 },
+
+ /*
+ * Can not link to 1Gbps with bad cable
+ * Decrease SNR threshold form 21.07dB to 19.04dB
+ */
+ { 0x1f, 0x0001 },
+ { 0x17, 0x0cc0 },
+
+ { 0x1f, 0x0000 },
+ { 0x0d, 0xf880 }
};
static const struct phy_reg phy_reg_init_1[] = {
+ /* Low pass filter & DLY_CAP fine tune from uC */
{ 0x1f, 0x0005 },
- { 0x05, 0xffc2 },
- { 0x1f, 0x0005 },
+ { 0x05, 0xfff6 },
+ { 0x06, 0x0080 },
{ 0x05, 0x8000 },
{ 0x06, 0xf8f9 },
{ 0x06, 0xfaee },
@@ -2485,16 +2545,37 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
{ 0x06, 0xdfff },
{ 0x06, 0x014e },
{ 0x06, 0xddff },
- { 0x06, 0x0100 },
+ { 0x06, 0x01f8 },
+ { 0x06, 0xfafb },
+ { 0x06, 0xef79 },
+ { 0x06, 0xbff8 },
+ { 0x06, 0x22d8 },
+ { 0x06, 0x19d9 },
+ { 0x06, 0x5884 },
+ { 0x06, 0x9f09 },
+ { 0x06, 0xbf82 },
+ { 0x06, 0x6dd6 },
+ { 0x06, 0x8275 },
+ { 0x06, 0x0201 },
+ { 0x06, 0x4fef },
+ { 0x06, 0x97ff },
+ { 0x06, 0xfefc },
+ { 0x06, 0x0517 },
+ { 0x06, 0xfffe },
+ { 0x06, 0x0117 },
+ { 0x06, 0x0001 },
+ { 0x06, 0x0200 },
{ 0x05, 0x83d8 },
{ 0x06, 0x8000 },
+ { 0x05, 0x83d6 },
+ { 0x06, 0x824f },
+ { 0x02, 0x2010 },
{ 0x03, 0xdc00 },
+ { 0x1f, 0x0000 },
+ { 0x0b, 0x0600 },
+ { 0x1f, 0x0005 },
{ 0x05, 0xfff6 },
{ 0x06, 0x00fc },
- { 0x1f, 0x0000 },
-
- { 0x1f, 0x0000 },
- { 0x0d, 0xf880 },
{ 0x1f, 0x0000 }
};
@@ -2540,17 +2621,21 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}
+ /* Fine tune PLL performance */
mdio_write(ioaddr, 0x1f, 0x0002);
mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
- mdio_write(ioaddr, 0x1f, 0x0001);
- mdio_write(ioaddr, 0x17, 0x0cc0);
-
+ /* Switching regulator Slew rate */
mdio_write(ioaddr, 0x1f, 0x0002);
mdio_patch(ioaddr, 0x0f, 0x0017);
- rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
+ mdio_write(ioaddr, 0x1F, 0x0005);
+ mdio_write(ioaddr, 0x05, 0x001B);
+ if (mdio_read(ioaddr, 0x06) == 0xB300)
+ rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
+
+ mdio_write(ioaddr, 0x1f, 0x0000);
}
static void rtl8168d_3_hw_phy_config(void __iomem *ioaddr)
--
1.7.3.2
^ permalink raw reply related
* Re: [PATCH] MAINTAINERS: add second list for IRDA
From: Samuel Ortiz @ 2010-11-26 12:09 UTC (permalink / raw)
To: Wolfram Sang; +Cc: netdev, David Miller
In-Reply-To: <1290535813-7487-1-git-send-email-w.sang@pengutronix.de>
Hi Wolfgang,
On Tue, Nov 23, 2010 at 07:10:13PM +0100, Wolfram Sang wrote:
> The irda-users-list is currently almost dead and subscribers-only. Adding
> netdev increases the audience which might help to not overlook a bugreport
> (again).
Makes sense. I'll carry this patch, thanks.
Cheers,
Samuel.
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Samuel Ortiz <sameo@linux.intel.com>
> Cc: David Miller <davem@davemloft.net>
> ---
> MAINTAINERS | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8b6ca96..2596a78 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -3261,6 +3261,7 @@ F: net/ipx/
> IRDA SUBSYSTEM
> M: Samuel Ortiz <samuel@sortiz.org>
> L: irda-users@lists.sourceforge.net (subscribers-only)
> +L: netdev@vger.kernel.org
> W: http://irda.sourceforge.net/
> S: Maintained
> T: git git://git.kernel.org/pub/scm/linux/kernel/git/sameo/irda-2.6.git
> --
> 1.7.2.3
>
--
Intel Open Source Technology Centre
http://oss.intel.com/
^ permalink raw reply
* [patch 3/4] [PATCH] qeth: enable interface setup if LAN is offline
From: frank.blaschka @ 2010-11-26 12:41 UTC (permalink / raw)
To: davem; +Cc: netdev, linux-s390, Ursula Braun
In-Reply-To: <20101126124116.123736494@de.ibm.com>
[-- Attachment #1: 603-qeth-recovery-offline.diff --]
[-- Type: text/plain, Size: 3656 bytes --]
From: Ursula Braun <ursula.braun@de.ibm.com>
Device initialization of a qeth device contains a STARTLAN step.
This step may fail, if cable is not yet plugged in. The qeth device
stays in state HARDSETUP until cable is plugged in. This prevents
further preparational initialization steps of the qeth device and
its network interface. This patch makes sure initialization of qeth
device continues, even though cable is not yet plugged in.
Once carrier is available, qeth is notified, triggers a recovery
which results in a working network interface.
Signed-off-by: Ursula Braun <ursula.braun@de.ibm.com>
Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com>
---
drivers/s390/net/qeth_l2_main.c | 11 ++++++-----
drivers/s390/net/qeth_l3_main.c | 11 ++++++-----
2 files changed, 12 insertions(+), 10 deletions(-)
--- a/drivers/s390/net/qeth_l2_main.c
+++ b/drivers/s390/net/qeth_l2_main.c
@@ -849,8 +849,6 @@ static int qeth_l2_open(struct net_devic
card->state = CARD_STATE_UP;
netif_start_queue(dev);
- if (!card->lan_online && netif_carrier_ok(dev))
- netif_carrier_off(dev);
if (qdio_stop_irq(card->data.ccwdev, 0) >= 0) {
napi_enable(&card->napi);
napi_schedule(&card->napi);
@@ -1013,13 +1011,14 @@ static int __qeth_l2_set_online(struct c
dev_warn(&card->gdev->dev,
"The LAN is offline\n");
card->lan_online = 0;
- goto out;
+ goto contin;
}
rc = -ENODEV;
goto out_remove;
} else
card->lan_online = 1;
+contin:
if ((card->info.type == QETH_CARD_TYPE_OSD) ||
(card->info.type == QETH_CARD_TYPE_OSX))
/* configure isolation level */
@@ -1038,7 +1037,10 @@ static int __qeth_l2_set_online(struct c
goto out_remove;
}
card->state = CARD_STATE_SOFTSETUP;
- netif_carrier_on(card->dev);
+ if (card->lan_online)
+ netif_carrier_on(card->dev);
+ else
+ netif_carrier_off(card->dev);
qeth_set_allowed_threads(card, 0xffffffff, 0);
if (recover_flag == CARD_STATE_RECOVER) {
@@ -1055,7 +1057,6 @@ static int __qeth_l2_set_online(struct c
}
/* let user_space know that device is online */
kobject_uevent(&gdev->dev.kobj, KOBJ_CHANGE);
-out:
mutex_unlock(&card->conf_mutex);
mutex_unlock(&card->discipline_mutex);
return 0;
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -3177,8 +3177,6 @@ static int qeth_l3_open(struct net_devic
card->state = CARD_STATE_UP;
netif_start_queue(dev);
- if (!card->lan_online && netif_carrier_ok(dev))
- netif_carrier_off(dev);
if (qdio_stop_irq(card->data.ccwdev, 0) >= 0) {
napi_enable(&card->napi);
napi_schedule(&card->napi);
@@ -3450,13 +3448,14 @@ static int __qeth_l3_set_online(struct c
dev_warn(&card->gdev->dev,
"The LAN is offline\n");
card->lan_online = 0;
- goto out;
+ goto contin;
}
rc = -ENODEV;
goto out_remove;
} else
card->lan_online = 1;
+contin:
rc = qeth_l3_setadapter_parms(card);
if (rc)
QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
@@ -3481,10 +3480,13 @@ static int __qeth_l3_set_online(struct c
goto out_remove;
}
card->state = CARD_STATE_SOFTSETUP;
- netif_carrier_on(card->dev);
qeth_set_allowed_threads(card, 0xffffffff, 0);
qeth_l3_set_ip_addr_list(card);
+ if (card->lan_online)
+ netif_carrier_on(card->dev);
+ else
+ netif_carrier_off(card->dev);
if (recover_flag == CARD_STATE_RECOVER) {
if (recovery_mode)
qeth_l3_open(card->dev);
@@ -3497,7 +3499,6 @@ static int __qeth_l3_set_online(struct c
}
/* let user_space know that device is online */
kobject_uevent(&gdev->dev.kobj, KOBJ_CHANGE);
-out:
mutex_unlock(&card->conf_mutex);
mutex_unlock(&card->discipline_mutex);
return 0;
^ permalink raw reply
* [patch 2/4] [PATCH] drivers/s390/net: Remove unnecessary semicolons
From: frank.blaschka @ 2010-11-26 12:41 UTC (permalink / raw)
To: davem; +Cc: netdev, linux-s390, Joe Perches
In-Reply-To: <20101126124116.123736494@de.ibm.com>
[-- Attachment #1: 602-unnecessary-semicolons.diff --]
[-- Type: text/plain, Size: 606 bytes --]
From: Joe Perches <joe@perches.com>
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com>
---
drivers/s390/net/qeth_core_sys.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/s390/net/qeth_core_sys.c
+++ b/drivers/s390/net/qeth_core_sys.c
@@ -372,7 +372,7 @@ static ssize_t qeth_dev_performance_stat
i = simple_strtoul(buf, &tmp, 16);
if ((i == 0) || (i == 1)) {
if (i == card->options.performance_stats)
- goto out;;
+ goto out;
card->options.performance_stats = i;
if (i == 0)
memset(&card->perf_stats, 0,
^ permalink raw reply
* [patch 0/4] s390: qeth patches for net-next
From: frank.blaschka @ 2010-11-26 12:41 UTC (permalink / raw)
To: davem; +Cc: netdev, linux-s390
Hi Dave,
here are some patches for net-next.
The set contains also the patch from Sachin Sant to fix the s390 build.
shortlog:
Ursula Braun (1)
qeth: enable interface setup if LAN is offline
Joe Perches (1)
drivers/s390/net: Remove unnecessary semicolons
Sachin Sant (1)
qeth lcs: convert mc rwlock to RCU
Frank Blaschka (1)
qeth: l3 fix len in tso hdr
Thanks,
Frank
^ permalink raw reply
* [patch 1/4] [PATCH] qeth lcs: convert mc rwlock to RCU
From: frank.blaschka @ 2010-11-26 12:41 UTC (permalink / raw)
To: davem; +Cc: netdev, linux-s390, Sachin Sant, Ursula Braun
In-Reply-To: <20101126124116.123736494@de.ibm.com>
[-- Attachment #1: qeth_lcs_mc_lock.patch --]
[-- Type: text/plain, Size: 3118 bytes --]
From: Sachin Sant <sachinp@in.ibm.com>
Commit 1d7138de878d1d4210727c1200193e69596f93b3
igmp: RCU conversion of in_dev->mc_list
converted rwlock to RCU.
Update the s390 network drivers(qeth & lcs) code to adapt to this change.
V2 : Changes based on suggestions given by Eric Dumazet
Signed-off-by: Sachin Sant <sachinp@in.ibm.com>
Signed-off-by: Ursula Braun <ursula.braun@de.ibm.com>
Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com>
---
drivers/s390/net/lcs.c | 10 ++++++----
drivers/s390/net/qeth_l3_main.c | 11 ++++++-----
2 files changed, 12 insertions(+), 9 deletions(-)
--- a/drivers/s390/net/lcs.c
+++ b/drivers/s390/net/lcs.c
@@ -1188,7 +1188,8 @@ lcs_remove_mc_addresses(struct lcs_card
spin_lock_irqsave(&card->ipm_lock, flags);
list_for_each(l, &card->ipm_list) {
ipm = list_entry(l, struct lcs_ipm_list, list);
- for (im4 = in4_dev->mc_list; im4 != NULL; im4 = im4->next) {
+ for (im4 = rcu_dereference(in4_dev->mc_list);
+ im4 != NULL; im4 = rcu_dereference(im4->next_rcu)) {
lcs_get_mac_for_ipm(im4->multiaddr, buf, card->dev);
if ( (ipm->ipm.ip_addr == im4->multiaddr) &&
(memcmp(buf, &ipm->ipm.mac_addr,
@@ -1233,7 +1234,8 @@ lcs_set_mc_addresses(struct lcs_card *ca
unsigned long flags;
LCS_DBF_TEXT(4, trace, "setmclst");
- for (im4 = in4_dev->mc_list; im4; im4 = im4->next) {
+ for (im4 = rcu_dereference(in4_dev->mc_list); im4 != NULL;
+ im4 = rcu_dereference(im4->next_rcu)) {
lcs_get_mac_for_ipm(im4->multiaddr, buf, card->dev);
ipm = lcs_check_addr_entry(card, im4, buf);
if (ipm != NULL)
@@ -1269,10 +1271,10 @@ lcs_register_mc_addresses(void *data)
in4_dev = in_dev_get(card->dev);
if (in4_dev == NULL)
goto out;
- read_lock(&in4_dev->mc_list_lock);
+ rcu_read_lock();
lcs_remove_mc_addresses(card,in4_dev);
lcs_set_mc_addresses(card, in4_dev);
- read_unlock(&in4_dev->mc_list_lock);
+ rcu_read_unlock();
in_dev_put(in4_dev);
netif_carrier_off(card->dev);
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -1796,7 +1796,8 @@ static void qeth_l3_add_mc(struct qeth_c
char buf[MAX_ADDR_LEN];
QETH_CARD_TEXT(card, 4, "addmc");
- for (im4 = in4_dev->mc_list; im4; im4 = im4->next) {
+ for (im4 = rcu_dereference(in4_dev->mc_list); im4 != NULL;
+ im4 = rcu_dereference(im4->next_rcu)) {
qeth_l3_get_mac_for_ipm(im4->multiaddr, buf, in4_dev->dev);
ipm = qeth_l3_get_addr_buffer(QETH_PROT_IPV4);
if (!ipm)
@@ -1828,9 +1829,9 @@ static void qeth_l3_add_vlan_mc(struct q
in_dev = in_dev_get(netdev);
if (!in_dev)
continue;
- read_lock(&in_dev->mc_list_lock);
+ rcu_read_lock();
qeth_l3_add_mc(card, in_dev);
- read_unlock(&in_dev->mc_list_lock);
+ rcu_read_unlock();
in_dev_put(in_dev);
}
}
@@ -1843,10 +1844,10 @@ static void qeth_l3_add_multicast_ipv4(s
in4_dev = in_dev_get(card->dev);
if (in4_dev == NULL)
return;
- read_lock(&in4_dev->mc_list_lock);
+ rcu_read_lock();
qeth_l3_add_mc(card, in4_dev);
qeth_l3_add_vlan_mc(card);
- read_unlock(&in4_dev->mc_list_lock);
+ rcu_read_unlock();
in_dev_put(in4_dev);
}
^ permalink raw reply
* [patch 4/4] [PATCH] qeth: l3 fix len in tso hdr
From: frank.blaschka @ 2010-11-26 12:41 UTC (permalink / raw)
To: davem; +Cc: netdev, linux-s390
In-Reply-To: <20101126124116.123736494@de.ibm.com>
[-- Attachment #1: qeth_tso_hdr.patch --]
[-- Type: text/plain, Size: 751 bytes --]
From: Frank Blaschka <frank.blaschka@de.ibm.com>
The tso hdr is longer then the regular l3 hdr. Fix the calculation
of the total len by accounting the size of the tso hdr.
Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com>
---
drivers/s390/net/qeth_l3_main.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -2939,6 +2939,7 @@ static void qeth_tso_fill_header(struct
/*fix header to TSO values ...*/
hdr->hdr.hdr.l3.id = QETH_HEADER_TYPE_TSO;
+ hdr->hdr.hdr.l3.length = skb->len - sizeof(struct qeth_hdr_tso);
/*set values which are fix for the first approach ...*/
hdr->ext.hdr_tot_len = (__u16) sizeof(struct qeth_hdr_ext_tso);
hdr->ext.imb_hdr_no = 1;
^ permalink raw reply
* Re: [PATCH net-next-2.6 12/17 v3] can: EG20T PCH: Fix bit timing calculation issue
From: Marc Kleine-Budde @ 2010-11-26 12:44 UTC (permalink / raw)
To: Tomoya MORINAGA
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w, Samuel Ortiz,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w, Wolfgang Grandegger,
joel.clark-ral2JQCrhuEAvxtiuMwx3w, David S. Miller,
Christian Pellegrin, qi.wang-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <000901cb8cfd$c667d860$66f8800a-a06+6cuVnkTSQfdrb5gaxUEOCMrvLtNR@public.gmane.org>
[-- Attachment #1.1: Type: text/plain, Size: 680 bytes --]
On 11/26/2010 01:06 AM, Tomoya MORINAGA wrote:
> On Wednesday, November 24, 2010 9:58 PM, Marc Kleine-Budde wrote :
>> Masking here shouldn't be necessary but won't hurt, better play safe.
>
> EG20T's baud rate pre-scalar register is divided to 2 register BITT and BRPE.
> Thus, This mask is necessary.
> In fact, deleting this mask, it couldn't communicate correctly.
You're right.
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #1.2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 262 bytes --]
[-- Attachment #2: Type: text/plain, Size: 188 bytes --]
_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core
^ permalink raw reply
* Re: [PATCH] net/r8169: Correct the ram code for RTL8111D(L)
From: Ben Hutchings @ 2010-11-26 13:50 UTC (permalink / raw)
To: Hayes Wang; +Cc: romieu, netdev, linux-kernel, David Miller, 564628
In-Reply-To: <1290772470-23713-1-git-send-email-hayeswang@realtek.com>
[-- Attachment #1: Type: text/plain, Size: 20174 bytes --]
On Fri, 2010-11-26 at 19:54 +0800, Hayes Wang wrote:
> Correct the binary code (Low pass filter & DLY_CAP fine tune from uC).
> The incorrect ram code would make the nic working abnormally.
[...]
I'm glad you finally acknowledge that this is code rather than simple
register initialisation.
Please can you put the microcontroller firmware under a suitable
licence, if you are not intending to release its source code. The GPL
is not suitable as it requires distributions to provide the source code;
that makes the firmware strictly undistributable at present.
An example licence for binary-only redistribution is:
Copyright <date> <company>
Permission is hereby granted for the distribution of this firmware
data in hexadecimal or equivalent format, provided this copyright
notice is accompanying it.
> Signed-off-by: Hayes Wang <hayeswang@realtek.com>
> ---
> drivers/net/r8169.c | 141 +++++++++++++++++++++++++++++++++++++++++----------
> 1 files changed, 113 insertions(+), 28 deletions(-)
> mode change 100644 => 100755 drivers/net/r8169.c
>
> diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
> old mode 100644
> new mode 100755
[...]
Also, please don't add execute permission to source files.
Below are the changes Debian currently applies in preparation for proper
licencing of the firmware.
Ben.
---
Subject: [PATCH] r8169: remove firmware for RTL8169D PHY
The recently added support for RTL8169D chips included some machine
code without accompanying source code. Replace this with use of the
firmware loader.
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
---
drivers/net/r8169.c | 717 ++++-----------------------------------------------
1 files changed, 44 insertions(+), 673 deletions(-)
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 7d33ef4..bfc251a 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -24,6 +24,7 @@
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/pm_runtime.h>
+#include <linux/firmware.h>
#include <asm/system.h>
#include <asm/io.h>
@@ -1383,6 +1384,23 @@ static void rtl_phy_write(void __iomem *ioaddr, const struct phy_reg *regs, int
}
}
+struct phy_reg_le {
+ __le16 reg;
+ __le16 val;
+};
+
+static void rtl_phy_write_fw(void __iomem *ioaddr, const struct firmware *fw)
+{
+ const struct phy_reg_le *regs = (const struct phy_reg_le *)fw->data;
+ size_t len = fw->size / sizeof(*regs);
+
+ while (len-- > 0) {
+ mdio_write(ioaddr, le16_to_cpu(regs->reg),
+ le16_to_cpu(regs->val));
+ regs++;
+ }
+}
+
static void rtl8169s_hw_phy_config(void __iomem *ioaddr)
{
static const struct phy_reg phy_reg_init[] = {
@@ -1715,7 +1733,7 @@ static void rtl8168c_4_hw_phy_config(void __iomem *ioaddr)
rtl8168c_3_hw_phy_config(ioaddr);
}
-static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
+static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
{
static const struct phy_reg phy_reg_init_0[] = {
{ 0x1f, 0x0001 },
@@ -1743,361 +1761,8 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
{ 0x05, 0x8332 },
{ 0x06, 0x5561 }
};
- static const struct phy_reg phy_reg_init_2[] = {
- { 0x1f, 0x0005 },
- { 0x05, 0xffc2 },
- { 0x1f, 0x0005 },
- { 0x05, 0x8000 },
- { 0x06, 0xf8f9 },
- { 0x06, 0xfaef },
- { 0x06, 0x59ee },
- { 0x06, 0xf8ea },
- { 0x06, 0x00ee },
- { 0x06, 0xf8eb },
- { 0x06, 0x00e0 },
- { 0x06, 0xf87c },
- { 0x06, 0xe1f8 },
- { 0x06, 0x7d59 },
- { 0x06, 0x0fef },
- { 0x06, 0x0139 },
- { 0x06, 0x029e },
- { 0x06, 0x06ef },
- { 0x06, 0x1039 },
- { 0x06, 0x089f },
- { 0x06, 0x2aee },
- { 0x06, 0xf8ea },
- { 0x06, 0x00ee },
- { 0x06, 0xf8eb },
- { 0x06, 0x01e0 },
- { 0x06, 0xf87c },
- { 0x06, 0xe1f8 },
- { 0x06, 0x7d58 },
- { 0x06, 0x409e },
- { 0x06, 0x0f39 },
- { 0x06, 0x46aa },
- { 0x06, 0x0bbf },
- { 0x06, 0x8290 },
- { 0x06, 0xd682 },
- { 0x06, 0x9802 },
- { 0x06, 0x014f },
- { 0x06, 0xae09 },
- { 0x06, 0xbf82 },
- { 0x06, 0x98d6 },
- { 0x06, 0x82a0 },
- { 0x06, 0x0201 },
- { 0x06, 0x4fef },
- { 0x06, 0x95fe },
- { 0x06, 0xfdfc },
- { 0x06, 0x05f8 },
- { 0x06, 0xf9fa },
- { 0x06, 0xeef8 },
- { 0x06, 0xea00 },
- { 0x06, 0xeef8 },
- { 0x06, 0xeb00 },
- { 0x06, 0xe2f8 },
- { 0x06, 0x7ce3 },
- { 0x06, 0xf87d },
- { 0x06, 0xa511 },
- { 0x06, 0x1112 },
- { 0x06, 0xd240 },
- { 0x06, 0xd644 },
- { 0x06, 0x4402 },
- { 0x06, 0x8217 },
- { 0x06, 0xd2a0 },
- { 0x06, 0xd6aa },
- { 0x06, 0xaa02 },
- { 0x06, 0x8217 },
- { 0x06, 0xae0f },
- { 0x06, 0xa544 },
- { 0x06, 0x4402 },
- { 0x06, 0xae4d },
- { 0x06, 0xa5aa },
- { 0x06, 0xaa02 },
- { 0x06, 0xae47 },
- { 0x06, 0xaf82 },
- { 0x06, 0x13ee },
- { 0x06, 0x834e },
- { 0x06, 0x00ee },
- { 0x06, 0x834d },
- { 0x06, 0x0fee },
- { 0x06, 0x834c },
- { 0x06, 0x0fee },
- { 0x06, 0x834f },
- { 0x06, 0x00ee },
- { 0x06, 0x8351 },
- { 0x06, 0x00ee },
- { 0x06, 0x834a },
- { 0x06, 0xffee },
- { 0x06, 0x834b },
- { 0x06, 0xffe0 },
- { 0x06, 0x8330 },
- { 0x06, 0xe183 },
- { 0x06, 0x3158 },
- { 0x06, 0xfee4 },
- { 0x06, 0xf88a },
- { 0x06, 0xe5f8 },
- { 0x06, 0x8be0 },
- { 0x06, 0x8332 },
- { 0x06, 0xe183 },
- { 0x06, 0x3359 },
- { 0x06, 0x0fe2 },
- { 0x06, 0x834d },
- { 0x06, 0x0c24 },
- { 0x06, 0x5af0 },
- { 0x06, 0x1e12 },
- { 0x06, 0xe4f8 },
- { 0x06, 0x8ce5 },
- { 0x06, 0xf88d },
- { 0x06, 0xaf82 },
- { 0x06, 0x13e0 },
- { 0x06, 0x834f },
- { 0x06, 0x10e4 },
- { 0x06, 0x834f },
- { 0x06, 0xe083 },
- { 0x06, 0x4e78 },
- { 0x06, 0x009f },
- { 0x06, 0x0ae0 },
- { 0x06, 0x834f },
- { 0x06, 0xa010 },
- { 0x06, 0xa5ee },
- { 0x06, 0x834e },
- { 0x06, 0x01e0 },
- { 0x06, 0x834e },
- { 0x06, 0x7805 },
- { 0x06, 0x9e9a },
- { 0x06, 0xe083 },
- { 0x06, 0x4e78 },
- { 0x06, 0x049e },
- { 0x06, 0x10e0 },
- { 0x06, 0x834e },
- { 0x06, 0x7803 },
- { 0x06, 0x9e0f },
- { 0x06, 0xe083 },
- { 0x06, 0x4e78 },
- { 0x06, 0x019e },
- { 0x06, 0x05ae },
- { 0x06, 0x0caf },
- { 0x06, 0x81f8 },
- { 0x06, 0xaf81 },
- { 0x06, 0xa3af },
- { 0x06, 0x81dc },
- { 0x06, 0xaf82 },
- { 0x06, 0x13ee },
- { 0x06, 0x8348 },
- { 0x06, 0x00ee },
- { 0x06, 0x8349 },
- { 0x06, 0x00e0 },
- { 0x06, 0x8351 },
- { 0x06, 0x10e4 },
- { 0x06, 0x8351 },
- { 0x06, 0x5801 },
- { 0x06, 0x9fea },
- { 0x06, 0xd000 },
- { 0x06, 0xd180 },
- { 0x06, 0x1f66 },
- { 0x06, 0xe2f8 },
- { 0x06, 0xeae3 },
- { 0x06, 0xf8eb },
- { 0x06, 0x5af8 },
- { 0x06, 0x1e20 },
- { 0x06, 0xe6f8 },
- { 0x06, 0xeae5 },
- { 0x06, 0xf8eb },
- { 0x06, 0xd302 },
- { 0x06, 0xb3fe },
- { 0x06, 0xe2f8 },
- { 0x06, 0x7cef },
- { 0x06, 0x325b },
- { 0x06, 0x80e3 },
- { 0x06, 0xf87d },
- { 0x06, 0x9e03 },
- { 0x06, 0x7dff },
- { 0x06, 0xff0d },
- { 0x06, 0x581c },
- { 0x06, 0x551a },
- { 0x06, 0x6511 },
- { 0x06, 0xa190 },
- { 0x06, 0xd3e2 },
- { 0x06, 0x8348 },
- { 0x06, 0xe383 },
- { 0x06, 0x491b },
- { 0x06, 0x56ab },
- { 0x06, 0x08ef },
- { 0x06, 0x56e6 },
- { 0x06, 0x8348 },
- { 0x06, 0xe783 },
- { 0x06, 0x4910 },
- { 0x06, 0xd180 },
- { 0x06, 0x1f66 },
- { 0x06, 0xa004 },
- { 0x06, 0xb9e2 },
- { 0x06, 0x8348 },
- { 0x06, 0xe383 },
- { 0x06, 0x49ef },
- { 0x06, 0x65e2 },
- { 0x06, 0x834a },
- { 0x06, 0xe383 },
- { 0x06, 0x4b1b },
- { 0x06, 0x56aa },
- { 0x06, 0x0eef },
- { 0x06, 0x56e6 },
- { 0x06, 0x834a },
- { 0x06, 0xe783 },
- { 0x06, 0x4be2 },
- { 0x06, 0x834d },
- { 0x06, 0xe683 },
- { 0x06, 0x4ce0 },
- { 0x06, 0x834d },
- { 0x06, 0xa000 },
- { 0x06, 0x0caf },
- { 0x06, 0x81dc },
- { 0x06, 0xe083 },
- { 0x06, 0x4d10 },
- { 0x06, 0xe483 },
- { 0x06, 0x4dae },
- { 0x06, 0x0480 },
- { 0x06, 0xe483 },
- { 0x06, 0x4de0 },
- { 0x06, 0x834e },
- { 0x06, 0x7803 },
- { 0x06, 0x9e0b },
- { 0x06, 0xe083 },
- { 0x06, 0x4e78 },
- { 0x06, 0x049e },
- { 0x06, 0x04ee },
- { 0x06, 0x834e },
- { 0x06, 0x02e0 },
- { 0x06, 0x8332 },
- { 0x06, 0xe183 },
- { 0x06, 0x3359 },
- { 0x06, 0x0fe2 },
- { 0x06, 0x834d },
- { 0x06, 0x0c24 },
- { 0x06, 0x5af0 },
- { 0x06, 0x1e12 },
- { 0x06, 0xe4f8 },
- { 0x06, 0x8ce5 },
- { 0x06, 0xf88d },
- { 0x06, 0xe083 },
- { 0x06, 0x30e1 },
- { 0x06, 0x8331 },
- { 0x06, 0x6801 },
- { 0x06, 0xe4f8 },
- { 0x06, 0x8ae5 },
- { 0x06, 0xf88b },
- { 0x06, 0xae37 },
- { 0x06, 0xee83 },
- { 0x06, 0x4e03 },
- { 0x06, 0xe083 },
- { 0x06, 0x4ce1 },
- { 0x06, 0x834d },
- { 0x06, 0x1b01 },
- { 0x06, 0x9e04 },
- { 0x06, 0xaaa1 },
- { 0x06, 0xaea8 },
- { 0x06, 0xee83 },
- { 0x06, 0x4e04 },
- { 0x06, 0xee83 },
- { 0x06, 0x4f00 },
- { 0x06, 0xaeab },
- { 0x06, 0xe083 },
- { 0x06, 0x4f78 },
- { 0x06, 0x039f },
- { 0x06, 0x14ee },
- { 0x06, 0x834e },
- { 0x06, 0x05d2 },
- { 0x06, 0x40d6 },
- { 0x06, 0x5554 },
- { 0x06, 0x0282 },
- { 0x06, 0x17d2 },
- { 0x06, 0xa0d6 },
- { 0x06, 0xba00 },
- { 0x06, 0x0282 },
- { 0x06, 0x17fe },
- { 0x06, 0xfdfc },
- { 0x06, 0x05f8 },
- { 0x06, 0xe0f8 },
- { 0x06, 0x60e1 },
- { 0x06, 0xf861 },
- { 0x06, 0x6802 },
- { 0x06, 0xe4f8 },
- { 0x06, 0x60e5 },
- { 0x06, 0xf861 },
- { 0x06, 0xe0f8 },
- { 0x06, 0x48e1 },
- { 0x06, 0xf849 },
- { 0x06, 0x580f },
- { 0x06, 0x1e02 },
- { 0x06, 0xe4f8 },
- { 0x06, 0x48e5 },
- { 0x06, 0xf849 },
- { 0x06, 0xd000 },
- { 0x06, 0x0282 },
- { 0x06, 0x5bbf },
- { 0x06, 0x8350 },
- { 0x06, 0xef46 },
- { 0x06, 0xdc19 },
- { 0x06, 0xddd0 },
- { 0x06, 0x0102 },
- { 0x06, 0x825b },
- { 0x06, 0x0282 },
- { 0x06, 0x77e0 },
- { 0x06, 0xf860 },
- { 0x06, 0xe1f8 },
- { 0x06, 0x6158 },
- { 0x06, 0xfde4 },
- { 0x06, 0xf860 },
- { 0x06, 0xe5f8 },
- { 0x06, 0x61fc },
- { 0x06, 0x04f9 },
- { 0x06, 0xfafb },
- { 0x06, 0xc6bf },
- { 0x06, 0xf840 },
- { 0x06, 0xbe83 },
- { 0x06, 0x50a0 },
- { 0x06, 0x0101 },
- { 0x06, 0x071b },
- { 0x06, 0x89cf },
- { 0x06, 0xd208 },
- { 0x06, 0xebdb },
- { 0x06, 0x19b2 },
- { 0x06, 0xfbff },
- { 0x06, 0xfefd },
- { 0x06, 0x04f8 },
- { 0x06, 0xe0f8 },
- { 0x06, 0x48e1 },
- { 0x06, 0xf849 },
- { 0x06, 0x6808 },
- { 0x06, 0xe4f8 },
- { 0x06, 0x48e5 },
- { 0x06, 0xf849 },
- { 0x06, 0x58f7 },
- { 0x06, 0xe4f8 },
- { 0x06, 0x48e5 },
- { 0x06, 0xf849 },
- { 0x06, 0xfc04 },
- { 0x06, 0x4d20 },
- { 0x06, 0x0002 },
- { 0x06, 0x4e22 },
- { 0x06, 0x0002 },
- { 0x06, 0x4ddf },
- { 0x06, 0xff01 },
- { 0x06, 0x4edd },
- { 0x06, 0xff01 },
- { 0x05, 0x83d4 },
- { 0x06, 0x8000 },
- { 0x05, 0x83d8 },
- { 0x06, 0x8051 },
- { 0x02, 0x6010 },
- { 0x03, 0xdc00 },
- { 0x05, 0xfff6 },
- { 0x06, 0x00fc },
- { 0x1f, 0x0000 },
-
- { 0x1f, 0x0000 },
- { 0x0d, 0xf880 },
- { 0x1f, 0x0000 }
- };
+ void __iomem *ioaddr = tp->mmio_addr;
+ const struct firmware *fw;
rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
@@ -2155,10 +1820,18 @@ static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
- rtl_phy_write(ioaddr, phy_reg_init_2, ARRAY_SIZE(phy_reg_init_2));
+ if (request_firmware(&fw, "rtl8168d-1.fw", &tp->pci_dev->dev) == 0) {
+ rtl_phy_write_fw(ioaddr, fw);
+ release_firmware(fw);
+ } else {
+ printk(KERN_WARNING "%s: unable to apply firmware patch\n",
+ tp->dev->name);
+ }
}
-static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
+MODULE_FIRMWARE("rtl8168d-1.fw");
+
+static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
{
static const struct phy_reg phy_reg_init_0[] = {
{ 0x1f, 0x0001 },
@@ -2185,318 +1858,8 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
{ 0x05, 0x8332 },
{ 0x06, 0x5561 }
};
- static const struct phy_reg phy_reg_init_1[] = {
- { 0x1f, 0x0005 },
- { 0x05, 0xffc2 },
- { 0x1f, 0x0005 },
- { 0x05, 0x8000 },
- { 0x06, 0xf8f9 },
- { 0x06, 0xfaee },
- { 0x06, 0xf8ea },
- { 0x06, 0x00ee },
- { 0x06, 0xf8eb },
- { 0x06, 0x00e2 },
- { 0x06, 0xf87c },
- { 0x06, 0xe3f8 },
- { 0x06, 0x7da5 },
- { 0x06, 0x1111 },
- { 0x06, 0x12d2 },
- { 0x06, 0x40d6 },
- { 0x06, 0x4444 },
- { 0x06, 0x0281 },
- { 0x06, 0xc6d2 },
- { 0x06, 0xa0d6 },
- { 0x06, 0xaaaa },
- { 0x06, 0x0281 },
- { 0x06, 0xc6ae },
- { 0x06, 0x0fa5 },
- { 0x06, 0x4444 },
- { 0x06, 0x02ae },
- { 0x06, 0x4da5 },
- { 0x06, 0xaaaa },
- { 0x06, 0x02ae },
- { 0x06, 0x47af },
- { 0x06, 0x81c2 },
- { 0x06, 0xee83 },
- { 0x06, 0x4e00 },
- { 0x06, 0xee83 },
- { 0x06, 0x4d0f },
- { 0x06, 0xee83 },
- { 0x06, 0x4c0f },
- { 0x06, 0xee83 },
- { 0x06, 0x4f00 },
- { 0x06, 0xee83 },
- { 0x06, 0x5100 },
- { 0x06, 0xee83 },
- { 0x06, 0x4aff },
- { 0x06, 0xee83 },
- { 0x06, 0x4bff },
- { 0x06, 0xe083 },
- { 0x06, 0x30e1 },
- { 0x06, 0x8331 },
- { 0x06, 0x58fe },
- { 0x06, 0xe4f8 },
- { 0x06, 0x8ae5 },
- { 0x06, 0xf88b },
- { 0x06, 0xe083 },
- { 0x06, 0x32e1 },
- { 0x06, 0x8333 },
- { 0x06, 0x590f },
- { 0x06, 0xe283 },
- { 0x06, 0x4d0c },
- { 0x06, 0x245a },
- { 0x06, 0xf01e },
- { 0x06, 0x12e4 },
- { 0x06, 0xf88c },
- { 0x06, 0xe5f8 },
- { 0x06, 0x8daf },
- { 0x06, 0x81c2 },
- { 0x06, 0xe083 },
- { 0x06, 0x4f10 },
- { 0x06, 0xe483 },
- { 0x06, 0x4fe0 },
- { 0x06, 0x834e },
- { 0x06, 0x7800 },
- { 0x06, 0x9f0a },
- { 0x06, 0xe083 },
- { 0x06, 0x4fa0 },
- { 0x06, 0x10a5 },
- { 0x06, 0xee83 },
- { 0x06, 0x4e01 },
- { 0x06, 0xe083 },
- { 0x06, 0x4e78 },
- { 0x06, 0x059e },
- { 0x06, 0x9ae0 },
- { 0x06, 0x834e },
- { 0x06, 0x7804 },
- { 0x06, 0x9e10 },
- { 0x06, 0xe083 },
- { 0x06, 0x4e78 },
- { 0x06, 0x039e },
- { 0x06, 0x0fe0 },
- { 0x06, 0x834e },
- { 0x06, 0x7801 },
- { 0x06, 0x9e05 },
- { 0x06, 0xae0c },
- { 0x06, 0xaf81 },
- { 0x06, 0xa7af },
- { 0x06, 0x8152 },
- { 0x06, 0xaf81 },
- { 0x06, 0x8baf },
- { 0x06, 0x81c2 },
- { 0x06, 0xee83 },
- { 0x06, 0x4800 },
- { 0x06, 0xee83 },
- { 0x06, 0x4900 },
- { 0x06, 0xe083 },
- { 0x06, 0x5110 },
- { 0x06, 0xe483 },
- { 0x06, 0x5158 },
- { 0x06, 0x019f },
- { 0x06, 0xead0 },
- { 0x06, 0x00d1 },
- { 0x06, 0x801f },
- { 0x06, 0x66e2 },
- { 0x06, 0xf8ea },
- { 0x06, 0xe3f8 },
- { 0x06, 0xeb5a },
- { 0x06, 0xf81e },
- { 0x06, 0x20e6 },
- { 0x06, 0xf8ea },
- { 0x06, 0xe5f8 },
- { 0x06, 0xebd3 },
- { 0x06, 0x02b3 },
- { 0x06, 0xfee2 },
- { 0x06, 0xf87c },
- { 0x06, 0xef32 },
- { 0x06, 0x5b80 },
- { 0x06, 0xe3f8 },
- { 0x06, 0x7d9e },
- { 0x06, 0x037d },
- { 0x06, 0xffff },
- { 0x06, 0x0d58 },
- { 0x06, 0x1c55 },
- { 0x06, 0x1a65 },
- { 0x06, 0x11a1 },
- { 0x06, 0x90d3 },
- { 0x06, 0xe283 },
- { 0x06, 0x48e3 },
- { 0x06, 0x8349 },
- { 0x06, 0x1b56 },
- { 0x06, 0xab08 },
- { 0x06, 0xef56 },
- { 0x06, 0xe683 },
- { 0x06, 0x48e7 },
- { 0x06, 0x8349 },
- { 0x06, 0x10d1 },
- { 0x06, 0x801f },
- { 0x06, 0x66a0 },
- { 0x06, 0x04b9 },
- { 0x06, 0xe283 },
- { 0x06, 0x48e3 },
- { 0x06, 0x8349 },
- { 0x06, 0xef65 },
- { 0x06, 0xe283 },
- { 0x06, 0x4ae3 },
- { 0x06, 0x834b },
- { 0x06, 0x1b56 },
- { 0x06, 0xaa0e },
- { 0x06, 0xef56 },
- { 0x06, 0xe683 },
- { 0x06, 0x4ae7 },
- { 0x06, 0x834b },
- { 0x06, 0xe283 },
- { 0x06, 0x4de6 },
- { 0x06, 0x834c },
- { 0x06, 0xe083 },
- { 0x06, 0x4da0 },
- { 0x06, 0x000c },
- { 0x06, 0xaf81 },
- { 0x06, 0x8be0 },
- { 0x06, 0x834d },
- { 0x06, 0x10e4 },
- { 0x06, 0x834d },
- { 0x06, 0xae04 },
- { 0x06, 0x80e4 },
- { 0x06, 0x834d },
- { 0x06, 0xe083 },
- { 0x06, 0x4e78 },
- { 0x06, 0x039e },
- { 0x06, 0x0be0 },
- { 0x06, 0x834e },
- { 0x06, 0x7804 },
- { 0x06, 0x9e04 },
- { 0x06, 0xee83 },
- { 0x06, 0x4e02 },
- { 0x06, 0xe083 },
- { 0x06, 0x32e1 },
- { 0x06, 0x8333 },
- { 0x06, 0x590f },
- { 0x06, 0xe283 },
- { 0x06, 0x4d0c },
- { 0x06, 0x245a },
- { 0x06, 0xf01e },
- { 0x06, 0x12e4 },
- { 0x06, 0xf88c },
- { 0x06, 0xe5f8 },
- { 0x06, 0x8de0 },
- { 0x06, 0x8330 },
- { 0x06, 0xe183 },
- { 0x06, 0x3168 },
- { 0x06, 0x01e4 },
- { 0x06, 0xf88a },
- { 0x06, 0xe5f8 },
- { 0x06, 0x8bae },
- { 0x06, 0x37ee },
- { 0x06, 0x834e },
- { 0x06, 0x03e0 },
- { 0x06, 0x834c },
- { 0x06, 0xe183 },
- { 0x06, 0x4d1b },
- { 0x06, 0x019e },
- { 0x06, 0x04aa },
- { 0x06, 0xa1ae },
- { 0x06, 0xa8ee },
- { 0x06, 0x834e },
- { 0x06, 0x04ee },
- { 0x06, 0x834f },
- { 0x06, 0x00ae },
- { 0x06, 0xabe0 },
- { 0x06, 0x834f },
- { 0x06, 0x7803 },
- { 0x06, 0x9f14 },
- { 0x06, 0xee83 },
- { 0x06, 0x4e05 },
- { 0x06, 0xd240 },
- { 0x06, 0xd655 },
- { 0x06, 0x5402 },
- { 0x06, 0x81c6 },
- { 0x06, 0xd2a0 },
- { 0x06, 0xd6ba },
- { 0x06, 0x0002 },
- { 0x06, 0x81c6 },
- { 0x06, 0xfefd },
- { 0x06, 0xfc05 },
- { 0x06, 0xf8e0 },
- { 0x06, 0xf860 },
- { 0x06, 0xe1f8 },
- { 0x06, 0x6168 },
- { 0x06, 0x02e4 },
- { 0x06, 0xf860 },
- { 0x06, 0xe5f8 },
- { 0x06, 0x61e0 },
- { 0x06, 0xf848 },
- { 0x06, 0xe1f8 },
- { 0x06, 0x4958 },
- { 0x06, 0x0f1e },
- { 0x06, 0x02e4 },
- { 0x06, 0xf848 },
- { 0x06, 0xe5f8 },
- { 0x06, 0x49d0 },
- { 0x06, 0x0002 },
- { 0x06, 0x820a },
- { 0x06, 0xbf83 },
- { 0x06, 0x50ef },
- { 0x06, 0x46dc },
- { 0x06, 0x19dd },
- { 0x06, 0xd001 },
- { 0x06, 0x0282 },
- { 0x06, 0x0a02 },
- { 0x06, 0x8226 },
- { 0x06, 0xe0f8 },
- { 0x06, 0x60e1 },
- { 0x06, 0xf861 },
- { 0x06, 0x58fd },
- { 0x06, 0xe4f8 },
- { 0x06, 0x60e5 },
- { 0x06, 0xf861 },
- { 0x06, 0xfc04 },
- { 0x06, 0xf9fa },
- { 0x06, 0xfbc6 },
- { 0x06, 0xbff8 },
- { 0x06, 0x40be },
- { 0x06, 0x8350 },
- { 0x06, 0xa001 },
- { 0x06, 0x0107 },
- { 0x06, 0x1b89 },
- { 0x06, 0xcfd2 },
- { 0x06, 0x08eb },
- { 0x06, 0xdb19 },
- { 0x06, 0xb2fb },
- { 0x06, 0xfffe },
- { 0x06, 0xfd04 },
- { 0x06, 0xf8e0 },
- { 0x06, 0xf848 },
- { 0x06, 0xe1f8 },
- { 0x06, 0x4968 },
- { 0x06, 0x08e4 },
- { 0x06, 0xf848 },
- { 0x06, 0xe5f8 },
- { 0x06, 0x4958 },
- { 0x06, 0xf7e4 },
- { 0x06, 0xf848 },
- { 0x06, 0xe5f8 },
- { 0x06, 0x49fc },
- { 0x06, 0x044d },
- { 0x06, 0x2000 },
- { 0x06, 0x024e },
- { 0x06, 0x2200 },
- { 0x06, 0x024d },
- { 0x06, 0xdfff },
- { 0x06, 0x014e },
- { 0x06, 0xddff },
- { 0x06, 0x0100 },
- { 0x05, 0x83d8 },
- { 0x06, 0x8000 },
- { 0x03, 0xdc00 },
- { 0x05, 0xfff6 },
- { 0x06, 0x00fc },
- { 0x1f, 0x0000 },
-
- { 0x1f, 0x0000 },
- { 0x0d, 0xf880 },
- { 0x1f, 0x0000 }
- };
+ void __iomem *ioaddr = tp->mmio_addr;
+ const struct firmware *fw;
rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
@@ -2550,9 +1913,17 @@ static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
mdio_write(ioaddr, 0x1f, 0x0002);
mdio_patch(ioaddr, 0x0f, 0x0017);
- rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
+ if (request_firmware(&fw, "rtl8168d-2.fw", &tp->pci_dev->dev) == 0) {
+ rtl_phy_write_fw(ioaddr, fw);
+ release_firmware(fw);
+ } else {
+ printk(KERN_WARNING "%s: unable to apply firmware patch\n",
+ tp->dev->name);
+ }
}
+MODULE_FIRMWARE("rtl8168d-2.fw");
+
static void rtl8168d_3_hw_phy_config(void __iomem *ioaddr)
{
static const struct phy_reg phy_reg_init[] = {
@@ -2688,10 +2059,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
rtl8168cp_2_hw_phy_config(ioaddr);
break;
case RTL_GIGA_MAC_VER_25:
- rtl8168d_1_hw_phy_config(ioaddr);
+ rtl8168d_1_hw_phy_config(tp);
break;
case RTL_GIGA_MAC_VER_26:
- rtl8168d_2_hw_phy_config(ioaddr);
+ rtl8168d_2_hw_phy_config(tp);
break;
case RTL_GIGA_MAC_VER_27:
rtl8168d_3_hw_phy_config(ioaddr);
--
1.7.2.3
--
Ben Hutchings, Debian Developer and kernel team member
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 828 bytes --]
^ permalink raw reply related
* [PATCH] skge: 32bit DMA for ASUS A8N-SLI Premium
From: Shannon Wynter @ 2010-11-26 13:51 UTC (permalink / raw)
To: netdev; +Cc: Stephen Hemminger
Add ASUS A8N-SLI Premium to the list of boards that require the quirk to
limit DMA to 32bit in the skge.c module.
Signed-off-by: Shannon Wynter <kernel.org.alias@fremnet.net>
---
--- a/drivers/net/skge.c 2010-11-26 08:35:21.000000000 +1000
+++ b/drivers/net/skge.c 2010-11-26 08:58:52.000000000 +1000
@@ -4158,6 +4158,13 @@
DMI_MATCH(DMI_BOARD_NAME, "nForce"),
},
},
+ {
+ .ident = "ASUSTeK A8N-SLI Premium",
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+ DMI_MATCH(DMI_BOARD_NAME, "A8N-SLI Premium"),
+ },
+ },
{}
};
^ permalink raw reply
* [PATCH] stmmac: fix stmmac_resume removing not yet used shutdown flag
From: Peppe CAVALLARO @ 2010-11-26 14:11 UTC (permalink / raw)
To: netdev@vger.kernel.org; +Cc: vlad.lungu@windriver.com, Peppe CAVALLARO
The commit to convert to use the dev_pm_ops struct
introduces a bug. The shutdown flag is not yet used
because the hibernation on memory is done by using
the freeze callback.
Thanks to Vlad for having reported it.
Reported-by: Vlad Lungu <vlad.lungu@windriver.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
---
drivers/net/stmmac/stmmac_main.c | 7 -------
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c
index f1dbc18..730a6fd 100644
--- a/drivers/net/stmmac/stmmac_main.c
+++ b/drivers/net/stmmac/stmmac_main.c
@@ -1846,13 +1846,6 @@ static int stmmac_resume(struct device *dev)
if (!netif_running(ndev))
return 0;
- if (priv->shutdown) {
- /* Re-open the interface and re-init the MAC/DMA
- and the rings (i.e. on hibernation stage) */
- stmmac_open(dev);
- return 0;
- }
-
spin_lock(&priv->lock);
/* Power Down bit, into the PM register, is cleared
--
1.5.5.6
^ permalink raw reply related
* Re: [PATCH] stmmac: fix stmmac_resume removing not yet used shutdown flag
From: Peppe CAVALLARO @ 2010-11-26 14:16 UTC (permalink / raw)
To: vlad.lungu@windriver.com; +Cc: netdev@vger.kernel.org, David S. Miller
In-Reply-To: <1290740072-1341-1-git-send-email-peppe.cavallaro@st.com>
On 11/26/2010 3:11 PM, Peppe CAVALLARO wrote:
> The commit to convert to use the dev_pm_ops struct
> introduces a bug. The shutdown flag is not yet used
> because the hibernation on memory is done by using
> the freeze callback.
> Thanks to Vlad for having reported it.
Hi Vlad,
as we discussed via email, I'll also look at how to manage the
patch that reworked the private structure and that's generating
problems on your HW (I'll also try to have it for testing!).
Many thanks for the feedback and for having spotted this issue (sorry!).
Regards,
Peppe
> Reported-by: Vlad Lungu <vlad.lungu@windriver.com>
> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
> ---
> drivers/net/stmmac/stmmac_main.c | 7 -------
> 1 files changed, 0 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c
> index f1dbc18..730a6fd 100644
> --- a/drivers/net/stmmac/stmmac_main.c
> +++ b/drivers/net/stmmac/stmmac_main.c
> @@ -1846,13 +1846,6 @@ static int stmmac_resume(struct device *dev)
> if (!netif_running(ndev))
> return 0;
>
> - if (priv->shutdown) {
> - /* Re-open the interface and re-init the MAC/DMA
> - and the rings (i.e. on hibernation stage) */
> - stmmac_open(dev);
> - return 0;
> - }
> -
> spin_lock(&priv->lock);
>
> /* Power Down bit, into the PM register, is cleared
^ permalink raw reply
* Re: [PATCH] net: Fix __inet_inherit_port() to correctly increment bsockets and num_owners
From: Evgeniy Polyakov @ 2010-11-26 15:56 UTC (permalink / raw)
To: Nagendra Tomar; +Cc: Eric Dumazet, netdev, davem
In-Reply-To: <174335.2288.qm@web53702.mail.re2.yahoo.com>
On Fri, Nov 26, 2010 at 03:20:31AM -0800, Nagendra Tomar (tomer_iisc@yahoo.com) wrote:
> > Frankly I did not find how those optimizations made a bug
> > as well as
> > what is this bug about from given description, but I'm glad
> > it is resolved now :)
> >
>
> I'm not sure of what all went into the "optimization" patch, but the bug is not due to the optimization per-se. As my original post says, it is due to the 'bsockets' and 'num_owners' not being incremented inside __inet_inherit_port(), where it should have been, as __inet_put_port() decrements them on port release, which causes the imbalance.
Argh, I see, thanks a lot for explanation!
--
Evgeniy Polyakov
^ permalink raw reply
* [PATCH] ehea: Add some info messages and fix an issue
From: leitao @ 2010-11-26 16:26 UTC (permalink / raw)
To: davem; +Cc: netdev, Breno Leitao
This patch adds some debug information about ehea not being able to
allocate enough spaces. Also it correctly updates the amount of available
skb.
Signed-off-by: Breno Leitao <leitao@linux.vnet.ibm.com>
---
drivers/net/ehea/ehea_main.c | 20 ++++++++++++++++----
1 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c
index 182b2a7..a70457b 100644
--- a/drivers/net/ehea/ehea_main.c
+++ b/drivers/net/ehea/ehea_main.c
@@ -400,6 +400,8 @@ static void ehea_refill_rq1(struct ehea_port_res *pr, int index, int nr_of_wqes)
skb_arr_rq1[index] = netdev_alloc_skb(dev,
EHEA_L_PKT_SIZE);
if (!skb_arr_rq1[index]) {
+ ehea_info("Unable to allocate enough skb in
+ the array\n");
pr->rq1_skba.os_skbs = fill_wqes - i;
break;
}
@@ -422,13 +424,20 @@ static void ehea_init_fill_rq1(struct ehea_port_res *pr, int nr_rq1a)
struct net_device *dev = pr->port->netdev;
int i;
- for (i = 0; i < pr->rq1_skba.len; i++) {
+ if (nr_rq1a > pr->rq1_skba.len) {
+ ehea_error("NR_RQ1A is bigger than skb array len\n");
+ return;
+ }
+
+ for (i = 0; i < nr_rq1a; i++) {
skb_arr_rq1[i] = netdev_alloc_skb(dev, EHEA_L_PKT_SIZE);
- if (!skb_arr_rq1[i])
+ if (!skb_arr_rq1[i]) {
+ ehea_info("Not enough memory to allocate skb array\n");
break;
+ }
}
/* Ring doorbell */
- ehea_update_rq1a(pr->qp, nr_rq1a);
+ ehea_update_rq1a(pr->qp, i);
}
static int ehea_refill_rq_def(struct ehea_port_res *pr,
@@ -735,8 +744,11 @@ static int ehea_proc_rwqes(struct net_device *dev,
skb = netdev_alloc_skb(dev,
EHEA_L_PKT_SIZE);
- if (!skb)
+ if (!skb) {
+ ehea_info("Not enough memory to
+ allocate skb\n");
break;
+ }
}
skb_copy_to_linear_data(skb, ((char *)cqe) + 64,
cqe->num_bytes_transfered - 4);
--
1.7.1
^ permalink raw reply related
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