* [PATCH net-next-2.6 v9 13/20] pch_can: Fix bit timing calculation issue
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-12-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Modify like use calculated value directly passed by CAN core module.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Acked-by: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
drivers/net/can/pch_can.c | 6 ++----
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 3540978..5a6a0df 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -786,17 +786,15 @@ static int pch_set_bittiming(struct net_device *ndev)
const struct can_bittiming *bt = &priv->can.bittiming;
u32 canbit;
u32 bepe;
- u32 brp;
/* Setting the CCE bit for accessing the Can Timing register. */
pch_can_bit_set(&priv->regs->cont, PCH_CTRL_CCE);
- brp = (bt->tq) / (1000000000/PCH_CAN_CLK) - 1;
- canbit = brp & PCH_MSK_BITT_BRP;
+ canbit = (bt->brp - 1) & PCH_MSK_BITT_BRP;
canbit |= (bt->sjw - 1) << PCH_BIT_SJW_SHIFT;
canbit |= (bt->phase_seg1 + bt->prop_seg - 1) << PCH_BIT_TSEG1_SHIFT;
canbit |= (bt->phase_seg2 - 1) << PCH_BIT_TSEG2_SHIFT;
- bepe = (brp & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE_SHIFT;
+ bepe = ((bt->brp - 1) & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE_SHIFT;
iowrite32(canbit, &priv->regs->bitt);
iowrite32(bepe, &priv->regs->brpe);
pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_CCE);
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 12/20] pch_can: Delete unnecessary/redundant code
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-11-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Delete unnecessary/redundant code
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 13 +------------
1 files changed, 1 insertions(+), 12 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index da8d37b..3540978 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -447,11 +447,6 @@ static void pch_can_release(struct pch_can_priv *priv)
/* This function clears interrupt(s) from the CAN device. */
static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)
{
- if (mask == PCH_STATUS_INT) {
- ioread32(&priv->regs->stat);
- return;
- }
-
/* Clear interrupt for transmit object */
if ((mask >= PCH_RX_OBJ_START) && (mask <= PCH_RX_OBJ_END)) {
/* Setting CMASK for clearing the reception interrupts. */
@@ -512,8 +507,6 @@ static void pch_can_error(struct net_device *ndev, u32 status)
state = CAN_STATE_BUS_OFF;
cf->can_id |= CAN_ERR_BUSOFF;
can_bus_off(ndev);
- pch_can_set_run_mode(priv, PCH_CAN_RUN);
- dev_err(&ndev->dev, "%s -> Bus Off occurres.\n", __func__);
}
errc = ioread32(&priv->regs->errc);
@@ -747,7 +740,7 @@ static int pch_can_poll(struct napi_struct *napi, int quota)
if (!int_stat)
goto end;
- if ((int_stat == PCH_STATUS_INT) && (quota > 0)) {
+ if (int_stat == PCH_STATUS_INT) {
reg_stat = ioread32(&priv->regs->stat);
if (reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) {
if (reg_stat & PCH_BUS_OFF ||
@@ -933,10 +926,6 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
priv->tx_obj++;
}
- /* Reading the Msg Obj from the Msg RAM to the Interface register. */
- iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[1].cmask);
- pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no);
-
/* Setting the CMASK register. */
pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL);
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 11/20] pch_can: Fix coding rule violation
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-10-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Fix coding rule violation.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Acked-by: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
drivers/net/can/pch_can.c | 45 +++++++++++++++++++++------------------------
1 files changed, 21 insertions(+), 24 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 0093a01..da8d37b 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -89,9 +89,11 @@
#define PCH_CAN_CLK 50000000 /* 50MHz */
-/* Define the number of message object.
+/*
+ * Define the number of message object.
* PCH CAN communications are done via Message RAM.
- * The Message RAM consists of 32 message objects. */
+ * The Message RAM consists of 32 message objects.
+ */
#define PCH_RX_OBJ_NUM 26
#define PCH_TX_OBJ_NUM 6
#define PCH_RX_OBJ_START 1
@@ -126,7 +128,7 @@ enum pch_can_mode {
PCH_CAN_ALL,
PCH_CAN_NONE,
PCH_CAN_STOP,
- PCH_CAN_RUN
+ PCH_CAN_RUN,
};
struct pch_can_if_regs {
@@ -290,21 +292,20 @@ static void pch_can_set_rxtx(struct pch_can_priv *priv, u32 buff_num,
else
ie = PCH_IF_MCONT_RXIE;
- /* Reading the receive buffer data from RAM to Interface1 registers */
+ /* Reading the receive buffer data from RAM to Interface1/2 registers */
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
- /* Setting the IF1MASK1 register to access MsgVal and RxIE bits */
+ /* Setting the IF1/2MASK1 register to access MsgVal and RxIE bits */
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_ARB | PCH_CMASK_CTRL,
&priv->regs->ifregs[dir].cmask);
if (set) {
- /* Setting the MsgVal and RxIE bits */
+ /* Setting the MsgVal and RxIE/TxIE bits */
pch_can_bit_set(&priv->regs->ifregs[dir].mcont, ie);
pch_can_bit_set(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
-
} else {
- /* Resetting the MsgVal and RxIE bits */
+ /* Clearing the MsgVal and RxIE/TxIE bits */
pch_can_bit_clear(&priv->regs->ifregs[dir].mcont, ie);
pch_can_bit_clear(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
}
@@ -362,8 +363,7 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
int i;
for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) {
- iowrite32(PCH_CMASK_RX_TX_GET,
- &priv->regs->ifregs[0].cmask);
+ iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
iowrite32(0x0, &priv->regs->ifregs[0].id1);
@@ -385,16 +385,14 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
0x1fff | PCH_MASK2_MDIR_MXTD);
/* Setting CMASK for writing */
- iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
- PCH_CMASK_ARB | PCH_CMASK_CTRL,
- &priv->regs->ifregs[0].cmask);
+ iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB |
+ PCH_CMASK_CTRL, &priv->regs->ifregs[0].cmask);
pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
}
for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) {
- iowrite32(PCH_CMASK_RX_TX_GET,
- &priv->regs->ifregs[1].cmask);
+ iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[1].cmask);
pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i);
/* Resetting DIR bit for reception */
@@ -409,9 +407,8 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
pch_can_bit_clear(&priv->regs->ifregs[1].mask2, 0x1fff);
/* Setting CMASK for writing */
- iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
- PCH_CMASK_ARB | PCH_CMASK_CTRL,
- &priv->regs->ifregs[1].cmask);
+ iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB |
+ PCH_CMASK_CTRL, &priv->regs->ifregs[1].cmask);
pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i);
}
@@ -470,8 +467,9 @@ static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)
pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, mask);
} else if ((mask >= PCH_TX_OBJ_START) && (mask <= PCH_TX_OBJ_END)) {
- /* Setting CMASK for clearing interrupts for
- frame transmission. */
+ /*
+ * Setting CMASK for clearing interrupts for frame transmission.
+ */
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB,
&priv->regs->ifregs[1].cmask);
@@ -590,7 +588,6 @@ static irqreturn_t pch_can_interrupt(int irq, void *dev_id)
struct pch_can_priv *priv = netdev_priv(ndev);
pch_can_set_int_enables(priv, PCH_CAN_NONE);
-
napi_schedule(&priv->napi);
return IRQ_HANDLED;
@@ -1031,11 +1028,11 @@ static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
if (((ioread32(&priv->regs->ifregs[dir].id2)) & PCH_ID_MSGVAL) &&
- ((ioread32(&priv->regs->ifregs[dir].mcont)) & ie)) {
+ ((ioread32(&priv->regs->ifregs[dir].mcont)) & ie))
enable = 1;
- } else {
+ else
enable = 0;
- }
+
return enable;
}
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 10/20] pch_can: Replace netdev_dbg instead of dev_dbg partly
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg, w.sang, chripell, 21cnbao, sameo, socketcan-core, netdev,
linux-kernel
Cc: qi.wang, yong.y.wang, andrew.chih.howe.khor, joel.clark,
kok.howg.ewe, margie.foster, Tomoya MORINAGA
In-Reply-To: <1292221467-8039-9-git-send-email-tomoya-linux@dsn.okisemi.com>
For easy to readable, use netdev_dbg instead of dev_dbg partly
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
---
drivers/net/can/pch_can.c | 16 ++++++++--------
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 293be51..0093a01 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -222,7 +222,7 @@ static void pch_can_set_run_mode(struct pch_can_priv *priv,
break;
default:
- dev_err(&priv->ndev->dev, "%s -> Invalid Mode.\n", __func__);
+ netdev_err(priv->ndev, "%s -> Invalid Mode.\n", __func__);
break;
}
}
@@ -275,7 +275,7 @@ static void pch_can_set_int_enables(struct pch_can_priv *priv,
break;
default:
- dev_err(&priv->ndev->dev, "Invalid interrupt number.\n");
+ netdev_err(priv->ndev, "Invalid interrupt number.\n");
break;
}
}
@@ -528,7 +528,7 @@ static void pch_can_error(struct net_device *ndev, u32 status)
cf->data[1] |= CAN_ERR_CRTL_RX_WARNING;
if ((errc & PCH_TEC) > 96)
cf->data[1] |= CAN_ERR_CRTL_TX_WARNING;
- dev_warn(&ndev->dev,
+ netdev_dbg(ndev,
"%s -> Error Counter is more than 96.\n", __func__);
}
/* Error passive interrupt. */
@@ -540,7 +540,7 @@ static void pch_can_error(struct net_device *ndev, u32 status)
cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
if ((errc & PCH_TEC) > 127)
cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE;
- dev_err(&ndev->dev,
+ netdev_dbg(ndev,
"%s -> CAN controller is ERROR PASSIVE .\n", __func__);
}
@@ -859,10 +859,10 @@ static int pch_can_open(struct net_device *ndev)
retval = pci_enable_msi(priv->dev);
if (retval) {
- dev_info(&ndev->dev, "PCH CAN opened without MSI\n");
+ netdev_err(ndev, "PCH CAN opened without MSI\n");
priv->use_msi = 0;
} else {
- dev_info(&ndev->dev, "PCH CAN opened with MSI\n");
+ netdev_err(ndev, "PCH CAN opened with MSI\n");
priv->use_msi = 1;
}
@@ -870,14 +870,14 @@ static int pch_can_open(struct net_device *ndev)
retval = request_irq(priv->dev->irq, pch_can_interrupt, IRQF_SHARED,
ndev->name, ndev);
if (retval) {
- dev_err(&ndev->dev, "request_irq failed.\n");
+ netdev_err(ndev, "request_irq failed.\n");
goto req_irq_err;
}
/* Open common can device */
retval = open_candev(ndev);
if (retval) {
- dev_err(ndev->dev.parent, "open_candev() failed %d\n", retval);
+ netdev_err(ndev, "open_candev() failed %d\n", retval);
goto err_open_candev;
}
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 09/20] pch_can: Change Copyright and module description
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg, w.sang, chripell, 21cnbao, sameo, socketcan-core, netdev,
linux-kernel
Cc: qi.wang, yong.y.wang, andrew.chih.howe.khor, joel.clark,
kok.howg.ewe, margie.foster, Tomoya MORINAGA
In-Reply-To: <1292221467-8039-8-git-send-email-tomoya-linux@dsn.okisemi.com>
Currently, Copyright and module description are not formal.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
---
drivers/net/can/pch_can.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 0acc877..293be51 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -1,6 +1,6 @@
/*
* Copyright (C) 1999 - 2010 Intel Corporation.
- * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
+ * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -1301,6 +1301,6 @@ static void __exit pch_can_pci_exit(void)
}
module_exit(pch_can_pci_exit);
-MODULE_DESCRIPTION("Controller Area Network Driver");
+MODULE_DESCRIPTION("Intel EG20T PCH CAN(Controller Area Network) Driver");
MODULE_LICENSE("GPL v2");
MODULE_VERSION("0.94");
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 08/20] pch_can: Reduce register access
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-7-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
For improve tx/rx speed, reduce register access.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 55 +++++++++++++++++---------------------------
1 files changed, 21 insertions(+), 34 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index c6c0842..0acc877 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -372,9 +372,6 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
pch_can_bit_set(&priv->regs->ifregs[0].mcont,
PCH_IF_MCONT_UMASK);
- /* Set FIFO mode set to 0 except last Rx Obj*/
- pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
- PCH_IF_MCONT_EOB);
/* In case FIFO mode, Last EoB of Rx Obj must be 1 */
if (i == PCH_RX_OBJ_END)
pch_can_bit_set(&priv->regs->ifregs[0].mcont,
@@ -402,14 +399,11 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
/* Resetting DIR bit for reception */
iowrite32(0x0, &priv->regs->ifregs[1].id1);
- iowrite32(0x0, &priv->regs->ifregs[1].id2);
- pch_can_bit_set(&priv->regs->ifregs[1].id2, PCH_ID2_DIR);
+ iowrite32(PCH_ID2_DIR, &priv->regs->ifregs[1].id2);
/* Setting EOB bit for transmitter */
- iowrite32(PCH_IF_MCONT_EOB, &priv->regs->ifregs[1].mcont);
-
- pch_can_bit_set(&priv->regs->ifregs[1].mcont,
- PCH_IF_MCONT_UMASK);
+ iowrite32(PCH_IF_MCONT_EOB | PCH_IF_MCONT_UMASK,
+ &priv->regs->ifregs[1].mcont);
iowrite32(0, &priv->regs->ifregs[1].mask1);
pch_can_bit_clear(&priv->regs->ifregs[1].mask2, 0x1fff);
@@ -524,12 +518,12 @@ static void pch_can_error(struct net_device *ndev, u32 status)
dev_err(&ndev->dev, "%s -> Bus Off occurres.\n", __func__);
}
+ errc = ioread32(&priv->regs->errc);
/* Warning interrupt. */
if (status & PCH_EWARN) {
state = CAN_STATE_ERROR_WARNING;
priv->can.can_stats.error_warning++;
cf->can_id |= CAN_ERR_CRTL;
- errc = ioread32(&priv->regs->errc);
if (((errc & PCH_REC) >> 8) > 96)
cf->data[1] |= CAN_ERR_CRTL_RX_WARNING;
if ((errc & PCH_TEC) > 96)
@@ -542,7 +536,6 @@ static void pch_can_error(struct net_device *ndev, u32 status)
priv->can.can_stats.error_passive++;
state = CAN_STATE_ERROR_PASSIVE;
cf->can_id |= CAN_ERR_CRTL;
- errc = ioread32(&priv->regs->errc);
if (((errc & PCH_REC) >> 8) > 127)
cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
if ((errc & PCH_TEC) > 127)
@@ -927,6 +920,7 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
struct can_frame *cf = (struct can_frame *)skb->data;
int tx_obj_no;
int i;
+ u32 id2;
if (can_dropped_invalid_skb(ndev, skb))
return NETDEV_TX_OK;
@@ -950,22 +944,23 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL);
/* If ID extended is set. */
- pch_can_bit_clear(&priv->regs->ifregs[1].id1, 0xffff);
- pch_can_bit_clear(&priv->regs->ifregs[1].id2, 0x1fff | PCH_ID2_XTD);
if (cf->can_id & CAN_EFF_FLAG) {
- pch_can_bit_set(&priv->regs->ifregs[1].id1,
- cf->can_id & 0xffff);
- pch_can_bit_set(&priv->regs->ifregs[1].id2,
- ((cf->can_id >> 16) & 0x1fff) | PCH_ID2_XTD);
+ iowrite32(cf->can_id & 0xffff, &priv->regs->ifregs[1].id1);
+ id2 = ((cf->can_id >> 16) & 0x1fff) | PCH_ID2_XTD;
} else {
- pch_can_bit_set(&priv->regs->ifregs[1].id1, 0);
- pch_can_bit_set(&priv->regs->ifregs[1].id2,
- (cf->can_id & CAN_SFF_MASK) << 2);
+ iowrite32(0, &priv->regs->ifregs[1].id1);
+ id2 = (cf->can_id & CAN_SFF_MASK) << 2;
}
+ id2 |= PCH_ID_MSGVAL;
+
/* If remote frame has to be transmitted.. */
if (cf->can_id & CAN_RTR_FLAG)
- pch_can_bit_clear(&priv->regs->ifregs[1].id2, PCH_ID2_DIR);
+ id2 &= ~PCH_ID2_DIR;
+ else
+ id2 |= PCH_ID2_DIR;
+
+ iowrite32(id2, &priv->regs->ifregs[1].id2);
/* Copy data to register */
for (i = 0; i < cf->can_dlc; i += 2) {
@@ -976,17 +971,8 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
can_put_echo_skb(skb, ndev, tx_obj_no - PCH_RX_OBJ_END - 1);
/* Updating the size of the data. */
- pch_can_bit_clear(&priv->regs->ifregs[1].mcont, 0x0f);
- pch_can_bit_set(&priv->regs->ifregs[1].mcont, cf->can_dlc);
-
- /* Clearing IntPend, NewDat & TxRqst */
- pch_can_bit_clear(&priv->regs->ifregs[1].mcont,
- PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND |
- PCH_IF_MCONT_TXRQXT);
-
- /* Setting NewDat, TxRqst bits */
- pch_can_bit_set(&priv->regs->ifregs[1].mcont,
- PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT);
+ iowrite32(cf->can_dlc | PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT |
+ PCH_IF_MCONT_TXIE, &priv->regs->ifregs[1].mcont);
pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no);
@@ -1211,9 +1197,10 @@ static int pch_can_get_berr_counter(const struct net_device *dev,
struct can_berr_counter *bec)
{
struct pch_can_priv *priv = netdev_priv(dev);
+ u32 errc = ioread32(&priv->regs->errc);
- bec->txerr = ioread32(&priv->regs->errc) & PCH_TEC;
- bec->rxerr = (ioread32(&priv->regs->errc) & PCH_REC) >> 8;
+ bec->txerr = errc & PCH_TEC;
+ bec->rxerr = (errc & PCH_REC) >> 8;
return 0;
}
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 07/20] pch_can: Change functions type
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-6-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Currently, these two functions spec(returned value) is unnatural.
Thus, change the return value's spec
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 18 ++++++++++--------
1 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index dd9ce16..c6c0842 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -1025,10 +1025,10 @@ static void pch_can_set_int_custom(struct pch_can_priv *priv)
}
/* This function retrieves interrupt enabled for the CAN device. */
-static void pch_can_get_int_enables(struct pch_can_priv *priv, u32 *enables)
+static u32 pch_can_get_int_enables(struct pch_can_priv *priv)
{
/* Obtaining the status of IE, SIE and EIE interrupt bits. */
- *enables = ((ioread32(&priv->regs->cont) & PCH_CTRL_IE_SIE_EIE) >> 1);
+ return (ioread32(&priv->regs->cont) & PCH_CTRL_IE_SIE_EIE) >> 1;
}
static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
@@ -1069,16 +1069,18 @@ static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
}
-static void pch_can_get_rx_buffer_link(struct pch_can_priv *priv,
- u32 buffer_num, u32 *link)
+static u32 pch_can_get_rx_buffer_link(struct pch_can_priv *priv, u32 buffer_num)
{
+ u32 link;
+
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
if (ioread32(&priv->regs->ifregs[0].mcont) & PCH_IF_MCONT_EOB)
- *link = 0;
+ link = 0;
else
- *link = 1;
+ link = 1;
+ return link;
}
static int pch_can_get_buffer_status(struct pch_can_priv *priv)
@@ -1115,7 +1117,7 @@ static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
dev_err(&pdev->dev, "%s -> Transmission time out.\n", __func__);
/* Save interrupt configuration and then disable them */
- pch_can_get_int_enables(priv, &(priv->int_enables));
+ priv->int_enables = pch_can_get_int_enables(priv);
pch_can_set_int_enables(priv, PCH_CAN_DISABLE);
/* Save Tx buffer enable state */
@@ -1128,7 +1130,7 @@ static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
/* Save Rx buffer enable state */
for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) {
priv->rx_enable[i] = pch_can_get_rxtx_ir(priv, i, PCH_RX_IFREG);
- pch_can_get_rx_buffer_link(priv, i, &priv->rx_link[i]);
+ priv->rx_link[i] = pch_can_get_rx_buffer_link(priv, i);
}
/* Disable all Receive buffers */
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 06/20] pch_can: Rename function/macro name
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-5-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
For easy to read/understand, Rename function/macro name.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 176 ++++++++++++++++++++-------------------------
1 files changed, 77 insertions(+), 99 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 5fc99cb..dd9ce16 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -32,8 +32,6 @@
#include <linux/can/dev.h>
#include <linux/can/error.h>
-#define PCH_ENABLE 1 /* The enable flag */
-#define PCH_DISABLE 0 /* The disable flag */
#define PCH_CTRL_INIT BIT(0) /* The INIT bit of CANCONT register. */
#define PCH_CTRL_IE BIT(1) /* The IE bit of CAN control register */
#define PCH_CTRL_IE_SIE_EIE (BIT(3) | BIT(2) | BIT(1))
@@ -78,11 +76,12 @@
#define PCH_BUS_OFF BIT(7)
/* bit position of certain controller bits. */
-#define PCH_BIT_BRP 0
-#define PCH_BIT_SJW 6
-#define PCH_BIT_TSEG1 8
-#define PCH_BIT_TSEG2 12
-#define PCH_BIT_BRPE_BRPE 6
+#define PCH_BIT_BRP_SHIFT 0
+#define PCH_BIT_SJW_SHIFT 6
+#define PCH_BIT_TSEG1_SHIFT 8
+#define PCH_BIT_TSEG2_SHIFT 12
+#define PCH_BIT_BRPE_BRPE_SHIFT 6
+
#define PCH_MSK_BITT_BRP 0x3f
#define PCH_MSK_BRPE_BRPE 0x3c0
#define PCH_MSK_CTRL_IE_SIE_EIE 0x07
@@ -170,19 +169,16 @@ struct pch_can_regs {
struct pch_can_priv {
struct can_priv can;
- unsigned int can_num;
struct pci_dev *dev;
- int tx_enable[PCH_TX_OBJ_END];
- int rx_enable[PCH_TX_OBJ_END];
- int rx_link[PCH_TX_OBJ_END];
- unsigned int int_enables;
- unsigned int int_stat;
+ u32 tx_enable[PCH_TX_OBJ_END];
+ u32 rx_enable[PCH_TX_OBJ_END];
+ u32 rx_link[PCH_TX_OBJ_END];
+ u32 int_enables;
struct net_device *ndev;
- unsigned int msg_obj[PCH_TX_OBJ_END];
struct pch_can_regs __iomem *regs;
struct napi_struct napi;
- unsigned int tx_obj; /* Point next Tx Obj index */
- unsigned int use_msi;
+ int tx_obj; /* Point next Tx Obj index */
+ int use_msi;
};
static struct can_bittiming_const pch_can_bittiming_const = {
@@ -245,14 +241,27 @@ static void pch_can_set_optmode(struct pch_can_priv *priv)
iowrite32(reg_val, &priv->regs->opt);
}
+static void pch_can_rw_msg_obj(void __iomem *creq_addr, u32 num)
+{
+ int counter = PCH_COUNTER_LIMIT;
+ u32 ifx_creq;
+
+ iowrite32(num, creq_addr);
+ while (counter) {
+ ifx_creq = ioread32(creq_addr) & PCH_IF_CREQ_BUSY;
+ if (!ifx_creq)
+ break;
+ counter--;
+ udelay(1);
+ }
+ if (!counter)
+ pr_err("%s:IF1 BUSY Flag is set forever.\n", __func__);
+}
+
static void pch_can_set_int_enables(struct pch_can_priv *priv,
enum pch_can_mode interrupt_no)
{
switch (interrupt_no) {
- case PCH_CAN_ENABLE:
- pch_can_bit_set(&priv->regs->cont, PCH_CTRL_IE);
- break;
-
case PCH_CAN_DISABLE:
pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE);
break;
@@ -271,25 +280,8 @@ static void pch_can_set_int_enables(struct pch_can_priv *priv,
}
}
-static void pch_can_check_if_busy(u32 __iomem *creq_addr, u32 num)
-{
- u32 counter = PCH_COUNTER_LIMIT;
- u32 ifx_creq;
-
- iowrite32(num, creq_addr);
- while (counter) {
- ifx_creq = ioread32(creq_addr) & PCH_IF_CREQ_BUSY;
- if (!ifx_creq)
- break;
- counter--;
- udelay(1);
- }
- if (!counter)
- pr_err("%s:IF1 BUSY Flag is set forever.\n", __func__);
-}
-
static void pch_can_set_rxtx(struct pch_can_priv *priv, u32 buff_num,
- u32 set, enum pch_ifreg dir)
+ int set, enum pch_ifreg dir)
{
u32 ie;
@@ -300,27 +292,27 @@ static void pch_can_set_rxtx(struct pch_can_priv *priv, u32 buff_num,
/* Reading the receive buffer data from RAM to Interface1 registers */
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
/* Setting the IF1MASK1 register to access MsgVal and RxIE bits */
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_ARB | PCH_CMASK_CTRL,
&priv->regs->ifregs[dir].cmask);
- if (set == PCH_ENABLE) {
+ if (set) {
/* Setting the MsgVal and RxIE bits */
pch_can_bit_set(&priv->regs->ifregs[dir].mcont, ie);
pch_can_bit_set(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
- } else if (set == PCH_DISABLE) {
+ } else {
/* Resetting the MsgVal and RxIE bits */
pch_can_bit_clear(&priv->regs->ifregs[dir].mcont, ie);
pch_can_bit_clear(&priv->regs->ifregs[dir].id2, PCH_ID_MSGVAL);
}
- pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
}
-static void pch_can_set_rx_all(struct pch_can_priv *priv, u32 set)
+static void pch_can_set_rx_all(struct pch_can_priv *priv, int set)
{
int i;
@@ -329,7 +321,7 @@ static void pch_can_set_rx_all(struct pch_can_priv *priv, u32 set)
pch_can_set_rxtx(priv, i, set, PCH_RX_IFREG);
}
-static void pch_can_set_tx_all(struct pch_can_priv *priv, u32 set)
+static void pch_can_set_tx_all(struct pch_can_priv *priv, int set)
{
int i;
@@ -338,16 +330,16 @@ static void pch_can_set_tx_all(struct pch_can_priv *priv, u32 set)
pch_can_set_rxtx(priv, i, set, PCH_TX_IFREG);
}
-static int pch_can_int_pending(struct pch_can_priv *priv)
+static u32 pch_can_int_pending(struct pch_can_priv *priv)
{
return ioread32(&priv->regs->intr) & 0xffff;
}
-static void pch_can_clear_buffers(struct pch_can_priv *priv)
+static void pch_can_clear_if_buffers(struct pch_can_priv *priv)
{
- int i;
+ int i; /* Msg Obj ID (1~32) */
- for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) {
+ for (i = PCH_RX_OBJ_START; i <= PCH_TX_OBJ_END; i++) {
iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->ifregs[0].cmask);
iowrite32(0xffff, &priv->regs->ifregs[0].mask1);
iowrite32(0xffff, &priv->regs->ifregs[0].mask2);
@@ -361,24 +353,7 @@ static void pch_can_clear_buffers(struct pch_can_priv *priv)
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
PCH_CMASK_ARB | PCH_CMASK_CTRL,
&priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, i);
- }
-
- for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) {
- iowrite32(PCH_CMASK_RX_TX_SET, &priv->regs->ifregs[1].cmask);
- iowrite32(0xffff, &priv->regs->ifregs[1].mask1);
- iowrite32(0xffff, &priv->regs->ifregs[1].mask2);
- iowrite32(0x0, &priv->regs->ifregs[1].id1);
- iowrite32(0x0, &priv->regs->ifregs[1].id2);
- iowrite32(0x0, &priv->regs->ifregs[1].mcont);
- iowrite32(0x0, &priv->regs->ifregs[1].data[0]);
- iowrite32(0x0, &priv->regs->ifregs[1].data[1]);
- iowrite32(0x0, &priv->regs->ifregs[1].data[2]);
- iowrite32(0x0, &priv->regs->ifregs[1].data[3]);
- iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
- PCH_CMASK_ARB | PCH_CMASK_CTRL,
- &priv->regs->ifregs[1].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, i);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
}
}
@@ -389,7 +364,7 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
for (i = PCH_RX_OBJ_START; i <= PCH_RX_OBJ_END; i++) {
iowrite32(PCH_CMASK_RX_TX_GET,
&priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, i);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
iowrite32(0x0, &priv->regs->ifregs[0].id1);
iowrite32(0x0, &priv->regs->ifregs[0].id2);
@@ -403,6 +378,9 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
/* In case FIFO mode, Last EoB of Rx Obj must be 1 */
if (i == PCH_RX_OBJ_END)
pch_can_bit_set(&priv->regs->ifregs[0].mcont,
+ PCH_IF_MCONT_EOB);
+ else
+ pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
PCH_IF_MCONT_EOB);
iowrite32(0, &priv->regs->ifregs[0].mask1);
@@ -414,13 +392,13 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
PCH_CMASK_ARB | PCH_CMASK_CTRL,
&priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, i);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, i);
}
for (i = PCH_TX_OBJ_START; i <= PCH_TX_OBJ_END; i++) {
iowrite32(PCH_CMASK_RX_TX_GET,
&priv->regs->ifregs[1].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, i);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i);
/* Resetting DIR bit for reception */
iowrite32(0x0, &priv->regs->ifregs[1].id1);
@@ -441,7 +419,7 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)
PCH_CMASK_ARB | PCH_CMASK_CTRL,
&priv->regs->ifregs[1].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, i);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, i);
}
}
@@ -451,7 +429,7 @@ static void pch_can_init(struct pch_can_priv *priv)
pch_can_set_run_mode(priv, PCH_CAN_STOP);
/* Clearing all the message object buffers. */
- pch_can_clear_buffers(priv);
+ pch_can_clear_if_buffers(priv);
/* Configuring the respective message object as either rx/tx object. */
pch_can_config_rx_tx_buffers(priv);
@@ -496,7 +474,7 @@ static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)
pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, mask);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, mask);
} else if ((mask >= PCH_TX_OBJ_START) && (mask <= PCH_TX_OBJ_END)) {
/* Setting CMASK for clearing interrupts for
frame transmission. */
@@ -512,7 +490,7 @@ static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)
pch_can_bit_clear(&priv->regs->ifregs[1].mcont,
PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND |
PCH_IF_MCONT_TXRQXT);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, mask);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, mask);
}
}
@@ -637,7 +615,7 @@ static void pch_fifo_thresh(struct pch_can_priv *priv, int obj_id)
/* Clearing NewDat & IntPnd */
pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
PCH_IF_MCONT_INTPND);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_id);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_id);
} else if (obj_id > PCH_FIFO_THRESH) {
pch_can_int_clr(priv, obj_id);
} else if (obj_id == PCH_FIFO_THRESH) {
@@ -659,7 +637,7 @@ static void pch_can_rx_msg_lost(struct net_device *ndev, int obj_id)
PCH_IF_MCONT_MSGLOST);
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
&priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_id);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_id);
skb = alloc_can_err_skb(ndev, &cf);
if (!skb)
@@ -689,7 +667,7 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 obj_num, int quota)
do {
/* Reading the messsage object from the Message RAM */
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_num);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, obj_num);
/* Reading the MCONT register. */
reg = ioread32(&priv->regs->ifregs[0].mcont);
@@ -758,7 +736,7 @@ static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat)
can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);
iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
&priv->regs->ifregs[1].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, int_stat);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, int_stat);
dlc = get_can_dlc(ioread32(&priv->regs->ifregs[1].mcont) &
PCH_IF_MCONT_DLC);
stats->tx_bytes += dlc;
@@ -767,7 +745,7 @@ static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat)
netif_wake_queue(ndev);
}
-static int pch_can_rx_poll(struct napi_struct *napi, int quota)
+static int pch_can_poll(struct napi_struct *napi, int quota)
{
struct net_device *ndev = napi->dev;
struct pch_can_priv *priv = netdev_priv(ndev);
@@ -832,10 +810,10 @@ static int pch_set_bittiming(struct net_device *ndev)
brp = (bt->tq) / (1000000000/PCH_CAN_CLK) - 1;
canbit = brp & PCH_MSK_BITT_BRP;
- canbit |= (bt->sjw - 1) << PCH_BIT_SJW;
- canbit |= (bt->phase_seg1 + bt->prop_seg - 1) << PCH_BIT_TSEG1;
- canbit |= (bt->phase_seg2 - 1) << PCH_BIT_TSEG2;
- bepe = (brp & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE;
+ canbit |= (bt->sjw - 1) << PCH_BIT_SJW_SHIFT;
+ canbit |= (bt->phase_seg1 + bt->prop_seg - 1) << PCH_BIT_TSEG1_SHIFT;
+ canbit |= (bt->phase_seg2 - 1) << PCH_BIT_TSEG2_SHIFT;
+ bepe = (brp & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE_SHIFT;
iowrite32(canbit, &priv->regs->bitt);
iowrite32(bepe, &priv->regs->brpe);
pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_CCE);
@@ -947,7 +925,7 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
{
struct pch_can_priv *priv = netdev_priv(ndev);
struct can_frame *cf = (struct can_frame *)skb->data;
- int tx_buffer_avail = 0;
+ int tx_obj_no;
int i;
if (can_dropped_invalid_skb(ndev, skb))
@@ -957,16 +935,16 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
if (ioread32(&priv->regs->treq2) & PCH_TREQ2_TX_MASK)
netif_stop_queue(ndev);
- tx_buffer_avail = priv->tx_obj;
+ tx_obj_no = priv->tx_obj;
priv->tx_obj = PCH_TX_OBJ_START;
} else {
- tx_buffer_avail = priv->tx_obj;
+ tx_obj_no = priv->tx_obj;
priv->tx_obj++;
}
/* Reading the Msg Obj from the Msg RAM to the Interface register. */
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[1].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, tx_buffer_avail);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no);
/* Setting the CMASK register. */
pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL);
@@ -995,7 +973,7 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
&priv->regs->ifregs[1].data[i / 2]);
}
- can_put_echo_skb(skb, ndev, tx_buffer_avail - PCH_RX_OBJ_END - 1);
+ can_put_echo_skb(skb, ndev, tx_obj_no - PCH_RX_OBJ_END - 1);
/* Updating the size of the data. */
pch_can_bit_clear(&priv->regs->ifregs[1].mcont, 0x0f);
@@ -1010,7 +988,7 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
pch_can_bit_set(&priv->regs->ifregs[1].mcont,
PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, tx_buffer_avail);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no);
return NETDEV_TX_OK;
}
@@ -1064,7 +1042,7 @@ static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
ie = PCH_IF_MCONT_TXIE;
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[dir].creq, buff_num);
if (((ioread32(&priv->regs->ifregs[dir].id2)) & PCH_ID_MSGVAL) &&
((ioread32(&priv->regs->ifregs[dir].mcont)) & ie)) {
@@ -1076,37 +1054,37 @@ static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
}
static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
- u32 buffer_num, u32 set)
+ u32 buffer_num, int set)
{
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
&priv->regs->ifregs[0].cmask);
- if (set == PCH_ENABLE)
+ if (set)
pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
PCH_IF_MCONT_EOB);
else
pch_can_bit_set(&priv->regs->ifregs[0].mcont, PCH_IF_MCONT_EOB);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
}
static void pch_can_get_rx_buffer_link(struct pch_can_priv *priv,
u32 buffer_num, u32 *link)
{
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
+ pch_can_rw_msg_obj(&priv->regs->ifregs[0].creq, buffer_num);
if (ioread32(&priv->regs->ifregs[0].mcont) & PCH_IF_MCONT_EOB)
- *link = PCH_DISABLE;
+ *link = 0;
else
- *link = PCH_ENABLE;
+ *link = 1;
}
static int pch_can_get_buffer_status(struct pch_can_priv *priv)
{
return (ioread32(&priv->regs->treq1) & 0xffff) |
- ((ioread32(&priv->regs->treq2) & 0xffff) << 16);
+ (ioread32(&priv->regs->treq2) << 16);
}
static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
@@ -1114,7 +1092,7 @@ static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
int i; /* Counter variable. */
int retval; /* Return value. */
u32 buf_stat; /* Variable for reading the transmit buffer status. */
- u32 counter = 0xFFFFFF;
+ int counter = PCH_COUNTER_LIMIT;
struct net_device *dev = pci_get_drvdata(pdev);
struct pch_can_priv *priv = netdev_priv(dev);
@@ -1291,7 +1269,7 @@ static int __devinit pch_can_probe(struct pci_dev *pdev,
ndev->netdev_ops = &pch_can_netdev_ops;
priv->can.clock.freq = PCH_CAN_CLK; /* Hz */
- netif_napi_add(ndev, &priv->napi, pch_can_rx_poll, PCH_RX_OBJ_END);
+ netif_napi_add(ndev, &priv->napi, pch_can_poll, PCH_RX_OBJ_END);
rc = register_candev(ndev);
if (rc) {
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 05/20] pch_can: Fix warnings
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-4-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Currently, in case CONFIG_PM is disabled, compiler outputs warnings.
Move six functions which are used only CONFIG_PM is enabled,
into "#ifdef CONFIG_PM" area.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 146 ++++++++++++++++++++++----------------------
1 files changed, 73 insertions(+), 73 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index d646fbc..5fc99cb 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -245,23 +245,6 @@ static void pch_can_set_optmode(struct pch_can_priv *priv)
iowrite32(reg_val, &priv->regs->opt);
}
-static void pch_can_set_int_custom(struct pch_can_priv *priv)
-{
- /* Clearing the IE, SIE and EIE bits of Can control register. */
- pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE);
-
- /* Appropriately setting them. */
- pch_can_bit_set(&priv->regs->cont,
- ((priv->int_enables & PCH_MSK_CTRL_IE_SIE_EIE) << 1));
-}
-
-/* This function retrieves interrupt enabled for the CAN device. */
-static void pch_can_get_int_enables(struct pch_can_priv *priv, u32 *enables)
-{
- /* Obtaining the status of IE, SIE and EIE interrupt bits. */
- *enables = ((ioread32(&priv->regs->cont) & PCH_CTRL_IE_SIE_EIE) >> 1);
-}
-
static void pch_can_set_int_enables(struct pch_can_priv *priv,
enum pch_can_mode interrupt_no)
{
@@ -355,61 +338,11 @@ static void pch_can_set_tx_all(struct pch_can_priv *priv, u32 set)
pch_can_set_rxtx(priv, i, set, PCH_TX_IFREG);
}
-static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
- enum pch_ifreg dir)
-{
- u32 ie, enable;
-
- if (dir)
- ie = PCH_IF_MCONT_RXIE;
- else
- ie = PCH_IF_MCONT_TXIE;
-
- iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
-
- if (((ioread32(&priv->regs->ifregs[dir].id2)) & PCH_ID_MSGVAL) &&
- ((ioread32(&priv->regs->ifregs[dir].mcont)) & ie)) {
- enable = 1;
- } else {
- enable = 0;
- }
- return enable;
-}
-
static int pch_can_int_pending(struct pch_can_priv *priv)
{
return ioread32(&priv->regs->intr) & 0xffff;
}
-static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
- u32 buffer_num, u32 set)
-{
- iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
- iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
- &priv->regs->ifregs[0].cmask);
- if (set == PCH_ENABLE)
- pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
- PCH_IF_MCONT_EOB);
- else
- pch_can_bit_set(&priv->regs->ifregs[0].mcont, PCH_IF_MCONT_EOB);
-
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
-}
-
-static void pch_can_get_rx_buffer_link(struct pch_can_priv *priv,
- u32 buffer_num, u32 *link)
-{
- iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
-
- if (ioread32(&priv->regs->ifregs[0].mcont) & PCH_IF_MCONT_EOB)
- *link = PCH_DISABLE;
- else
- *link = PCH_ENABLE;
-}
-
static void pch_can_clear_buffers(struct pch_can_priv *priv)
{
int i;
@@ -583,12 +516,6 @@ static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)
}
}
-static int pch_can_get_buffer_status(struct pch_can_priv *priv)
-{
- return (ioread32(&priv->regs->treq1) & 0xffff) |
- ((ioread32(&priv->regs->treq2) & 0xffff) << 16);
-}
-
static void pch_can_reset(struct pch_can_priv *priv)
{
/* write to sw reset register */
@@ -1109,6 +1036,79 @@ static void __devexit pch_can_remove(struct pci_dev *pdev)
}
#ifdef CONFIG_PM
+static void pch_can_set_int_custom(struct pch_can_priv *priv)
+{
+ /* Clearing the IE, SIE and EIE bits of Can control register. */
+ pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_IE_SIE_EIE);
+
+ /* Appropriately setting them. */
+ pch_can_bit_set(&priv->regs->cont,
+ ((priv->int_enables & PCH_MSK_CTRL_IE_SIE_EIE) << 1));
+}
+
+/* This function retrieves interrupt enabled for the CAN device. */
+static void pch_can_get_int_enables(struct pch_can_priv *priv, u32 *enables)
+{
+ /* Obtaining the status of IE, SIE and EIE interrupt bits. */
+ *enables = ((ioread32(&priv->regs->cont) & PCH_CTRL_IE_SIE_EIE) >> 1);
+}
+
+static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,
+ enum pch_ifreg dir)
+{
+ u32 ie, enable;
+
+ if (dir)
+ ie = PCH_IF_MCONT_RXIE;
+ else
+ ie = PCH_IF_MCONT_TXIE;
+
+ iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[dir].cmask);
+ pch_can_check_if_busy(&priv->regs->ifregs[dir].creq, buff_num);
+
+ if (((ioread32(&priv->regs->ifregs[dir].id2)) & PCH_ID_MSGVAL) &&
+ ((ioread32(&priv->regs->ifregs[dir].mcont)) & ie)) {
+ enable = 1;
+ } else {
+ enable = 0;
+ }
+ return enable;
+}
+
+static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,
+ u32 buffer_num, u32 set)
+{
+ iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
+ pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
+ iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
+ &priv->regs->ifregs[0].cmask);
+ if (set == PCH_ENABLE)
+ pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
+ PCH_IF_MCONT_EOB);
+ else
+ pch_can_bit_set(&priv->regs->ifregs[0].mcont, PCH_IF_MCONT_EOB);
+
+ pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
+}
+
+static void pch_can_get_rx_buffer_link(struct pch_can_priv *priv,
+ u32 buffer_num, u32 *link)
+{
+ iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
+ pch_can_check_if_busy(&priv->regs->ifregs[0].creq, buffer_num);
+
+ if (ioread32(&priv->regs->ifregs[0].mcont) & PCH_IF_MCONT_EOB)
+ *link = PCH_DISABLE;
+ else
+ *link = PCH_ENABLE;
+}
+
+static int pch_can_get_buffer_status(struct pch_can_priv *priv)
+{
+ return (ioread32(&priv->regs->treq1) & 0xffff) |
+ ((ioread32(&priv->regs->treq2) & 0xffff) << 16);
+}
+
static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)
{
int i; /* Counter variable. */
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 04/20] pch_can: Improve rx processing
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-3-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
Replace complex "goto" to "do~while".
For easy to read/understand, it divides a rx function into some functions.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 158 +++++++++++++++++++++++----------------------
1 files changed, 82 insertions(+), 76 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 210957f..d646fbc 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -698,83 +698,110 @@ static irqreturn_t pch_can_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
+static void pch_fifo_thresh(struct pch_can_priv *priv, int obj_id)
+{
+ if (obj_id < PCH_FIFO_THRESH) {
+ iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL |
+ PCH_CMASK_ARB, &priv->regs->ifregs[0].cmask);
+
+ /* Clearing the Dir bit. */
+ pch_can_bit_clear(&priv->regs->ifregs[0].id2, PCH_ID2_DIR);
+
+ /* Clearing NewDat & IntPnd */
+ pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
+ PCH_IF_MCONT_INTPND);
+ pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_id);
+ } else if (obj_id > PCH_FIFO_THRESH) {
+ pch_can_int_clr(priv, obj_id);
+ } else if (obj_id == PCH_FIFO_THRESH) {
+ int cnt;
+ for (cnt = 0; cnt < PCH_FIFO_THRESH; cnt++)
+ pch_can_int_clr(priv, cnt + 1);
+ }
+}
+
+static void pch_can_rx_msg_lost(struct net_device *ndev, int obj_id)
+{
+ struct pch_can_priv *priv = netdev_priv(ndev);
+ struct net_device_stats *stats = &(priv->ndev->stats);
+ struct sk_buff *skb;
+ struct can_frame *cf;
+
+ netdev_dbg(priv->ndev, "Msg Obj is overwritten.\n");
+ pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
+ PCH_IF_MCONT_MSGLOST);
+ iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
+ &priv->regs->ifregs[0].cmask);
+ pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_id);
+
+ skb = alloc_can_err_skb(ndev, &cf);
+ if (!skb)
+ return;
+
+ cf->can_id |= CAN_ERR_CRTL;
+ cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
+ stats->rx_over_errors++;
+ stats->rx_errors++;
+
+ netif_receive_skb(skb);
+}
+
+static int pch_can_rx_normal(struct net_device *ndev, u32 obj_num, int quota)
{
u32 reg;
canid_t id;
- u32 ide;
- u32 rtr;
- int i, k;
int rcv_pkts = 0;
struct sk_buff *skb;
struct can_frame *cf;
struct pch_can_priv *priv = netdev_priv(ndev);
struct net_device_stats *stats = &(priv->ndev->stats);
+ int i;
+ u32 id2;
u16 data_reg;
- /* Reading the messsage object from the Message RAM */
- iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, int_stat);
+ do {
+ /* Reading the messsage object from the Message RAM */
+ iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
+ pch_can_check_if_busy(&priv->regs->ifregs[0].creq, obj_num);
- /* Reading the MCONT register. */
- reg = ioread32(&priv->regs->ifregs[0].mcont);
- reg &= 0xffff;
+ /* Reading the MCONT register. */
+ reg = ioread32(&priv->regs->ifregs[0].mcont);
+
+ if (reg & PCH_IF_MCONT_EOB)
+ break;
- for (k = int_stat; !(reg & PCH_IF_MCONT_EOB); k++) {
/* If MsgLost bit set. */
if (reg & PCH_IF_MCONT_MSGLOST) {
- dev_err(&priv->ndev->dev, "Msg Obj is overwritten.\n");
- pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
- PCH_IF_MCONT_MSGLOST);
- iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,
- &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
-
- skb = alloc_can_err_skb(ndev, &cf);
- if (!skb)
- return -ENOMEM;
-
- priv->can.can_stats.error_passive++;
- priv->can.state = CAN_STATE_ERROR_PASSIVE;
- cf->can_id |= CAN_ERR_CRTL;
- cf->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;
- cf->data[2] |= CAN_ERR_PROT_OVERLOAD;
- stats->rx_packets++;
- stats->rx_bytes += cf->can_dlc;
-
- netif_receive_skb(skb);
+ pch_can_rx_msg_lost(ndev, obj_num);
rcv_pkts++;
- goto RX_NEXT;
+ quota--;
+ obj_num++;
+ continue;
+ } else if (!(reg & PCH_IF_MCONT_NEWDAT)) {
+ obj_num++;
+ continue;
}
- if (!(reg & PCH_IF_MCONT_NEWDAT))
- goto RX_NEXT;
skb = alloc_can_skb(priv->ndev, &cf);
if (!skb)
return -ENOMEM;
/* Get Received data */
- ide = ((ioread32(&priv->regs->ifregs[0].id2)) & PCH_ID2_XTD) >>
- 14;
- if (ide) {
+ id2 = ioread32(&priv->regs->ifregs[0].id2);
+ if (id2 & PCH_ID2_XTD) {
id = (ioread32(&priv->regs->ifregs[0].id1) & 0xffff);
- id |= (((ioread32(&priv->regs->ifregs[0].id2)) &
- 0x1fff) << 16);
- cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG;
+ id |= (((id2) & 0x1fff) << 16);
+ cf->can_id = id | CAN_EFF_FLAG;
} else {
- id = (((ioread32(&priv->regs->ifregs[0].id2)) &
- (CAN_SFF_MASK << 2)) >> 2);
- cf->can_id = (id & CAN_SFF_MASK);
+ id = (id2 >> 2) & CAN_SFF_MASK;
+ cf->can_id = id;
}
- rtr = (ioread32(&priv->regs->ifregs[0].id2) & PCH_ID2_DIR);
- if (rtr) {
- cf->can_dlc = 0;
+ if (id2 & PCH_ID2_DIR)
cf->can_id |= CAN_RTR_FLAG;
- } else {
- cf->can_dlc =
- ((ioread32(&priv->regs->ifregs[0].mcont)) & 0x0f);
- }
+
+ cf->can_dlc = get_can_dlc((ioread32(&priv->regs->
+ ifregs[0].mcont)) & 0xF);
for (i = 0; i < cf->can_dlc; i += 2) {
data_reg = ioread16(&priv->regs->ifregs[0].data[i / 2]);
@@ -785,33 +812,12 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
netif_receive_skb(skb);
rcv_pkts++;
stats->rx_packets++;
+ quota--;
stats->rx_bytes += cf->can_dlc;
- if (k < PCH_FIFO_THRESH) {
- iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL |
- PCH_CMASK_ARB, &priv->regs->ifregs[0].cmask);
-
- /* Clearing the Dir bit. */
- pch_can_bit_clear(&priv->regs->ifregs[0].id2,
- PCH_ID2_DIR);
-
- /* Clearing NewDat & IntPnd */
- pch_can_bit_clear(&priv->regs->ifregs[0].mcont,
- PCH_IF_MCONT_INTPND);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
- } else if (k > PCH_FIFO_THRESH) {
- pch_can_int_clr(priv, k);
- } else if (k == PCH_FIFO_THRESH) {
- int cnt;
- for (cnt = 0; cnt < PCH_FIFO_THRESH; cnt++)
- pch_can_int_clr(priv, cnt+1);
- }
-RX_NEXT:
- /* Reading the messsage object from the Message RAM */
- iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[0].creq, k);
- reg = ioread32(&priv->regs->ifregs[0].mcont);
- }
+ pch_fifo_thresh(priv, obj_num);
+ obj_num++;
+ } while (quota > 0);
return rcv_pkts;
}
@@ -869,7 +875,7 @@ static int pch_can_rx_poll(struct napi_struct *napi, int quota)
goto end;
if ((int_stat >= PCH_RX_OBJ_START) && (int_stat <= PCH_RX_OBJ_END)) {
- rcv_pkts += pch_can_rx_normal(ndev, int_stat);
+ rcv_pkts += pch_can_rx_normal(ndev, int_stat, quota);
quota -= rcv_pkts;
if (quota < 0)
goto end;
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 03/20] pch_can: Fix endianness issue
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-2-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
there is endianness issue both Tx and Rx.
Currently, data is set like below.
Register:
MSB--LSB
x x D0 D1
x x D2 D3
x x D4 D5
x x D6 D7
But Data to be sent must be set like below.
Register:
MSB--LSB
x x D1 D0
x x D3 D2
x x D5 D4
x x D7 D6 (x means reserved area.)
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 47 +++++++++++++++++++-------------------------
1 files changed, 20 insertions(+), 27 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 0b6d4f4..210957f 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -138,10 +138,7 @@ struct pch_can_if_regs {
u32 id1;
u32 id2;
u32 mcont;
- u32 dataa1;
- u32 dataa2;
- u32 datab1;
- u32 datab2;
+ u32 data[4];
u32 rsv[13];
};
@@ -424,10 +421,10 @@ static void pch_can_clear_buffers(struct pch_can_priv *priv)
iowrite32(0x0, &priv->regs->ifregs[0].id1);
iowrite32(0x0, &priv->regs->ifregs[0].id2);
iowrite32(0x0, &priv->regs->ifregs[0].mcont);
- iowrite32(0x0, &priv->regs->ifregs[0].dataa1);
- iowrite32(0x0, &priv->regs->ifregs[0].dataa2);
- iowrite32(0x0, &priv->regs->ifregs[0].datab1);
- iowrite32(0x0, &priv->regs->ifregs[0].datab2);
+ iowrite32(0x0, &priv->regs->ifregs[0].data[0]);
+ iowrite32(0x0, &priv->regs->ifregs[0].data[1]);
+ iowrite32(0x0, &priv->regs->ifregs[0].data[2]);
+ iowrite32(0x0, &priv->regs->ifregs[0].data[3]);
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
PCH_CMASK_ARB | PCH_CMASK_CTRL,
&priv->regs->ifregs[0].cmask);
@@ -441,10 +438,10 @@ static void pch_can_clear_buffers(struct pch_can_priv *priv)
iowrite32(0x0, &priv->regs->ifregs[1].id1);
iowrite32(0x0, &priv->regs->ifregs[1].id2);
iowrite32(0x0, &priv->regs->ifregs[1].mcont);
- iowrite32(0x0, &priv->regs->ifregs[1].dataa1);
- iowrite32(0x0, &priv->regs->ifregs[1].dataa2);
- iowrite32(0x0, &priv->regs->ifregs[1].datab1);
- iowrite32(0x0, &priv->regs->ifregs[1].datab2);
+ iowrite32(0x0, &priv->regs->ifregs[1].data[0]);
+ iowrite32(0x0, &priv->regs->ifregs[1].data[1]);
+ iowrite32(0x0, &priv->regs->ifregs[1].data[2]);
+ iowrite32(0x0, &priv->regs->ifregs[1].data[3]);
iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |
PCH_CMASK_ARB | PCH_CMASK_CTRL,
&priv->regs->ifregs[1].cmask);
@@ -707,12 +704,13 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
canid_t id;
u32 ide;
u32 rtr;
- int i, j, k;
+ int i, k;
int rcv_pkts = 0;
struct sk_buff *skb;
struct can_frame *cf;
struct pch_can_priv *priv = netdev_priv(ndev);
struct net_device_stats *stats = &(priv->ndev->stats);
+ u16 data_reg;
/* Reading the messsage object from the Message RAM */
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[0].cmask);
@@ -778,12 +776,10 @@ static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat)
((ioread32(&priv->regs->ifregs[0].mcont)) & 0x0f);
}
- for (i = 0, j = 0; i < cf->can_dlc; j++) {
- reg = ioread32(&priv->regs->ifregs[0].dataa1 + j*4);
- cf->data[i++] = cpu_to_le32(reg & 0xff);
- if (i == cf->can_dlc)
- break;
- cf->data[i++] = cpu_to_le32((reg >> 8) & 0xff);
+ for (i = 0; i < cf->can_dlc; i += 2) {
+ data_reg = ioread16(&priv->regs->ifregs[0].data[i / 2]);
+ cf->data[i] = data_reg;
+ cf->data[i + 1] = data_reg >> 8;
}
netif_receive_skb(skb);
@@ -1016,10 +1012,10 @@ static int pch_close(struct net_device *ndev)
static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
{
- int i, j;
struct pch_can_priv *priv = netdev_priv(ndev);
struct can_frame *cf = (struct can_frame *)skb->data;
int tx_buffer_avail = 0;
+ int i;
if (can_dropped_invalid_skb(ndev, skb))
return NETDEV_TX_OK;
@@ -1060,13 +1056,10 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
if (cf->can_id & CAN_RTR_FLAG)
pch_can_bit_clear(&priv->regs->ifregs[1].id2, PCH_ID2_DIR);
- for (i = 0, j = 0; i < cf->can_dlc; j++) {
- iowrite32(le32_to_cpu(cf->data[i++]),
- (&priv->regs->ifregs[1].dataa1) + j*4);
- if (i == cf->can_dlc)
- break;
- iowrite32(le32_to_cpu(cf->data[i++] << 8),
- (&priv->regs->ifregs[1].dataa1) + j*4);
+ /* Copy data to register */
+ for (i = 0; i < cf->can_dlc; i += 2) {
+ iowrite16(cf->data[i] | (cf->data[i + 1] << 8),
+ &priv->regs->ifregs[1].data[i / 2]);
}
can_put_echo_skb(skb, ndev, tx_buffer_avail - PCH_RX_OBJ_END - 1);
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 02/20] pch_can: Divide poll function
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
In-Reply-To: <1292221467-8039-1-git-send-email-tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
To easy to read/understand, divide poll function into two sub-functions.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 71 ++++++++++++++++++++++-----------------------
1 files changed, 35 insertions(+), 36 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index f0f1404..0b6d4f4 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -819,72 +819,71 @@ RX_NEXT:
return rcv_pkts;
}
-static int pch_can_rx_poll(struct napi_struct *napi, int quota)
+
+static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat)
{
- struct net_device *ndev = napi->dev;
struct pch_can_priv *priv = netdev_priv(ndev);
struct net_device_stats *stats = &(priv->ndev->stats);
u32 dlc;
+
+ can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);
+ iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
+ &priv->regs->ifregs[1].cmask);
+ pch_can_check_if_busy(&priv->regs->ifregs[1].creq, int_stat);
+ dlc = get_can_dlc(ioread32(&priv->regs->ifregs[1].mcont) &
+ PCH_IF_MCONT_DLC);
+ stats->tx_bytes += dlc;
+ stats->tx_packets++;
+ if (int_stat == PCH_TX_OBJ_END)
+ netif_wake_queue(ndev);
+}
+
+static int pch_can_rx_poll(struct napi_struct *napi, int quota)
+{
+ struct net_device *ndev = napi->dev;
+ struct pch_can_priv *priv = netdev_priv(ndev);
u32 int_stat;
int rcv_pkts = 0;
u32 reg_stat;
int_stat = pch_can_int_pending(priv);
if (!int_stat)
- return 0;
+ goto end;
-INT_STAT:
- if (int_stat == PCH_STATUS_INT) {
+ if ((int_stat == PCH_STATUS_INT) && (quota > 0)) {
reg_stat = ioread32(&priv->regs->stat);
if (reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) {
- if ((reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL)
+ if (reg_stat & PCH_BUS_OFF ||
+ (reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL) {
pch_can_error(ndev, reg_stat);
+ quota--;
+ }
}
- if (reg_stat & PCH_TX_OK) {
- iowrite32(PCH_CMASK_RX_TX_GET,
- &priv->regs->ifregs[1].cmask);
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq,
- ioread32(&priv->regs->intr));
+ if (reg_stat & PCH_TX_OK)
pch_can_bit_clear(&priv->regs->stat, PCH_TX_OK);
- }
if (reg_stat & PCH_RX_OK)
pch_can_bit_clear(&priv->regs->stat, PCH_RX_OK);
int_stat = pch_can_int_pending(priv);
- if (int_stat == PCH_STATUS_INT)
- goto INT_STAT;
}
-MSG_OBJ:
+ if (quota == 0)
+ goto end;
+
if ((int_stat >= PCH_RX_OBJ_START) && (int_stat <= PCH_RX_OBJ_END)) {
- rcv_pkts = pch_can_rx_normal(ndev, int_stat);
- if (rcv_pkts < 0)
- return 0;
+ rcv_pkts += pch_can_rx_normal(ndev, int_stat);
+ quota -= rcv_pkts;
+ if (quota < 0)
+ goto end;
} else if ((int_stat >= PCH_TX_OBJ_START) &&
(int_stat <= PCH_TX_OBJ_END)) {
/* Handle transmission interrupt */
- can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);
- iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
- &priv->regs->ifregs[1].cmask);
- dlc = ioread32(&priv->regs->ifregs[1].mcont) &
- PCH_IF_MCONT_DLC;
- pch_can_check_if_busy(&priv->regs->ifregs[1].creq, int_stat);
- if (dlc > 8)
- dlc = 8;
- stats->tx_bytes += dlc;
- stats->tx_packets++;
- if (int_stat == PCH_TX_OBJ_END)
- netif_wake_queue(ndev);
+ pch_can_tx_complete(ndev, int_stat);
}
- int_stat = pch_can_int_pending(priv);
- if (int_stat == PCH_STATUS_INT)
- goto INT_STAT;
- else if (int_stat >= 1 && int_stat <= 32)
- goto MSG_OBJ;
-
+end:
napi_complete(napi);
pch_can_set_int_enables(priv, PCH_CAN_ALL);
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 01/20] pch_can: Add flow control processing
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg-5Yr1BZd7O62+XT7JhA+gdA, w.sang-bIcnvbaLZ9MEGnE8C9+IrQ,
chripell-VaTbYqLCNhc, 21cnbao-Re5JQEeQqe8AvxtiuMwx3w,
sameo-VuQAYsv1563Yd54FQh9/CA,
socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TZUIDd8j+nm9g
Cc: andrew.chih.howe.khor-ral2JQCrhuEAvxtiuMwx3w,
qi.wang-ral2JQCrhuEAvxtiuMwx3w,
margie.foster-ral2JQCrhuEAvxtiuMwx3w,
yong.y.wang-ral2JQCrhuEAvxtiuMwx3w,
kok.howg.ewe-ral2JQCrhuEAvxtiuMwx3w,
joel.clark-ral2JQCrhuEAvxtiuMwx3w
Currently, there is no flow control processing.
Thus, Add flow control processing as
when there is no empty of tx buffer,
netif_stop_queue is called.
When there is empty buffer, netif_wake_queue is called.
Signed-off-by: Tomoya MORINAGA <tomoya-linux-ECg8zkTtlr0C6LszWs/t0g@public.gmane.org>
---
drivers/net/can/pch_can.c | 31 ++++++++++++-------------------
1 files changed, 12 insertions(+), 19 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index a9b6a65..f0f1404 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -102,6 +102,10 @@
#define PCH_FIFO_THRESH 16
+/* TxRqst2 show status of MsgObjNo.17~32 */
+#define PCH_TREQ2_TX_MASK (((1 << PCH_TX_OBJ_NUM) - 1) <<\
+ (PCH_RX_OBJ_END - 16))
+
enum pch_ifreg {
PCH_RX_IFREG,
PCH_TX_IFREG,
@@ -871,6 +875,8 @@ MSG_OBJ:
dlc = 8;
stats->tx_bytes += dlc;
stats->tx_packets++;
+ if (int_stat == PCH_TX_OBJ_END)
+ netif_wake_queue(ndev);
}
int_stat = pch_can_int_pending(priv);
@@ -1009,18 +1015,6 @@ static int pch_close(struct net_device *ndev)
return 0;
}
-static int pch_get_msg_obj_sts(struct net_device *ndev, u32 obj_id)
-{
- u32 buffer_status = 0;
- struct pch_can_priv *priv = netdev_priv(ndev);
-
- /* Getting the message object status. */
- buffer_status = (u32) pch_can_get_buffer_status(priv);
-
- return buffer_status & obj_id;
-}
-
-
static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
{
int i, j;
@@ -1031,17 +1025,16 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)
if (can_dropped_invalid_skb(ndev, skb))
return NETDEV_TX_OK;
- if (priv->tx_obj == PCH_TX_OBJ_END) { /* Point tail Obj */
- while (pch_get_msg_obj_sts(ndev, (((1 << PCH_TX_OBJ_NUM)-1) <<
- PCH_RX_OBJ_NUM)))
- udelay(500);
+ if (priv->tx_obj == PCH_TX_OBJ_END) {
+ if (ioread32(&priv->regs->treq2) & PCH_TREQ2_TX_MASK)
+ netif_stop_queue(ndev);
- priv->tx_obj = PCH_TX_OBJ_START; /* Point head of Tx Obj ID */
- tx_buffer_avail = priv->tx_obj; /* Point Tail of Tx Obj */
+ tx_buffer_avail = priv->tx_obj;
+ priv->tx_obj = PCH_TX_OBJ_START;
} else {
tx_buffer_avail = priv->tx_obj;
+ priv->tx_obj++;
}
- priv->tx_obj++;
/* Reading the Msg Obj from the Msg RAM to the Interface register. */
iowrite32(PCH_CMASK_RX_TX_GET, &priv->regs->ifregs[1].cmask);
--
1.6.0.6
^ permalink raw reply related
* [PATCH net-next-2.6 v9 20/20] pch_can: Replace netif_rx to netif_receive_skb
From: Tomoya MORINAGA @ 2010-12-13 6:24 UTC (permalink / raw)
To: wg, w.sang, chripell, 21cnbao, sameo, socketcan-core, netdev,
linux-kernel
Cc: qi.wang, yong.y.wang, andrew.chih.howe.khor, joel.clark,
kok.howg.ewe, margie.foster, Tomoya MORINAGA
In-Reply-To: <1292221467-8039-19-git-send-email-tomoya-linux@dsn.okisemi.com>
Since this driver is implemented as NAPI,
netif_receive_skb must be used not netif_rx.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
drivers/net/can/pch_can.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index 4697b1c..8d45fdd 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -572,7 +572,7 @@ static void pch_can_error(struct net_device *ndev, u32 status)
cf->data[7] = (errc & PCH_REC) >> 8;
priv->can.state = state;
- netif_rx(skb);
+ netif_receive_skb(skb);
stats->rx_packets++;
stats->rx_bytes += cf->can_dlc;
--
1.6.0.6
^ permalink raw reply related
* [PATCH] ipv6: Use ip6_dst_hoplimit() instead of direct dst_metric() calls.
From: David Miller @ 2010-12-13 5:16 UTC (permalink / raw)
To: netdev
Signed-off-by: David S. Miller <davem@davemloft.net>
---
I just noticed this while hacking on metrics. IPV6 has to use
this special function because the default has a dynamic
per-interface value. So it can't do the same trick ipv4 does
by pre-seeding the cached route metric.
net/ipv6/netfilter/ip6t_REJECT.c | 2 +-
net/ipv6/route.c | 1 +
net/ipv6/xfrm6_mode_tunnel.c | 3 ++-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/net/ipv6/netfilter/ip6t_REJECT.c b/net/ipv6/netfilter/ip6t_REJECT.c
index 2933396..bf998fe 100644
--- a/net/ipv6/netfilter/ip6t_REJECT.c
+++ b/net/ipv6/netfilter/ip6t_REJECT.c
@@ -124,7 +124,7 @@ static void send_reset(struct net *net, struct sk_buff *oldskb)
skb_reset_network_header(nskb);
ip6h = ipv6_hdr(nskb);
ip6h->version = 6;
- ip6h->hop_limit = dst_metric(dst, RTAX_HOPLIMIT);
+ ip6h->hop_limit = ip6_dst_hoplimit(dst);
ip6h->nexthdr = IPPROTO_TCP;
ipv6_addr_copy(&ip6h->saddr, &oip6h->daddr);
ipv6_addr_copy(&ip6h->daddr, &oip6h->saddr);
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 4aed081..9b2d7bc 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -1119,6 +1119,7 @@ int ip6_dst_hoplimit(struct dst_entry *dst)
}
return hoplimit;
}
+EXPORT_SYMBOL(ip6_dst_hoplimit);
/*
*
diff --git a/net/ipv6/xfrm6_mode_tunnel.c b/net/ipv6/xfrm6_mode_tunnel.c
index b809812..645cb96 100644
--- a/net/ipv6/xfrm6_mode_tunnel.c
+++ b/net/ipv6/xfrm6_mode_tunnel.c
@@ -14,6 +14,7 @@
#include <net/dsfield.h>
#include <net/dst.h>
#include <net/inet_ecn.h>
+#include <net/ip6_route.h>
#include <net/ipv6.h>
#include <net/xfrm.h>
@@ -53,7 +54,7 @@ static int xfrm6_mode_tunnel_output(struct xfrm_state *x, struct sk_buff *skb)
if (x->props.flags & XFRM_STATE_NOECN)
dsfield &= ~INET_ECN_MASK;
ipv6_change_dsfield(top_iph, 0, dsfield);
- top_iph->hop_limit = dst_metric(dst->child, RTAX_HOPLIMIT);
+ top_iph->hop_limit = ip6_dst_hoplimit(dst->child);
ipv6_addr_copy(&top_iph->saddr, (struct in6_addr *)&x->props.saddr);
ipv6_addr_copy(&top_iph->daddr, (struct in6_addr *)&x->id.daddr);
return 0;
--
1.7.3.2
^ permalink raw reply related
* Re: [PATCH 1/3] bonding: add the debugfs facility to the bonding driver
From: David Miller @ 2010-12-13 5:15 UTC (permalink / raw)
To: izumi.taku; +Cc: fubar, netdev, eric.dumazet, shemminger
In-Reply-To: <4D05AA8A.8020705@jp.fujitsu.com>
From: Taku Izumi <izumi.taku@jp.fujitsu.com>
Date: Mon, 13 Dec 2010 14:09:30 +0900
> I resent the patch #2 and #3 with Jay's signoff.
Thank you.
^ permalink raw reply
* Re: [PATCH 1/3] bonding: add the debugfs facility to the bonding driver
From: Taku Izumi @ 2010-12-13 5:09 UTC (permalink / raw)
To: David Miller; +Cc: fubar, netdev, eric.dumazet, shemminger
In-Reply-To: <20101210.162319.35837953.davem@davemloft.net>
(2010/12/11 9:23), David Miller wrote:
> From: Jay Vosburgh<fubar@us.ibm.com>
> Date: Fri, 10 Dec 2010 16:21:45 -0800
>
>> Taku Izumi<izumi.taku@jp.fujitsu.com> wrote:
>>
>>>
>>> This patch provides the debugfs facility to the bonding driver.
>>> The "bonding" directory is created in the debugfs root and directories of
>>> each bonding interface (like bond0, bond1...) are created in that.
>>>
>>> # mount -t debugfs none /sys/kernel/debug
>>>
>>> # ls /sys/kernel/debug/bonding
>>> bond0 bond1
>>>
>>> Signed-off-by: Taku Izumi<izumi.taku@jp.fujitsu.com>
>>
>> Tested replacement patch 1 with original patches 2 and 3. Works
>> as advertised, no pesky crashes.
>>
>> Signed-off-by: Jay Vosburgh<fubar@us.ibm.com>
>
> I'll apply this patch #1. Taku-san, could you please report patch #2
> and #3 and remember to include Jay's signoff.
>
I resent the patch #2 and #3 with Jay's signoff.
Best regards,
Taku Izumi
^ permalink raw reply
* Re: [PATCH 3/3] bonding: add the debugfs interface to see RLB hash table
From: Taku Izumi @ 2010-12-13 5:04 UTC (permalink / raw)
To: netdev@vger.kernel.org, Jay Vosburgh, David S. Miller
Cc: eric.dumazet, shemminger
In-Reply-To: <4CF89AC2.6030606@jp.fujitsu.com>
This patch provices the debugfs interface to see RLB hash table
like the following:
# cat /sys/kernel/debug/bonding/bond0/rlb_hash_table
SourceIP DestinationIP Destination MAC DEV
10.124.196.205 10.124.196.205 ff:ff:ff:ff:ff:ff eth4
10.124.196.205 10.124.196.81 00:19:99:XX:XX:XX eth3
10.124.196.205 10.124.196.1 00:21:d8:XX:XX:XX eth0
This is helpful to check if the receive load balancing works as expected.
Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com>
Signed-off-by: Jay Vosburgh <fubar@us.ibm.com>
---
drivers/net/bonding/bond_debugfs.c | 50 +++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
Index: net-next/drivers/net/bonding/bond_debugfs.c
===================================================================
--- net-next.orig/drivers/net/bonding/bond_debugfs.c
+++ net-next/drivers/net/bonding/bond_debugfs.c
@@ -4,6 +4,7 @@
#include <linux/netdevice.h>
#include "bonding.h"
+#include "bond_alb.h"
#ifdef CONFIG_DEBUG_FS
@@ -12,6 +13,52 @@
static struct dentry *bonding_debug_root;
+/*
+ * Show RLB hash table
+ */
+static int bond_debug_rlb_hash_show(struct seq_file *m, void *v)
+{
+ struct bonding *bond = m->private;
+ struct alb_bond_info *bond_info = &(BOND_ALB_INFO(bond));
+ struct rlb_client_info *client_info;
+ u32 hash_index;
+
+ if (bond->params.mode != BOND_MODE_ALB)
+ return 0;
+
+ seq_printf(m, "SourceIP DestinationIP "
+ "Destination MAC DEV\n");
+
+ spin_lock_bh(&(BOND_ALB_INFO(bond).rx_hashtbl_lock));
+
+ hash_index = bond_info->rx_hashtbl_head;
+ for (; hash_index != RLB_NULL_INDEX; hash_index = client_info->next) {
+ client_info = &(bond_info->rx_hashtbl[hash_index]);
+ seq_printf(m, "%-15pI4 %-15pI4 %-17pM %s\n",
+ &client_info->ip_src,
+ &client_info->ip_dst,
+ &client_info->mac_dst,
+ client_info->slave->dev->name);
+ }
+
+ spin_unlock_bh(&(BOND_ALB_INFO(bond).rx_hashtbl_lock));
+
+ return 0;
+}
+
+static int bond_debug_rlb_hash_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, bond_debug_rlb_hash_show, inode->i_private);
+}
+
+static const struct file_operations bond_debug_rlb_hash_fops = {
+ .owner = THIS_MODULE,
+ .open = bond_debug_rlb_hash_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
void bond_debug_register(struct bonding *bond)
{
if (!bonding_debug_root)
@@ -25,6 +72,9 @@ void bond_debug_register(struct bonding
bond->dev->name);
return;
}
+
+ debugfs_create_file("rlb_hash_table", 0400, bond->debug_dir,
+ bond, &bond_debug_rlb_hash_fops);
}
void bond_debug_unregister(struct bonding *bond)
^ permalink raw reply
* Re: [PATCH 2/3] bonding: migrate some macros from bond_alb.c to bond_alb.h
From: Taku Izumi @ 2010-12-13 5:03 UTC (permalink / raw)
To: netdev@vger.kernel.org, Jay Vosburgh, David S. Miller
Cc: eric.dumazet, shemminger
In-Reply-To: <4CF89A9C.8080603@jp.fujitsu.com>
This patch simply migrates some macros from bond_alb.c to bond_alb.h.
Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com>
Signed-off-by: Jay Vosburgh <fubar@us.ibm.com>
---
drivers/net/bonding/bond_alb.c | 36 ------------------------------------
drivers/net/bonding/bond_alb.h | 38 ++++++++++++++++++++++++++++++++++++++
2 files changed, 38 insertions(+), 36 deletions(-)
Index: net-next/drivers/net/bonding/bond_alb.c
===================================================================
--- net-next.orig/drivers/net/bonding/bond_alb.c
+++ net-next/drivers/net/bonding/bond_alb.c
@@ -44,42 +44,6 @@
#include "bond_alb.h"
-#define ALB_TIMER_TICKS_PER_SEC 10 /* should be a divisor of HZ */
-#define BOND_TLB_REBALANCE_INTERVAL 10 /* In seconds, periodic re-balancing.
- * Used for division - never set
- * to zero !!!
- */
-#define BOND_ALB_LP_INTERVAL 1 /* In seconds, periodic send of
- * learning packets to the switch
- */
-
-#define BOND_TLB_REBALANCE_TICKS (BOND_TLB_REBALANCE_INTERVAL \
- * ALB_TIMER_TICKS_PER_SEC)
-
-#define BOND_ALB_LP_TICKS (BOND_ALB_LP_INTERVAL \
- * ALB_TIMER_TICKS_PER_SEC)
-
-#define TLB_HASH_TABLE_SIZE 256 /* The size of the clients hash table.
- * Note that this value MUST NOT be smaller
- * because the key hash table is BYTE wide !
- */
-
-
-#define TLB_NULL_INDEX 0xffffffff
-#define MAX_LP_BURST 3
-
-/* rlb defs */
-#define RLB_HASH_TABLE_SIZE 256
-#define RLB_NULL_INDEX 0xffffffff
-#define RLB_UPDATE_DELAY 2*ALB_TIMER_TICKS_PER_SEC /* 2 seconds */
-#define RLB_ARP_BURST_SIZE 2
-#define RLB_UPDATE_RETRY 3 /* 3-ticks - must be smaller than the rlb
- * rebalance interval (5 min).
- */
-/* RLB_PROMISC_TIMEOUT = 10 sec equals the time that the current slave is
- * promiscuous after failover
- */
-#define RLB_PROMISC_TIMEOUT 10*ALB_TIMER_TICKS_PER_SEC
#ifndef __long_aligned
#define __long_aligned __attribute__((aligned((sizeof(long)))))
Index: net-next/drivers/net/bonding/bond_alb.h
===================================================================
--- net-next.orig/drivers/net/bonding/bond_alb.h
+++ net-next/drivers/net/bonding/bond_alb.h
@@ -31,6 +31,44 @@ struct slave;
#define BOND_ALB_INFO(bond) ((bond)->alb_info)
#define SLAVE_TLB_INFO(slave) ((slave)->tlb_info)
+#define ALB_TIMER_TICKS_PER_SEC 10 /* should be a divisor of HZ */
+#define BOND_TLB_REBALANCE_INTERVAL 10 /* In seconds, periodic re-balancing.
+ * Used for division - never set
+ * to zero !!!
+ */
+#define BOND_ALB_LP_INTERVAL 1 /* In seconds, periodic send of
+ * learning packets to the switch
+ */
+
+#define BOND_TLB_REBALANCE_TICKS (BOND_TLB_REBALANCE_INTERVAL \
+ * ALB_TIMER_TICKS_PER_SEC)
+
+#define BOND_ALB_LP_TICKS (BOND_ALB_LP_INTERVAL \
+ * ALB_TIMER_TICKS_PER_SEC)
+
+#define TLB_HASH_TABLE_SIZE 256 /* The size of the clients hash table.
+ * Note that this value MUST NOT be smaller
+ * because the key hash table is BYTE wide !
+ */
+
+
+#define TLB_NULL_INDEX 0xffffffff
+#define MAX_LP_BURST 3
+
+/* rlb defs */
+#define RLB_HASH_TABLE_SIZE 256
+#define RLB_NULL_INDEX 0xffffffff
+#define RLB_UPDATE_DELAY (2*ALB_TIMER_TICKS_PER_SEC) /* 2 seconds */
+#define RLB_ARP_BURST_SIZE 2
+#define RLB_UPDATE_RETRY 3 /* 3-ticks - must be smaller than the rlb
+ * rebalance interval (5 min).
+ */
+/* RLB_PROMISC_TIMEOUT = 10 sec equals the time that the current slave is
+ * promiscuous after failover
+ */
+#define RLB_PROMISC_TIMEOUT (10*ALB_TIMER_TICKS_PER_SEC)
+
+
struct tlb_client_info {
struct slave *tx_slave; /* A pointer to slave used for transmiting
* packets to a Client that the Hash function
^ permalink raw reply
* Re: set vlan CFI and TPID
From: hong zhiyi @ 2010-12-13 2:20 UTC (permalink / raw)
To: Jesse Gross; +Cc: netdev
In-Reply-To: <AANLkTim3Rm91O2n6dCqTJYja8fy_sb0dKthCA1rf=FPV@mail.gmail.com>
On Mon, Dec 13, 2010 at 8:20 AM, Jesse Gross <jesse@nicira.com> wrote:
> On Tue, Dec 7, 2010 at 8:04 PM, hong zhiyi <zhiyi.hong@gmail.com> wrote:
>> Hi All,
>>
>> May I ask how to set the 1 bit CFI and 2 bytesTPID in the VLAN header
>> by vconfig?
>
> You can't change them using vconfig. For 802.1q/Ethernet, the TPID is
> 0x8100 and the CFI is 0.
>
>> and what is the meaning of the egress map and ingress map?
>
> These convert between the PCP bits found in the vlan header and the
> priority field that is used internally for QoS, which you access
> through tc.
>
Hi Jesse,
Thank you for your reply.
Then how can it set the value of the TPID and the CFI? Also, I do not
understand you mentioned the *tc* means, what is the tc?
Best Regards
Hong Zhiyi
^ permalink raw reply
* Re: net-next-2.6 [Patch 1/1] dccp: dead code elimination
From: Shan Wei @ 2010-12-13 1:13 UTC (permalink / raw)
To: Gerrit Renker; +Cc: davem, dccp, netdev
In-Reply-To: <1291982371-5666-1-git-send-email-gerrit@erg.abdn.ac.uk>
Gerrit Renker wrote, at 12/10/2010 07:59 PM:
>
> Shan,
> I have edited the commit message (s/marcos/macros/). In future, please
> can you cc: your patches to netdev@vger also. Thank you.
Thanks for your suggesting.
I'll do that next time.
--
Best Regards
-----
Shan Wei
^ permalink raw reply
* Re: [PATCH 10/27] ixgb: Don't check for vlan group on transmit
From: Jesse Gross @ 2010-12-13 1:00 UTC (permalink / raw)
To: Jeff Kirsher; +Cc: davem, Emil Tantilov, netdev, gospo, bphilips
In-Reply-To: <1292048241-22026-11-git-send-email-jeffrey.t.kirsher@intel.com>
On Fri, Dec 10, 2010 at 10:17 PM, Jeff Kirsher
<jeffrey.t.kirsher@intel.com> wrote:
> From: Emil Tantilov <emil.s.tantilov@intel.com>
>
> Based on a patch from Jesse Gross.
>
> Enable vlan tag insertion even when vlan group is not configured.
>
> For ixgb HW both CTRL0.VME and VLE bit in the Tx descriptor need to be set
> in order to enable HW acceleration.
>
> Introduced separate functions for enabling/disabling of vlan tag stripping
> similar to ixgbe.
Thanks for working on this. However, I don't think that this patch
actually does what it says.
In ixgb_xmit_frame() it's still checking whether adapter->vlgrp is
non-null before inserting a tag, so it will drop tags unless a vlan
group is configured. Also, since it's not currently possible to
toggle NETIF_F_HW_VLAN_RX, vlan stripping will never get disabled.
This is actually a regression since before vlan stripping would get
disabled if no vlan group was configured. Now, vlan headers will get
silently dropped if there is no vlan group.
Regardless of that, I still think this is a useful change on the road
towards adopting the new vlan interfaces, the problem is just that
currently it's halfway in between the old and the new. Given that, it
would obviously be much better to move all the way over the new when
addressing this.
Out of curiosity, is the implication of this that vlan insertion on
transmit and stripping on receive are always configured together? I
don't have hardware supported by this driver but when I worked on
ixgbe (which is at least superficially similar in this area) I didn't
have any problems configuring them independently.
Thanks.
^ permalink raw reply
* [PATCH update 2] firewire: net: add carrier detection
From: Stefan Richter @ 2010-12-13 0:46 UTC (permalink / raw)
To: Ben Hutchings, Maxim Levitsky; +Cc: netdev, linux1394-devel, Peter Stuge
In-Reply-To: <1292195134.3136.296.camel@localhost>
From: Maxim Levitsky <maximlevitsky@gmail.com>
To make userland, e.g. NetworkManager work with firewire, we need to
detect whether cable is plugged or not. Simple and correct way of doing
that is just counting number of peers. No peers - no link and vice
versa.
(Stefan R.: Drop ethtool_ops.get_link)
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
---
Update 2: Removed ethtool related hunks; dev->peer_count does not need
to be accessed within the spinlock as I first thought; reduced pointer
reference depth in fwnet_remove_peer.
Maxim, do you observe a remaining need for a get_link implementation?
I can't tell, I use rather minimal userland that doesn't care for link
status.
drivers/firewire/net.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
Index: b/drivers/firewire/net.c
===================================================================
--- a/drivers/firewire/net.c
+++ b/drivers/firewire/net.c
@@ -179,6 +179,7 @@ struct fwnet_device {
/* Number of tx datagrams that have been queued but not yet acked */
int queued_datagrams;
+ int peer_count;
struct list_head peer_list;
struct fw_card *card;
struct net_device *netdev;
@@ -1465,6 +1466,10 @@ static int fwnet_add_peer(struct fwnet_d
list_add_tail(&peer->peer_link, &dev->peer_list);
spin_unlock_irq(&dev->lock);
+ /* dev->peer_count acess is serialized by fwnet_device_mutex. */
+ if (++dev->peer_count > 1)
+ netif_carrier_on(dev->netdev);
+
return 0;
}
@@ -1543,13 +1548,16 @@ static int fwnet_probe(struct device *_d
return ret;
}
-static void fwnet_remove_peer(struct fwnet_peer *peer)
+static void fwnet_remove_peer(struct fwnet_peer *peer, struct fwnet_device *dev)
{
struct fwnet_partial_datagram *pd, *pd_next;
- spin_lock_irq(&peer->dev->lock);
+ if (--dev->peer_count == 1)
+ netif_carrier_off(dev->netdev);
+
+ spin_lock_irq(&dev->lock);
list_del(&peer->peer_link);
- spin_unlock_irq(&peer->dev->lock);
+ spin_unlock_irq(&dev->lock);
list_for_each_entry_safe(pd, pd_next, &peer->pd_list, pd_link)
fwnet_pd_delete(pd);
@@ -1566,7 +1574,7 @@ static int fwnet_remove(struct device *_
mutex_lock(&fwnet_device_mutex);
- fwnet_remove_peer(peer);
+ fwnet_remove_peer(peer, dev);
if (list_empty(&dev->peer_list)) {
net = dev->netdev;
--
Stefan Richter
-=====-==-=- ==-- -==-=
http://arcgraph.de/sr/
------------------------------------------------------------------------------
Oracle to DB2 Conversion Guide: Learn learn about native support for PL/SQL,
new data types, scalar functions, improved concurrency, built-in packages,
OCI, SQL*Plus, data movement tools, best practices and more.
http://p.sf.net/sfu/oracle-sfdev2dev
^ permalink raw reply
* Re: [PATCH] ehea: Fixing LRO configuration
From: Jesse Gross @ 2010-12-13 0:39 UTC (permalink / raw)
To: leitao; +Cc: shemminger, davem, netdev
In-Reply-To: <1291833062-27446-1-git-send-email-leitao@linux.vnet.ibm.com>
On Wed, Dec 8, 2010 at 10:31 AM, <leitao@linux.vnet.ibm.com> wrote:
> In order to set LRO on ehea, the user must set a module parameter, which
> is not the standard way to do so. This patch adds a way to set LRO using
> the ethtool tool.
>
> Signed-off-by: Breno Leitao <leitao@linux.vnet.ibm.com>
>
> diff --git a/drivers/net/ehea/ehea_ethtool.c b/drivers/net/ehea/ehea_ethtool.c
> index 75b099c..1f37ee6 100644
> --- a/drivers/net/ehea/ehea_ethtool.c
> +++ b/drivers/net/ehea/ehea_ethtool.c
> @@ -261,6 +261,13 @@ static void ehea_get_ethtool_stats(struct net_device *dev,
>
> }
>
> +static int ehea_set_flags(struct net_device *dev, u32 data)
> +{
> + return ethtool_op_set_flags(dev, data, ETH_FLAG_LRO
> + | ETH_FLAG_TXVLAN
> + | ETH_FLAG_RXVLAN);
I don't think that this should enable those vlan offloading flags. I
don't see any logic to actually disable vlan stripping on receive if
that flag is toggled. Transmit might be OK, since it will cause the
networking core to insert the tag in software if offloading is
disabled. However, I see some places where skb->protocol is accessed
to determine the protocol of the packet being transmitted. In most
drivers this causes a problem when transmit vlan offloading is
disabled because the packet type becomes ETH_P_8021Q, instead of the
expected protocol. On the other hand, it appears that there aren't
any offloads in vlan_features, so maybe it doesn't matter.
^ permalink raw reply
* Re: set vlan CFI and TPID
From: Jesse Gross @ 2010-12-13 0:20 UTC (permalink / raw)
To: hong zhiyi; +Cc: netdev
In-Reply-To: <AANLkTimW35xF4dcr_UO6XX1tBb3VBcp2PWPq8SkMk60=@mail.gmail.com>
On Tue, Dec 7, 2010 at 8:04 PM, hong zhiyi <zhiyi.hong@gmail.com> wrote:
> Hi All,
>
> May I ask how to set the 1 bit CFI and 2 bytesTPID in the VLAN header
> by vconfig?
You can't change them using vconfig. For 802.1q/Ethernet, the TPID is
0x8100 and the CFI is 0.
> and what is the meaning of the egress map and ingress map?
These convert between the PCP bits found in the vlan header and the
priority field that is used internally for QoS, which you access
through tc.
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