* Re: Maximum no of bytes Ethernet can transfer at a time ??
From: Ajit @ 2011-04-27 12:27 UTC (permalink / raw)
To: netdev
In-Reply-To: <1303906910.3166.50.camel@edumazet-laptop>
Eric Dumazet <eric.dumazet <at> gmail.com> writes:
> Sure, check your syscall returns values, and search for SO_RCVBUF &
> SO_SNDBUF (man 7 socket)
>
> --
okies..I dont know exactly how to use those but I will google and try it..
will post my result after some time.
Thank you
^ permalink raw reply
* Re: Maximum no of bytes Ethernet can transfer at a time ??
From: Eric Dumazet @ 2011-04-27 12:21 UTC (permalink / raw)
To: Ajit; +Cc: netdev
In-Reply-To: <loom.20110427T140651-957@post.gmane.org>
Le mercredi 27 avril 2011 à 12:11 +0000, Ajit a écrit :
> Guys,
>
> I have developed a code which uses raw sockets to transfer files. My code skips
> all the upper layer protocols,I have designed a small protocol of my own.
>
> Now to problem is, whenever I transfer a large file it creates a problem. If
> transfer a file of suppose 100kb or more, only 97.9 Kb is received, unlike in
> the case of files smaller that 97.9.
>
> What can be the problem ?? Does continuously sending and receiving of frames
> creates a problem ??
Sure, check your syscall returns values, and search for SO_RCVBUF &
SO_SNDBUF (man 7 socket)
^ permalink raw reply
* Re: [Bugme-new] [Bug 33842] New: NULL pointer dereference in ip_fragment
From: Eric Dumazet @ 2011-04-27 12:17 UTC (permalink / raw)
To: Tomas Carnecky; +Cc: Bandan Das, David Miller, netdev, akpm
In-Reply-To: <4DB8037E.7010207@dbservice.com>
Le mercredi 27 avril 2011 à 13:52 +0200, Tomas Carnecky a écrit :
> On 4/27/11 9:41 AM, Eric Dumazet wrote:
> > netconsole=4444@192.168.20.108/eth0,4444@192.168.20.112/00:1e:0b:ec:c3:e4
> I'm not having any luck with the netconsole. The last message I see on
> the target host is "Freeing unused kernel memory: 100k freed". I don't
> see any messages after that. Do I need to configure the same IP address
> in netconsole as is later configured by userspace? I set netconsole to
> use 192.168.0.50 while the init scripts set br0 to have 192.168.0.82.
> And would netconsole even work, as the bug is in the networking code itself?
>
>
It should work yes, even for a bug in networking stack.
Yes, you should take the source address you're supposed to have once
machine running. I suspect it could work with another IP address, but
using the normal one makes sure you dont hit some anti spoofing rule in
your LAN.
To check if netconsole works (after boot), you can try
dmesg -n 8
modprobe pktgen
You should see on remote machine :
pktgen: Packet Generator for packet performance testing. Version: 2.74
^ permalink raw reply
* Maximum no of bytes Ethernet can transfer at a time ??
From: Ajit @ 2011-04-27 12:11 UTC (permalink / raw)
To: netdev
Guys,
I have developed a code which uses raw sockets to transfer files. My code skips
all the upper layer protocols,I have designed a small protocol of my own.
Now to problem is, whenever I transfer a large file it creates a problem. If
transfer a file of suppose 100kb or more, only 97.9 Kb is received, unlike in
the case of files smaller that 97.9.
What can be the problem ?? Does continuously sending and receiving of frames
creates a problem ??
If any one is interested I can give you my code..
Thank you.
^ permalink raw reply
* Re: [PATCH] Applying inappropriate ioctl operation on socket should return ENOTTY
From: Alan Cox @ 2011-04-27 12:09 UTC (permalink / raw)
To: Lifeng Sun; +Cc: linux-kernel, netdev
In-Reply-To: <1303882625-28115-1-git-send-email-lifongsun@gmail.com>
> diff --git a/drivers/char/applicom.c b/drivers/char/applicom.c
> index 25373df..50c09e4 100644
> --- a/drivers/char/applicom.c
> +++ b/drivers/char/applicom.c
> @@ -838,6 +838,6 @@ static long ac_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
> Dummy = readb(apbs[IndexCard].RamIO + VERS);
> kfree(adgl);
> mutex_unlock(&ac_mutex);
> - return 0;
> + return ret;
> }
This one in fact is a bug fix where 0 gets returned not an error code it
ought to be submitted separately and described as such.
> diff --git a/drivers/char/dtlk.c b/drivers/char/dtlk.c
> index 85156dd..2d116d5 100644
> --- a/drivers/char/dtlk.c
> +++ b/drivers/char/dtlk.c
> @@ -289,7 +289,7 @@ static long dtlk_ioctl(struct file *file,
> return put_user(portval, argp);
>
> default:
> - return -EINVAL;
> + return -ENOTTY;
> }
> }
This one looks good (and the driver has another error in the ioctl
handler too that wants fixing where it returnds -EINVAL not -EFAULT)
>
> diff --git a/drivers/char/generic_nvram.c b/drivers/char/generic_nvram.c
> index 0e941b5..95278e9 100644
> --- a/drivers/char/generic_nvram.c
> +++ b/drivers/char/generic_nvram.c
> @@ -111,7 +111,7 @@ static int nvram_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
> nvram_sync();
> break;
> default:
> - return -EINVAL;
> + return -ENOTTY;
> }
Looks good
> return 0;
> diff --git a/drivers/char/genrtc.c b/drivers/char/genrtc.c
> index f773a9d..6f4c3da 100644
> --- a/drivers/char/genrtc.c
> +++ b/drivers/char/genrtc.c
> @@ -330,7 +330,7 @@ static int gen_rtc_ioctl(struct file *file,
> }
> }
>
> - return -EINVAL;
> + return -ENOTTY;
> }
Likewise
> static long gen_rtc_unlocked_ioctl(struct file *file, unsigned int cmd,
> diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c
> index 7066e80..720de66 100644
> --- a/drivers/char/hpet.c
> +++ b/drivers/char/hpet.c
> @@ -575,7 +575,7 @@ hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
> case HPET_IE_ON:
> return hpet_ioctl_ieon(devp);
> default:
> - return -EINVAL;
> + return -ENOTTY;
> }
Ok
> err = 0;
> diff --git a/drivers/char/i8k.c b/drivers/char/i8k.c
> index d72433f..4ba9b9f 100644
> --- a/drivers/char/i8k.c
> +++ b/drivers/char/i8k.c
> @@ -370,7 +370,7 @@ i8k_ioctl_unlocked(struct file *fp, unsigned int cmd, unsigned long arg)
> break;
>
> default:
> - return -EINVAL;
> + return -ENOTTY;
This one is incomplete - the driver also has a bogus check for arg being
non zero. That means ioctl(fd, BOGUS, 0) will return the wrong error code
still.
> }
>
> if (val < 0)
> diff --git a/drivers/char/ipmi/ipmi_devintf.c b/drivers/char/ipmi/ipmi_devintf.c
> index 2aa3977..bc8af5a 100644
> --- a/drivers/char/ipmi/ipmi_devintf.c
> +++ b/drivers/char/ipmi/ipmi_devintf.c
> @@ -232,7 +232,7 @@ static int ipmi_ioctl(struct file *file,
> unsigned int cmd,
> unsigned long data)
> {
> - int rv = -EINVAL;
> + int rv = -ENOTTY;
> struct ipmi_file_private *priv = file->private_data;
> void __user *arg = (void __user *)data;
No - there are cases that should return -EINVAL that this will break - a
default case needs adding
> diff --git a/drivers/char/lp.c b/drivers/char/lp.c
> index 97c3edb..2ff32c8 100644
> --- a/drivers/char/lp.c
> +++ b/drivers/char/lp.c
> @@ -650,7 +650,7 @@ static int lp_do_ioctl(unsigned int minor, unsigned int cmd,
> break;
>
> default:
> - retval = -EINVAL;
> + retval = -ENOTTY;
> }
> return retval;
Looks good
> }
> diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c
> index a12f524..45b7a7a 100644
> --- a/drivers/char/nwflash.c
> +++ b/drivers/char/nwflash.c
> @@ -115,7 +115,7 @@ static long flash_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
> gbWriteBase64Enable = 0;
> gbWriteEnable = 0;
> mutex_unlock(&flash_mutex);
> - return -EINVAL;
> + return -ENOTTY;
Ok
> }
> mutex_unlock(&flash_mutex);
> return 0;
> diff --git a/drivers/char/ppdev.c b/drivers/char/ppdev.c
> index f176dba..8dce214 100644
> --- a/drivers/char/ppdev.c
> +++ b/drivers/char/ppdev.c
> @@ -622,7 +622,7 @@ static int pp_do_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
>
> default:
> pr_debug(CHRDEV "%x: What? (cmd=0x%x)\n", minor, cmd);
> - return -EINVAL;
> + return -ENOTTY;
> }
Looks good
>
> /* Keep the compiler happy */
> diff --git a/drivers/char/random.c b/drivers/char/random.c
> index d4ddeba..40aad1c 100644
> --- a/drivers/char/random.c
> +++ b/drivers/char/random.c
> @@ -1157,7 +1157,7 @@ static long random_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
> rand_initialize();
> return 0;
> default:
> - return -EINVAL;
> + return -ENOTTY;
Ok
> }
> }
>
> diff --git a/drivers/char/raw.c b/drivers/char/raw.c
> index b4b9d5a..a992bf1 100644
> --- a/drivers/char/raw.c
> +++ b/drivers/char/raw.c
> @@ -231,7 +231,7 @@ static long raw_ctl_ioctl(struct file *filp, unsigned int command,
> return 0;
> }
>
> - return -EINVAL;
> + return -ENOTTY;
Ok
> }
>
> #ifdef CONFIG_COMPAT
> @@ -273,7 +273,7 @@ static long raw_ctl_compat_ioctl(struct file *file, unsigned int cmd,
> return 0;
> }
>
> - return -EINVAL;
> + return -ENOTTY;
> }
> #endif
Ok
>
> diff --git a/drivers/char/viotape.c b/drivers/char/viotape.c
> index ad6e64a..a427d40 100644
> --- a/drivers/char/viotape.c
> +++ b/drivers/char/viotape.c
> @@ -529,7 +529,7 @@ static int viotap_ioctl(struct inode *inode, struct file *file,
>
> down(&reqSem);
>
> - ret = -EINVAL;
> + ret = -ENOTTY;
Again this messes up the returns because code assumes the initial
default. The original code also has bugs too (wrong error off
copy_*_user() again)
>
> switch (cmd) {
> case MTIOCTOP:
> diff --git a/fs/pipe.c b/fs/pipe.c
> index da42f7d..fe7ffe4 100644
> --- a/fs/pipe.c
> +++ b/fs/pipe.c
> @@ -665,7 +665,7 @@ static long pipe_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
>
> return put_user(count, (int __user *)arg);
> default:
> - return -EINVAL;
> + return -ENOTTY;
> }
Looks good - but this one really does want to be a patch on its own as if
anything causes compatibility funnies it will be this, and we need to be
sure we can bisect nicely to it should this occur.
> }
>
> diff --git a/net/core/dev.c b/net/core/dev.c
> index c2ac599..b93c76d 100644
> --- a/net/core/dev.c
> +++ b/net/core/dev.c
> @@ -4773,7 +4773,7 @@ static int dev_ifsioc_locked(struct net *net, struct ifreq *ifr, unsigned int cm
> * is never reached
> */
> WARN_ON(1);
> - err = -EINVAL;
> + err = -ENOTTY;
This case doesn't really matter - it can't happen anyway so might as well
change
> break;
>
> }
> @@ -5041,7 +5041,7 @@ int dev_ioctl(struct net *net, unsigned int cmd, void __user *arg)
> /* Set the per device memory buffer space.
> * Not applicable in our case */
> case SIOCSIFLINK:
> - return -EINVAL;
> + return -EOPNOTSUPP;
This change seems unrelated to anything in your description and outside
of anything SuS cares about or demands.
>
> /*
> * Unknown or private ioctl.
> @@ -5062,7 +5062,7 @@ int dev_ioctl(struct net *net, unsigned int cmd, void __user *arg)
> /* Take care of Wireless Extensions */
> if (cmd >= SIOCIWFIRST && cmd <= SIOCIWLAST)
> return wext_handle_ioctl(net, &ifr, cmd, arg);
> - return -EINVAL;
> + return -ENOTTY;
and this one looks right.
Alan
^ permalink raw reply
* Re: Kernel crash after using new Intel NIC (igb)
From: Eric Dumazet @ 2011-04-27 12:04 UTC (permalink / raw)
To: Maximilian Engelhardt
Cc: Wyborny, Carolyn, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, StuStaNet Vorstand,
e1000-devel@lists.sourceforge.net
In-Reply-To: <201104271346.34431.maxi@daemonizer.de>
Le mercredi 27 avril 2011 à 13:46 +0200, Maximilian Engelhardt a écrit :
> Hello Carolyn,
>
> Thanks for your response.
>
> I have opened a issue at
> https://sourceforge.net/tracker/?func=detail&aid=3293703&group_id=42302&atid=447449
> and also posted all information there.
>
>
> Please not that yesterday I updated the kernel, so I'm now running 2.6.38.4.
> Eric Dumazet mentioned on the LKML that this might be a memory corruption that
> my be solved with kernel 2.6.38.
>
Hmm, I suggested to use slub_nomerge to make sure inetpeer kmemcache is
not shared with another (possibly mem corruptor) layer.
Please note we were not able to track the bug in 2.6.37 kernels.
> I'll report if the crash happens again, but it might take some times as in the
> past it happened within the interval of weeks to month.
>
Thanks
^ permalink raw reply
* Re: [Bugme-new] [Bug 33842] New: NULL pointer dereference in ip_fragment
From: Tomas Carnecky @ 2011-04-27 11:52 UTC (permalink / raw)
To: Eric Dumazet; +Cc: Bandan Das, David Miller, netdev, akpm
In-Reply-To: <1303890067.3166.4.camel@edumazet-laptop>
On 4/27/11 9:41 AM, Eric Dumazet wrote:
> netconsole=4444@192.168.20.108/eth0,4444@192.168.20.112/00:1e:0b:ec:c3:e4
I'm not having any luck with the netconsole. The last message I see on
the target host is "Freeing unused kernel memory: 100k freed". I don't
see any messages after that. Do I need to configure the same IP address
in netconsole as is later configured by userspace? I set netconsole to
use 192.168.0.50 while the init scripts set br0 to have 192.168.0.82.
And would netconsole even work, as the bug is in the networking code itself?
^ permalink raw reply
* Re: [PATCH] Applying inappropriate ioctl operation on socket should return ENOTTY
From: Alan Cox @ 2011-04-27 11:52 UTC (permalink / raw)
To: Eric Dumazet; +Cc: Lifeng Sun, linux-kernel, netdev
In-Reply-To: <1303901103.3166.30.camel@edumazet-laptop>
> Well, I wont argue the point, especially if you Ack the changes ;)
>
> My only concern was to not break old applications, I dont know if it is
> going to break _any_ of them. Probably these old applications stick with
> old kernels.
The number of applications that actually check ioctl error codes beyond
if error perror; return is pretty small and those that do generally do so
for very narrow cases or for things like EWOULDBLOCK/EINTR stuff.
> If you ask me ENOTTY is plain wrong.
> ioctl() is not restricted to terminal devices at all.
Like the tab/space thing in Makefiles and Qwerty keyboards its now part of
how stuff all works but EINVAL is even worse because you cannot tell
between 'this ioctl isn't know/is used on the wrong fd' and 'argument
wrong to valid ioctl'
Alan
^ permalink raw reply
* Re: Kernel crash after using new Intel NIC (igb)
From: Maximilian Engelhardt @ 2011-04-27 11:51 UTC (permalink / raw)
To: Eric Dumazet; +Cc: linux-kernel, netdev, StuStaNet Vorstand
In-Reply-To: <1303878771.2699.44.camel@edumazet-laptop>
[-- Attachment #1: Type: Text/Plain, Size: 1338 bytes --]
Hello Eric,
On Wednesday 27 April 2011 06:32:51 Eric Dumazet wrote:
> Le mercredi 27 avril 2011 à 06:24 +0200, Eric Dumazet a écrit :
> > We had similar reports in the past that disappeared when adding
> > "slab_nomerge" to boot parameters. We suspect a memory corruption from
> > another part of kernel on 64bytes kmemcache objects.
> >
> > In 2.6.37, inetpeer code uses 64bytes objects. Using slab_nomerge and
> > SLUB allocator (as you already do), makes sure inetpeer kmemcache wont
> > be shared by other 64bytes objects in kernel.
>
> Of course, the right option name is slub_nomerge
>
> vi +2293 Documentation/kernel-parameters.txt
>
> slub_nomerge [MM, SLUB]
> Disable merging of slabs with similar size. May be
> necessary if there is some reason to distinguish
> allocs to different slabs. Debug options disable
> merging on their own.
> For more information see Documentation/vm/slub.txt.
thank you for this information. I updated the kernel of the affected server to
version 2.6.38.4 yesterday. I'll report when there are still crashes, but it
might take a while, as in the past they only happened within the interval of
weeks to month.
Greetings,
Maxi
[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* Re: Kernel crash after using new Intel NIC (igb)
From: Maximilian Engelhardt @ 2011-04-27 11:46 UTC (permalink / raw)
To: Wyborny, Carolyn
Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
StuStaNet Vorstand, e1000-devel@lists.sourceforge.net
In-Reply-To: <EDC0E76513226749BFBC9C3FB031318F016B4125A4@orsmsx508.amr.corp.intel.com>
[-- Attachment #1.1: Type: Text/Plain, Size: 2990 bytes --]
On Wednesday 27 April 2011 01:34:09 Wyborny, Carolyn wrote:
> >-----Original Message-----
> >From: netdev-owner@vger.kernel.org [mailto:netdev-owner@vger.kernel.org]
> >On Behalf Of Maximilian Engelhardt
> >Sent: Sunday, April 24, 2011 3:33 PM
> >To: linux-kernel@vger.kernel.org
> >Cc: netdev@vger.kernel.org; StuStaNet Vorstand
> >Subject: Kernel crash after using new Intel NIC (igb)
> >
> >Hello,
> >
> >some time ago we switched some of our servers to a new networking card
> >that
> >uses the Intel igb driver. Since that time we see regular kernel
> >crashes.
> >The crashes happen at very irregular intervals, sometimes after a week
> >uptime,
> >sometimes after a month or even more. They seem to be independent of the
> >server load as they also happen in the night when there is low traffic.
> >
> >The affected server is used as a NAT device with some iptables rules and
> >serves
> >about 2000 people.
> >
> >Attached are two logs of the crashes as well as the output of dmesg,
> >lspci,
> >and /proc/interrupts as well as the used kernel config.
> >
> >I have no idea what might be wrong but I think it is a kernel bug.
> >Perhaps
> >someone with more knowledge has a clue.
> >
> >If needed I can provide additional information or build different
> >kernels.
> >
> >Greetings,
> >Maxi
>
> Hello,
>
> I'm sorry you're having crashes since installing our NIC. Thank you for
> the data. I haven't had a chance to review it carefully yet, but it looks
> to me like the crashes have us in the stack sometimes and sometimes not.
> I need to do a bit more research and will need some more information. Can
> I get an ethtool -i eth# for the device and also lspci -vvv for the
> platform its installed on.
>
> If you open an issue at SourceForge we will have a place to keep the logs.
>
> I will research this a bit more and get back to you tomorrow my time.
>
> Thanks,
>
> Carolyn
> Carolyn Wyborny
> Linux Development
> LAN Access Division
> Intel Corporation
Hello Carolyn,
Thanks for your response.
I have opened a issue at
https://sourceforge.net/tracker/?func=detail&aid=3293703&group_id=42302&atid=447449
and also posted all information there.
Please not that yesterday I updated the kernel, so I'm now running 2.6.38.4.
Eric Dumazet mentioned on the LKML that this might be a memory corruption that
my be solved with kernel 2.6.38.
I'll report if the crash happens again, but it might take some times as in the
past it happened within the interval of weeks to month.
Here is the output of ethtool (with the new 2.6.38.4 kernel):
$ /sbin/ethtool -i eth0
driver: igb
version: 2.1.0-k2
firmware-version: 1.2-1
bus-info: 0000:05:00.0
$ /sbin/ethtool -i eth1
driver: igb
version: 2.1.0-k2
firmware-version: 1.2-1
bus-info: 0000:05:00.1
The output of lspci -vvv is attached (also with kernel 2.6.38.4 but I guess it
doesn't make any difference)
Greetings,
Maxi
[-- Attachment #1.2: lspci_vvv --]
[-- Type: text/plain, Size: 17015 bytes --]
00:00.0 Host bridge: Intel Corporation 3200/3210 Chipset DRAM Controller (rev 01)
Subsystem: Super Micro Computer Inc Device d280
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
Latency: 0
Capabilities: <access denied>
Kernel driver in use: i3200_edac
00:01.0 PCI bridge: Intel Corporation 3200/3210 Chipset Host-Primary PCI Express Bridge (rev 01) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 32 bytes
Bus: primary=00, secondary=01, subordinate=03, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: d0100000-d01fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
Kernel driver in use: pcieport
00:1a.0 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 (rev 02) (prog-if 00 [UHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 4: I/O ports at 1820 [size=32]
Capabilities: <access denied>
Kernel driver in use: uhci_hcd
00:1a.1 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 (rev 02) (prog-if 00 [UHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 17
Region 4: I/O ports at 1840 [size=32]
Capabilities: <access denied>
Kernel driver in use: uhci_hcd
00:1a.2 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #6 (rev 02) (prog-if 00 [UHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 4: I/O ports at 1860 [size=32]
Capabilities: <access denied>
Kernel driver in use: uhci_hcd
00:1a.7 USB Controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 (rev 02) (prog-if 20 [EHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 0: Memory at d0000000 (32-bit, non-prefetchable) [size=1K]
Capabilities: <access denied>
Kernel driver in use: ehci_hcd
00:1c.0 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 32 bytes
Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
I/O behind bridge: 00002000-00002fff
Memory behind bridge: d0200000-d0bfffff
Prefetchable memory behind bridge: 00000000d1000000-00000000d17fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
Kernel driver in use: pcieport
00:1c.4 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 5 (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 32 bytes
Bus: primary=00, secondary=0d, subordinate=0d, sec-latency=0
I/O behind bridge: 00003000-00003fff
Memory behind bridge: d0c00000-d0cfffff
Prefetchable memory behind bridge: 00000000d1800000-00000000d19fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
Kernel driver in use: pcieport
00:1c.5 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 6 (rev 02) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 32 bytes
Bus: primary=00, secondary=0f, subordinate=0f, sec-latency=0
I/O behind bridge: 00004000-00004fff
Memory behind bridge: d0d00000-d0dfffff
Prefetchable memory behind bridge: 00000000d1a00000-00000000d1bfffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
Kernel driver in use: pcieport
00:1d.0 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 (rev 02) (prog-if 00 [UHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 4: I/O ports at 1880 [size=32]
Capabilities: <access denied>
Kernel driver in use: uhci_hcd
00:1d.1 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 (rev 02) (prog-if 00 [UHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 22
Region 4: I/O ports at 18a0 [size=32]
Capabilities: <access denied>
Kernel driver in use: uhci_hcd
00:1d.2 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 (rev 02) (prog-if 00 [UHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 4: I/O ports at 18c0 [size=32]
Capabilities: <access denied>
Kernel driver in use: uhci_hcd
00:1d.7 USB Controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 (rev 02) (prog-if 20 [EHCI])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at d0000400 (32-bit, non-prefetchable) [size=1K]
Capabilities: <access denied>
Kernel driver in use: ehci_hcd
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 92) (prog-if 01 [Subtractive decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=11, subordinate=11, sec-latency=32
I/O behind bridge: 00005000-00005fff
Memory behind bridge: d0e00000-d0efffff
Prefetchable memory behind bridge: 00000000d8000000-00000000dfffffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
00:1f.0 ISA bridge: Intel Corporation 82801IR (ICH9R) LPC Interface Controller (rev 02)
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: <access denied>
00:1f.2 SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller (rev 02) (prog-if 01 [AHCI 1.0])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 92
Region 0: I/O ports at 1c50 [size=8]
Region 1: I/O ports at 1c44 [size=4]
Region 2: I/O ports at 1c48 [size=8]
Region 3: I/O ports at 1c40 [size=4]
Region 4: I/O ports at 18e0 [size=32]
Region 5: Memory at d0000800 (32-bit, non-prefetchable) [size=2K]
Capabilities: <access denied>
Kernel driver in use: ahci
00:1f.3 SMBus: Intel Corporation 82801I (ICH9 Family) SMBus Controller (rev 02)
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 17
Region 0: Memory at d0001000 (64-bit, non-prefetchable) [size=256]
Region 4: I/O ports at 1100 [size=32]
Kernel driver in use: i801_smbus
00:1f.6 Signal processing controller: Intel Corporation 82801I (ICH9 Family) Thermal Subsystem (rev 02)
Subsystem: Super Micro Computer Inc Device 0000
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 5
Region 0: Memory at d0002000 (64-bit, non-prefetchable) [size=4K]
Capabilities: <access denied>
01:00.0 PCI bridge: Intel Corporation 6700PXH PCI Express-to-PCI Bridge A (rev 09) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=01, secondary=02, subordinate=02, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz+ FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
01:00.1 PIC: Intel Corporation 6700/6702PXH I/OxAPIC Interrupt Controller A (rev 09) (prog-if 20 [IO(X)-APIC])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at d0100000 (32-bit, non-prefetchable) [size=4K]
Capabilities: <access denied>
01:00.2 PCI bridge: Intel Corporation 6700PXH PCI Express-to-PCI Bridge B (rev 09) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=01, secondary=03, subordinate=03, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz+ FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: <access denied>
01:00.3 PIC: Intel Corporation 6700PXH I/OxAPIC Interrupt Controller B (rev 09) (prog-if 20 [IO(X)-APIC])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at d0101000 (32-bit, non-prefetchable) [size=4K]
Capabilities: <access denied>
05:00.0 Ethernet controller: Intel Corporation 82576 Gigabit Network Connection (rev 01)
Subsystem: Intel Corporation Gigabit ET Dual Port Server Adapter
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at d0220000 (32-bit, non-prefetchable) [size=128K]
Region 1: Memory at d0400000 (32-bit, non-prefetchable) [size=4M]
Region 2: I/O ports at 2000 [size=32]
Region 3: Memory at d0200000 (32-bit, non-prefetchable) [size=16K]
[virtual] Expansion ROM at d1000000 [disabled] [size=4M]
Capabilities: <access denied>
Kernel driver in use: igb
05:00.1 Ethernet controller: Intel Corporation 82576 Gigabit Network Connection (rev 01)
Subsystem: Intel Corporation Gigabit ET Dual Port Server Adapter
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 32 bytes
Interrupt: pin B routed to IRQ 17
Region 0: Memory at d0240000 (32-bit, non-prefetchable) [size=128K]
Region 1: Memory at d0800000 (32-bit, non-prefetchable) [size=4M]
Region 2: I/O ports at 2020 [size=32]
Region 3: Memory at d0204000 (32-bit, non-prefetchable) [size=16K]
[virtual] Expansion ROM at d1400000 [disabled] [size=4M]
Capabilities: <access denied>
Kernel driver in use: igb
0d:00.0 Ethernet controller: Intel Corporation 82573E Gigabit Ethernet Controller (Copper) (rev 03)
Subsystem: Super Micro Computer Inc Device 108c
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 93
Region 0: Memory at d0c00000 (32-bit, non-prefetchable) [size=128K]
Region 2: I/O ports at 3000 [size=32]
Capabilities: <access denied>
Kernel driver in use: e1000e
0f:00.0 Ethernet controller: Intel Corporation 82573L Gigabit Ethernet Controller
Subsystem: Super Micro Computer Inc Device 109a
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 94
Region 0: Memory at d0d00000 (32-bit, non-prefetchable) [size=128K]
Region 2: I/O ports at 4000 [size=32]
Capabilities: <access denied>
Kernel driver in use: e1000e
11:04.0 VGA compatible controller: ATI Technologies Inc ES1000 (rev 02) (prog-if 00 [VGA controller])
Subsystem: Super Micro Computer Inc Device d280
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B+ DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 66 (2000ns min), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 10
Region 0: Memory at d8000000 (32-bit, prefetchable) [size=128M]
Region 1: I/O ports at 5000 [size=256]
Region 2: Memory at d0e00000 (32-bit, non-prefetchable) [size=64K]
[virtual] Expansion ROM at d0e20000 [disabled] [size=128K]
Capabilities: <access denied>
[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* Re: [PATCH] Applying inappropriate ioctl operation on socket should return ENOTTY
From: Eric Dumazet @ 2011-04-27 10:45 UTC (permalink / raw)
To: Alan Cox; +Cc: Lifeng Sun, linux-kernel, netdev
In-Reply-To: <20110427104738.2bdbe228@lxorguk.ukuu.org.uk>
Le mercredi 27 avril 2011 à 10:47 +0100, Alan Cox a écrit :
> > EINVAL is ok too : Request or argp is not valid.
>
> It confuses portable code in some situations
>
> > I would say, its not a bug as you claim.
>
> POSIX and SuS tend to disagree
>
> > Its really too late to make such change and risk regressions.
>
> We've been quietly doing it for hundreds of cases including the entire
> tty driver. Almost nobody (you included) has actually noticed and in
> doing so we fixed various porting funnies without any reported
> regressions.
>
> Networking may be a more tricky one (not that tty wasn't a large one we
> fixed) but most of the other driver ones are clearly sensible.
>
Well, I wont argue the point, especially if you Ack the changes ;)
My only concern was to not break old applications, I dont know if it is
going to break _any_ of them. Probably these old applications stick with
old kernels.
If you ask me ENOTTY is plain wrong.
ioctl() is not restricted to terminal devices at all.
Any unknown ioctl command would return ENOTTY, regardless of fd being a
tty or not...
IF we add a new ioctl() to sockets in 2.6.42, using it on 2.6.41 would
give ENOTTY status, and EINVAL status on 2.6.24
Go figure...
^ permalink raw reply
* Re: linux-next: ibmveth runtime errors
From: Michał Mirosław @ 2011-04-27 10:36 UTC (permalink / raw)
To: Stephen Rothwell
Cc: ppc-dev, David Miller, netdev, Santiago Leon, linux-next, LKML
In-Reply-To: <20110427144901.4c3f79b3.sfr@canb.auug.org.au>
On Wed, Apr 27, 2011 at 02:49:01PM +1000, Stephen Rothwell wrote:
> For the last couple of days, linux-next booting on a few of our Power
> partitions (but not all) have produced this error (over and over):
>
> ibmveth 3000000b: eth0: tx: h_send_logical_lan failed with rc=-4
>
> Linus' tree seems to boot fine on these partitions. The only commit
> directly affecting ibmveth in linux-next is b9367bf3ee6d ("net: ibmveth:
> convert to hw_features") which first appeared in next-20110421 which is
> also the first one that failed.
Please test the following patch. It's just a blind guess, as this error
is not descriptive.
Best Regards,
Michał Mirosław
---
net: ibmveth: force reconfiguring checksum settings on startup
Commit b9367bf3ee6d ("net: ibmveth: convert to hw_features") accidentally
removed call to ibmveth_set_csum_offload() in ibmveth_probe(). Put the
call back where it was, but with additional error checking provided
by ibmveth_set_features().
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
drivers/net/ibmveth.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c
index 4855f1f..0d1fea2 100644
--- a/drivers/net/ibmveth.c
+++ b/drivers/net/ibmveth.c
@@ -1397,6 +1397,8 @@ static int __devinit ibmveth_probe(struct vio_dev *dev,
netdev_dbg(netdev, "registering netdev...\n");
+ ibmveth_set_features(dev, dev->features);
+
rc = register_netdev(netdev);
if (rc) {
--
1.7.2.5
^ permalink raw reply related
* Re: Linux TCP's Robustness to Multipath Packet Reordering
From: Carsten Wolff @ 2011-04-27 9:57 UTC (permalink / raw)
To: John Heffner
Cc: Dominik Kaspar, Eric Dumazet, netdev, Zimmermann Alexander,
Lennart Schulte, Arnd Hannemann
In-Reply-To: <BANLkTikoQfbSxnJi_OR+N6sa5iVNcTO6Ug@mail.gmail.com>
Hi all,
On Tuesday 26 April 2011, John Heffner wrote:
> First, TCP is definitely not designed to work under such conditions.
> For example, assumptions behind RTO calculation and fast retransmit
> heuristics are violated. However, in this particular case my first
> guess is that you are being limited by "cwnd moderation," which was
> the topic of recent discussion here. Under persistent reordering,
> cwnd moderation can inhibit the ability of cwnd to grow.
it's not just cwnd moderation (of which I'm still in favor, even though I lost
the argument by inactivity ;-)).
Anyway, there are a lot of things in reordering handling that can be improved.
Our group (Alexander, Lennart, Arnd, myself and others) has worked on the
problem for a long time now. This work resulted in an algorithm that is in
large parts TCP-NCR (RFC4653), but also utilizes information gathered by
reordering detection for determination of a good DupThresh, fixes a few
problems in RFC4653 and improves on the reordering detection in Linux when the
connection has no timestamps option. We implemented "pure" TCP-NCR and our own
variant in Linux using a modular framework similar to the congestion control
modules. A lot of measurements and evaluation have gone into the comparison of
the three algorithms. We are now very close(TM) to a final patch, that is more
suited for publication on this list and integrates our algorithm into tcp*.
[hc] without introducing the overhead of that modular framework.
Greetings,
Carsten
^ permalink raw reply
* Re: [PATCH] Applying inappropriate ioctl operation on socket should return ENOTTY
From: Alan Cox @ 2011-04-27 9:47 UTC (permalink / raw)
To: Eric Dumazet; +Cc: Lifeng Sun, linux-kernel, netdev
In-Reply-To: <1303883910.2699.53.camel@edumazet-laptop>
> EINVAL is ok too : Request or argp is not valid.
It confuses portable code in some situations
> I would say, its not a bug as you claim.
POSIX and SuS tend to disagree
> Its really too late to make such change and risk regressions.
We've been quietly doing it for hundreds of cases including the entire
tty driver. Almost nobody (you included) has actually noticed and in
doing so we fixed various porting funnies without any reported
regressions.
Networking may be a more tricky one (not that tty wasn't a large one we
fixed) but most of the other driver ones are clearly sensible.
Alan
^ permalink raw reply
* Re: [PATCH 0/6] sctp: Auto-ASCONF patch series
From: Wei Yongjun @ 2011-04-27 9:43 UTC (permalink / raw)
To: Michio Honda; +Cc: netdev, YOSHIFUJI Hideaki
In-Reply-To: <25B4800C-D80B-431E-BC6C-B1E25A14E016@sfc.wide.ad.jp>
> mmm, can you send me the test program?
> I'll fix ASAP!
Host1:
$sctp_test -H 0.0.0.0 -P 9000 -l
Host2:
$ifconfig eth2
eth2 Link encap:Ethernet HWaddr 52:54:00:70:99:3D
inet addr:192.168.1.21 Bcast:192.168.1.255 Mask:255.255.255.0
inet6 addr: 3ffe:501:ffff:101:5054:ff:fe70:993d/64 Scope:Global
inet6 addr: fe80::5054:ff:fe70:993d/64 Scope:Link
...
ifconfig eth1
eth1 Link encap:Ethernet HWaddr 52:54:00:1A:F0:5C
inet addr:192.168.0.21 Bcast:192.168.0.255 Mask:255.255.255.0
inet6 addr: 3ffe:501:ffff:100:5054:ff:fe1a:f05c/64 Scope:Global
inet6 addr: fe80::5054:ff:fe1a:f05c/64 Scope:Link
...
$ifdown eth2
$sctp_test -H 0.0.0.0 -P 9000 -h 192.168.0.19 -p 9000 -s -x 1 -D -T&
$ifup eth1
and tcpdump and eth1
You may need some thing like this:
[PATCH 3/6] sctp: Add Auto-ASCONF support (core).
+int sctp_asconf_mgmt(struct sctp_sock *sp, struct sctp_sockaddr_entry *addrw)
+{
+ struct sock *sk = sctp_opt2sk(sp);
+ union sctp_addr *addr;
+
+ /* It is safe to write port space in caller. */
+ addr = &addrw->a;
+ addr->v4.sin_port = htons(sp->ep->base.bind_addr.port);
+
af = sctp_get_af_specific(...);
if (sctp_verify_addr(sk, &to, af->sockaddr_len))
return;
+ if (addrw->state == SCTP_ADDR_NEW)
+ return sctp_send_asconf_add_ip(sk, (struct sockaddr *)addr, 1);
+ else
+ return sctp_send_asconf_del_ip(sk, (struct sockaddr *)addr, 1);
+}
> - Michio
>
> On Apr 27, 2011, at 18:28 , Wei Yongjun wrote:
>
>>> From 9ede9db0ec4b03d3061a5bfed78328cb5528b908 Mon Sep 17 00:00:00 2001
>>> From: Michio Honda <micchie@sfc.wide.ad.jp>
>>> Date: Wed, 27 Apr 2011 17:16:21 +0900
>>> Subject: [PATCH 0/6] sctp: Auto-ASCONF patch series
>>>
>>> Series of 6 patches to support auto_asconf and the other related functionalities that auto_asconf relies on.
>>>
>>> Michio Honda (5):
>>> sctp: Add ADD/DEL ASCONF handling at the receiver.
>>> sctp: Add Auto-ASCONF support (core).
>>> sctp: Add sysctl support for Auto-ASCONF.
>>> sctp: Add socket option operation for Auto-ASCONF.
>>> sctp: sctp: Add ASCONF operation on the single-homed host
>>>
>>> YOSHIFUJI Hideaki (1):
>>> sctp: Allow regular C expression in 4th argument for
>>> SCTP_DEBUG_PRINTK_IPADDR macro.
>>
>> When I test this patchset using IPv4 only socket,
>> Host1:
>> #sctp_test -H 0.0.0.0 -P 9000 -l
>> Host2:
>> #sctp_test -H 0.0.0.0 -P 9000 -h 192.168.0.19 -p 9000 -s -x 1 -D -T
>> I got following unexpected thing, IPv6 address be added to the asoc.
>>
>> Frame 3 (118 bytes on wire, 118 bytes captured)
>> Arrival Time: Apr 27, 2011 17:17:59.572897000
>> [Time delta from previous captured frame: 13.804056000 seconds]
>> [Time delta from previous displayed frame: 13.804056000 seconds]
>> [Time since reference or first frame: 13.804105000 seconds]
>> Frame Number: 3
>> Frame Length: 118 bytes
>> Capture Length: 118 bytes
>> [Frame is marked: False]
>> [Protocols in frame: eth:ip:sctp]
>> Ethernet II, Src: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c), Dst: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> Destination: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> Address: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Source: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> Address: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Type: IP (0x0800)
>> Internet Protocol, Src: 192.168.0.21 (192.168.0.21), Dst: 192.168.0.19 (192.168.0.19)
>> Version: 4
>> Header length: 20 bytes
>> Differentiated Services Field: 0x02 (DSCP 0x00: Default; ECN: 0x02)
>> 0000 00.. = Differentiated Services Codepoint: Default (0x00)
>> .... ..1. = ECN-Capable Transport (ECT): 1
>> .... ...0 = ECN-CE: 0
>> Total Length: 104
>> Identification: 0x001e (30)
>> Flags: 0x02 (Don't Fragment)
>> 0.. = Reserved bit: Not Set
>> .1. = Don't fragment: Set
>> ..0 = More fragments: Not Set
>> Fragment offset: 0
>> Time to live: 64
>> Protocol: SCTP (0x84)
>> Header checksum: 0xb879 [correct]
>> [Good: True]
>> [Bad : False]
>> Source: 192.168.0.21 (192.168.0.21)
>> Destination: 192.168.0.19 (192.168.0.19)
>> Stream Control Transmission Protocol, Src Port: 9000 (9000), Dst Port: 9000 (9000)
>> Source port: 9000
>> Destination port: 9000
>> Verification tag: 0x2b1e0377
>> Checksum: 0x2a2e5aff (not verified)
>> AUTH chunk
>> Chunk type: AUTH (15)
>> 0... .... = Bit: Stop processing of the packet
>> .0.. .... = Bit: Do not report
>> Chunk flags: 0x00
>> Chunk length: 28
>> Shared key identifier: 0
>> HMAC identifier: SHA-1 (1)
>> HMAC: AA21B3835E1069FBFFA3589B1EB4C0AE47021F15
>> ASCONF chunk
>> Chunk type: ASCONF (193)
>> 1... .... = Bit: Skip chunk and continue processing of the packet
>> .1.. .... = Bit: Do report
>> Chunk flags: 0x00
>> Chunk length: 44
>> Serial number: 0xfa0b220b
>> IPv4 address parameter (Address: 192.168.1.21)
>> Parameter type: IPv4 address (0x0005)
>> 0... .... .... .... = Bit: Stop processing of chunk
>> .0.. .... .... .... = Bit: Do not report
>> Parameter length: 8
>> IP Version 4 address: 192.168.1.21 (192.168.1.21)
>> Delete IP address parameter (Address: 3ffe:501:ffff:101:5054:ff:fe70:993d, correlation ID: 0)
>> Parameter type: Delete IP address (0xc002)
>> 1... .... .... .... = Bit: Skip parameter and continue processing of the chunk
>> .1.. .... .... .... = Bit: Do report
>> Parameter length: 28
>> Correlation_id: 0x00000000
>> IPv6 address parameter (Address: 3ffe:501:ffff:101:5054:ff:fe70:993d)
>> Parameter type: IPv6 address (0x0006)
>> 0... .... .... .... = Bit: Stop processing of chunk
>> .0.. .... .... .... = Bit: Do not report
>> Parameter length: 20
>> IP Version 6 address: 3ffe:501:ffff:101:5054:ff:fe70:993d (3ffe:501:ffff:101:5054:ff:fe70:993d)
>>
>> No. Time Source Destination Protocol Info
>> 4 13.804193 192.168.0.19 192.168.0.21 SCTP AUTH ASCONF_ACK
>>
>> Frame 4 (122 bytes on wire, 122 bytes captured)
>> Arrival Time: Apr 27, 2011 17:17:59.572985000
>> [Time delta from previous captured frame: 0.000088000 seconds]
>> [Time delta from previous displayed frame: 0.000088000 seconds]
>> [Time since reference or first frame: 13.804193000 seconds]
>> Frame Number: 4
>> Frame Length: 122 bytes
>> Capture Length: 122 bytes
>> [Frame is marked: False]
>> [Protocols in frame: eth:ip:sctp]
>> Ethernet II, Src: RealtekU_21:3c:7c (52:54:00:21:3c:7c), Dst: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> Destination: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> Address: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Source: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> Address: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Type: IP (0x0800)
>> Internet Protocol, Src: 192.168.0.19 (192.168.0.19), Dst: 192.168.0.21 (192.168.0.21)
>> Version: 4
>> Header length: 20 bytes
>> Differentiated Services Field: 0x02 (DSCP 0x00: Default; ECN: 0x02)
>> 0000 00.. = Differentiated Services Codepoint: Default (0x00)
>> .... ..1. = ECN-Capable Transport (ECT): 1
>> .... ...0 = ECN-CE: 0
>> Total Length: 108
>> Identification: 0x0000 (0)
>> Flags: 0x02 (Don't Fragment)
>> 0.. = Reserved bit: Not Set
>> .1. = Don't fragment: Set
>> ..0 = More fragments: Not Set
>> Fragment offset: 0
>> Time to live: 64
>> Protocol: SCTP (0x84)
>> Header checksum: 0xb893 [correct]
>> [Good: True]
>> [Bad : False]
>> Source: 192.168.0.19 (192.168.0.19)
>> Destination: 192.168.0.21 (192.168.0.21)
>> Stream Control Transmission Protocol, Src Port: 9000 (9000), Dst Port: 9000 (9000)
>> Source port: 9000
>> Destination port: 9000
>> Verification tag: 0x1b2d2288
>> Checksum: 0x9b288dab (not verified)
>> AUTH chunk
>> Chunk type: AUTH (15)
>> 0... .... = Bit: Stop processing of the packet
>> .0.. .... = Bit: Do not report
>> Chunk flags: 0x00
>> Chunk length: 28
>> Shared key identifier: 0
>> HMAC identifier: SHA-1 (1)
>> HMAC: DDB8D3766671957FABA3554DE588599C9624DCBB
>> ASCONF_ACK chunk
>> Chunk type: ASCONF_ACK (128)
>> 1... .... = Bit: Skip chunk and continue processing of the packet
>> .0.. .... = Bit: Do not report
>> Chunk flags: 0x00
>> Chunk length: 48
>> Serial number: 0xfa0b220b
>> Error cause indication parameter
>> Parameter type: Error cause indication (0xc003)
>> 1... .... .... .... = Bit: Skip parameter and continue processing of the chunk
>> .1.. .... .... .... = Bit: Do report
>> Parameter length: 40
>> Correlation_id: 0x00000000
>> Unresolvable address cause (Address: )
>> Cause code: Unresolvable address (0x0005)
>> Cause length: 32
>> Delete IP address parameter (Address: 3ffe:501:ffff:101:5054:ff:fe70:993d, correlation ID: 0)
>> Parameter type: Delete IP address (0xc002)
>> 1... .... .... .... = Bit: Skip parameter and continue processing of the chunk
>> .1.. .... .... .... = Bit: Do report
>> Parameter length: 28
>> Correlation_id: 0x00000000
>> IPv6 address parameter (Address: 3ffe:501:ffff:101:5054:ff:fe70:993d)
>> Parameter type: IPv6 address (0x0006)
>> 0... .... .... .... = Bit: Stop processing of chunk
>> .0.. .... .... .... = Bit: Do not report
>> Parameter length: 20
>> IP Version 6 address: 3ffe:501:ffff:101:5054:ff:fe70:993d (3ffe:501:ffff:101:5054:ff:fe70:993d)
>> Frame 5 (118 bytes on wire, 118 bytes captured)
>> Arrival Time: Apr 27, 2011 17:17:59.573941000
>> [Time delta from previous captured frame: 0.000956000 seconds]
>> [Time delta from previous displayed frame: 0.000956000 seconds]
>> [Time since reference or first frame: 13.805149000 seconds]
>> Frame Number: 5
>> Frame Length: 118 bytes
>> Capture Length: 118 bytes
>> [Frame is marked: False]
>> [Protocols in frame: eth:ip:sctp]
>> Ethernet II, Src: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c), Dst: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> Destination: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> Address: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Source: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> Address: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Type: IP (0x0800)
>> Internet Protocol, Src: 192.168.0.21 (192.168.0.21), Dst: 192.168.0.19 (192.168.0.19)
>> Version: 4
>> Header length: 20 bytes
>> Differentiated Services Field: 0x02 (DSCP 0x00: Default; ECN: 0x02)
>> 0000 00.. = Differentiated Services Codepoint: Default (0x00)
>> .... ..1. = ECN-Capable Transport (ECT): 1
>> .... ...0 = ECN-CE: 0
>> Total Length: 104
>> Identification: 0x001f (31)
>> Flags: 0x02 (Don't Fragment)
>> 0.. = Reserved bit: Not Set
>> .1. = Don't fragment: Set
>> ..0 = More fragments: Not Set
>> Fragment offset: 0
>> Time to live: 64
>> Protocol: SCTP (0x84)
>> Header checksum: 0xb878 [correct]
>> [Good: True]
>> [Bad : False]
>> Source: 192.168.0.21 (192.168.0.21)
>> Destination: 192.168.0.19 (192.168.0.19)
>> Stream Control Transmission Protocol, Src Port: 9000 (9000), Dst Port: 9000 (9000)
>> Source port: 9000
>> Destination port: 9000
>> Verification tag: 0x2b1e0377
>> Checksum: 0x91cfddc0 (not verified)
>> AUTH chunk
>> Chunk type: AUTH (15)
>> 0... .... = Bit: Stop processing of the packet
>> .0.. .... = Bit: Do not report
>> Chunk flags: 0x00
>> Chunk length: 28
>> Shared key identifier: 0
>> HMAC identifier: SHA-1 (1)
>> HMAC: 2293892E2642A2D0E8911A669761E86134A47BD0
>> ASCONF chunk
>> Chunk type: ASCONF (193)
>> 1... .... = Bit: Skip chunk and continue processing of the packet
>> .1.. .... = Bit: Do report
>> Chunk flags: 0x00
>> Chunk length: 44
>> Serial number: 0xfa0b220c
>> IPv6 address parameter (Address: 3ffe:501:ffff:101:5054:ff:fe70:993d)
>> Parameter type: IPv6 address (0x0006)
>> 0... .... .... .... = Bit: Stop processing of chunk
>> .0.. .... .... .... = Bit: Do not report
>> Parameter length: 20
>> IP Version 6 address: 3ffe:501:ffff:101:5054:ff:fe70:993d (3ffe:501:ffff:101:5054:ff:fe70:993d)
>> Delete IP address parameter (Address: 192.168.1.21, correlation ID: 0)
>> Parameter type: Delete IP address (0xc002)
>> 1... .... .... .... = Bit: Skip parameter and continue processing of the chunk
>> .1.. .... .... .... = Bit: Do report
>> Parameter length: 16
>> Correlation_id: 0x00000000
>> IPv4 address parameter (Address: 192.168.1.21)
>> Parameter type: IPv4 address (0x0005)
>> 0... .... .... .... = Bit: Stop processing of chunk
>> .0.. .... .... .... = Bit: Do not report
>> Parameter length: 8
>> IP Version 4 address: 192.168.1.21 (192.168.1.21)
>>
>> No. Time Source Destination Protocol Info
>> 6 13.805190 192.168.0.19 192.168.0.21 SCTP AUTH ASCONF_ACK
>>
>> Frame 6 (82 bytes on wire, 82 bytes captured)
>> Arrival Time: Apr 27, 2011 17:17:59.573982000
>> [Time delta from previous captured frame: 0.000041000 seconds]
>> [Time delta from previous displayed frame: 0.000041000 seconds]
>> [Time since reference or first frame: 13.805190000 seconds]
>> Frame Number: 6
>> Frame Length: 82 bytes
>> Capture Length: 82 bytes
>> [Frame is marked: False]
>> [Protocols in frame: eth:ip:sctp]
>> Ethernet II, Src: RealtekU_21:3c:7c (52:54:00:21:3c:7c), Dst: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> Destination: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> Address: RealtekU_1a:f0:5c (52:54:00:1a:f0:5c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Source: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> Address: RealtekU_21:3c:7c (52:54:00:21:3c:7c)
>> .... ...0 .... .... .... .... = IG bit: Individual address (unicast)
>> .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default)
>> Type: IP (0x0800)
>> Internet Protocol, Src: 192.168.0.19 (192.168.0.19), Dst: 192.168.0.21 (192.168.0.21)
>> Version: 4
>> Header length: 20 bytes
>> Differentiated Services Field: 0x02 (DSCP 0x00: Default; ECN: 0x02)
>> 0000 00.. = Differentiated Services Codepoint: Default (0x00)
>> .... ..1. = ECN-Capable Transport (ECT): 1
>> .... ...0 = ECN-CE: 0
>> Total Length: 68
>> Identification: 0x0000 (0)
>> Flags: 0x02 (Don't Fragment)
>> 0.. = Reserved bit: Not Set
>> .1. = Don't fragment: Set
>> ..0 = More fragments: Not Set
>> Fragment offset: 0
>> Time to live: 64
>> Protocol: SCTP (0x84)
>> Header checksum: 0xb8bb [correct]
>> [Good: True]
>> [Bad : False]
>> Source: 192.168.0.19 (192.168.0.19)
>> Destination: 192.168.0.21 (192.168.0.21)
>> Stream Control Transmission Protocol, Src Port: 9000 (9000), Dst Port: 9000 (9000)
>> Source port: 9000
>> Destination port: 9000
>> Verification tag: 0x1b2d2288
>> Checksum: 0x0962e46c (not verified)
>> AUTH chunk
>> Chunk type: AUTH (15)
>> 0... .... = Bit: Stop processing of the packet
>> .0.. .... = Bit: Do not report
>> Chunk flags: 0x00
>> Chunk length: 28
>> Shared key identifier: 0
>> HMAC identifier: SHA-1 (1)
>> HMAC: DBE65D3AB3FB77D29FE2870BBB9ECCE4DC6D5EB6
>> ASCONF_ACK chunk
>> Chunk type: ASCONF_ACK (128)
>> 1... .... = Bit: Skip chunk and continue processing of the packet
>> .0.. .... = Bit: Do not report
>> Chunk flags: 0x00
>> Chunk length: 8
>> Serial number: 0xfa0b220c
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe netdev" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
> --
> To unsubscribe from this list: send the line "unsubscribe netdev" in
> the body of a message to majordomo@vger.kernel.org
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>
^ permalink raw reply
* [net-next-2.6 12/12] ixgbe: convert to ethtool set_phys_id
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem
Cc: Emil Tantilov, netdev, gospo, bphilips, Stephen Hemminger,
Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Emil Tantilov <emil.s.tantilov@intel.com>
Based on the original patch submitted by Stephen Hemminger.
This patch makes the following changes:
- Change ETHTOOL_ID_INACTIVE return value to 2 (blinks/sec)
- Fix restoring of IXGBE_LEDCTL
CC: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe.h | 1 +
drivers/net/ixgbe/ixgbe_ethtool.c | 29 +++++++++++++++++------------
2 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index 8d46802..37ff531 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -461,6 +461,7 @@ struct ixgbe_adapter {
u16 eeprom_version;
int node;
+ u32 led_reg;
struct work_struct check_overtemp_task;
u32 interrupt_event;
char lsc_int_name[IFNAMSIZ + 9];
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index bd7524e..7279345 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -2003,25 +2003,30 @@ static int ixgbe_nway_reset(struct net_device *netdev)
return 0;
}
-static int ixgbe_phys_id(struct net_device *netdev, u32 data)
+static int ixgbe_set_phys_id(struct net_device *netdev,
+ enum ethtool_phys_id_state state)
{
struct ixgbe_adapter *adapter = netdev_priv(netdev);
struct ixgbe_hw *hw = &adapter->hw;
- u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
- u32 i;
- if (!data || data > 300)
- data = 300;
+ switch (state) {
+ case ETHTOOL_ID_ACTIVE:
+ adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
+ return 2;
- for (i = 0; i < (data * 1000); i += 400) {
+ case ETHTOOL_ID_ON:
hw->mac.ops.led_on(hw, IXGBE_LED_ON);
- msleep_interruptible(200);
+ break;
+
+ case ETHTOOL_ID_OFF:
hw->mac.ops.led_off(hw, IXGBE_LED_ON);
- msleep_interruptible(200);
- }
+ break;
- /* Restore LED settings */
- IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
+ case ETHTOOL_ID_INACTIVE:
+ /* Restore LED settings */
+ IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
+ break;
+ }
return 0;
}
@@ -2469,7 +2474,7 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {
.set_tso = ixgbe_set_tso,
.self_test = ixgbe_diag_test,
.get_strings = ixgbe_get_strings,
- .phys_id = ixgbe_phys_id,
+ .set_phys_id = ixgbe_set_phys_id,
.get_sset_count = ixgbe_get_sset_count,
.get_ethtool_stats = ixgbe_get_ethtool_stats,
.get_coalesce = ixgbe_get_coalesce,
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 11/12] ixgbe: fix X540 ethtool loopback test.
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Don Skidmore, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Don Skidmore <donald.c.skidmore@intel.com>
On X540 we need to set the MACC.FLU bit to 1 in order to force the link
up before entering MAC loopback. This is only used in the ethtool loopback
test, which was failing. This patch corrects it.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_ethtool.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index 6cf1c71..bd7524e 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -1595,6 +1595,13 @@ static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
struct ixgbe_hw *hw = &adapter->hw;
u32 reg_data;
+ /* X540 needs to set the MACC.FLU bit to force link up */
+ if (adapter->hw.mac.type == ixgbe_mac_X540) {
+ reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_MACC);
+ reg_data |= IXGBE_MACC_FLU;
+ IXGBE_WRITE_REG(&adapter->hw, IXGBE_MACC, reg_data);
+ }
+
/* right now we only support MAC loopback in the driver */
reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
/* Setup MAC loopback */
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 03/12] ixgbe: register defines cleanup
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Emil Tantilov, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Emil Tantilov <emil.s.tantilov@intel.com>
Remove duplicates.
Fix incorrect defines.
Fix/Update comments.
Fix whitespace.
Add new register defines.
Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_mbx.h | 3 -
drivers/net/ixgbe/ixgbe_type.h | 189 ++++++++++++++++++++++++++--------------
2 files changed, 125 insertions(+), 67 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_mbx.h b/drivers/net/ixgbe/ixgbe_mbx.h
index fe6ea81..f53dc5b 100644
--- a/drivers/net/ixgbe/ixgbe_mbx.h
+++ b/drivers/net/ixgbe/ixgbe_mbx.h
@@ -36,9 +36,6 @@
#define IXGBE_VFMAILBOX 0x002FC
#define IXGBE_VFMBMEM 0x00200
-#define IXGBE_PFMAILBOX(x) (0x04B00 + (4 * x))
-#define IXGBE_PFMBMEM(vfn) (0x13000 + (64 * vfn))
-
#define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */
#define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */
#define IXGBE_PFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index f5bec97..fab9737 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -164,6 +164,9 @@
(0x0D018 + ((_i - 64) * 0x40)))
#define IXGBE_RXDCTL(_i) (((_i) < 64) ? (0x01028 + ((_i) * 0x40)) : \
(0x0D028 + ((_i - 64) * 0x40)))
+#define IXGBE_RSCCTL(_i) (((_i) < 64) ? (0x0102C + ((_i) * 0x40)) : \
+ (0x0D02C + ((_i - 64) * 0x40)))
+#define IXGBE_RSCDBU 0x03028
#define IXGBE_RDDCC 0x02F20
#define IXGBE_RXMEMWRAP 0x03190
#define IXGBE_STARCTRL 0x03024
@@ -228,17 +231,23 @@
#define IXGBE_VLVF(_i) (0x0F100 + ((_i) * 4)) /* 64 of these (0-63) */
#define IXGBE_VLVFB(_i) (0x0F200 + ((_i) * 4)) /* 128 of these (0-127) */
#define IXGBE_VMVIR(_i) (0x08000 + ((_i) * 4)) /* 64 of these (0-63) */
-#define IXGBE_VT_CTL 0x051B0
-#define IXGBE_VFRE(_i) (0x051E0 + ((_i) * 4))
-#define IXGBE_VFTE(_i) (0x08110 + ((_i) * 4))
-#define IXGBE_VMECM(_i) (0x08790 + ((_i) * 4))
-#define IXGBE_QDE 0x2F04
-#define IXGBE_VMOLR(_i) (0x0F000 + ((_i) * 4)) /* 64 total */
-#define IXGBE_UTA(_i) (0x0F400 + ((_i) * 4))
-#define IXGBE_VMRCTL(_i) (0x0F600 + ((_i) * 4))
-#define IXGBE_VMRVLAN(_i) (0x0F610 + ((_i) * 4))
-#define IXGBE_VMRVM(_i) (0x0F630 + ((_i) * 4))
-#define IXGBE_L34T_IMIR(_i) (0x0E800 + ((_i) * 4)) /*128 of these (0-127)*/
+#define IXGBE_VT_CTL 0x051B0
+#define IXGBE_PFMAILBOX(_i) (0x04B00 + (4 * (_i))) /* 64 total */
+#define IXGBE_PFMBMEM(_i) (0x13000 + (64 * (_i))) /* 64 Mailboxes, 16 DW each */
+#define IXGBE_PFMBICR(_i) (0x00710 + (4 * (_i))) /* 4 total */
+#define IXGBE_PFMBIMR(_i) (0x00720 + (4 * (_i))) /* 4 total */
+#define IXGBE_VFRE(_i) (0x051E0 + ((_i) * 4))
+#define IXGBE_VFTE(_i) (0x08110 + ((_i) * 4))
+#define IXGBE_VMECM(_i) (0x08790 + ((_i) * 4))
+#define IXGBE_QDE 0x2F04
+#define IXGBE_VMTXSW(_i) (0x05180 + ((_i) * 4)) /* 2 total */
+#define IXGBE_VMOLR(_i) (0x0F000 + ((_i) * 4)) /* 64 total */
+#define IXGBE_UTA(_i) (0x0F400 + ((_i) * 4))
+#define IXGBE_MRCTL(_i) (0x0F600 + ((_i) * 4))
+#define IXGBE_VMRVLAN(_i) (0x0F610 + ((_i) * 4))
+#define IXGBE_VMRVM(_i) (0x0F630 + ((_i) * 4))
+#define IXGBE_L34T_IMIR(_i) (0x0E800 + ((_i) * 4)) /*128 of these (0-127)*/
+#define IXGBE_RXFECCERR0 0x051B8
#define IXGBE_LLITHRESH 0x0EC90
#define IXGBE_IMIR(_i) (0x05A80 + ((_i) * 4)) /* 8 of these (0-7) */
#define IXGBE_IMIREXT(_i) (0x05AA0 + ((_i) * 4)) /* 8 of these (0-7) */
@@ -365,7 +374,7 @@
#define IXGBE_WUFC_FLX5 0x00200000 /* Flexible Filter 5 Enable */
#define IXGBE_WUFC_FLX_FILTERS 0x000F0000 /* Mask for 4 flex filters */
#define IXGBE_WUFC_EXT_FLX_FILTERS 0x00300000 /* Mask for Ext. flex filters */
-#define IXGBE_WUFC_ALL_FILTERS 0x003F00FF /* Mask for all 6 wakeup filters*/
+#define IXGBE_WUFC_ALL_FILTERS 0x003F00FF /* Mask for all wakeup filters */
#define IXGBE_WUFC_FLX_OFFSET 16 /* Offset to the Flexible Filters bits */
/* Wake Up Status */
@@ -407,7 +416,6 @@
#define IXGBE_SECTXSTAT 0x08804
#define IXGBE_SECTXBUFFAF 0x08808
#define IXGBE_SECTXMINIFG 0x08810
-#define IXGBE_SECTXSTAT 0x08804
#define IXGBE_SECRXCTRL 0x08D00
#define IXGBE_SECRXSTAT 0x08D04
@@ -500,21 +508,6 @@
#define IXGBE_SECTXCTRL_STORE_FORWARD_ENABLE 0x4
-/* HW RSC registers */
-#define IXGBE_RSCCTL(_i) (((_i) < 64) ? (0x0102C + ((_i) * 0x40)) : \
- (0x0D02C + ((_i - 64) * 0x40)))
-#define IXGBE_RSCDBU 0x03028
-#define IXGBE_RSCCTL_RSCEN 0x01
-#define IXGBE_RSCCTL_MAXDESC_1 0x00
-#define IXGBE_RSCCTL_MAXDESC_4 0x04
-#define IXGBE_RSCCTL_MAXDESC_8 0x08
-#define IXGBE_RSCCTL_MAXDESC_16 0x0C
-#define IXGBE_RXDADV_RSCCNT_SHIFT 17
-#define IXGBE_GPIE_RSC_DELAY_SHIFT 11
-#define IXGBE_RXDADV_RSCCNT_MASK 0x001E0000
-#define IXGBE_RSCDBU_RSCACKDIS 0x00000080
-#define IXGBE_RDRXCTL_RSCFRSTSIZE 0x003E0000
-
/* DCB registers */
#define IXGBE_RTRPCS 0x02430
#define IXGBE_RTTDCS 0x04900
@@ -523,6 +516,7 @@
#define IXGBE_RTRUP2TC 0x03020
#define IXGBE_RTTUP2TC 0x0C800
#define IXGBE_RTRPT4C(_i) (0x02140 + ((_i) * 4)) /* 8 of these (0-7) */
+#define IXGBE_TXLLQ(_i) (0x082E0 + ((_i) * 4)) /* 4 of these (0-3) */
#define IXGBE_RTRPT4S(_i) (0x02160 + ((_i) * 4)) /* 8 of these (0-7) */
#define IXGBE_RTTDT2C(_i) (0x04910 + ((_i) * 4)) /* 8 of these (0-7) */
#define IXGBE_RTTDT2S(_i) (0x04930 + ((_i) * 4)) /* 8 of these (0-7) */
@@ -541,7 +535,7 @@
(IXGBE_RTTBCNRC_RF_DEC_MASK << IXGBE_RTTBCNRC_RF_INT_SHIFT)
-/* FCoE registers */
+/* FCoE DMA Context Registers */
#define IXGBE_FCPTRL 0x02410 /* FC User Desc. PTR Low */
#define IXGBE_FCPTRH 0x02414 /* FC USer Desc. PTR High */
#define IXGBE_FCBUFF 0x02418 /* FC Buffer Control */
@@ -743,17 +737,10 @@
#define IXGBE_PBACLR_82599 0x11068
#define IXGBE_CIAA_82599 0x11088
#define IXGBE_CIAD_82599 0x1108C
-#define IXGBE_PCIE_DIAG_0_82599 0x11090
-#define IXGBE_PCIE_DIAG_1_82599 0x11094
-#define IXGBE_PCIE_DIAG_2_82599 0x11098
-#define IXGBE_PCIE_DIAG_3_82599 0x1109C
-#define IXGBE_PCIE_DIAG_4_82599 0x110A0
-#define IXGBE_PCIE_DIAG_5_82599 0x110A4
-#define IXGBE_PCIE_DIAG_6_82599 0x110A8
-#define IXGBE_PCIE_DIAG_7_82599 0x110C0
-#define IXGBE_INTRPT_CSR_82599 0x110B0
-#define IXGBE_INTRPT_MASK_82599 0x110B8
+#define IXGBE_PICAUSE 0x110B0
+#define IXGBE_PIENA 0x110B8
#define IXGBE_CDQ_MBR_82599 0x110B4
+#define IXGBE_PCIESPARE 0x110BC
#define IXGBE_MISC_REG_82599 0x110F0
#define IXGBE_ECC_CTRL_0_82599 0x11100
#define IXGBE_ECC_CTRL_1_82599 0x11104
@@ -786,7 +773,19 @@
#define IXGBE_SYSTIML 0x08C0C /* System time register Low - RO */
#define IXGBE_SYSTIMH 0x08C10 /* System time register High - RO */
#define IXGBE_TIMINCA 0x08C14 /* Increment attributes register - RW */
-#define IXGBE_RXUDP 0x08C1C /* Time Sync Rx UDP Port - RW */
+#define IXGBE_TIMADJL 0x08C18 /* Time Adjustment Offset register Low - RW */
+#define IXGBE_TIMADJH 0x08C1C /* Time Adjustment Offset register High - RW */
+#define IXGBE_TSAUXC 0x08C20 /* TimeSync Auxiliary Control register - RW */
+#define IXGBE_TRGTTIML0 0x08C24 /* Target Time Register 0 Low - RW */
+#define IXGBE_TRGTTIMH0 0x08C28 /* Target Time Register 0 High - RW */
+#define IXGBE_TRGTTIML1 0x08C2C /* Target Time Register 1 Low - RW */
+#define IXGBE_TRGTTIMH1 0x08C30 /* Target Time Register 1 High - RW */
+#define IXGBE_FREQOUT0 0x08C34 /* Frequency Out 0 Control register - RW */
+#define IXGBE_FREQOUT1 0x08C38 /* Frequency Out 1 Control register - RW */
+#define IXGBE_AUXSTMPL0 0x08C3C /* Auxiliary Time Stamp 0 register Low - RO */
+#define IXGBE_AUXSTMPH0 0x08C40 /* Auxiliary Time Stamp 0 register High - RO */
+#define IXGBE_AUXSTMPL1 0x08C44 /* Auxiliary Time Stamp 1 register Low - RO */
+#define IXGBE_AUXSTMPH1 0x08C48 /* Auxiliary Time Stamp 1 register High - RO */
/* Diagnostic Registers */
#define IXGBE_RDSTATCTL 0x02C20
@@ -830,8 +829,20 @@
#define IXGBE_TXDATARDPTR(_i) (0x0C720 + ((_i) * 4)) /* 8 of these C720-C72C*/
#define IXGBE_TXDESCRDPTR(_i) (0x0C730 + ((_i) * 4)) /* 8 of these C730-C73C*/
#define IXGBE_PCIEECCCTL 0x1106C
+#define IXGBE_RXWRPTR(_i) (0x03100 + ((_i) * 4)) /* 8 of these 3100-310C*/
+#define IXGBE_RXUSED(_i) (0x03120 + ((_i) * 4)) /* 8 of these 3120-312C*/
+#define IXGBE_RXRDPTR(_i) (0x03140 + ((_i) * 4)) /* 8 of these 3140-314C*/
+#define IXGBE_RXRDWRPTR(_i) (0x03160 + ((_i) * 4)) /* 8 of these 3160-310C*/
+#define IXGBE_TXWRPTR(_i) (0x0C100 + ((_i) * 4)) /* 8 of these C100-C10C*/
+#define IXGBE_TXUSED(_i) (0x0C120 + ((_i) * 4)) /* 8 of these C120-C12C*/
+#define IXGBE_TXRDPTR(_i) (0x0C140 + ((_i) * 4)) /* 8 of these C140-C14C*/
+#define IXGBE_TXRDWRPTR(_i) (0x0C160 + ((_i) * 4)) /* 8 of these C160-C10C*/
#define IXGBE_PCIEECCCTL0 0x11100
#define IXGBE_PCIEECCCTL1 0x11104
+#define IXGBE_RXDBUECC 0x03F70
+#define IXGBE_TXDBUECC 0x0CF70
+#define IXGBE_RXDBUEST 0x03F74
+#define IXGBE_TXDBUEST 0x0CF74
#define IXGBE_PBTXECC 0x0C300
#define IXGBE_PBRXECC 0x03300
#define IXGBE_GHECCR 0x110B0
@@ -872,6 +883,7 @@
#define IXGBE_AUTOC3 0x042AC
#define IXGBE_ANLP1 0x042B0
#define IXGBE_ANLP2 0x042B4
+#define IXGBE_MACC 0x04330
#define IXGBE_ATLASCTL 0x04800
#define IXGBE_MMNGC 0x042D0
#define IXGBE_ANLPNP1 0x042D4
@@ -884,14 +896,49 @@
#define IXGBE_MPVC 0x04318
#define IXGBE_SGMIIC 0x04314
+/* Statistics Registers */
+#define IXGBE_RXNFGPC 0x041B0
+#define IXGBE_RXNFGBCL 0x041B4
+#define IXGBE_RXNFGBCH 0x041B8
+#define IXGBE_RXDGPC 0x02F50
+#define IXGBE_RXDGBCL 0x02F54
+#define IXGBE_RXDGBCH 0x02F58
+#define IXGBE_RXDDGPC 0x02F5C
+#define IXGBE_RXDDGBCL 0x02F60
+#define IXGBE_RXDDGBCH 0x02F64
+#define IXGBE_RXLPBKGPC 0x02F68
+#define IXGBE_RXLPBKGBCL 0x02F6C
+#define IXGBE_RXLPBKGBCH 0x02F70
+#define IXGBE_RXDLPBKGPC 0x02F74
+#define IXGBE_RXDLPBKGBCL 0x02F78
+#define IXGBE_RXDLPBKGBCH 0x02F7C
+#define IXGBE_TXDGPC 0x087A0
+#define IXGBE_TXDGBCL 0x087A4
+#define IXGBE_TXDGBCH 0x087A8
+
+#define IXGBE_RXDSTATCTRL 0x02F40
+
+/* Copper Pond 2 link timeout */
#define IXGBE_VALIDATE_LINK_READY_TIMEOUT 50
/* Omer CORECTL */
#define IXGBE_CORECTL 0x014F00
/* BARCTRL */
-#define IXGBE_BARCTRL 0x110F4
-#define IXGBE_BARCTRL_FLSIZE 0x0700
-#define IXGBE_BARCTRL_CSRSIZE 0x2000
+#define IXGBE_BARCTRL 0x110F4
+#define IXGBE_BARCTRL_FLSIZE 0x0700
+#define IXGBE_BARCTRL_FLSIZE_SHIFT 8
+#define IXGBE_BARCTRL_CSRSIZE 0x2000
+
+/* RSCCTL Bit Masks */
+#define IXGBE_RSCCTL_RSCEN 0x01
+#define IXGBE_RSCCTL_MAXDESC_1 0x00
+#define IXGBE_RSCCTL_MAXDESC_4 0x04
+#define IXGBE_RSCCTL_MAXDESC_8 0x08
+#define IXGBE_RSCCTL_MAXDESC_16 0x0C
+
+/* RSCDBU Bit Masks */
+#define IXGBE_RSCDBU_RSCSMALDIS_MASK 0x0000007F
+#define IXGBE_RSCDBU_RSCACKDIS 0x00000080
/* RDRXCTL Bit Masks */
#define IXGBE_RDRXCTL_RDMTS_1_2 0x00000000 /* Rx Desc Min Threshold Size */
@@ -899,6 +946,8 @@
#define IXGBE_RDRXCTL_MVMEN 0x00000020
#define IXGBE_RDRXCTL_DMAIDONE 0x00000008 /* DMA init cycle done */
#define IXGBE_RDRXCTL_AGGDIS 0x00010000 /* Aggregation disable */
+#define IXGBE_RDRXCTL_RSCFRSTSIZE 0x003E0000 /* RSC First packet size */
+#define IXGBE_RDRXCTL_RSCLLIDIS 0x00800000 /* Disable RSC compl on LLI */
#define IXGBE_RDRXCTL_RSCACKC 0x02000000 /* must set 1 when RSC enabled */
#define IXGBE_RDRXCTL_FCOE_WRFIX 0x04000000 /* must set 1 when RSC enabled */
@@ -970,8 +1019,8 @@
#define IXGBE_MSCA_OP_CODE_SHIFT 26 /* OP CODE shift */
#define IXGBE_MSCA_ADDR_CYCLE 0x00000000 /* OP CODE 00 (addr cycle) */
#define IXGBE_MSCA_WRITE 0x04000000 /* OP CODE 01 (write) */
-#define IXGBE_MSCA_READ 0x08000000 /* OP CODE 10 (read) */
-#define IXGBE_MSCA_READ_AUTOINC 0x0C000000 /* OP CODE 11 (read, auto inc)*/
+#define IXGBE_MSCA_READ 0x0C000000 /* OP CODE 11 (read) */
+#define IXGBE_MSCA_READ_AUTOINC 0x08000000 /* OP CODE 10 (read, auto inc)*/
#define IXGBE_MSCA_ST_CODE_MASK 0x30000000 /* ST Code mask */
#define IXGBE_MSCA_ST_CODE_SHIFT 28 /* ST Code shift */
#define IXGBE_MSCA_NEW_PROTOCOL 0x00000000 /* ST CODE 00 (new protocol) */
@@ -1058,6 +1107,7 @@
#define IXGBE_GPIE_EIMEN 0x00000040 /* Immediate Interrupt Enable */
#define IXGBE_GPIE_EIAME 0x40000000
#define IXGBE_GPIE_PBA_SUPPORT 0x80000000
+#define IXGBE_GPIE_RSC_DELAY_SHIFT 11
#define IXGBE_GPIE_VTMODE_MASK 0x0000C000 /* VT Mode Mask */
#define IXGBE_GPIE_VTMODE_16 0x00004000 /* 16 VFs 8 queues per VF */
#define IXGBE_GPIE_VTMODE_32 0x00008000 /* 32 VFs 4 queues per VF */
@@ -1292,6 +1342,11 @@
#define IXGBE_FTQF_POOL_SHIFT 8
#define IXGBE_FTQF_5TUPLE_MASK_MASK 0x0000001F
#define IXGBE_FTQF_5TUPLE_MASK_SHIFT 25
+#define IXGBE_FTQF_SOURCE_ADDR_MASK 0x1E
+#define IXGBE_FTQF_DEST_ADDR_MASK 0x1D
+#define IXGBE_FTQF_SOURCE_PORT_MASK 0x1B
+#define IXGBE_FTQF_DEST_PORT_MASK 0x17
+#define IXGBE_FTQF_PROTOCOL_COMP_MASK 0x0F
#define IXGBE_FTQF_POOL_MASK_EN 0x40000000
#define IXGBE_FTQF_QUEUE_ENABLE 0x80000000
@@ -1334,11 +1389,11 @@
*
* Current filters:
* EAPOL 802.1x (0x888e): Filter 0
- * BCN (0x8904): Filter 1
+ * FCoE (0x8906): Filter 2
* 1588 (0x88f7): Filter 3
+ * FIP (0x8914): Filter 4
*/
#define IXGBE_ETQF_FILTER_EAPOL 0
-#define IXGBE_ETQF_FILTER_BCN 1
#define IXGBE_ETQF_FILTER_FCOE 2
#define IXGBE_ETQF_FILTER_1588 3
#define IXGBE_ETQF_FILTER_FIP 4
@@ -1449,6 +1504,11 @@
#define IXGBE_AUTOC2_10G_XFI (0x1 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
#define IXGBE_AUTOC2_10G_SFI (0x2 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
+#define IXGBE_MACC_FLU 0x00000001
+#define IXGBE_MACC_FSV_10G 0x00030000
+#define IXGBE_MACC_FS 0x00040000
+#define IXGBE_MAC_RX2TX_LPBK 0x00000002
+
/* LINKS Bit Masks */
#define IXGBE_LINKS_KX_AN_COMP 0x80000000
#define IXGBE_LINKS_UP 0x40000000
@@ -1502,7 +1562,6 @@
#define IXGBE_ANLP1_ASM_PAUSE 0x0800
#define IXGBE_ANLP1_AN_STATE_MASK 0x000f0000
-
/* SW Semaphore Register bitmasks */
#define IXGBE_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */
#define IXGBE_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */
@@ -1515,6 +1574,10 @@
#define IXGBE_GSSR_PHY1_SM 0x0004
#define IXGBE_GSSR_MAC_CSR_SM 0x0008
#define IXGBE_GSSR_FLASH_SM 0x0010
+#define IXGBE_GSSR_SW_MNG_SM 0x0400
+
+/* FW Status register bitmask */
+#define IXGBE_FWSTS_FWRI 0x00000200 /* Firmware Reset Indication */
/* EEC Register */
#define IXGBE_EEC_SK 0x00000001 /* EEPROM Clock */
@@ -1535,6 +1598,7 @@
/* EEPROM Addressing bits based on type (0-small, 1-large) */
#define IXGBE_EEC_ADDR_SIZE 0x00000400
#define IXGBE_EEC_SIZE 0x00007800 /* EEPROM Size */
+#define IXGBE_EERD_MAX_ADDR 0x00003FFF /* EERD alows 14 bits for addr. */
#define IXGBE_EEC_SIZE_SHIFT 11
#define IXGBE_EEPROM_WORD_SIZE_SHIFT 6
@@ -1564,8 +1628,10 @@
#define IXGBE_FW_PTR 0x0F
#define IXGBE_PBANUM0_PTR 0x15
#define IXGBE_PBANUM1_PTR 0x16
-#define IXGBE_DEVICE_CAPS 0x2C
+#define IXGBE_FREE_SPACE_PTR 0X3E
#define IXGBE_SAN_MAC_ADDR_PTR 0x28
+#define IXGBE_DEVICE_CAPS 0x2C
+#define IXGBE_SERIAL_NUMBER_MAC_ADDR 0x11
#define IXGBE_PCIE_MSIX_82599_CAPS 0x72
#define IXGBE_PCIE_MSIX_82598_CAPS 0x62
@@ -1630,9 +1696,12 @@
#define IXGBE_FW_LESM_STATE_1 0x1
#define IXGBE_FW_LESM_STATE_ENABLED 0x8000 /* LESM Enable bit */
#define IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR 0x4
-#define IXGBE_FW_PATCH_VERSION_4 0x7
-
-/* Alternative SAN MAC Address Block */
+#define IXGBE_FW_PATCH_VERSION_4 0x7
+#define IXGBE_FCOE_IBA_CAPS_BLK_PTR 0x33 /* iSCSI/FCOE block */
+#define IXGBE_FCOE_IBA_CAPS_FCOE 0x20 /* FCOE flags */
+#define IXGBE_ISCSI_FCOE_BLK_PTR 0x17 /* iSCSI/FCOE block */
+#define IXGBE_ISCSI_FCOE_FLAGS_OFFSET 0x0 /* FCOE flags */
+#define IXGBE_ISCSI_FCOE_FLAGS_ENABLE 0x1 /* FCOE flags enable bit */
#define IXGBE_ALT_SAN_MAC_ADDR_BLK_PTR 0x27 /* Alt. SAN MAC block */
#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET 0x0 /* Alt. SAN MAC capability */
#define IXGBE_ALT_SAN_MAC_ADDR_PORT0_OFFSET 0x1 /* Alt. SAN MAC 0 offset */
@@ -1697,6 +1766,7 @@
/* Transmit Config masks */
#define IXGBE_TXDCTL_ENABLE 0x02000000 /* Enable specific Tx Queue */
#define IXGBE_TXDCTL_SWFLSH 0x04000000 /* Tx Desc. write-back flushing */
+#define IXGBE_TXDCTL_WTHRESH_SHIFT 16 /* shift to WTHRESH bits */
/* Enable short packet padding to 64 bytes */
#define IXGBE_TX_PAD_ENABLE 0x00000400
#define IXGBE_JUMBO_FRAME_ENABLE 0x00000004 /* Allow jumbo frames */
@@ -1710,9 +1780,9 @@
#define IXGBE_RXCTRL_RXEN 0x00000001 /* Enable Receiver */
#define IXGBE_RXCTRL_DMBYPS 0x00000002 /* Descriptor Monitor Bypass */
#define IXGBE_RXDCTL_ENABLE 0x02000000 /* Enable specific Rx Queue */
-#define IXGBE_RXDCTL_VME 0x40000000 /* VLAN mode enable */
#define IXGBE_RXDCTL_RLPMLMASK 0x00003FFF /* Only supported on the X540 */
#define IXGBE_RXDCTL_RLPML_EN 0x00008000
+#define IXGBE_RXDCTL_VME 0x40000000 /* VLAN mode enable */
#define IXGBE_FCTRL_SBP 0x00000002 /* Store Bad Packet */
#define IXGBE_FCTRL_MPE 0x00000100 /* Multicast Promiscuous Ena*/
@@ -1870,6 +1940,8 @@
#define IXGBE_RXDADV_PKTTYPE_MASK 0x0000FFF0
#define IXGBE_RXDADV_PKTTYPE_MASK_EX 0x0001FFF0
#define IXGBE_RXDADV_HDRBUFLEN_MASK 0x00007FE0
+#define IXGBE_RXDADV_RSCCNT_MASK 0x001E0000
+#define IXGBE_RXDADV_RSCCNT_SHIFT 17
#define IXGBE_RXDADV_HDRBUFLEN_SHIFT 5
#define IXGBE_RXDADV_SPLITHEADER_EN 0x00001000
#define IXGBE_RXDADV_SPH 0x8000
@@ -1945,15 +2017,6 @@
#define IXGBE_VFLRE(_i) (((_i & 1) ? 0x001C0 : 0x00600))
#define IXGBE_VFLREC(_i) (0x00700 + (_i * 4))
-/* Little Endian defines */
-#ifndef __le32
-#define __le32 u32
-#endif
-#ifndef __le64
-#define __le64 u64
-
-#endif
-
enum ixgbe_fdir_pballoc_type {
IXGBE_FDIR_PBALLOC_64K = 0,
IXGBE_FDIR_PBALLOC_128K,
@@ -2152,8 +2215,6 @@ typedef u32 ixgbe_link_speed;
IXGBE_LINK_SPEED_1GB_FULL | \
IXGBE_LINK_SPEED_10GB_FULL)
-#define IXGBE_PCIE_DEV_CTRL_2 0xC8
-#define PCIE_COMPL_TO_VALUE 0x05
/* Physical layer type */
typedef u32 ixgbe_physical_layer;
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 09/12] ixgbe: enable SCTP checksum offload for X540
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Don Skidmore, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Don Skidmore <donald.c.skidmore@intel.com>
X540 supports SCTP checksum offload so enable it. It was overlooked when X540
support was initially added to the driver.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_main.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 227a9b4..a7da5d9 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -7361,8 +7361,14 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
netdev->features |= NETIF_F_TSO6;
netdev->features |= NETIF_F_GRO;
- if (adapter->hw.mac.type == ixgbe_mac_82599EB)
+ switch (adapter->hw.mac.type) {
+ case ixgbe_mac_82599EB:
+ case ixgbe_mac_X540:
netdev->features |= NETIF_F_SCTP_CSUM;
+ break;
+ default:
+ break;
+ }
netdev->vlan_features |= NETIF_F_TSO;
netdev->vlan_features |= NETIF_F_TSO6;
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 07/12] ixgbe: fix static functions
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: John Fastabend, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: John Fastabend <john.r.fastabend@intel.com>
Define functions as static added C=1 (sparse) to my make line
brought these to my attention.
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_82599.c | 2 +-
drivers/net/ixgbe/ixgbe_dcb_82598.c | 2 +-
drivers/net/ixgbe/ixgbe_main.c | 4 ++--
drivers/net/ixgbe/ixgbe_sriov.c | 2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c
index d521baf..d1cda36 100644
--- a/drivers/net/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ixgbe/ixgbe_82599.c
@@ -494,7 +494,7 @@ static void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
*
* Set the link speed in the AUTOC register and restarts link.
**/
-s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
+static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
bool autoneg,
bool autoneg_wait_to_complete)
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82598.c b/drivers/net/ixgbe/ixgbe_dcb_82598.c
index 1bc57e5..771d01a 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82598.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_82598.c
@@ -289,7 +289,7 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, u8 pfc_en)
* Configure queue statistics registers, all queues belonging to same traffic
* class uses a single set of queue statistics counters.
*/
-s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *hw)
+static s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *hw)
{
u32 reg = 0;
u8 i = 0;
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index dbe29e5..227a9b4 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -4566,8 +4566,8 @@ static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
#ifdef CONFIG_IXGBE_DCB
/* ixgbe_get_first_reg_idx - Return first register index associated with ring */
-void ixgbe_get_first_reg_idx(struct ixgbe_adapter *adapter, u8 tc,
- unsigned int *tx, unsigned int *rx)
+static void ixgbe_get_first_reg_idx(struct ixgbe_adapter *adapter, u8 tc,
+ unsigned int *tx, unsigned int *rx)
{
struct net_device *dev = adapter->netdev;
struct ixgbe_hw *hw = &adapter->hw;
diff --git a/drivers/net/ixgbe/ixgbe_sriov.c b/drivers/net/ixgbe/ixgbe_sriov.c
index 6e50d83..4765027 100644
--- a/drivers/net/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ixgbe/ixgbe_sriov.c
@@ -110,7 +110,7 @@ static int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid,
return adapter->hw.mac.ops.set_vfta(&adapter->hw, vid, vf, (bool)add);
}
-void ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 *msgbuf)
+static void ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 *msgbuf)
{
struct ixgbe_hw *hw = &adapter->hw;
int new_mtu = msgbuf[1];
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 06/12] ixgbe: remove ntuple display support
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Alexander Duyck, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Alexander Duyck <alexander.h.duyck@intel.com>
This change removes the ntuple display support from ixgbe. The reason for
this change is to resolve a number of issues in the way display filtering
is handled.
I plan to add support for displaying these filters via the network flow
classifier interface.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_ethtool.c | 3 ---
drivers/net/ixgbe/ixgbe_main.c | 3 ---
2 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index 5005a36..6cf1c71 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -1030,9 +1030,6 @@ static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
return IXGBE_TEST_LEN;
case ETH_SS_STATS:
return IXGBE_STATS_LEN;
- case ETH_SS_NTUPLE_FILTERS:
- return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
- ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
default:
return -EOPNOTSUPP;
}
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 200ae7e..dbe29e5 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -4203,9 +4203,6 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
break;
}
- /* clear n-tuple filters that are cached */
- ethtool_ntuple_flush(netdev);
-
if (!pci_channel_offline(adapter->pdev))
ixgbe_reset(adapter);
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 10/12] ixgbe: Bump version
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Don Skidmore, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Don Skidmore <donald.c.skidmore@intel.com>
Bump the driver version number to better match up with the out of tree
driver that has similar functionality.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_main.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index a7da5d9..9160811 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -52,8 +52,8 @@ char ixgbe_driver_name[] = "ixgbe";
static const char ixgbe_driver_string[] =
"Intel(R) 10 Gigabit PCI Express Network Driver";
#define MAJ 3
-#define MIN 2
-#define BUILD 9
+#define MIN 3
+#define BUILD 8
#define KFIX 2
#define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
__stringify(BUILD) "-k" __stringify(KFIX)
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 05/12] ixgbe: add LED blink code for x540
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Emil Tantilov, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Emil Tantilov <emil.s.tantilov@intel.com>
Implement blink_led_start and blink_led_stop functions for x540
using the MACC register.
Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_x540.c | 64 ++++++++++++++++++++++++++++++++++++++-
1 files changed, 62 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_x540.c b/drivers/net/ixgbe/ixgbe_x540.c
index 932394f..75c6465 100644
--- a/drivers/net/ixgbe/ixgbe_x540.c
+++ b/drivers/net/ixgbe/ixgbe_x540.c
@@ -744,6 +744,66 @@ static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)
IXGBE_WRITE_FLUSH(hw);
}
+/**
+ * ixgbe_blink_led_start_X540 - Blink LED based on index.
+ * @hw: pointer to hardware structure
+ * @index: led number to blink
+ *
+ * Devices that implement the version 2 interface:
+ * X540
+ **/
+static s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
+{
+ u32 macc_reg;
+ u32 ledctl_reg;
+
+ /*
+ * In order for the blink bit in the LED control register
+ * to work, link and speed must be forced in the MAC. We
+ * will reverse this when we stop the blinking.
+ */
+ macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
+ macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS;
+ IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
+
+ /* Set the LED to LINK_UP + BLINK. */
+ ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
+ ledctl_reg &= ~IXGBE_LED_MODE_MASK(index);
+ ledctl_reg |= IXGBE_LED_BLINK(index);
+ IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
+ IXGBE_WRITE_FLUSH(hw);
+
+ return 0;
+}
+
+/**
+ * ixgbe_blink_led_stop_X540 - Stop blinking LED based on index.
+ * @hw: pointer to hardware structure
+ * @index: led number to stop blinking
+ *
+ * Devices that implement the version 2 interface:
+ * X540
+ **/
+static s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)
+{
+ u32 macc_reg;
+ u32 ledctl_reg;
+
+ /* Restore the LED to its default value. */
+ ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
+ ledctl_reg &= ~IXGBE_LED_MODE_MASK(index);
+ ledctl_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index);
+ ledctl_reg &= ~IXGBE_LED_BLINK(index);
+ IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
+
+ /* Unforce link and speed in the MAC. */
+ macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
+ macc_reg &= ~(IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS);
+ IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
+ IXGBE_WRITE_FLUSH(hw);
+
+ return 0;
+}
static struct ixgbe_mac_operations mac_ops_X540 = {
.init_hw = &ixgbe_init_hw_generic,
.reset_hw = &ixgbe_reset_hw_X540,
@@ -767,8 +827,8 @@ static struct ixgbe_mac_operations mac_ops_X540 = {
.get_link_capabilities = &ixgbe_get_copper_link_capabilities_generic,
.led_on = &ixgbe_led_on_generic,
.led_off = &ixgbe_led_off_generic,
- .blink_led_start = &ixgbe_blink_led_start_generic,
- .blink_led_stop = &ixgbe_blink_led_stop_generic,
+ .blink_led_start = &ixgbe_blink_led_start_X540,
+ .blink_led_stop = &ixgbe_blink_led_stop_X540,
.set_rar = &ixgbe_set_rar_generic,
.clear_rar = &ixgbe_clear_rar_generic,
.set_vmdq = &ixgbe_set_vmdq_generic,
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 04/12] ixgbe: add support for 64k EEPROM for 82599
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Emil Tantilov, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Emil Tantilov <emil.s.tantilov@intel.com>
82599 supports up to 32k EEPROM addressing via EERD register. If we
wish to address larger EEPROM this have to be done via serial interface.
This patch adds function ixgbe_read_eeprom_82599 which selects the best
method to read the EEPROM.
Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_82599.c | 31 ++++++++++++++++++++++++++++++-
1 files changed, 30 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c
index b341ed8..d521baf 100644
--- a/drivers/net/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ixgbe/ixgbe_82599.c
@@ -2064,6 +2064,35 @@ out:
return lesm_enabled;
}
+/**
+ * ixgbe_read_eeprom_82599 - Read EEPROM word using
+ * fastest available method
+ *
+ * @hw: pointer to hardware structure
+ * @offset: offset of word in the EEPROM to read
+ * @data: word read from the EEPROM
+ *
+ * Reads a 16 bit word from the EEPROM
+ **/
+static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,
+ u16 offset, u16 *data)
+{
+ struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
+ s32 ret_val = IXGBE_ERR_CONFIG;
+
+ /*
+ * If EEPROM is detected and can be addressed using 14 bits,
+ * use EERD otherwise use bit bang
+ */
+ if ((eeprom->type == ixgbe_eeprom_spi) &&
+ (offset <= IXGBE_EERD_MAX_ADDR))
+ ret_val = ixgbe_read_eerd_generic(hw, offset, data);
+ else
+ ret_val = ixgbe_read_eeprom_bit_bang_generic(hw, offset, data);
+
+ return ret_val;
+}
+
static struct ixgbe_mac_operations mac_ops_82599 = {
.init_hw = &ixgbe_init_hw_generic,
.reset_hw = &ixgbe_reset_hw_82599,
@@ -2110,7 +2139,7 @@ static struct ixgbe_mac_operations mac_ops_82599 = {
static struct ixgbe_eeprom_operations eeprom_ops_82599 = {
.init_params = &ixgbe_init_eeprom_params_generic,
- .read = &ixgbe_read_eerd_generic,
+ .read = &ixgbe_read_eeprom_82599,
.write = &ixgbe_write_eeprom_generic,
.calc_checksum = &ixgbe_calc_eeprom_checksum_generic,
.validate_checksum = &ixgbe_validate_eeprom_checksum_generic,
--
1.7.4.4
^ permalink raw reply related
* [net-next-2.6 08/12] ixgbe: do not clear FCoE DDP error status for received ABTS
From: Jeff Kirsher @ 2011-04-27 9:34 UTC (permalink / raw)
To: davem; +Cc: Yi Zou, netdev, gospo, bphilips, Jeff Kirsher
In-Reply-To: <1303896891-16006-1-git-send-email-jeffrey.t.kirsher@intel.com>
From: Yi Zou <yi.zou@intel.com>
The ddp->err is initialized to be 1 to make sure outstanding DDP context is
guaranteed to be invalidated when HW is not auto-invalidating it. However,
in case of receiving ABTS response for a DDPed I/O, the ddp->err was cleared,
bypassing the invalidating of the DDP context from upper protocol stack when
ixgbe_fcoe_ddp_put() is called. This bug is fixed here by updating the error
only when FCP_RSP is received.
Signed-off-by: Yi Zou <yi.zou@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ixgbe/ixgbe_fcoe.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.c b/drivers/net/ixgbe/ixgbe_fcoe.c
index dba7d77..0592072 100644
--- a/drivers/net/ixgbe/ixgbe_fcoe.c
+++ b/drivers/net/ixgbe/ixgbe_fcoe.c
@@ -416,8 +416,7 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
if (!ddp->udl)
goto ddp_out;
- ddp->err = (fcerr | fceofe);
- if (ddp->err)
+ if (fcerr | fceofe)
goto ddp_out;
fcstat = (sterr & IXGBE_RXDADV_STAT_FCSTAT);
@@ -428,6 +427,7 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) {
pci_unmap_sg(adapter->pdev, ddp->sgl,
ddp->sgc, DMA_FROM_DEVICE);
+ ddp->err = (fcerr | fceofe);
ddp->sgl = NULL;
ddp->sgc = 0;
}
--
1.7.4.4
^ permalink raw reply related
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