* [iproute2 PATCH 07/11] Fix file descriptor leak on error in iproute_flush_cache()
From: Thomas Jarosch @ 2011-10-03 15:23 UTC (permalink / raw)
To: netdev
Detected by cppcheck.
Signed-off-by: Thomas Jarosch <thomas.jarosch@intra2net.com>
---
ip/iproute.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/ip/iproute.c b/ip/iproute.c
index 21e1a4b..15b36e8 100644
--- a/ip/iproute.c
+++ b/ip/iproute.c
@@ -1057,6 +1057,7 @@ static int iproute_flush_cache(void)
if ((write (flush_fd, (void *)buffer, len)) < len) {
fprintf (stderr, "Cannot flush routing cache\n");
+ close(flush_fd);
return -1;
}
close(flush_fd);
--
1.7.4.4
^ permalink raw reply related
* [iproute2 PATCH 09/11] Fix file descriptor leak on error in read_mroute_list()
From: Thomas Jarosch @ 2011-10-03 15:24 UTC (permalink / raw)
To: netdev
Detected by cppcheck.
Signed-off-by: Thomas Jarosch <thomas.jarosch@intra2net.com>
---
ip/ipmroute.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/ip/ipmroute.c b/ip/ipmroute.c
index f033349..945727d 100644
--- a/ip/ipmroute.c
+++ b/ip/ipmroute.c
@@ -85,8 +85,10 @@ static void read_mroute_list(FILE *ofp)
if (!fp)
return;
- if (!fgets(buf, sizeof(buf), fp))
+ if (!fgets(buf, sizeof(buf), fp)) {
+ fclose(fp);
return;
+ }
while (fgets(buf, sizeof(buf), fp)) {
inet_prefix maddr, msrc;
--
1.7.4.4
^ permalink raw reply related
* [iproute2 PATCH 05/11] Fix memory leak of lname variable in get_target_name()
From: Thomas Jarosch @ 2011-10-03 15:23 UTC (permalink / raw)
To: netdev
Detected by cppcheck.
Signed-off-by: Thomas Jarosch <thomas.jarosch@intra2net.com>
---
tc/m_ipt.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/tc/m_ipt.c b/tc/m_ipt.c
index 99d9965..a73d400 100644
--- a/tc/m_ipt.c
+++ b/tc/m_ipt.c
@@ -281,6 +281,7 @@ get_target_name(const char *name)
fputs(dlerror(), stderr);
printf("\n");
free(new_name);
+ free(lname);
return NULL;
}
}
@@ -297,6 +298,7 @@ get_target_name(const char *name)
fprintf(stderr, "\n");
dlclose(handle);
free(new_name);
+ free(lname);
return NULL;
}
}
@@ -304,6 +306,7 @@ get_target_name(const char *name)
}
free(new_name);
+ free(lname);
return m;
}
--
1.7.4.4
^ permalink raw reply related
* [iproute2 PATCH 00/11] QA check with cppcheck
From: Thomas Jarosch @ 2011-10-03 15:21 UTC (permalink / raw)
To: netdev
Hi there,
I've given iproute2 a good run with the free
cppcheck static code analysis tool.
(http://cppcheck.sourceforge.net/)
Following are eleven patches correcting minor
resource leaks and two real bugs.
Cheers,
Thomas
Thomas Jarosch (11):
Fix pipe I/O stream descriptor leak in init_service_resolver()
Fix file descriptor leak on error in rtnl_hash_initialize()
Fix wrong comparison in cmp_print_eopt()
Fix wrong sanity check in choke_parse_opt()
Fix memory leak of lname variable in get_target_name()
Add missing closedir() call in do_show()
Fix file descriptor leak on error in iproute_flush_cache()
Fix file descriptor leak on error in read_viftable()
Fix file descriptor leak on error in read_mroute_list()
Fix file descriptor leak in do_tunnels_list()
Fix file descriptor leak on error in read_igmp()
ip/ipmaddr.c | 4 +++-
ip/ipmroute.c | 9 ++++++---
ip/iproute.c | 1 +
ip/iptunnel.c | 3 +++
ip/iptuntap.c | 1 +
lib/rt_names.c | 2 ++
misc/ss.c | 1 +
tc/em_cmp.c | 2 +-
tc/m_ipt.c | 3 +++
tc/q_choke.c | 2 +-
10 files changed, 22 insertions(+), 6 deletions(-)
--
1.7.4.4
^ permalink raw reply
* Re: big picture UDP/IP performance question re 2.6.18 -> 2.6.32
From: starlight @ 2011-10-03 15:25 UTC (permalink / raw)
To: Eric Dumazet
Cc: linux-kernel, netdev, Willy Tarreau, Peter Zijlstra,
Stephen Hemminger
[-- Attachment #1: Type: text/plain, Size: 1868 bytes --]
Ran 'nohalt' and 'poll=idle' tests and they
were a complete bust. 'nohalt' gave slightly
better performance with 2.6.18(rhel) and
slightly worse performance with 2.6.39.27.
'poll=idle' improved 2.6.39.27 by 2.7%,
which is nowhere near good enough to have
servers running at full power--about double
idle power according to the UPS. 'poll=idle'
did cause the idle-loop to show up in 'perf'
at the top of the list consuming 45% of the
CPU. So the one thing it does is permit one
to see exactly how much absolute CPU is
consumed by each component during test runs
rather than providing a relative number.
I've come to the conclusion that Eric is right
and the primary issue is an increase in the
cost of scheduler context switches. Have
been watching this number and it has held
pretty close to 200k/sec under all scenarios
and kernel versions, so it has to be
a longer code-path, bigger cache pressure
or both in the scheduler. Sadly this makes
newer kernels a no-go for us.
At 07:47 AM 10/2/2011 -0700, Stephen Hemminger wrote:
>Try disabling PCI DMA remapping. The additional
>overhead of setting up IO mapping can be a
>performance buzz kill. Try CONGIG_DMAR=n
I decided to skip this. Can't see how it
will make more than a percent or two
difference since the problem is not the
network stack.
At 09:21 AM 10/2/2011 +0200, Eric Dumazet wrote:
>On new kernels, you can check if your udp sockets
>drops frames because of rcvbuffer being full (cat
>/proc/net/udp, check last column 'drops')
Zero, of course. This info is also
shown lumped in the 'netstat -s'
"packet receive errors" counter.
Have been watching it all along.
>To check if softirq processing hit some limits :
>cat /proc/net/softnet_stat
Zero drops. Some noise-level squeezing.
Nice stat! Wish I had known about this
four or five years ago.
>Please send full "dmesg" output
Attached.
[-- Attachment #2: dmesg_c6_263904.txt --]
[-- Type: text/plain, Size: 65129 bytes --]
Linux version 2.6.39.4 (x@x) (gcc version 4.4.4 20100726 (Red Hat 4.4.4-13) (GCC) ) #1 SMP Sat Oct 1 21:11:47 EDT 2011
Command line: ro root=/dev/vg00/lv06 console=ttyS2,115200 hugepages=4096 nohalt
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009dc00 (usable)
BIOS-e820: 000000000009dc00 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e6000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 00000000d7e80000 (usable)
BIOS-e820: 00000000d7e8e000 - 00000000d7e90000 type 9
BIOS-e820: 00000000d7e90000 - 00000000d7eb4000 (ACPI data)
BIOS-e820: 00000000d7eb4000 - 00000000d7ee0000 (ACPI NVS)
BIOS-e820: 00000000d7ee0000 - 00000000d8000000 (reserved)
BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved)
BIOS-e820: 00000000ffe00000 - 0000000100000000 (reserved)
BIOS-e820: 0000000100000000 - 0000000428000000 (usable)
NX (Execute Disable) protection: active
DMI present.
DMI: Supermicro H8DG6/H8DGi/H8DG6/H8DGi, BIOS 1.0 09/09/10
e820 update range: 0000000000000000 - 0000000000010000 (usable) ==> (reserved)
e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
No AGP bridge found
last_pfn = 0x428000 max_arch_pfn = 0x400000000
MTRR default type: uncachable
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-EFFFF uncachable
F0000-FFFFF write-protect
MTRR variable ranges enabled:
0 base 000000000000 mask FFFF80000000 write-back
1 base 000080000000 mask FFFFC0000000 write-back
2 base 0000C0000000 mask FFFFF0000000 write-back
3 base 0000D0000000 mask FFFFF8000000 write-back
4 disabled
5 disabled
6 disabled
7 disabled
TOM2: 0000000428000000 aka 17024M
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
e820 update range: 00000000d8000000 - 0000000100000000 (usable) ==> (reserved)
last_pfn = 0xd7e80 max_arch_pfn = 0x400000000
found SMP MP-table at [ffff8800000ff780] ff780
initial memory mapped : 0 - 20000000
Base memory trampoline at [ffff880000098000] 98000 size 20480
Using GB pages for direct mapping
init_memory_mapping: 0000000000000000-00000000d7e80000
0000000000 - 00c0000000 page 1G
00c0000000 - 00d7e00000 page 2M
00d7e00000 - 00d7e80000 page 4k
kernel direct mapping tables up to d7e80000 @ d7e7d000-d7e80000
init_memory_mapping: 0000000100000000-0000000428000000
0100000000 - 0400000000 page 1G
0400000000 - 0428000000 page 2M
kernel direct mapping tables up to 428000000 @ 427ffe000-428000000
RAMDISK: 37451000 - 37ff0000
ACPI: RSDP 00000000000fa320 00024 (v02 ACPIAM)
ACPI: XSDT 00000000d7e90100 00084 (v01 SMCI 20100909 MSFT 00000097)
ACPI: FACP 00000000d7e90290 000F4 (v03 090910 FACP2028 20100909 MSFT 00000097)
ACPI: DSDT 00000000d7e90670 06E54 (v01 1BC11 1BC11000 00000000 INTL 20051117)
ACPI: FACS 00000000d7eb4000 00040
ACPI: APIC 00000000d7e90390 00118 (v01 090910 APIC2028 20100909 MSFT 00000097)
ACPI: MCFG 00000000d7e904b0 0003C (v01 090910 OEMMCFG 20100909 MSFT 00000097)
ACPI: OEMB 00000000d7eb4040 000BC (v01 090910 OEMB2028 20100909 MSFT 00000097)
ACPI: HPET 00000000d7e9a670 00038 (v01 090910 OEMHPET 20100909 MSFT 00000097)
ACPI: SRAT 00000000d7e9a6b0 00190 (v02 AMD F10 00000001 AMD 00000001)
ACPI: SLIT 00000000d7e9a840 00030 (v01 AMD F10 00000001 AMD 00000001)
ACPI: SSDT 00000000d7e9a870 01E48 (v01 A M I POWERNOW 00000001 AMD 00000001)
ACPI: EINJ 00000000d7e9c6c0 00130 (v01 AMIER AMI_EINJ 20100909 MSFT 00000097)
ACPI: BERT 00000000d7e9c850 00030 (v01 AMIER AMI_BERT 20100909 MSFT 00000097)
ACPI: ERST 00000000d7e9c880 001B0 (v01 AMIER AMI_ERST 20100909 MSFT 00000097)
ACPI: HEST 00000000d7e9ca30 000A8 (v01 AMIER ABC_HEST 20100909 MSFT 00000097)
ACPI: Local APIC address 0xfee00000
SRAT: PXM 0 -> APIC 0x10 -> Node 0
SRAT: PXM 0 -> APIC 0x11 -> Node 0
SRAT: PXM 0 -> APIC 0x12 -> Node 0
SRAT: PXM 0 -> APIC 0x13 -> Node 0
SRAT: PXM 0 -> APIC 0x14 -> Node 0
SRAT: PXM 0 -> APIC 0x15 -> Node 0
SRAT: PXM 1 -> APIC 0x16 -> Node 1
SRAT: PXM 1 -> APIC 0x17 -> Node 1
SRAT: PXM 1 -> APIC 0x18 -> Node 1
SRAT: PXM 1 -> APIC 0x19 -> Node 1
SRAT: PXM 1 -> APIC 0x1a -> Node 1
SRAT: PXM 1 -> APIC 0x1b -> Node 1
SRAT: Node 0 PXM 0 0-a0000
SRAT: Node 0 PXM 0 100000-d8000000
SRAT: Node 0 PXM 0 100000000-228000000
SRAT: Node 1 PXM 1 228000000-428000000
NUMA: Initialized distance table, cnt=2
NUMA: Node 0 [0,a0000) + [100000,d8000000) -> [0,d8000000)
NUMA: Node 0 [0,d8000000) + [100000000,228000000) -> [0,228000000)
NUMA: Allocated memnodemap from 427fffec0 - 428000000
NUMA: Using 27 for the hash shift.
Initmem setup node 0 0000000000000000-0000000228000000
NODE_DATA [0000000227fd9000 - 0000000227ffffff]
Initmem setup node 1 0000000228000000-0000000428000000
NODE_DATA [0000000427fd7000 - 0000000427ffdfff]
[ffffea00078c0000-ffffea00079fffff] potential offnode page_structs
[ffffea0000000000-ffffea00079fffff] PMD -> [ffff88021fe00000-ffff880226ffffff] on node 0
[ffffea0007a00000-ffffea000e9fffff] PMD -> [ffff88041f600000-ffff8804265fffff] on node 1
Zone PFN ranges:
DMA 0x00000010 -> 0x00001000
DMA32 0x00001000 -> 0x00100000
Normal 0x00100000 -> 0x00428000
Movable zone start PFN for each node
early_node_map[4] active PFN ranges
0: 0x00000010 -> 0x0000009d
0: 0x00000100 -> 0x000d7e80
0: 0x00100000 -> 0x00228000
1: 0x00228000 -> 0x00428000
On node 0 totalpages: 2096653
DMA zone: 56 pages used for memmap
DMA zone: 5 pages reserved
DMA zone: 3920 pages, LIFO batch:0
DMA32 zone: 14280 pages used for memmap
DMA32 zone: 865976 pages, LIFO batch:31
Normal zone: 16576 pages used for memmap
Normal zone: 1195840 pages, LIFO batch:31
On node 1 totalpages: 2097152
Normal zone: 28672 pages used for memmap
Normal zone: 2068480 pages, LIFO batch:31
ACPI: PM-Timer IO Port: 0x808
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x10] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x11] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x12] enabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x13] enabled)
ACPI: LAPIC (acpi_id[0x05] lapic_id[0x14] enabled)
ACPI: LAPIC (acpi_id[0x06] lapic_id[0x15] enabled)
ACPI: LAPIC (acpi_id[0x07] lapic_id[0x16] enabled)
ACPI: LAPIC (acpi_id[0x08] lapic_id[0x17] enabled)
ACPI: LAPIC (acpi_id[0x09] lapic_id[0x18] enabled)
ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x19] enabled)
ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x1a] enabled)
ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x1b] enabled)
ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x8c] disabled)
ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x8d] disabled)
ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x8e] disabled)
ACPI: LAPIC (acpi_id[0x10] lapic_id[0x8f] disabled)
ACPI: LAPIC (acpi_id[0x11] lapic_id[0x90] disabled)
ACPI: LAPIC (acpi_id[0x12] lapic_id[0x91] disabled)
ACPI: LAPIC (acpi_id[0x13] lapic_id[0x92] disabled)
ACPI: LAPIC (acpi_id[0x14] lapic_id[0x93] disabled)
ACPI: LAPIC (acpi_id[0x15] lapic_id[0x94] disabled)
ACPI: LAPIC (acpi_id[0x16] lapic_id[0x95] disabled)
ACPI: LAPIC (acpi_id[0x17] lapic_id[0x96] disabled)
ACPI: LAPIC (acpi_id[0x18] lapic_id[0x97] disabled)
ACPI: LAPIC_NMI (acpi_id[0xff] dfl dfl lint[0x1])
ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
ACPI: IOAPIC (id[0x00] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 0, version 33, address 0xfec00000, GSI 0-23
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Using ACPI (MADT) for SMP configuration information
ACPI: HPET id: 0x8300 base: 0xfed00000
SMP: Allowing 24 CPUs, 12 hotplug CPUs
nr_irqs_gsi: 40
Allocating PCI resources starting at f0000000 (gap: f0000000:fe00000)
Booting paravirtualized kernel on bare hardware
setup_percpu: NR_CPUS:4096 nr_cpumask_bits:24 nr_cpu_ids:24 nr_node_ids:2
PERCPU: Embedded 29 pages/cpu @ffff880227c00000 s89280 r8192 d21312 u131072
pcpu-alloc: s89280 r8192 d21312 u131072 alloc=1*2097152
pcpu-alloc: [0] 00 01 02 03 04 05 12 14 16 18 20 22 -- -- -- --
pcpu-alloc: [1] 06 07 08 09 10 11 13 15 17 19 21 23 -- -- -- --
Built 2 zonelists in Zone order, mobility grouping on. Total pages: 4134216
Policy zone: Normal
Kernel command line: ro root=/dev/vg00/lv06 console=ttyS2,115200 hugepages=4096 nohalt
PID hash table entries: 4096 (order: 3, 32768 bytes)
Checking aperture...
No AGP bridge found
Node 0: aperture @ 4000000 size 32 MB
Aperture pointing to e820 RAM. Ignoring.
Your BIOS doesn't leave a aperture memory hole
Please enable the IOMMU option in the BIOS setup
This costs you 64 MB of RAM
Mapping aperture over 65536 KB of RAM @ c0000000
Memory: 16381060k/17432576k available (4511k kernel code, 657356k absent, 394160k reserved, 7763k data, 1476k init)
Hierarchical RCU implementation.
RCU-based detection of stalled CPUs is disabled.
NR_IRQS:262400 nr_irqs:872 16
Extended CMOS year: 2000
Console: colour VGA+ 80x25
console [ttyS2] enabled
hpet clockevent registered
Fast TSC calibration using PIT
Detected 2200.130 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 4400.26 BogoMIPS (lpj=2200130)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Dentry cache hash table entries: 2097152 (order: 12, 16777216 bytes)
Inode-cache hash table entries: 1048576 (order: 11, 8388608 bytes)
Mount-cache hash table entries: 256
tseg: 00d7f00000
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
mce: CPU supports 6 MCE banks
ACPI: Core revision 20110316
ftrace: allocating 17729 entries in 70 pages
Setting APIC routing to physical flat
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
CPU0: AMD Opteron(tm) Processor 6174 stepping 01
Performance Events: AMD PMU driver.
... version: 0
... bit width: 48
... generic registers: 4
... value mask: 0000ffffffffffff
... max period: 00007fffffffffff
... fixed-purpose events: 0
... event mask: 000000000000000f
Booting Node 0, Processors #1
smpboot cpu 1: start_ip = 98000
#2
smpboot cpu 2: start_ip = 98000
#3
smpboot cpu 3: start_ip = 98000
#4
smpboot cpu 4: start_ip = 98000
#5
smpboot cpu 5: start_ip = 98000
Ok.
Booting Node 1, Processors #6
smpboot cpu 6: start_ip = 98000
#7
smpboot cpu 7: start_ip = 98000
#8
smpboot cpu 8: start_ip = 98000
#9
smpboot cpu 9: start_ip = 98000
#10
smpboot cpu 10: start_ip = 98000
#11
smpboot cpu 11: start_ip = 98000
Brought up 12 CPUs
Total of 12 processors activated (52804.99 BogoMIPS).
devtmpfs: initialized
print_constraints: dummy:
NET: Registered protocol family 16
node 0 link 3: io port [5000, efff]
TOM: 00000000d8000000 aka 3456M
Fam 10h mmconf [e0000000, efffffff]
node 0 link 3: mmio [db000000, dfffffff]
node 0 link 3: mmio [a0000, bffff]
node 0 link 3: mmio [f0000000, ffffffff]
TOM2: 0000000428000000 aka 17024M
bus: [00, 0c] on node 0 link 3
bus: 00 index 0 [io 0x0000-0xffff]
bus: 00 index 1 [mem 0xd8000000-0xdfffffff]
bus: 00 index 2 [mem 0x000a0000-0x000bffff]
bus: 00 index 3 [mem 0xf0000000-0xffffffff]
bus: 00 index 4 [mem 0x428000000-0xfcffffffff]
Extended Config Space enabled on 2 nodes
ACPI: bus type pci registered
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in E820
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
\_SB_:_OSC evaluation returned wrong type
_OSC request data:1 7
ACPI: Executed 4 blocks of module-level executable AML code
ACPI: Interpreter enabled
ACPI: (supports S0 S1 S5)
ACPI: Using IOAPIC for interrupt routing
ACPI: No dock devices found.
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-0c])
pci_root PNP0A08:00: host bridge window [io 0x0000-0x03af]
pci_root PNP0A08:00: host bridge window [io 0x03e0-0x0cf7]
pci_root PNP0A08:00: host bridge window [io 0x03b0-0x03bb]
pci_root PNP0A08:00: host bridge window [io 0x03c0-0x03df]
pci_root PNP0A08:00: host bridge window [io 0x0d00-0xffff]
pci_root PNP0A08:00: host bridge window [mem 0x000a0000-0x000bffff]
pci_root PNP0A08:00: host bridge window [mem 0x000d0000-0x000dffff]
pci_root PNP0A08:00: host bridge window [mem 0xde000000-0xdfffffff]
pci_root PNP0A08:00: host bridge window [mem 0xdb000000-0xddffffff]
pci_root PNP0A08:00: host bridge window [mem 0xfed40000-0xfed44fff]
pci 0000:00:00.0: [1002:5a10] type 0 class 0x000600
pci 0000:00:02.0: [1002:5a16] type 1 class 0x000604
pci 0000:00:02.0: PME# supported from D0 D3hot D3cold
pci 0000:00:02.0: PME# disabled
pci 0000:00:04.0: [1002:5a18] type 1 class 0x000604
pci 0000:00:04.0: PME# supported from D0 D3hot D3cold
pci 0000:00:04.0: PME# disabled
pci 0000:00:0b.0: [1002:5a1f] type 1 class 0x000604
pci 0000:00:0b.0: PME# supported from D0 D3hot D3cold
pci 0000:00:0b.0: PME# disabled
pci 0000:00:0c.0: [1002:5a20] type 1 class 0x000604
pci 0000:00:0c.0: PME# supported from D0 D3hot D3cold
pci 0000:00:0c.0: PME# disabled
pci 0000:00:0d.0: [1002:5a1e] type 1 class 0x000604
pci 0000:00:0d.0: PME# supported from D0 D3hot D3cold
pci 0000:00:0d.0: PME# disabled
pci 0000:00:11.0: [1002:4390] type 0 class 0x000101
pci 0000:00:11.0: reg 10: [io 0x9000-0x9007]
pci 0000:00:11.0: reg 14: [io 0x8000-0x8003]
pci 0000:00:11.0: reg 18: [io 0x7000-0x7007]
pci 0000:00:11.0: reg 1c: [io 0x6000-0x6003]
pci 0000:00:11.0: reg 20: [io 0x5000-0x500f]
pci 0000:00:11.0: reg 24: [mem 0xdf6f8400-0xdf6f87ff]
pci 0000:00:11.0: set SATA to AHCI mode
pci 0000:00:12.0: [1002:4397] type 0 class 0x000c03
pci 0000:00:12.0: reg 10: [mem 0xdf6f7000-0xdf6f7fff]
pci 0000:00:12.1: [1002:4398] type 0 class 0x000c03
pci 0000:00:12.1: reg 10: [mem 0xdf6f6000-0xdf6f6fff]
pci 0000:00:12.2: [1002:4396] type 0 class 0x000c03
pci 0000:00:12.2: reg 10: [mem 0xdf6f8800-0xdf6f88ff]
pci 0000:00:12.2: supports D1 D2
pci 0000:00:12.2: PME# supported from D0 D1 D2 D3hot
pci 0000:00:12.2: PME# disabled
pci 0000:00:13.0: [1002:4397] type 0 class 0x000c03
pci 0000:00:13.0: reg 10: [mem 0xdf6fa000-0xdf6fafff]
pci 0000:00:13.1: [1002:4398] type 0 class 0x000c03
pci 0000:00:13.1: reg 10: [mem 0xdf6f9000-0xdf6f9fff]
pci 0000:00:13.2: [1002:4396] type 0 class 0x000c03
pci 0000:00:13.2: reg 10: [mem 0xdf6f8c00-0xdf6f8cff]
pci 0000:00:13.2: supports D1 D2
pci 0000:00:13.2: PME# supported from D0 D1 D2 D3hot
pci 0000:00:13.2: PME# disabled
pci 0000:00:14.0: [1002:4385] type 0 class 0x000c05
pci 0000:00:14.1: [1002:439c] type 0 class 0x000101
pci 0000:00:14.1: reg 10: [io 0x0000-0x0007]
pci 0000:00:14.1: reg 14: [io 0x0000-0x0003]
pci 0000:00:14.1: reg 18: [io 0x0000-0x0007]
pci 0000:00:14.1: reg 1c: [io 0x0000-0x0003]
pci 0000:00:14.1: reg 20: [io 0xff00-0xff0f]
pci 0000:00:14.3: [1002:439d] type 0 class 0x000601
pci 0000:00:14.4: [1002:4384] type 1 class 0x000604
pci 0000:00:14.5: [1002:4399] type 0 class 0x000c03
pci 0000:00:14.5: reg 10: [mem 0xdf6fb000-0xdf6fbfff]
pci 0000:00:18.0: [1022:1200] type 0 class 0x000600
pci 0000:00:18.1: [1022:1201] type 0 class 0x000600
pci 0000:00:18.2: [1022:1202] type 0 class 0x000600
pci 0000:00:18.3: [1022:1203] type 0 class 0x000600
pci 0000:00:18.4: [1022:1204] type 0 class 0x000600
pci 0000:00:19.0: [1022:1200] type 0 class 0x000600
pci 0000:00:19.1: [1022:1201] type 0 class 0x000600
pci 0000:00:19.2: [1022:1202] type 0 class 0x000600
pci 0000:00:19.3: [1022:1203] type 0 class 0x000600
pci 0000:00:19.4: [1022:1204] type 0 class 0x000600
pci 0000:09:00.0: [111d:8018] type 1 class 0x000604
pci 0000:09:00.0: PME# supported from D0 D3hot D3cold
pci 0000:09:00.0: PME# disabled
pci 0000:00:02.0: PCI bridge to [bus 09-0c]
pci 0000:00:02.0: bridge window [io 0xd000-0xefff]
pci 0000:00:02.0: bridge window [mem 0xdfe00000-0xdfffffff]
pci 0000:00:02.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:0a:02.0: [111d:8018] type 1 class 0x000604
pci 0000:0a:02.0: PME# supported from D0 D3hot D3cold
pci 0000:0a:02.0: PME# disabled
pci 0000:0a:04.0: [111d:8018] type 1 class 0x000604
pci 0000:0a:04.0: PME# supported from D0 D3hot D3cold
pci 0000:0a:04.0: PME# disabled
pci 0000:09:00.0: PCI bridge to [bus 0a-0c]
pci 0000:09:00.0: bridge window [io 0xd000-0xefff]
pci 0000:09:00.0: bridge window [mem 0xdfe00000-0xdfffffff]
pci 0000:09:00.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:0c:00.0: [8086:10bc] type 0 class 0x000200
pci 0000:0c:00.0: reg 10: [mem 0xdffe0000-0xdfffffff]
pci 0000:0c:00.0: reg 14: [mem 0xdffc0000-0xdffdffff]
pci 0000:0c:00.0: reg 18: [io 0xe800-0xe81f]
pci 0000:0c:00.0: reg 30: [mem 0xdffa0000-0xdffbffff pref]
pci 0000:0c:00.0: PME# supported from D0 D3hot D3cold
pci 0000:0c:00.0: PME# disabled
pci 0000:0c:00.1: [8086:10bc] type 0 class 0x000200
pci 0000:0c:00.1: reg 10: [mem 0xdff80000-0xdff9ffff]
pci 0000:0c:00.1: reg 14: [mem 0xdff60000-0xdff7ffff]
pci 0000:0c:00.1: reg 18: [io 0xe400-0xe41f]
pci 0000:0c:00.1: reg 30: [mem 0xdff40000-0xdff5ffff pref]
pci 0000:0c:00.1: PME# supported from D0 D3hot D3cold
pci 0000:0c:00.1: PME# disabled
pci 0000:0c:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:0a:02.0: PCI bridge to [bus 0c-0c]
pci 0000:0a:02.0: bridge window [io 0xe000-0xefff]
pci 0000:0a:02.0: bridge window [mem 0xdff00000-0xdfffffff]
pci 0000:0a:02.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:0b:00.0: [8086:10bc] type 0 class 0x000200
pci 0000:0b:00.0: reg 10: [mem 0xdfee0000-0xdfefffff]
pci 0000:0b:00.0: reg 14: [mem 0xdfec0000-0xdfedffff]
pci 0000:0b:00.0: reg 18: [io 0xd800-0xd81f]
pci 0000:0b:00.0: reg 30: [mem 0xdfea0000-0xdfebffff pref]
pci 0000:0b:00.0: PME# supported from D0 D3hot
pci 0000:0b:00.0: PME# disabled
pci 0000:0b:00.1: [8086:10bc] type 0 class 0x000200
pci 0000:0b:00.1: reg 10: [mem 0xdfe80000-0xdfe9ffff]
pci 0000:0b:00.1: reg 14: [mem 0xdfe60000-0xdfe7ffff]
pci 0000:0b:00.1: reg 18: [io 0xd400-0xd41f]
pci 0000:0b:00.1: reg 30: [mem 0xdfe40000-0xdfe5ffff pref]
pci 0000:0b:00.1: PME# supported from D0 D3hot
pci 0000:0b:00.1: PME# disabled
pci 0000:0b:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:0a:04.0: PCI bridge to [bus 0b-0b]
pci 0000:0a:04.0: bridge window [io 0xd000-0xdfff]
pci 0000:0a:04.0: bridge window [mem 0xdfe00000-0xdfefffff]
pci 0000:0a:04.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:08:00.0: [8086:105e] type 0 class 0x000200
pci 0000:08:00.0: reg 10: [mem 0xdfde0000-0xdfdfffff]
pci 0000:08:00.0: reg 14: [mem 0xdfdc0000-0xdfddffff]
pci 0000:08:00.0: reg 18: [io 0xc800-0xc81f]
pci 0000:08:00.0: reg 30: [mem 0xdfda0000-0xdfdbffff pref]
pci 0000:08:00.0: PME# supported from D0 D3hot D3cold
pci 0000:08:00.0: PME# disabled
pci 0000:08:00.1: [8086:105e] type 0 class 0x000200
pci 0000:08:00.1: reg 10: [mem 0xdfd80000-0xdfd9ffff]
pci 0000:08:00.1: reg 14: [mem 0xdfd60000-0xdfd7ffff]
pci 0000:08:00.1: reg 18: [io 0xc400-0xc41f]
pci 0000:08:00.1: reg 30: [mem 0xdfd40000-0xdfd5ffff pref]
pci 0000:08:00.1: PME# supported from D0 D3hot D3cold
pci 0000:08:00.1: PME# disabled
pci 0000:08:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:00:04.0: PCI bridge to [bus 08-08]
pci 0000:00:04.0: bridge window [io 0xc000-0xcfff]
pci 0000:00:04.0: bridge window [mem 0xdfd00000-0xdfdfffff]
pci 0000:00:04.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:04:00.0: [111d:806a] type 1 class 0x000604
pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
pci 0000:04:00.0: PME# disabled
pci 0000:00:0b.0: PCI bridge to [bus 04-07]
pci 0000:00:0b.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:00:0b.0: bridge window [mem 0xdf900000-0xdfcfffff]
pci 0000:00:0b.0: bridge window [mem 0xdc000000-0xddffffff 64bit pref]
pci 0000:05:02.0: [111d:806a] type 1 class 0x000604
pci 0000:05:02.0: PME# supported from D0 D3hot D3cold
pci 0000:05:02.0: PME# disabled
pci 0000:05:04.0: [111d:806a] type 1 class 0x000604
pci 0000:05:04.0: PME# supported from D0 D3hot D3cold
pci 0000:05:04.0: PME# disabled
pci 0000:04:00.0: PCI bridge to [bus 05-07]
pci 0000:04:00.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:04:00.0: bridge window [mem 0xdf900000-0xdfcfffff]
pci 0000:04:00.0: bridge window [mem 0xdc000000-0xddffffff 64bit pref]
pci 0000:07:00.0: [14c1:0008] type 0 class 0x000200
pci 0000:07:00.0: reg 10: [mem 0xdd000000-0xddffffff 64bit pref]
pci 0000:07:00.0: reg 18: [mem 0xdfc00000-0xdfcfffff 64bit]
pci 0000:07:00.0: reg 30: [mem 0xdfb80000-0xdfbfffff pref]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:05:02.0: bridge window [mem 0xdfb00000-0xdfcfffff]
pci 0000:05:02.0: bridge window [mem 0xdd000000-0xddffffff 64bit pref]
pci 0000:06:00.0: [14c1:0008] type 0 class 0x000200
pci 0000:06:00.0: reg 10: [mem 0xdc000000-0xdcffffff 64bit pref]
pci 0000:06:00.0: reg 18: [mem 0xdfa00000-0xdfafffff 64bit]
pci 0000:06:00.0: reg 30: [mem 0xdf980000-0xdf9fffff pref]
pci 0000:05:04.0: PCI bridge to [bus 06-06]
pci 0000:05:04.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:05:04.0: bridge window [mem 0xdf900000-0xdfafffff]
pci 0000:05:04.0: bridge window [mem 0xdc000000-0xdcffffff 64bit pref]
pci 0000:03:00.0: [1000:0072] type 0 class 0x000107
pci 0000:03:00.0: reg 10: [io 0xb000-0xb0ff]
pci 0000:03:00.0: reg 14: [mem 0xdf83c000-0xdf83ffff 64bit]
pci 0000:03:00.0: reg 1c: [mem 0xdf840000-0xdf87ffff 64bit]
pci 0000:03:00.0: reg 30: [mem 0xdf880000-0xdf8fffff pref]
pci 0000:03:00.0: supports D1 D2
pci 0000:00:0c.0: PCI bridge to [bus 03-03]
pci 0000:00:0c.0: bridge window [io 0xb000-0xbfff]
pci 0000:00:0c.0: bridge window [mem 0xdf800000-0xdf8fffff]
pci 0000:00:0c.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:02:00.0: [8086:10c9] type 0 class 0x000200
pci 0000:02:00.0: reg 10: [mem 0xdf7e0000-0xdf7fffff]
pci 0000:02:00.0: reg 14: [mem 0xdf7c0000-0xdf7dffff]
pci 0000:02:00.0: reg 18: [io 0xa800-0xa81f]
pci 0000:02:00.0: reg 1c: [mem 0xdf79c000-0xdf79ffff]
pci 0000:02:00.0: reg 30: [mem 0xdf7a0000-0xdf7bffff pref]
pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
pci 0000:02:00.0: PME# disabled
pci 0000:02:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: [8086:10c9] type 0 class 0x000200
pci 0000:02:00.1: reg 10: [mem 0xdf760000-0xdf77ffff]
pci 0000:02:00.1: reg 14: [mem 0xdf740000-0xdf75ffff]
pci 0000:02:00.1: reg 18: [io 0xa400-0xa41f]
pci 0000:02:00.1: reg 1c: [mem 0xdf71c000-0xdf71ffff]
pci 0000:02:00.1: reg 30: [mem 0xdf720000-0xdf73ffff pref]
pci 0000:02:00.1: PME# supported from D0 D3hot D3cold
pci 0000:02:00.1: PME# disabled
pci 0000:02:00.1: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:00:0d.0: PCI bridge to [bus 02-02]
pci 0000:00:0d.0: bridge window [io 0xa000-0xafff]
pci 0000:00:0d.0: bridge window [mem 0xdf700000-0xdf7fffff]
pci 0000:00:0d.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:01:04.0: [102b:0532] type 0 class 0x000300
pci 0000:01:04.0: reg 10: [mem 0xdb000000-0xdbffffff pref]
pci 0000:01:04.0: reg 14: [mem 0xde7fc000-0xde7fffff]
pci 0000:01:04.0: reg 18: [mem 0xde800000-0xdeffffff]
pci 0000:00:14.4: PCI bridge to [bus 01-01] (subtractive decode)
pci 0000:00:14.4: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:00:14.4: bridge window [mem 0xde700000-0xdeffffff]
pci 0000:00:14.4: bridge window [mem 0xdb000000-0xdbffffff pref]
pci 0000:00:14.4: bridge window [io 0x0000-0x03af] (subtractive decode)
pci 0000:00:14.4: bridge window [io 0x03e0-0x0cf7] (subtractive decode)
pci 0000:00:14.4: bridge window [io 0x03b0-0x03bb] (subtractive decode)
pci 0000:00:14.4: bridge window [io 0x03c0-0x03df] (subtractive decode)
pci 0000:00:14.4: bridge window [io 0x0d00-0xffff] (subtractive decode)
pci 0000:00:14.4: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
pci 0000:00:14.4: bridge window [mem 0x000d0000-0x000dffff] (subtractive decode)
pci 0000:00:14.4: bridge window [mem 0xde000000-0xdfffffff] (subtractive decode)
pci 0000:00:14.4: bridge window [mem 0xdb000000-0xddffffff] (subtractive decode)
pci 0000:00:14.4: bridge window [mem 0xfed40000-0xfed44fff] (subtractive decode)
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PC02._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PC04._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PC0B._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0PC._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PC0C._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PC0D._PRT]
pci0000:00: Requesting ACPI _OSC control (0x1d)
pci0000:00: ACPI _OSC control (0x1d) granted
ACPI: PCI Interrupt Link [LNKA] (IRQs 4 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKB] (IRQs 4 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKC] (IRQs 4 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKD] (IRQs 4 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKE] (IRQs 4 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKF] (IRQs 4 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKG] (IRQs 4 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKH] (IRQs 4 7 10 11 12 14 15) *0, disabled.
vgaarb: device added: PCI:0000:01:04.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: loaded
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
PCI: pci_cache_line_size set to 64 bytes
reserve RAM buffer: 000000000009dc00 - 000000000009ffff
reserve RAM buffer: 00000000d7e80000 - 00000000d7ffffff
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0
hpet0: 4 comparators, 32-bit 14.318180 MHz counter
Switching to clocksource hpet
Switched to NOHz mode on CPU #0
Switched to NOHz mode on CPU #6
Switched to NOHz mode on CPU #1
Switched to NOHz mode on CPU #8
Switched to NOHz mode on CPU #5
Switched to NOHz mode on CPU #3
Switched to NOHz mode on CPU #7
Switched to NOHz mode on CPU #4
Switched to NOHz mode on CPU #2
Switched to NOHz mode on CPU #9
Switched to NOHz mode on CPU #10
Switched to NOHz mode on CPU #11
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp 00:00: [bus 00-0c]
pnp 00:00: [io 0x0cf8-0x0cff]
pnp 00:00: [io 0x0000-0x03af window]
pnp 00:00: [io 0x03e0-0x0cf7 window]
pnp 00:00: [io 0x03b0-0x03bb window]
pnp 00:00: [io 0x03c0-0x03df window]
pnp 00:00: [io 0x0d00-0xffff window]
pnp 00:00: [mem 0x000a0000-0x000bffff window]
pnp 00:00: [mem 0x000d0000-0x000dffff window]
pnp 00:00: [mem 0xde000000-0xdfffffff window]
pnp 00:00: [mem 0xdb000000-0xddffffff window]
pnp 00:00: [mem 0xfed40000-0xfed44fff]
pnp 00:00: Plug and Play ACPI device, IDs PNP0a08 PNP0a03 (active)
pnp 00:01: [mem 0x00000000-0xffffffffffffffff disabled]
pnp 00:01: [mem 0x00000000-0xffffffffffffffff disabled]
system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:02: [mem 0x00000000-0xffffffffffffffff disabled]
system 00:02: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:03: [dma 4]
pnp 00:03: [io 0x0000-0x000f]
pnp 00:03: [io 0x0081-0x0083]
pnp 00:03: [io 0x0087]
pnp 00:03: [io 0x0089-0x008b]
pnp 00:03: [io 0x008f]
pnp 00:03: [io 0x00c0-0x00df]
pnp 00:03: Plug and Play ACPI device, IDs PNP0200 (active)
pnp 00:04: [io 0x0070-0x0071]
pnp 00:04: [irq 8]
pnp 00:04: Plug and Play ACPI device, IDs PNP0b00 (active)
pnp 00:05: [io 0x0061]
pnp 00:05: Plug and Play ACPI device, IDs PNP0800 (active)
pnp 00:06: [io 0x00f0-0x00ff]
pnp 00:06: [irq 13]
pnp 00:06: Plug and Play ACPI device, IDs PNP0c04 (active)
pnp 00:07: [mem 0xfed00000-0xfed003ff]
pnp 00:07: Plug and Play ACPI device, IDs PNP0103 (active)
pnp 00:08: [io 0x0060]
pnp 00:08: [io 0x0064]
pnp 00:08: [mem 0xfec00000-0xfec00fff]
pnp 00:08: [mem 0xfee00000-0xfee00fff]
system 00:08: [mem 0xfec00000-0xfec00fff] could not be reserved
system 00:08: [mem 0xfee00000-0xfee00fff] has been reserved
system 00:08: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:09: [io 0x0010-0x001f]
pnp 00:09: [io 0x0022-0x003f]
pnp 00:09: [io 0x0062-0x0063]
pnp 00:09: [io 0x0065-0x006f]
pnp 00:09: [io 0x0072-0x007f]
pnp 00:09: [io 0x0080]
pnp 00:09: [io 0x0084-0x0086]
pnp 00:09: [io 0x0088]
pnp 00:09: [io 0x008c-0x008e]
pnp 00:09: [io 0x0090-0x009f]
pnp 00:09: [io 0x00a2-0x00bf]
pnp 00:09: [io 0x00b1]
pnp 00:09: [io 0x00e0-0x00ef]
pnp 00:09: [io 0x0ca2-0x0ca3]
pnp 00:09: [io 0x0550-0x0551]
pnp 00:09: [io 0x04d0-0x04d1]
pnp 00:09: [io 0x040b]
pnp 00:09: [io 0x04d6]
pnp 00:09: [io 0x0c00-0x0c01]
pnp 00:09: [io 0x0c14]
pnp 00:09: [io 0x0c50-0x0c51]
pnp 00:09: [io 0x0c52]
pnp 00:09: [io 0x0c6c]
pnp 00:09: [io 0x0c6f]
pnp 00:09: [io 0x0cd0-0x0cd1]
pnp 00:09: [io 0x0cd2-0x0cd3]
pnp 00:09: [io 0x0cd4-0x0cd5]
pnp 00:09: [io 0x0cd6-0x0cd7]
pnp 00:09: [io 0x0cd8-0x0cdf]
pnp 00:09: [io 0x0800-0x089f]
pnp 00:09: [io 0x0000-0xffffffffffffffff disabled]
pnp 00:09: [io 0x0b00-0x0b0f]
pnp 00:09: [io 0x0b20-0x0b3f]
pnp 00:09: [io 0x0900-0x090f]
pnp 00:09: [io 0x0910-0x091f]
pnp 00:09: [io 0xfe00-0xfefe]
pnp 00:09: [io 0x0060]
pnp 00:09: [io 0x0064]
pnp 00:09: [mem 0xffb80000-0xffbfffff]
pnp 00:09: [mem 0xfec10000-0xfec1001f]
system 00:09: [io 0x0ca2-0x0ca3] has been reserved
system 00:09: [io 0x0550-0x0551] has been reserved
system 00:09: [io 0x04d0-0x04d1] has been reserved
system 00:09: [io 0x040b] has been reserved
system 00:09: [io 0x04d6] has been reserved
system 00:09: [io 0x0c00-0x0c01] has been reserved
system 00:09: [io 0x0c14] has been reserved
system 00:09: [io 0x0c50-0x0c51] has been reserved
system 00:09: [io 0x0c52] has been reserved
system 00:09: [io 0x0c6c] has been reserved
system 00:09: [io 0x0c6f] has been reserved
system 00:09: [io 0x0cd0-0x0cd1] has been reserved
system 00:09: [io 0x0cd2-0x0cd3] has been reserved
system 00:09: [io 0x0cd4-0x0cd5] has been reserved
system 00:09: [io 0x0cd6-0x0cd7] has been reserved
system 00:09: [io 0x0cd8-0x0cdf] has been reserved
system 00:09: [io 0x0800-0x089f] has been reserved
system 00:09: [io 0x0b00-0x0b0f] has been reserved
system 00:09: [io 0x0b20-0x0b3f] has been reserved
system 00:09: [io 0x0900-0x090f] has been reserved
system 00:09: [io 0x0910-0x091f] has been reserved
system 00:09: [io 0xfe00-0xfefe] has been reserved
system 00:09: [mem 0xffb80000-0xffbfffff] has been reserved
system 00:09: [mem 0xfec10000-0xfec1001f] has been reserved
system 00:09: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:0a: [io 0x03f8-0x03ff]
pnp 00:0a: [irq 4]
pnp 00:0a: [dma 0 disabled]
pnp 00:0a: Plug and Play ACPI device, IDs PNP0501 (active)
pnp 00:0b: [io 0x02f8-0x02ff]
pnp 00:0b: [irq 3]
pnp 00:0b: [dma 0 disabled]
pnp 00:0b: Plug and Play ACPI device, IDs PNP0501 (active)
pnp 00:0c: [io 0x0000-0xffffffffffffffff disabled]
pnp 00:0c: [io 0x0a00-0x0a0f]
pnp 00:0c: [io 0x0a10-0x0a1f]
system 00:0c: [io 0x0a00-0x0a0f] has been reserved
system 00:0c: [io 0x0a10-0x0a1f] has been reserved
system 00:0c: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:0d: [io 0x03e8-0x03ef]
pnp 00:0d: [irq 7]
pnp 00:0d: [dma 0 disabled]
pnp 00:0d: Plug and Play ACPI device, IDs PNP0501 (active)
pnp 00:0e: [io 0x164e-0x164f]
pnp 00:0e: [io 0x0000-0xffffffffffffffff disabled]
system 00:0e: [io 0x164e-0x164f] has been reserved
system 00:0e: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:0f: [mem 0xe0000000-0xefffffff]
system 00:0f: [mem 0xe0000000-0xefffffff] has been reserved
system 00:0f: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:10: [mem 0x000c0000-0x000cffff]
pnp 00:10: [mem 0x000e0000-0x000fffff]
pnp 00:10: [mem 0xfec00000-0xffffffff]
system 00:10: [mem 0x000c0000-0x000cffff] has been reserved
system 00:10: [mem 0x000e0000-0x000fffff] could not be reserved
system 00:10: [mem 0xfec00000-0xffffffff] could not be reserved
system 00:10: Plug and Play ACPI device, IDs PNP0c01 (active)
pnp: PnP ACPI: found 17 devices
ACPI: ACPI bus type pnp unregistered
pci 0000:0a:02.0: PCI bridge to [bus 0c-0c]
pci 0000:0a:02.0: bridge window [io 0xe000-0xefff]
pci 0000:0a:02.0: bridge window [mem 0xdff00000-0xdfffffff]
pci 0000:0a:02.0: bridge window [mem pref disabled]
pci 0000:0a:04.0: PCI bridge to [bus 0b-0b]
pci 0000:0a:04.0: bridge window [io 0xd000-0xdfff]
pci 0000:0a:04.0: bridge window [mem 0xdfe00000-0xdfefffff]
pci 0000:0a:04.0: bridge window [mem pref disabled]
pci 0000:09:00.0: PCI bridge to [bus 0a-0c]
pci 0000:09:00.0: bridge window [io 0xd000-0xefff]
pci 0000:09:00.0: bridge window [mem 0xdfe00000-0xdfffffff]
pci 0000:09:00.0: bridge window [mem pref disabled]
pci 0000:00:02.0: PCI bridge to [bus 09-0c]
pci 0000:00:02.0: bridge window [io 0xd000-0xefff]
pci 0000:00:02.0: bridge window [mem 0xdfe00000-0xdfffffff]
pci 0000:00:02.0: bridge window [mem pref disabled]
pci 0000:00:04.0: PCI bridge to [bus 08-08]
pci 0000:00:04.0: bridge window [io 0xc000-0xcfff]
pci 0000:00:04.0: bridge window [mem 0xdfd00000-0xdfdfffff]
pci 0000:00:04.0: bridge window [mem pref disabled]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0: bridge window [io disabled]
pci 0000:05:02.0: bridge window [mem 0xdfb00000-0xdfcfffff]
pci 0000:05:02.0: bridge window [mem 0xdd000000-0xddffffff 64bit pref]
pci 0000:05:04.0: PCI bridge to [bus 06-06]
pci 0000:05:04.0: bridge window [io disabled]
pci 0000:05:04.0: bridge window [mem 0xdf900000-0xdfafffff]
pci 0000:05:04.0: bridge window [mem 0xdc000000-0xdcffffff 64bit pref]
pci 0000:04:00.0: PCI bridge to [bus 05-07]
pci 0000:04:00.0: bridge window [io disabled]
pci 0000:04:00.0: bridge window [mem 0xdf900000-0xdfcfffff]
pci 0000:04:00.0: bridge window [mem 0xdc000000-0xddffffff 64bit pref]
pci 0000:00:0b.0: PCI bridge to [bus 04-07]
pci 0000:00:0b.0: bridge window [io disabled]
pci 0000:00:0b.0: bridge window [mem 0xdf900000-0xdfcfffff]
pci 0000:00:0b.0: bridge window [mem 0xdc000000-0xddffffff 64bit pref]
pci 0000:00:0c.0: PCI bridge to [bus 03-03]
pci 0000:00:0c.0: bridge window [io 0xb000-0xbfff]
pci 0000:00:0c.0: bridge window [mem 0xdf800000-0xdf8fffff]
pci 0000:00:0c.0: bridge window [mem pref disabled]
pci 0000:02:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: BAR 7: can't assign mem (size 0x20000)
pci 0000:02:00.0: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.0: BAR 10: can't assign mem (size 0x20000)
pci 0000:02:00.1: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: reg 184: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: BAR 7: can't assign mem (size 0x20000)
pci 0000:02:00.1: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: reg 190: [mem 0x00000000-0x00003fff 64bit]
pci 0000:02:00.1: BAR 10: can't assign mem (size 0x20000)
pci 0000:00:0d.0: PCI bridge to [bus 02-02]
pci 0000:00:0d.0: bridge window [io 0xa000-0xafff]
pci 0000:00:0d.0: bridge window [mem 0xdf700000-0xdf7fffff]
pci 0000:00:0d.0: bridge window [mem pref disabled]
pci 0000:00:14.4: PCI bridge to [bus 01-01]
pci 0000:00:14.4: bridge window [io disabled]
pci 0000:00:14.4: bridge window [mem 0xde700000-0xdeffffff]
pci 0000:00:14.4: bridge window [mem 0xdb000000-0xdbffffff pref]
pci 0000:00:02.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18
pci 0000:00:02.0: setting latency timer to 64
pci 0000:09:00.0: setting latency timer to 64
pci 0000:0a:02.0: setting latency timer to 64
pci 0000:0a:04.0: setting latency timer to 64
pci 0000:00:04.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:04.0: setting latency timer to 64
pci 0000:00:0b.0: PCI INT A -> GSI 19 (level, low) -> IRQ 19
pci 0000:00:0b.0: setting latency timer to 64
pci 0000:04:00.0: setting latency timer to 64
pci 0000:05:02.0: setting latency timer to 64
pci 0000:05:04.0: setting latency timer to 64
pci 0000:00:0c.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:0c.0: setting latency timer to 64
pci 0000:00:0d.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
pci 0000:00:0d.0: setting latency timer to 64
pci_bus 0000:00: resource 4 [io 0x0000-0x03af]
pci_bus 0000:00: resource 5 [io 0x03e0-0x0cf7]
pci_bus 0000:00: resource 6 [io 0x03b0-0x03bb]
pci_bus 0000:00: resource 7 [io 0x03c0-0x03df]
pci_bus 0000:00: resource 8 [io 0x0d00-0xffff]
pci_bus 0000:00: resource 9 [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: resource 10 [mem 0x000d0000-0x000dffff]
pci_bus 0000:00: resource 11 [mem 0xde000000-0xdfffffff]
pci_bus 0000:00: resource 12 [mem 0xdb000000-0xddffffff]
pci_bus 0000:00: resource 13 [mem 0xfed40000-0xfed44fff]
pci_bus 0000:09: resource 0 [io 0xd000-0xefff]
pci_bus 0000:09: resource 1 [mem 0xdfe00000-0xdfffffff]
pci_bus 0000:0a: resource 0 [io 0xd000-0xefff]
pci_bus 0000:0a: resource 1 [mem 0xdfe00000-0xdfffffff]
pci_bus 0000:0c: resource 0 [io 0xe000-0xefff]
pci_bus 0000:0c: resource 1 [mem 0xdff00000-0xdfffffff]
pci_bus 0000:0b: resource 0 [io 0xd000-0xdfff]
pci_bus 0000:0b: resource 1 [mem 0xdfe00000-0xdfefffff]
pci_bus 0000:08: resource 0 [io 0xc000-0xcfff]
pci_bus 0000:08: resource 1 [mem 0xdfd00000-0xdfdfffff]
pci_bus 0000:04: resource 1 [mem 0xdf900000-0xdfcfffff]
pci_bus 0000:04: resource 2 [mem 0xdc000000-0xddffffff 64bit pref]
pci_bus 0000:05: resource 1 [mem 0xdf900000-0xdfcfffff]
pci_bus 0000:05: resource 2 [mem 0xdc000000-0xddffffff 64bit pref]
pci_bus 0000:07: resource 1 [mem 0xdfb00000-0xdfcfffff]
pci_bus 0000:07: resource 2 [mem 0xdd000000-0xddffffff 64bit pref]
pci_bus 0000:06: resource 1 [mem 0xdf900000-0xdfafffff]
pci_bus 0000:06: resource 2 [mem 0xdc000000-0xdcffffff 64bit pref]
pci_bus 0000:03: resource 0 [io 0xb000-0xbfff]
pci_bus 0000:03: resource 1 [mem 0xdf800000-0xdf8fffff]
pci_bus 0000:02: resource 0 [io 0xa000-0xafff]
pci_bus 0000:02: resource 1 [mem 0xdf700000-0xdf7fffff]
pci_bus 0000:01: resource 1 [mem 0xde700000-0xdeffffff]
pci_bus 0000:01: resource 2 [mem 0xdb000000-0xdbffffff pref]
pci_bus 0000:01: resource 4 [io 0x0000-0x03af]
pci_bus 0000:01: resource 5 [io 0x03e0-0x0cf7]
pci_bus 0000:01: resource 6 [io 0x03b0-0x03bb]
pci_bus 0000:01: resource 7 [io 0x03c0-0x03df]
pci_bus 0000:01: resource 8 [io 0x0d00-0xffff]
pci_bus 0000:01: resource 9 [mem 0x000a0000-0x000bffff]
pci_bus 0000:01: resource 10 [mem 0x000d0000-0x000dffff]
pci_bus 0000:01: resource 11 [mem 0xde000000-0xdfffffff]
pci_bus 0000:01: resource 12 [mem 0xdb000000-0xddffffff]
pci_bus 0000:01: resource 13 [mem 0xfed40000-0xfed44fff]
NET: Registered protocol family 2
IP route cache hash table entries: 524288 (order: 10, 4194304 bytes)
TCP established hash table entries: 524288 (order: 11, 8388608 bytes)
TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
TCP: Hash tables configured (established 524288 bind 65536)
TCP reno registered
UDP hash table entries: 8192 (order: 6, 262144 bytes)
UDP-Lite hash table entries: 8192 (order: 6, 262144 bytes)
NET: Registered protocol family 1
pci 0000:01:04.0: Boot video device
PCI: CLS 64 bytes, default 64
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 11900k freed
PCI-DMA: Disabling AGP.
PCI-DMA: aperture base @ c0000000 size 65536 KB
PCI-DMA: using GART IOMMU.
PCI-DMA: Reserving 64MB of IOMMU area in the AGP aperture
HugeTLB registered 2 MB page size, pre-allocated 4096 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
msgmni has been set to 32146
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
pcieport 0000:00:02.0: setting latency timer to 64
pcieport 0000:00:02.0: irq 40 for MSI/MSI-X
pcieport 0000:00:04.0: setting latency timer to 64
pcieport 0000:00:04.0: irq 41 for MSI/MSI-X
pcieport 0000:00:0b.0: setting latency timer to 64
pcieport 0000:00:0b.0: irq 42 for MSI/MSI-X
pcieport 0000:00:0c.0: setting latency timer to 64
pcieport 0000:00:0c.0: irq 43 for MSI/MSI-X
pcieport 0000:00:0d.0: setting latency timer to 64
pcieport 0000:00:0d.0: irq 44 for MSI/MSI-X
pcieport 0000:09:00.0: setting latency timer to 64
pcieport 0000:0a:02.0: setting latency timer to 64
pcieport 0000:0a:02.0: irq 45 for MSI/MSI-X
pcieport 0000:0a:04.0: setting latency timer to 64
pcieport 0000:0a:04.0: irq 46 for MSI/MSI-X
pcieport 0000:04:00.0: setting latency timer to 64
pcieport 0000:05:02.0: setting latency timer to 64
pcieport 0000:05:02.0: irq 47 for MSI/MSI-X
pcieport 0000:05:04.0: setting latency timer to 64
pcieport 0000:05:04.0: irq 48 for MSI/MSI-X
pcieport 0000:00:02.0: Signaling PME through PCIe PME interrupt
pcieport 0000:09:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:02.0: Signaling PME through PCIe PME interrupt
pci 0000:0c:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0c:00.1: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:04.0: Signaling PME through PCIe PME interrupt
pci 0000:0b:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0b:00.1: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:02.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:04.0: Signaling PME through PCIe PME interrupt
pci 0000:08:00.0: Signaling PME through PCIe PME interrupt
pci 0000:08:00.1: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:04.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:0b.0: Signaling PME through PCIe PME interrupt
pcieport 0000:04:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:05:02.0: Signaling PME through PCIe PME interrupt
pci 0000:07:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:05:04.0: Signaling PME through PCIe PME interrupt
pci 0000:06:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:0b.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:0c.0: Signaling PME through PCIe PME interrupt
pci 0000:03:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:0c.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:0d.0: Signaling PME through PCIe PME interrupt
pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
pci 0000:02:00.1: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:0d.0:pcie01: service driver pcie_pme loaded
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
input: Power Button as /devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0
ACPI: Power Button [PWRB]
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
ACPI: Power Button [PWRF]
ACPI: acpi_idle registered with cpuidle
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
Refined TSC clocksource calibration: 2200.025 MHz.
Switching to clocksource tsc
serial8250: ttyS2 at I/O 0x3e8 (irq = 7) is a 16550A
00:0a: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:0b: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
00:0d: ttyS2 at I/O 0x3e8 (irq = 7) is a 16550A
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
brd: module loaded
loop: module loaded
Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci_hcd 0000:00:12.2: PCI INT B -> GSI 17 (level, low) -> IRQ 17
ehci_hcd 0000:00:12.2: EHCI Host Controller
ehci_hcd 0000:00:12.2: new USB bus registered, assigned bus number 1
ehci_hcd 0000:00:12.2: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround
ehci_hcd 0000:00:12.2: debug port 1
ehci_hcd 0000:00:12.2: irq 17, io mem 0xdf6f8800
ehci_hcd 0000:00:12.2: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 2.6.39.4 ehci_hcd
usb usb1: SerialNumber: 0000:00:12.2
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 6 ports detected
ehci_hcd 0000:00:13.2: PCI INT B -> GSI 19 (level, low) -> IRQ 19
ehci_hcd 0000:00:13.2: EHCI Host Controller
ehci_hcd 0000:00:13.2: new USB bus registered, assigned bus number 2
ehci_hcd 0000:00:13.2: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround
ehci_hcd 0000:00:13.2: debug port 1
ehci_hcd 0000:00:13.2: irq 19, io mem 0xdf6f8c00
ehci_hcd 0000:00:13.2: USB 2.0 started, EHCI 1.00
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: EHCI Host Controller
usb usb2: Manufacturer: Linux 2.6.39.4 ehci_hcd
usb usb2: SerialNumber: 0000:00:13.2
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 6 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ohci_hcd 0000:00:12.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
ohci_hcd 0000:00:12.0: OHCI Host Controller
ohci_hcd 0000:00:12.0: new USB bus registered, assigned bus number 3
ohci_hcd 0000:00:12.0: irq 16, io mem 0xdf6f7000
usb usb3: New USB device found, idVendor=1d6b, idProduct=0001
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: OHCI Host Controller
usb usb3: Manufacturer: Linux 2.6.39.4 ohci_hcd
usb usb3: SerialNumber: 0000:00:12.0
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 3 ports detected
ohci_hcd 0000:00:12.1: PCI INT A -> GSI 16 (level, low) -> IRQ 16
ohci_hcd 0000:00:12.1: OHCI Host Controller
ohci_hcd 0000:00:12.1: new USB bus registered, assigned bus number 4
ohci_hcd 0000:00:12.1: irq 16, io mem 0xdf6f6000
usb usb4: New USB device found, idVendor=1d6b, idProduct=0001
usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb4: Product: OHCI Host Controller
usb usb4: Manufacturer: Linux 2.6.39.4 ohci_hcd
usb usb4: SerialNumber: 0000:00:12.1
hub 4-0:1.0: USB hub found
hub 4-0:1.0: 3 ports detected
ohci_hcd 0000:00:13.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18
ohci_hcd 0000:00:13.0: OHCI Host Controller
ohci_hcd 0000:00:13.0: new USB bus registered, assigned bus number 5
ohci_hcd 0000:00:13.0: irq 18, io mem 0xdf6fa000
usb usb5: New USB device found, idVendor=1d6b, idProduct=0001
usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb5: Product: OHCI Host Controller
usb usb5: Manufacturer: Linux 2.6.39.4 ohci_hcd
usb usb5: SerialNumber: 0000:00:13.0
hub 5-0:1.0: USB hub found
hub 5-0:1.0: 3 ports detected
ohci_hcd 0000:00:13.1: PCI INT A -> GSI 18 (level, low) -> IRQ 18
ohci_hcd 0000:00:13.1: OHCI Host Controller
ohci_hcd 0000:00:13.1: new USB bus registered, assigned bus number 6
ohci_hcd 0000:00:13.1: irq 18, io mem 0xdf6f9000
usb usb6: New USB device found, idVendor=1d6b, idProduct=0001
usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb6: Product: OHCI Host Controller
usb usb6: Manufacturer: Linux 2.6.39.4 ohci_hcd
usb usb6: SerialNumber: 0000:00:13.1
hub 6-0:1.0: USB hub found
hub 6-0:1.0: 3 ports detected
ohci_hcd 0000:00:14.5: PCI INT C -> GSI 18 (level, low) -> IRQ 18
ohci_hcd 0000:00:14.5: OHCI Host Controller
ohci_hcd 0000:00:14.5: new USB bus registered, assigned bus number 7
ohci_hcd 0000:00:14.5: irq 18, io mem 0xdf6fb000
usb usb7: New USB device found, idVendor=1d6b, idProduct=0001
usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb7: Product: OHCI Host Controller
usb usb7: Manufacturer: Linux 2.6.39.4 ohci_hcd
usb usb7: SerialNumber: 0000:00:14.5
hub 7-0:1.0: USB hub found
hub 7-0:1.0: 2 ports detected
uhci_hcd: USB Universal Host Controller Interface driver
i8042: PNP: No PS/2 controller found. Probing ports directly.
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mousedev: PS/2 mouse device common for all mice
rtc_cmos 00:04: RTC can wake from S4
rtc_cmos 00:04: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one month, y3k, 114 bytes nvram, hpet irqs
cpuidle: using governor ladder
cpuidle: using governor menu
EFI Variables Facility v0.08 2004-May-17
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Registering the dns_resolver key type
registered taskstats version 1
IMA: No TPM chip found, activating TPM-bypass!
rtc_cmos 00:04: setting system clock to 2011-10-03 09:10:37 UTC (1317633037)
Initializing network drop monitor service
Freeing unused kernel memory: 1476k freed
Write protecting the kernel read-only data: 10240k
Freeing unused kernel memory: 1612k freed
Freeing unused kernel memory: 1928k freed
dracut: dracut-004-33.2.el6_0
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.20.0-ioctl (2011-02-02) initialised: dm-devel@redhat.com
udev: starting version 147
udevd (160): /proc/160/oom_adj is deprecated, please use /proc/160/oom_score_adj instead.
dracut: Starting plymouth daemon
mpt2sas version 08.100.00.00 loaded
scsi0 : Fusion MPT SAS Host
mpt2sas 0000:03:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
mpt2sas 0000:03:00.0: setting latency timer to 64
mpt2sas0: 64 BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (16463928 kB)
mpt2sas 0000:03:00.0: irq 49 for MSI/MSI-X
mpt2sas0: PCI-MSI-X enabled: IRQ 49
mpt2sas0: iomem(0x00000000df83c000), mapped(0xffffc90001878000), size(16384)
mpt2sas0: ioport(0x000000000000b000), size(256)
usb 7-1: new full speed USB device number 2 using ohci_hcd
mpt2sas0: sending diag reset !!
usb 7-1: New USB device found, idVendor=0557, idProduct=2221
usb 7-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 7-1: Product: Hermon USB hidmouse Device
usb 7-1: Manufacturer: Winbond Electronics Corp
input: Winbond Electronics Corp Hermon USB hidmouse Device as /devices/pci0000:00/0000:00:14.5/usb7/7-1/7-1:1.0/input/input2
generic-usb 0003:0557:2221.0001: input,hidraw0: USB HID v1.00 Mouse [Winbond Electronics Corp Hermon USB hidmouse Device] on usb-0000:00:14.5-1/input0
input: Winbond Electronics Corp Hermon USB hidmouse Device as /devices/pci0000:00/0000:00:14.5/usb7/7-1/7-1:1.1/input/input3
generic-usb 0003:0557:2221.0002: input,hidraw1: USB HID v1.00 Keyboard [Winbond Electronics Corp Hermon USB hidmouse Device] on usb-0000:00:14.5-1/input1
mpt2sas0: diag reset: SUCCESS
mpt2sas0: Allocated physical memory: size(6835 kB)
mpt2sas0: Current Controller Queue Depth(3034), Max Controller Queue Depth(3167)
mpt2sas0: Scatter Gather Elements per IO(128)
mpt2sas0: LSISAS2008: FWVersion(02.00.50.00), ChipRevision(0x02), BiosVersion(07.01.01.00)
mpt2sas0: Protocol=(Initiator,Target), Capabilities=(Raid,TLR,EEDP,Snapshot Buffer,Diag Trace Buffer,Task Set Full,NCQ)
mpt2sas0: sending port enable !!
mpt2sas0: host_add: handle(0x0001), sas_addr(0x50030480003a2760), phys(8)
mpt2sas0: port enable: SUCCESS
scsi 0:0:0:0: Direct-Access ATA WDC WD3000HLFS-0 4V02 PQ: 0 ANSI: 5
scsi 0:0:0:0: SATA: handle(0x0009), sas_addr(0x4433221100000000), phy(0), device_name(0x4ee0500161d7561b)
scsi 0:0:0:0: SATA: enclosure_logical_id(0x50030480003a2760), slot(0)
scsi 0:0:0:0: atapi(n), ncq(y), asyn_notify(n), smart(y), fua(y), sw_preserve(y)
scsi 0:0:0:0: qdepth(32), tagged(1), simple(0), ordered(0), scsi_level(6), cmd_que(1)
scsi 0:0:1:0: Direct-Access ATA WDC WD20EARS-00S 0A80 PQ: 0 ANSI: 5
scsi 0:0:1:0: SATA: handle(0x000a), sas_addr(0x4433221104000000), phy(4), device_name(0x4ee2500145735934)
scsi 0:0:1:0: SATA: enclosure_logical_id(0x50030480003a2760), slot(4)
scsi 0:0:1:0: atapi(n), ncq(y), asyn_notify(n), smart(y), fua(y), sw_preserve(y)
scsi 0:0:1:0: qdepth(32), tagged(1), simple(0), ordered(0), scsi_level(6), cmd_que(1)
ahci 0000:00:11.0: version 3.0
ahci 0000:00:11.0: PCI INT A -> GSI 22 (level, low) -> IRQ 22
ahci 0000:00:11.0: AHCI 0001.0100 32 slots 4 ports 3 Gbps 0xf impl SATA mode
ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp pio slum part ccc
scsi1 : ahci
scsi2 : ahci
scsi3 : ahci
scsi4 : ahci
ata1: SATA max UDMA/133 abar m1024@0xdf6f8400 port 0xdf6f8500 irq 22
ata2: SATA max UDMA/133 abar m1024@0xdf6f8400 port 0xdf6f8580 irq 22
ata3: SATA max UDMA/133 abar m1024@0xdf6f8400 port 0xdf6f8600 irq 22
ata4: SATA max UDMA/133 abar m1024@0xdf6f8400 port 0xdf6f8680 irq 22
ata3: SATA link down (SStatus 0 SControl 300)
ata2: SATA link down (SStatus 0 SControl 300)
ata1: SATA link down (SStatus 0 SControl 300)
ata4: SATA link down (SStatus 0 SControl 300)
pata_atiixp 0000:00:14.1: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pata_atiixp 0000:00:14.1: setting latency timer to 64
scsi5 : pata_atiixp
scsi6 : pata_atiixp
ata5: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0xff00 irq 14
ata6: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0xff08 irq 15
sd 0:0:1:0: [sdb] 3907029168 512-byte logical blocks: (2.00 TB/1.81 TiB)
sd 0:0:0:0: [sda] 586072368 512-byte logical blocks: (300 GB/279 GiB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 73 00 00 08
sd 0:0:1:0: [sdb] Write Protect is off
sd 0:0:1:0: [sdb] Mode Sense: 73 00 00 08
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
sd 0:0:1:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
sda: sda1 sda2 sda3
sd 0:0:0:0: [sda] Attached SCSI disk
sdb: sdb1 sdb2 sdb3 sdb4 < sdb5 sdb6 sdb7 >
sd 0:0:1:0: [sdb] Attached SCSI disk
dracut: Scanning devices sda2 sdb2 sdb5 sdb7 for LVM volume groups
dracut: Reading all physical volumes. This may take a while...
dracut: Found volume group "vg02" using metadata type lvm2
dracut: Found volume group "vg01" using metadata type lvm2
dracut: Found volume group "vg09" using metadata type lvm2
dracut: Found volume group "vg00" using metadata type lvm2
dracut: 1 logical volume(s) in volume group "vg02" now active
dracut: 1 logical volume(s) in volume group "vg01" now active
dracut: 3 logical volume(s) in volume group "vg09" now active
dracut: 4 logical volume(s) in volume group "vg00" now active
EXT4-fs (dm-8): mounted filesystem with ordered data mode. Opts: (null)
dracut: Mounted root filesystem /dev/mapper/vg00-lv06
dracut: Loading SELinux policy
dracut: /sbin/load_policy: Can't load policy: No such device
dracut: Switching root
udev: starting version 147
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:1:0: Attached scsi generic sg1 type 0
piix4_smbus 0000:00:14.0: SMBus Host Controller at 0xb00, revision 0
MCE: In-kernel MCE decoding enabled.
EDAC MC: Ver: 2.1.0 Oct 1 2011
AMD64 EDAC driver v3.4.0
EDAC amd64: DRAM ECC enabled.
EDAC amd64: F10h detected (node 0).
EDAC MC: DCT0 chip selects:
EDAC amd64: MC: 0: 1024MB 1: 1024MB
EDAC amd64: MC: 2: 1024MB 3: 1024MB
EDAC amd64: MC: 4: 0MB 5: 0MB
EDAC amd64: MC: 6: 0MB 7: 0MB
EDAC MC: DCT1 chip selects:
EDAC amd64: MC: 0: 1024MB 1: 1024MB
EDAC amd64: MC: 2: 1024MB 3: 1024MB
EDAC amd64: MC: 4: 0MB 5: 0MB
EDAC amd64: MC: 6: 0MB 7: 0MB
EDAC amd64: using x8 syndromes.
EDAC amd64: MCT channel count: 2
EDAC amd64: CS0: Unbuffered DDR3 RAM
EDAC amd64: CS1: Unbuffered DDR3 RAM
EDAC amd64: CS2: Unbuffered DDR3 RAM
EDAC amd64: CS3: Unbuffered DDR3 RAM
EDAC MC0: Giving out device to 'amd64_edac' 'F10h': DEV 0000:00:18.2
EDAC amd64: DRAM ECC enabled.
EDAC amd64: F10h detected (node 1).
EDAC MC: DCT0 chip selects:
EDAC amd64: MC: 0: 1024MB 1: 1024MB
EDAC amd64: MC: 2: 1024MB 3: 1024MB
EDAC amd64: MC: 4: 0MB 5: 0MB
EDAC amd64: MC: 6: 0MB 7: 0MB
EDAC MC: DCT1 chip selects:
EDAC amd64: MC: 0: 1024MB 1: 1024MB
EDAC amd64: MC: 2: 1024MB 3: 1024MB
EDAC amd64: MC: 4: 0MB 5: 0MB
EDAC amd64: MC: 6: 0MB 7: 0MB
EDAC amd64: using x8 syndromes.
EDAC amd64: MCT channel count: 2
EDAC amd64: CS0: Unbuffered DDR3 RAM
EDAC amd64: CS1: Unbuffered DDR3 RAM
EDAC amd64: CS2: Unbuffered DDR3 RAM
EDAC amd64: CS3: Unbuffered DDR3 RAM
EDAC MC1: Giving out device to 'amd64_edac' 'F10h': DEV 0000:00:19.2
EDAC PCI0: Giving out device to module 'amd64_edac' controller 'EDAC PCI controller': DEV '0000:00:18.2' (POLLED)
input: PC Speaker as /devices/platform/pcspkr/input/input4
EXT4-fs (dm-8): re-mounted. Opts: (null)
EXT3-fs: barriers not enabled
kjournald starting. Commit interval 5 seconds
EXT3-fs (sda1): using internal journal
EXT3-fs (sda1): mounted filesystem with ordered data mode
EXT3-fs: barriers not enabled
kjournald starting. Commit interval 5 seconds
EXT3-fs (dm-7): using internal journal
EXT3-fs (dm-7): mounted filesystem with ordered data mode
EXT4-fs (dm-0): warning: maximal mount count reached, running e2fsck is recommended
EXT4-fs (dm-0): mounted filesystem with ordered data mode. Opts: journal_async_commit,commit=60,stripe=64
e1000e: Intel(R) PRO/1000 Network Driver - 1.6.2-NAPI
e1000e: Copyright(c) 1999 - 2011 Intel Corporation.
e1000e 0000:0c:00.0: Disabling ASPM L1
e1000e 0000:0c:00.0: PCI INT B -> GSI 17 (level, low) -> IRQ 17
e1000e 0000:0c:00.0: setting latency timer to 64
e1000e 0000:0c:00.0: irq 50 for MSI/MSI-X
e1000e 0000:0c:00.0: eth0: (PCI Express:2.5GT/s:Width x4) 00:15:17:bf:06:61
e1000e 0000:0c:00.0: eth0: Intel(R) PRO/1000 Network Connection
e1000e 0000:0c:00.0: eth0: MAC: 1, PHY: 4, PBA No: D64202-004
e1000e 0000:0c:00.1: Disabling ASPM L1
e1000e 0000:0c:00.1: PCI INT A -> GSI 16 (level, low) -> IRQ 16
e1000e 0000:0c:00.1: setting latency timer to 64
e1000e 0000:0c:00.1: irq 51 for MSI/MSI-X
e1000e 0000:0c:00.1: eth1: (PCI Express:2.5GT/s:Width x4) 00:15:17:bf:06:60
e1000e 0000:0c:00.1: eth1: Intel(R) PRO/1000 Network Connection
e1000e 0000:0c:00.1: eth1: MAC: 1, PHY: 4, PBA No: D64202-004
e1000e 0000:0b:00.0: Disabling ASPM L1
e1000e 0000:0b:00.0: PCI INT B -> GSI 19 (level, low) -> IRQ 19
e1000e 0000:0b:00.0: setting latency timer to 64
e1000e 0000:0b:00.0: irq 52 for MSI/MSI-X
e1000e 0000:0b:00.0: eth2: (PCI Express:2.5GT/s:Width x4) 00:15:17:bf:06:63
e1000e 0000:0b:00.0: eth2: Intel(R) PRO/1000 Network Connection
e1000e 0000:0b:00.0: eth2: MAC: 1, PHY: 4, PBA No: D64202-004
e1000e 0000:0b:00.1: Disabling ASPM L1
e1000e 0000:0b:00.1: PCI INT A -> GSI 18 (level, low) -> IRQ 18
e1000e 0000:0b:00.1: setting latency timer to 64
e1000e 0000:0b:00.1: irq 53 for MSI/MSI-X
e1000e 0000:0b:00.1: eth3: (PCI Express:2.5GT/s:Width x4) 00:15:17:bf:06:62
e1000e 0000:0b:00.1: eth3: Intel(R) PRO/1000 Network Connection
e1000e 0000:0b:00.1: eth3: MAC: 1, PHY: 4, PBA No: D64202-004
e1000e 0000:08:00.0: Disabling ASPM L1
e1000e 0000:08:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
e1000e 0000:08:00.0: setting latency timer to 64
e1000e 0000:08:00.0: irq 54 for MSI/MSI-X
e1000e 0000:08:00.0: eth4: (PCI Express:2.5GT/s:Width x4) 00:15:17:8b:94:18
e1000e 0000:08:00.0: eth4: Intel(R) PRO/1000 Network Connection
e1000e 0000:08:00.0: eth4: MAC: 1, PHY: 4, PBA No: D50868-003
e1000e 0000:08:00.1: Disabling ASPM L1
e1000e 0000:08:00.1: PCI INT B -> GSI 17 (level, low) -> IRQ 17
e1000e 0000:08:00.1: setting latency timer to 64
e1000e 0000:08:00.1: irq 55 for MSI/MSI-X
e1000e 0000:08:00.1: eth5: (PCI Express:2.5GT/s:Width x4) 00:15:17:8b:94:19
e1000e 0000:08:00.1: eth5: Intel(R) PRO/1000 Network Connection
e1000e 0000:08:00.1: eth5: MAC: 1, PHY: 4, PBA No: D50868-003
dca service started, version 1.12.1
igb: Unknown parameter `IntMode'
myri10ge: Version 1.5.2-1.459
myri10ge 0000:07:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
myri10ge 0000:07:00.0: setting latency timer to 64
myri10ge 0000:07:00.0: Not enabling ECRC on non-root port 0000:05:02.0
myri10ge 0000:07:00.0: irq 56 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 57 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 58 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 59 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 60 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 61 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 62 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 63 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 56 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 57 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 58 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 59 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 60 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 61 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 62 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 63 for MSI/MSI-X
myri10ge 0000:07:00.0: 8 MSI-X IRQs, tx bndry 4096, fw myri10ge_rss_eth_z8e.dat, WC Enabled
myri10ge 0000:06:00.0: PCI INT A -> GSI 19 (level, low) -> IRQ 19
myri10ge 0000:06:00.0: setting latency timer to 64
myri10ge 0000:06:00.0: Not enabling ECRC on non-root port 0000:05:04.0
myri10ge 0000:06:00.0: irq 56 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 57 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 58 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 59 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 60 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 61 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 62 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 63 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 56 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 57 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 58 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 59 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 60 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 61 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 62 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 63 for MSI/MSI-X
myri10ge 0000:06:00.0: 8 MSI-X IRQs, tx bndry 4096, fw myri10ge_rss_eth_z8e.dat, WC Enabled
NET: Registered protocol family 10
e1000e 0000:0c:00.0: irq 50 for MSI/MSI-X
e1000e 0000:0c:00.0: irq 50 for MSI/MSI-X
ADDRCONF(NETDEV_UP): eth0: link is not ready
e1000e: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx
ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
e1000e 0000:0c:00.1: irq 51 for MSI/MSI-X
e1000e 0000:0c:00.1: irq 51 for MSI/MSI-X
ADDRCONF(NETDEV_UP): eth1: link is not ready
e1000e: eth1 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx
ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
e1000e 0000:0b:00.0: irq 52 for MSI/MSI-X
e1000e 0000:0b:00.0: irq 52 for MSI/MSI-X
ADDRCONF(NETDEV_UP): eth2: link is not ready
eth0: no IPv6 routers present
e1000e 0000:0b:00.1: irq 53 for MSI/MSI-X
e1000e 0000:0b:00.1: irq 53 for MSI/MSI-X
ADDRCONF(NETDEV_UP): eth3: link is not ready
e1000e: eth2 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx
ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
e1000e: eth3 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: Rx/Tx
ADDRCONF(NETDEV_CHANGE): eth3: link becomes ready
eth1: no IPv6 routers present
e1000e 0000:08:00.0: irq 54 for MSI/MSI-X
e1000e 0000:08:00.0: irq 54 for MSI/MSI-X
ADDRCONF(NETDEV_UP): eth4: link is not ready
e1000e: eth4 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
ADDRCONF(NETDEV_CHANGE): eth4: link becomes ready
e1000e 0000:08:00.1: irq 55 for MSI/MSI-X
e1000e 0000:08:00.1: irq 55 for MSI/MSI-X
ADDRCONF(NETDEV_UP): eth5: link is not ready
e1000e: eth5 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
ADDRCONF(NETDEV_CHANGE): eth5: link becomes ready
eth2: no IPv6 routers present
eth3: no IPv6 routers present
myri10ge 0000:07:00.0: irq 56 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 57 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 58 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 59 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 60 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 61 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 62 for MSI/MSI-X
myri10ge 0000:07:00.0: irq 63 for MSI/MSI-X
myri10ge 0000:07:00.0: eth6: link down
myri10ge 0000:06:00.0: irq 64 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 65 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 66 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 67 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 68 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 69 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 70 for MSI/MSI-X
myri10ge 0000:06:00.0: irq 71 for MSI/MSI-X
myri10ge 0000:06:00.0: eth7: link down
eth6: no IPv6 routers present
eth7: no IPv6 routers present
e1000e: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
e1000e: eth1 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
e1000e: eth2 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
e1000e: eth3 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
e1000e: eth4 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
e1000e: eth5 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
EXT3-fs: barriers not enabled
kjournald starting. Commit interval 5 seconds
EXT3-fs (dm-5): using internal journal
EXT3-fs (dm-5): mounted filesystem with ordered data mode
^ permalink raw reply
* Re: __pskb_pull_tail oops from 2.6.35
From: Dave Jones @ 2011-10-03 16:13 UTC (permalink / raw)
To: Eric Dumazet; +Cc: David Miller, netdev
In-Reply-To: <1317155839.2472.5.camel@edumazet-laptop>
On Tue, Sep 27, 2011 at 10:37:19PM +0200, Eric Dumazet wrote:
> > > > It looks like it died in put_page..
> > > >
> > > > <1>[ 262.574991] IP: [<ffffffff810dca57>] put_page+0x10/0x7c
> > > >
> > > > which is only called in one place..
> > > >
> > > > 1267 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
> > > > 1268 if (skb_shinfo(skb)->frags[i].size <= eat) {
> > > > 1269 put_page(skb_shinfo(skb)->frags[i].page);
> > > > 1270 eat -= skb_shinfo(skb)->frags[i].size;
> > > > 1271 } else {
> > >
> > > That's a pretty serious corruption, all frag array entries from 0 to
> > > nr_frags should have valid, non-NULL page pointers.
> > >
> > > Maybe a LRO/GRO bug? There were a couple of those.
> >
> > I'll see if I can talk him into trying a self-built kernel, as we're not
> > rebasing f14 at this point in its life-cycle. If it turns out to still affect
> > 3.x, I'll bring it up again.
>
> This could be a struct skb_shared_info -> nr_frags corruption
>
> (Something was overflowing skb head and overflowing very beginning of
> skb_shared_info in rare circumstances)
>
> We had such bug in the past, I cant remember details right now.
Just to close this discussion, the user reported that he built a 3.1.0rc7 kernel,
and couldn't reproduce this bug any more, so it was something that got fixed
that didn't make it to the longterm stable releases.
Dave
^ permalink raw reply
* Re: [PATCH net-next] RPS: Ensure that an expired hardware filter can be re-added later
From: David Miller @ 2011-10-03 16:14 UTC (permalink / raw)
To: bhutchings; +Cc: netdev, linux-net-drivers, amirv
In-Reply-To: <1317652966.2847.0.camel@bwh-desktop>
From: Ben Hutchings <bhutchings@solarflare.com>
Date: Mon, 03 Oct 2011 15:42:46 +0100
> Amir Vadai wrote:
>> When a stream is paused, and its rule is expired while it is paused,
>> no new rule will be configured to the HW when traffic resume.
> [...]
>> - When stream was resumed, traffic was steered again by RSS, and
>> because current-cpu was equal to desired-cpu, ndo_rx_flow_steer
>> wasn't called and no rule was configured to the HW.
>
> Fix this by setting the flow's current CPU only in the table for the
> newly selected RX queue.
>
> Reported-and-tested-by: Amir Vadai <amirv@dev.mellanox.co.il>
> Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Applied, thanks.
^ permalink raw reply
* Re: [PATCH net-next-2.6] be2net: Add 60 second delay to allow FAT dump completion on recovery from EEH
From: David Miller @ 2011-10-03 16:15 UTC (permalink / raw)
To: somnath.kotur; +Cc: netdev
In-Reply-To: <5bb8f639-e754-4e08-8b7b-9830a57e4826@exht2.ad.emulex.com>
From: Somnath Kotur <somnath.kotur@Emulex.Com>
Date: Mon, 3 Oct 2011 23:40:57 +0530
> Add 60s delay before timeout on polling Bit 31 so that FAT dump can
> complete when reset occurs.
>
> Signed-off-by: Somnath Kotur <somnath.kotur@emulex.com>
Applied.
^ permalink raw reply
* Re: big picture UDP/IP performance question re 2.6.18 -> 2.6.32
From: Eric Dumazet @ 2011-10-03 16:16 UTC (permalink / raw)
To: starlight
Cc: linux-kernel, netdev, Willy Tarreau, Peter Zijlstra,
Stephen Hemminger
In-Reply-To: <6.2.5.6.2.20111003112108.03a83a28@binnacle.cx>
Le lundi 03 octobre 2011 à 11:25 -0400, starlight@binnacle.cx a écrit :
> >Please send full "dmesg" output
>
> Attached.
>
Minor note :
It seems you use 4096 2MB hugepages, and your machine has 1GB pages
availabe, you could try to use them.
(boot cmd : hugepagesz=1GB hugepages=8 )
^ permalink raw reply
* Re: [PATCH 1/2] bridge: fix ordering of NEWLINK and NEWNEIGH events
From: David Miller @ 2011-10-03 16:18 UTC (permalink / raw)
To: shemminger; +Cc: netdev
In-Reply-To: <20111001003835.282462632@vyatta.com>
From: Stephen Hemminger <shemminger@vyatta.com>
Date: Fri, 30 Sep 2011 17:37:26 -0700
> When port is added to a bridge, the old code would send the new neighbor
> netlink message before the subsequent new link message. This bug makes
> it difficult to use the monitoring API in an application.
>
> This code changes the ordering to add the forwarding entry
> after the port is setup. One of the error checks (for invalid address)
> is moved earlier in the process to avoid having to do unwind.
>
> Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Applied.
^ permalink raw reply
* Re: [PATCH 2/2] bridge: allow updating existing fdb entries
From: David Miller @ 2011-10-03 16:18 UTC (permalink / raw)
To: shemminger; +Cc: netdev
In-Reply-To: <20111001003835.411004527@vyatta.com>
From: Stephen Hemminger <shemminger@vyatta.com>
Date: Fri, 30 Sep 2011 17:37:27 -0700
> Need to allow application to update existing fdb entries that already
> exist. This makes bridge netlink neighbor API have same flags and
> semantics as ip neighbor table.
>
> Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Applied.
^ permalink raw reply
* Re: [PATCH net-next-2.6 0/4] be2net: fixes
From: David Miller @ 2011-10-03 16:19 UTC (permalink / raw)
To: somnath.kotur; +Cc: netdev
In-Reply-To: <4bdbbef6-24f6-432f-9642-99ce7887f52d@exht2.ad.emulex.com>
From: Somnath Kotur <somnath.kotur@emulex.com>
Date: Fri, 30 Sep 2011 22:52:09 +0530
> Pls apply
>
> Somnath Kotur (4):
> be2net: Change the data type of the 'on die temperature' stat.
> be2net: Fixed Endianness issues in the response read log length field
> while retrieving FAT data
> be2net: Modified PCI MaxReadReq size to 4096 bytes
> be2net: Making die temperature ioctl call async
All applied, thanks.
^ permalink raw reply
* Re: __pskb_pull_tail oops from 2.6.35
From: David Miller @ 2011-10-03 16:20 UTC (permalink / raw)
To: davej; +Cc: eric.dumazet, netdev
In-Reply-To: <20111003161346.GA30201@redhat.com>
From: Dave Jones <davej@redhat.com>
Date: Mon, 3 Oct 2011 12:13:46 -0400
> Just to close this discussion, the user reported that he built a 3.1.0rc7 kernel,
> and couldn't reproduce this bug any more, so it was something that got fixed
> that didn't make it to the longterm stable releases.
Thanks for the update Dave.
^ permalink raw reply
* Re: [RFC patch net-next-2.6] net: introduce ethernet teaming device
From: Jesse Gross @ 2011-10-03 16:20 UTC (permalink / raw)
To: Jiri Pirko
Cc: netdev, davem, eric.dumazet, bhutchings, shemminger, fubar, andy,
tgraf, ebiederm, mirqus, kaber, greearb
In-Reply-To: <20111003113705.GC2140@minipsycho.brq.redhat.com>
On Mon, Oct 3, 2011 at 4:37 AM, Jiri Pirko <jpirko@redhat.com> wrote:
> Sat, Oct 01, 2011 at 08:15:01PM CEST, jesse@nicira.com wrote:
>>On Fri, Sep 30, 2011 at 5:44 AM, Jiri Pirko <jpirko@redhat.com> wrote:
>>> This patch introduces new network device called team. It supposes to be
>>> very fast, simple, userspace-driven parallel to existing bonding device.
>>> Userspace library called libteam with couple of demo apps is available
>>> here:
>>> https://github.com/jpirko/libteam
>>> Note it's still in its dipers atm.
>>>
>>> team<->libteam use generic netlink for communication. That and rtnl
>>> suppose to be the only way to configure team device, no sysfs etc.
>>>
>>> In near future python binding for libteam will be introduced. Also
>>> daemon providing arpmon/miimon active-backup functionality will
>>> be introduced. All what's necessary is already implemented in kernel team
>>> driver.
>>>
>>> Plan is to support 8023ad in near future with it's logic mainly in
>>> userspace daemon as well.
>>>
>>> Please review, try, comment. All feedback would be much appreciated.
>>>
>>> Signed-off-by: Jiri Pirko <jpirko@redhat.com>
>>
>>Not to push my own agenda too much but you might want to take a look
>>at Open vSwitch. It uses the same strategy of userspace directed
>>bonding and already supports active-backup, 802.3ad, and quite a few
>>other networking tools all controlled by userspace.
>>
>>I know there's been a lot of talk and not a lot of action when it
>>comes to upstreaming but that's changing. We're fixing up a few loose
>>ends in the userspace/kernel interface and then intend to propose a
>>patch fairly soon.
>
> Looks interesting. From quick peak the code is much bigger and fairly
> complicated. The main reason for doing "team" is to do ethernet teaming
> in as much simple way as it can be done. Final user destination areas
> of openvswitch and team seem different to me.
Yes, to the end user Open vSwitch is clearly a much larger and more
complex component. I just thought it might be of interest to you
since it already implements some of the features that you are looking
at and the kernel portion, at least, has similar goals of pushing more
logic to userspace.
^ permalink raw reply
* Re: big picture UDP/IP performance question re 2.6.18 -> 2.6.32
From: starlight @ 2011-10-03 16:28 UTC (permalink / raw)
To: Eric Dumazet
Cc: linux-kernel, netdev, Willy Tarreau, Peter Zijlstra,
Stephen Hemminger
In-Reply-To: <1317658588.2442.5.camel@edumazet-HP-Compaq-6005-Pro -SFF-PC>
At 06:16 PM 10/3/2011 +0200, Eric Dumazet wrote:
>> >Please send full "dmesg" output
>>
>> Attached.
>>
>
>Minor note :
>
>It seems you use 4096 2MB hugepages, and your
>machine has 1GB pages availabe, you could
>try to use them.
>
>(boot cmd : hugepagesz=1GB hugepages=8 )
Interesting. I'll give it a try for sure, but
since hugepages only gives a 5% improvement
taking the page size up probably will not
dent it by more than an additional percent
or so.
BTW I goofed on the kernel version number in my
last post. It should be 2.6.39.4. That .27 was
my mind transposing the 2.6.32 sub-version
onto 2.6.39.
Have one closing thought, which is to wonder if the
9.98% swapper [kernel.kallsyms] [k] native_safe_halt
CPU is included in the 2.6.18(rhel) CPU accounting
or not. If it's excluded that would make 2.6.39.4
look much better--possibly put it at near parity
though I'm too lazy to do the math just now.
My guess is that this number is something of an
artifact of the clock-tick CPU histogram logic.
Perhaps it's seeing the IP register parked in the
idle-loop HALT instruction some of the time and
counting it as non-idle time. I'd be happier if
it either counted all idle time and showed the
45% that the poll=idle run shows, or none of
the idle time at all--if it is in fact idle time.
Unfortunately 'perf' is not available for
2.6.18(rhel) so the value cannot be compared.
^ permalink raw reply
* RE: [net-next 11/11 v2] ixgbe: allow eeprom writes via ethtool
From: Tantilov, Emil S @ 2011-10-03 17:00 UTC (permalink / raw)
To: Francois Romieu, Kirsher, Jeffrey T
Cc: davem@davemloft.net, netdev@vger.kernel.org, gospo@redhat.com
In-Reply-To: <20111001093105.GA9885@electric-eye.fr.zoreil.com>
>-----Original Message-----
>From: Francois Romieu [mailto:romieu@fr.zoreil.com]
>Sent: Saturday, October 01, 2011 2:31 AM
>To: Kirsher, Jeffrey T
>Cc: davem@davemloft.net; Tantilov, Emil S; netdev@vger.kernel.org;
>gospo@redhat.com
>Subject: Re: [net-next 11/11 v2] ixgbe: allow eeprom writes via ethtool
>
>Jeff Kirsher <jeffrey.t.kirsher@intel.com> :
>> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
>b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
>> index 10ea29f..fb47abb 100644
>> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
>> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
>> @@ -812,6 +812,66 @@ static int ixgbe_get_eeprom(struct net_device
>*netdev,
>[...]
>> + ptr = (void *)eeprom_buff;
>
>(nit) useless cast to void *.
>
>> +
>> + if (eeprom->offset & 1) {
>[...]
>> + ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
>> + ptr++;
>> + }
>> + if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
>[...]
>> + ret_val = hw->eeprom.ops.read(hw, last_word,
>> + &eeprom_buff[last_word - first_word]);
>> + }
>
>I guess that the code tries to do its best to write something even when the
>reads or writes partially fail but this one should imho be :
Actually we shouldn't be writing if any of the eeprom read operations fail. I will revisit the error checking logic.
>
> if ((eeprom->offset + eeprom->len) & 1) {
>[...]
> ret_val |= hw->eeprom.ops.read(hw, last_word,
>
>> +
>> + /* Device's eeprom is always little-endian, word addressable */
>> + for (i = 0; i < last_word - first_word + 1; i++)
>> + le16_to_cpus(&eeprom_buff[i]);
>
>Shouldn't there be (drivers/net/ethernet/intel/ixgbe/ixgbe_type.h):
>
>struct ixgbe_eeprom_operations {
>[...]
> s32 (*read)(struct ixgbe_hw *, u16, __le16 *);
>
>instead of :
>
>struct ixgbe_eeprom_operations {
>[...]
> s32 (*read)(struct ixgbe_hw *, u16, u16 *);
>
>[...]
That's a good idea.
>> + /* Update the checksum */
>> + hw->eeprom.ops.update_checksum(hw);
>
>The returned status code is ignored.
Thanks for the review. I already asked Jeff to drop this patch, we'll address the issues pointed out and submit a new version.
Thanks,
Emil
>
>--
>Ueimor
^ permalink raw reply
* Re: [patch v2] caif: add error handling for allocation
From: David Miller @ 2011-10-03 17:46 UTC (permalink / raw)
To: sjur.brandeland; +Cc: dan.carpenter, netdev, kernel-janitors
In-Reply-To: <81C3A93C17462B4BBD7E272753C105791D2BC1882D@EXDCVYMBSTM005.EQ1STM.local>
From: Sjur BRENDELAND <sjur.brandeland@stericsson.com>
Date: Fri, 23 Sep 2011 12:38:45 +0200
> [Dan]:
>> The allocation of "phyinfo" wasn't checked, and also the allocation
>> wasn't freed on error paths. Sjur Brændeland pointed out as well
>> that "phy_driver" should be freed on the error path too.
>>
>> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> Looks good, thank you Dan.
> Acked-by: Sjur Brændeland <sjur.brandeland@stericsson.com>
Applied, thanks.
^ permalink raw reply
* [v2 PATCH 0/2] NETFILTER new target module, HMARK
From: Hans Schillstrom @ 2011-10-03 17:46 UTC (permalink / raw)
To: kaber, pablo, jengelh, netfilter-devel, netdev; +Cc: hans, Hans Schillstrom
The target allows you to create rules in the "raw" and "mangle" tables
which alter the netfilter mark (nfmark) field within a given range.
First a 32 bit hash value is generated then modulus by <limit> and
finally an offset is added before it's written to nfmark.
Prior to routing, the nfmark can influence the routing method (see
"Use netfilter MARK value as routing key") and can also be used by
other subsystems to change their behaviour.
The mark match can also be used to match nfmark produced by this module.
See the kernel module for more info.
REVISION
Version 2
NAT Added for IPv4
IPv6 ICMP handling enhanced.
Usage example added
Version 1
Initial RFC
We (Ericsson) use hmark in-front of ipvs as a pre-loadbalancer and
handles up to 70 ipvs running in parallel in clusters.
However hmark is not restricted to run infront of IPVS it can also be used as
"poor mans" load balancer.
With this version is also NAT supported as an option, with very high flows
you might not want to use conntrack.
The idea is to generate a direction independent fw mark range to use as input to
the routing (i.e. ip rule add fwmark ...).
Pretty straight forward and simple.
Example:
App Server (Real Server)
+---------+
-->| Service |
Gateway A +---------+
/
+----------+ / +----+ +---------+
--- if -A---| selector |----> |ipvs| --->| Service |
+----------+ \ +----+ +---------+
\
+----+ +---------+
|ipvs| -->| Service |
+----+ +---------+
Gateway C
+----------+ / +----+
--- if-B ---| selector | ---> |ipvs|
+----------+ \ +----+ +---------+
| Service |
+---------+
/
+----------+ / +----+ ..
--- if-B ---| selector | ---> |ipvs| +---------+
+----------+ \ +----+ | Service |
\ +---------+
#
# Example with four ipvs loadbalancers
#
iptables -t mangle -I PREROUTING -d $IPADDR -j HMARK --hmark-mod 4 --hmark-offs 100
ip rule add fwmark 100 table 100
ip rule add fwmark 101 table 101
ip rule add fwmark 102 table 102
ip rule add fwmark 103 table 103
ip ro ad table 100 default via x.y.z.1 dev bond1
ip ro ad table 101 default via x.y.z.2 dev bond1
ip ro ad table 102 default via x.y.z.3 dev bond1
ip ro ad table 103 default via x.y.z.4 dev bond1
If conntrack doesn't handle the return path,
do the oposite with HMARK and send it back right to ipvs.
Another exmaple of usage could be if you have cluster originated connections
and want to spread the connections over a number of interfaces
(NAT will complpicate things for you in this case)
\ Blade 1
\ +----------+ +---------+
<-- | selector | <--- | Service |
/ +----------+ +---------+
/
+------+
-- | Gw-A | \ Blade 2
+------+ \ +----------+ +---------+
+------+ <-- | selector | <--- | Service |
-- | Gw-B | / +----------+ +---------+
+------+ /
+------+
-- | Gw-C | \
+------+ \ +----------+ +---------+
<-- | selector | <--- | Service |
/ +----------+ +---------+
/
\ Blande -n
\ +----------+ +---------+
<-- | selector | <--- | Service |
/ +----------+ +---------+
/
Regards
Hans Schillstrom <hans.schillstrom@ericsson.com>
^ permalink raw reply
* [v2 PATCH 1/2] NETFILTER module xt_hmark new target for HASH based fw
From: Hans Schillstrom @ 2011-10-03 17:46 UTC (permalink / raw)
To: kaber, pablo, jengelh, netfilter-devel, netdev; +Cc: hans, Hans Schillstrom
In-Reply-To: <1317664003-28189-1-git-send-email-hans.schillstrom@ericsson.com>
The target allows you to create rules in the "raw" and "mangle" tables
which alter the netfilter mark (nfmark) field within a given range.
First a 32 bit hash value is generated then modulus by <limit> and
finally an offset is added before it's written to nfmark.
Prior to routing, the nfmark can influence the routing method (see
"Use netfilter MARK value as routing key") and can also be used by
other subsystems to change their behavior.
man page
HMARK
This module does the same as MARK, i.e. set an fwmark,
but the mark is based on a hash value. The hash is based on
saddr, daddr, sport, dport and proto. The same mark will be produced
independet of direction if no masks is set or the same masks is used for
src and dest. The hash mark could be adjusted by modulus and finaly an
offset could be added, i.e the final mark will be within a range.
ICMP errors will have hash calc based on the original message.
Note: None of the parameters effect the packet it self
only the calculated hash value.
Parameters: For all masks default is all "1:s", to disable a field
use mask 0. For IPv6 it's just the last 32 bits that
is included in the hash.
--hmark-smask value
The value to AND the source address with (saddr & value).
--hmark-dmask value
The value to AND the dest. address with (daddr & value).
--hmark-sp-mask value
A 16 bit value to AND the src port with (sport & value).
--hmark-dp-mask value
A 16 bit value to AND the dest port with (dport & value).
--hmark-sp-set value
A 16 bit value to OR the src port with (sport | value).
--hmark-dp-set value
A 16 bit value to OR the dest port with (dport | value).
--hmark-spi-mask value
Value to AND the spi field with (spi & value) valid for proto esp or ah.
--hmark-spi-set value
Value to OR the spi field with (spi | value) valid for proto esp or ah.
--hmark-proto-mask value
A 16 bit value to AND the L4 proto field with (proto & value).
--hmark-rnd value
A 32 bit intitial value for hash calc, default is 0xc175a3b8.
--hmark-dnat
Replace src addr/port with original dst addr/port before calc, hash
--hmark-snat
Replace dst addr/port with original src addr/port before calc, hash
Final processing of the mark in order of execution.
--hmark-mod value (must be > 0)
The easiest way to describe this is: hash = hash mod <value>
--hmark-offs alue (must be > 0)
The easiest way to describe this is: hash = hash + <value>
Examples:
Default rule handles all TCP, UDP, SCTP, ESP & AH
Rev 2
IPv6 header scan changed to follow RFC 2640
IPv4 icmp echo fragmented does now use proto as ipv6
IPv6 pskb_may_pull() check is done in every time in header loop.
IPv4 nat support added.
default added in IPv6 loop and null check of hp
Signed-off-by: Hans Schillstrom <hans.schillstrom@ericsson.com>
---
include/linux/netfilter/xt_hmark.h | 48 ++++++
net/netfilter/Kconfig | 17 ++
net/netfilter/Makefile | 1 +
net/netfilter/xt_hmark.c | 320 ++++++++++++++++++++++++++++++++++++
4 files changed, 386 insertions(+), 0 deletions(-)
create mode 100644 include/linux/netfilter/xt_hmark.h
create mode 100644 net/netfilter/xt_hmark.c
diff --git a/include/linux/netfilter/xt_hmark.h b/include/linux/netfilter/xt_hmark.h
new file mode 100644
index 0000000..6c1436a
--- /dev/null
+++ b/include/linux/netfilter/xt_hmark.h
@@ -0,0 +1,48 @@
+#ifndef XT_HMARK_H_
+#define XT_HMARK_H_
+
+#include <linux/types.h>
+
+/*
+ * Flags must not start at 0, since it's used as none.
+ */
+enum {
+ XT_HMARK_SADR_AND = 1, /* SNAT & DNAT are used by the kernel module */
+ XT_HMARK_DADR_AND,
+ XT_HMARK_SPI_AND,
+ XT_HMARK_SPI_OR,
+ XT_HMARK_SPORT_AND,
+ XT_HMARK_DPORT_AND,
+ XT_HMARK_SPORT_OR,
+ XT_HMARK_DPORT_OR,
+ XT_HMARK_PROTO_AND,
+ XT_HMARK_RND,
+ XT_HMARK_MODULUS,
+ XT_HMARK_OFFSET,
+ XT_HMARK_USE_SNAT,
+ XT_HMARK_USE_DNAT,
+};
+
+union ports {
+ struct {
+ __u16 src;
+ __u16 dst;
+ } p16;
+ __u32 v32;
+};
+
+struct xt_hmark_info {
+ __u32 smask; /* Source address mask */
+ __u32 dmask; /* Dest address mask */
+ union ports pmask;
+ union ports pset;
+ __u32 spimask;
+ __u32 spiset;
+ __u16 flags; /* Print out only */
+ __u16 prmask; /* L4 Proto mask */
+ __u32 hashrnd;
+ __u32 hmod; /* Modulus */
+ __u32 hoffs; /* Offset */
+};
+
+#endif /* XT_HMARK_H_ */
diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig
index 32bff6d..3abd3a4 100644
--- a/net/netfilter/Kconfig
+++ b/net/netfilter/Kconfig
@@ -483,6 +483,23 @@ config NETFILTER_XT_TARGET_IDLETIMER
To compile it as a module, choose M here. If unsure, say N.
+config NETFILTER_XT_TARGET_HMARK
+ tristate '"HMARK" target support'
+ depends on NETFILTER_ADVANCED
+ ---help---
+ This option adds the "HMARK" target.
+
+ The target allows you to create rules in the "raw" and "mangle" tables
+ which alter the netfilter mark (nfmark) field within a given range.
+ First a 32 bit hash value is generated then modulus by <limit> and
+ finally an offset is added before it's written to nfmark.
+
+ Prior to routing, the nfmark can influence the routing method (see
+ "Use netfilter MARK value as routing key") and can also be used by
+ other subsystems to change their behavior.
+
+ The mark match can also be used to match nfmark produced by this module.
+
config NETFILTER_XT_TARGET_LED
tristate '"LED" target support'
depends on LEDS_CLASS && LEDS_TRIGGERS
diff --git a/net/netfilter/Makefile b/net/netfilter/Makefile
index 1a02853..359eeb6 100644
--- a/net/netfilter/Makefile
+++ b/net/netfilter/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o
obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o
obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o
obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o
+obj-$(CONFIG_NETFILTER_XT_TARGET_HMARK) += xt_hmark.o
obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o
obj-$(CONFIG_NETFILTER_XT_TARGET_NFLOG) += xt_NFLOG.o
obj-$(CONFIG_NETFILTER_XT_TARGET_NFQUEUE) += xt_NFQUEUE.o
diff --git a/net/netfilter/xt_hmark.c b/net/netfilter/xt_hmark.c
new file mode 100644
index 0000000..2f0aa93
--- /dev/null
+++ b/net/netfilter/xt_hmark.c
@@ -0,0 +1,320 @@
+/*
+ * xt_hmark - Netfilter module to set mark as hash value
+ *
+ * (C) 2010 Hans Schillstrom <hans.schillstrom@ericsson.com>
+ *
+ * Description:
+ * This module calculates a hash value that can be modified by modulus
+ * and an offset. The hash value is based on a direction independent
+ * five tuple: src & dst addr src & dst ports and protocol.
+ * However src & dst port can be masked and are not used for fragmented
+ * packets, ESP and AH don't have ports so SPI will be used instead.
+ * For ICMP error messages the hash mark values will be calculated on
+ * the source packet i.e. the packet caused the error (If sufficient
+ * amount of data exists).
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/skbuff.h>
+#include <net/ip.h>
+#include <linux/icmp.h>
+
+#include <linux/netfilter/xt_hmark.h>
+#include <linux/netfilter/x_tables.h>
+#include <net/netfilter/nf_nat.h>
+
+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
+# define WITH_IPV6 1
+#include <net/ipv6.h>
+#include <linux/netfilter_ipv6/ip6_tables.h>
+#endif
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Hans Schillstrom <hans.schillstrom@ericsson.com>");
+MODULE_DESCRIPTION("Xtables: packet range mark operations by hash value");
+MODULE_ALIAS("ipt_HMARK");
+MODULE_ALIAS("ip6t_HMARK");
+
+/*
+ * ICMP, get inner header so calc can be made on the source message
+ * not the icmp header, i.e. same hash mark must be produced
+ * on an icmp error message.
+ */
+static int get_inner_hdr(struct sk_buff *skb, int iphsz, int nhoff)
+{
+ const struct icmphdr *icmph;
+ struct icmphdr _ih;
+ struct iphdr *iph = NULL;
+
+ /* Not enough header? */
+ icmph = skb_header_pointer(skb, nhoff + iphsz, sizeof(_ih), &_ih);
+ if (icmph == NULL)
+ goto out;
+
+ if (icmph->type > NR_ICMP_TYPES)
+ goto out;
+
+
+ /* Error message? */
+ if (icmph->type != ICMP_DEST_UNREACH &&
+ icmph->type != ICMP_SOURCE_QUENCH &&
+ icmph->type != ICMP_TIME_EXCEEDED &&
+ icmph->type != ICMP_PARAMETERPROB &&
+ icmph->type != ICMP_REDIRECT)
+ goto out;
+ /* Checkin full IP header plus 8 bytes of protocol to
+ * avoid additional coding at protocol handlers.
+ */
+ if (!pskb_may_pull(skb, nhoff + iphsz + sizeof(_ih) + 8))
+ goto out;
+
+ iph = (struct iphdr *)(skb->data + nhoff + iphsz + sizeof(_ih));
+ return nhoff + iphsz + sizeof(_ih);
+out:
+ return nhoff;
+}
+/*
+ * ICMPv6
+ * Input nhoff Offset into network header
+ * offset where ICMPv6 header starts
+ * Returns true if it's a icmp error and updates nhoff
+ */
+#ifdef WITH_IPV6
+static int get_inner6_hdr(struct sk_buff *skb, int *offset, int hdrlen)
+{
+ struct icmp6hdr *icmp6h;
+ struct icmp6hdr _ih6;
+
+ icmp6h = skb_header_pointer(skb, *offset + hdrlen, sizeof(_ih6), &_ih6);
+ if (icmp6h == NULL)
+ goto out;
+
+ if (icmp6h->icmp6_type && icmp6h->icmp6_type < 128) {
+ *offset += hdrlen + sizeof(_ih6);
+ return 1;
+ }
+out:
+ return 0;
+}
+#endif
+
+/*
+ * Calc hash value, special casre is taken on icmp and fragmented messages
+ * i.e. fragmented messages don't use ports.
+ */
+static __u32 get_hash(struct sk_buff *skb, struct xt_hmark_info *info)
+{
+ int nhoff, hash = 0, poff, proto, frag = 0;
+ struct iphdr *ip;
+ u8 ip_proto;
+ u32 addr1, addr2, ihl;
+ u16 snatport = 0, dnatport = 0;
+ union {
+ u32 v32;
+ u16 v16[2];
+ } ports;
+
+ nhoff = skb_network_offset(skb);
+ proto = skb->protocol;
+
+ if (!proto && skb->sk) {
+ if (skb->sk->sk_family == AF_INET)
+ proto = __constant_htons(ETH_P_IP);
+ else if (skb->sk->sk_family == AF_INET6)
+ proto = __constant_htons(ETH_P_IPV6);
+ }
+
+ switch (proto) {
+ case __constant_htons(ETH_P_IP):
+ {
+ enum ip_conntrack_info ctinfo;
+ struct nf_conn *ct = ct = nf_ct_get(skb, &ctinfo);
+ struct nf_conntrack_tuple *otuple, *rtuple;
+
+ if (!pskb_may_pull(skb, sizeof(*ip) + nhoff))
+ goto done;
+
+ ip = (struct iphdr *) (skb->data + nhoff);
+ if (ip->protocol == IPPROTO_ICMP) {
+ /* Switch hash calc to inner header ? */
+ nhoff = get_inner_hdr(skb, ip->ihl * 4, nhoff);
+ ip = (struct iphdr *) (skb->data + nhoff);
+ }
+
+ if (ip->frag_off & htons(IP_MF | IP_OFFSET))
+ frag = 1;
+
+ ip_proto = ip->protocol;
+ ihl = ip->ihl;
+ addr1 = (__force u32) ip->saddr & info->smask;
+ addr2 = (__force u32) ip->daddr & info->dmask;
+
+ if (!ct || !nf_ct_is_confirmed(ct))
+ break;
+ otuple = &ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple;
+ /* On the "return flow", to get the original address
+ * i,e, replace the source address.
+ */
+ if (ct->status & IPS_DST_NAT &&
+ info->flags & XT_HMARK_USE_DNAT) {
+ rtuple = &ct->tuplehash[IP_CT_DIR_REPLY].tuple;
+ addr1 = (__force u32) otuple->dst.u3.in.s_addr;
+ dnatport = otuple->dst.u.udp.port;
+ }
+ /* On the "return flow", to get the original address
+ * i,e, replace the destination address.
+ */
+ if (ct->status & IPS_SRC_NAT &&
+ info->flags & XT_HMARK_USE_SNAT) {
+ rtuple = &ct->tuplehash[IP_CT_DIR_REPLY].tuple;
+ addr2 = (__force u32) otuple->src.u3.in.s_addr;
+ snatport = otuple->src.u.udp.port;
+ }
+ break;
+ }
+#ifdef WITH_IPV6
+ case __constant_htons(ETH_P_IPV6):
+ {
+ struct ipv6hdr *ip6; /* ip hdr */
+ int hdrlen = 0; /* In ip header */
+ u8 nexthdr;
+ int ip6hdrlvl = 0; /* Header level */
+ struct ipv6_opt_hdr _hdr, *hp;
+
+hdr_new:
+ if (!pskb_may_pull(skb, sizeof(*ip6) + nhoff))
+ goto done;
+
+ /* ip header */
+ ip6 = (struct ipv6hdr *) (skb->data + nhoff);
+ nexthdr = ip6->nexthdr;
+ /* nhoff += sizeof(struct ipv6hdr); Where hdr starts */
+ hdrlen = sizeof(struct ipv6hdr);
+ hp = skb_header_pointer(skb, nhoff + hdrlen, sizeof(_hdr),
+ &_hdr);
+ while (nexthdr) {
+ switch (nexthdr) {
+ case IPPROTO_ICMPV6:
+ /* ICMP Error then move ptr to inner header */
+ if (get_inner6_hdr(skb, &nhoff, hdrlen)) {
+ ip6hdrlvl++;
+ goto hdr_new;
+ }
+ nhoff += hdrlen;
+ goto hdr_rdy;
+
+ case NEXTHDR_FRAGMENT:
+ if (!ip6hdrlvl)
+ frag = 1;
+ break;
+ /* End of hdr traversing */
+ case NEXTHDR_IPV6: /* Do not process tunnels */
+ case NEXTHDR_TCP:
+ case NEXTHDR_UDP:
+ case NEXTHDR_ESP:
+ case NEXTHDR_AUTH:
+ case NEXTHDR_NONE:
+ nhoff += hdrlen;
+ goto hdr_rdy;
+ default:
+ goto done;
+ }
+ if (!hp)
+ goto done;
+ nhoff += hdrlen; /* eat current header */
+ nexthdr = hp->nexthdr; /* Next header */
+ hdrlen = ipv6_optlen(hp);
+ hp = skb_header_pointer(skb, nhoff + hdrlen,
+ sizeof(_hdr), &_hdr);
+
+ if (!pskb_may_pull(skb, nhoff))
+ goto done;
+ }
+hdr_rdy:
+ ip_proto = nexthdr;
+
+ addr1 = (__force u32) ip6->saddr.s6_addr32[3];
+ addr2 = (__force u32) ip6->daddr.s6_addr32[3];
+ ihl = 0; /* (40 >> 2); */
+ break;
+ }
+#endif
+ default:
+ goto done;
+ }
+
+ ports.v32 = 0;
+ poff = proto_ports_offset(ip_proto);
+ nhoff += ihl * 4 + poff;
+ if (!frag && poff >= 0 && pskb_may_pull(skb, nhoff + 4)) {
+ ports.v32 = * (__force u32 *) (skb->data + nhoff);
+ if (ip_proto == IPPROTO_ESP || ip_proto == IPPROTO_AH) {
+ ports.v32 = (ports.v32 & info->spimask) | info->spiset;
+ } else { /* Handle endian */
+ if (snatport) /* Replace snated dst port (ret flow) */
+ ports.v16[1] = snatport;
+ if (dnatport)
+ ports.v16[0] = dnatport;
+ ports.v32 = (ports.v32 & info->pmask.v32) |
+ info->pset.v32;
+ if (ports.v16[1] < ports.v16[0])
+ swap(ports.v16[0], ports.v16[1]);
+ }
+ }
+ ip_proto &= info->prmask;
+ /* get a consistent hash (same value on both flow directions) */
+ if (addr2 < addr1)
+ swap(addr1, addr2);
+
+ hash = jhash_3words(addr1, addr2, ports.v32, info->hashrnd) ^ ip_proto;
+ if (!hash)
+ hash = 1;
+
+ return hash;
+
+done:
+ return 0;
+}
+
+static unsigned int
+hmark_tg(struct sk_buff *skb, const struct xt_action_param *par)
+{
+ struct xt_hmark_info *info = (struct xt_hmark_info *)par->targinfo;
+ __u32 hash = get_hash(skb, info);
+
+ if (info->hmod && hash)
+ skb->mark = (hash % info->hmod) + info->hoffs;
+ return XT_CONTINUE;
+}
+
+static struct xt_target hmark_tg_reg __read_mostly = {
+ .name = "HMARK",
+ .revision = 0,
+ .family = NFPROTO_UNSPEC,
+ .target = hmark_tg,
+ .targetsize = sizeof(struct xt_hmark_info),
+ .me = THIS_MODULE,
+};
+
+static int __init hmark_mt_init(void)
+{
+ int ret;
+
+ ret = xt_register_target(&hmark_tg_reg);
+ if (ret < 0)
+ return ret;
+ return 0;
+}
+
+static void __exit hmark_mt_exit(void)
+{
+ xt_unregister_target(&hmark_tg_reg);
+}
+
+module_init(hmark_mt_init);
+module_exit(hmark_mt_exit);
--
1.7.4.4
^ permalink raw reply related
* [v2 PATCH 2/2] NETFILTER userspace part for target HMARK
From: Hans Schillstrom @ 2011-10-03 17:46 UTC (permalink / raw)
To: kaber, pablo, jengelh, netfilter-devel, netdev; +Cc: hans, Hans Schillstrom
In-Reply-To: <1317664003-28189-1-git-send-email-hans.schillstrom@ericsson.com>
The target allows you to create rules in the "raw" and "mangle" tables
which alter the netfilter mark (nfmark) field within a given range.
First a 32 bit hash value is generated then modulus by <limit> and
finally an offset is added before it's written to nfmark.
Prior to routing, the nfmark can influence the routing method (see
"Use netfilter MARK value as routing key") and can also be used by
other subsystems to change their behaviour.
The mark match can also be used to match nfmark produced by this module.
Ver 2
IPv4 NAT added
iptables ver 1.4.12.1 adaptions.
Signed-off-by: Hans Schillstrom <hans.schillstrom@ericsson.com>
---
extensions/libxt_HMARK.c | 381 ++++++++++++++++++++++++++++++++++++
extensions/libxt_HMARK.man | 66 ++++++
include/linux/netfilter/xt_hmark.h | 48 +++++
3 files changed, 495 insertions(+), 0 deletions(-)
create mode 100644 extensions/libxt_HMARK.c
create mode 100644 extensions/libxt_HMARK.man
create mode 100644 include/linux/netfilter/xt_hmark.h
diff --git a/extensions/libxt_HMARK.c b/extensions/libxt_HMARK.c
new file mode 100644
index 0000000..0def034
--- /dev/null
+++ b/extensions/libxt_HMARK.c
@@ -0,0 +1,381 @@
+/*
+ * Shared library add-on to iptables to add HMARK target support.
+ *
+ * The kernel module calculates a hash value that can be modified by modulus
+ * and an offset. The hash value is based on a direction independent
+ * five tuple: src & dst addr src & dst ports and protocol.
+ * However src & dst port can be masked and are not used for fragmented
+ * packets, ESP and AH don't have ports so SPI will be used instead.
+ * For ICMP error messages the hash mark values will be calculated on
+ * the source packet i.e. the packet caused the error (If sufficient
+ * amount of data exists).
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <getopt.h>
+
+#include <xtables.h>
+#include <linux/netfilter/x_tables.h>
+#include <linux/netfilter/xt_hmark.h>
+
+
+#define DEF_HRAND 0xc175a3b8 /* Default "random" value to jhash */
+
+static void HMARK_help(void)
+{
+ printf(
+"HMARK target options, i.e. modify hash calculation by:\n"
+" --hmark-smask value Mask source address with value\n"
+" --hmark-dmask value Mask Dest. address with value\n"
+" --hmark-sp-mask value Mask src port with value\n"
+" --hmark-dp-mask value Mask dst port with value\n"
+" --hmark-spi-mask value For esp and ah AND spi with value\n"
+" --hmark-sp-set value OR src port with value\n"
+" --hmark-dp-set value OR dst port with value\n"
+" --hmark-spi-set value For esp and ah OR spi with value\n"
+" --hmark-proto-mask value Mask Protocol with value\n"
+" --hmark-rnd Random value to hash cacl.\n"
+" Limit/modify the calculated hash mark by:\n"
+" --hmark-mod value nfmark modulus value\n"
+" --hmark-offs value Last action add value to nfmark\n"
+" For NAT in IPv4 the original address can be used in the return path.\n"
+" Make sure to qualify the statement in a proper way when using nat flags\n"
+" --hmark-dnat Replace src addr/port with original dst addr/port\n"
+" --hmark-snat Replace dst addr/port with original src addr/port\n"
+" In many cases hmark can be omitted i.e. --smask can be used\n");
+}
+
+static const struct option HMARK_opts[] = {
+ { "hmark-smask", 1, NULL, XT_HMARK_SADR_AND },
+ { "hmark-dmask", 1, NULL, XT_HMARK_DADR_AND },
+ { "hmark-sp-mask", 1, NULL, XT_HMARK_SPORT_AND },
+ { "hmark-dp-mask", 1, NULL, XT_HMARK_DPORT_AND },
+ { "hmark-spi-mask", 1, NULL, XT_HMARK_SPI_AND },
+ { "hmark-sp-set", 1, NULL, XT_HMARK_SPORT_OR },
+ { "hmark-dp-set", 1, NULL, XT_HMARK_DPORT_OR },
+ { "hmark-spi-set", 1, NULL, XT_HMARK_SPI_OR },
+ { "hmark-proto-mask", 1, NULL, XT_HMARK_PROTO_AND },
+ { "hmark-rnd", 1, NULL, XT_HMARK_RND },
+ { "hmark-mod", 1, NULL, XT_HMARK_MODULUS },
+ { "hmark-offs", 1, NULL, XT_HMARK_OFFSET },
+ { "hmark-dnat", 1, NULL, XT_HMARK_USE_DNAT },
+ { "hmark-snat", 1, NULL, XT_HMARK_USE_SNAT },
+ { "smask", 1, NULL, XT_HMARK_SADR_AND },
+ { "dmask", 1, NULL, XT_HMARK_DADR_AND },
+ { "sp-mask", 1, NULL, XT_HMARK_SPORT_AND },
+ { "dp-mask", 1, NULL, XT_HMARK_DPORT_AND },
+ { "spi-mask", 1, NULL, XT_HMARK_SPI_AND },
+ { "sp-set", 1, NULL, XT_HMARK_SPORT_OR },
+ { "dp-set", 1, NULL, XT_HMARK_DPORT_OR },
+ { "spi-set", 1, NULL, XT_HMARK_SPI_OR },
+ { "proto-mask", 1, NULL, XT_HMARK_PROTO_AND },
+ { "rnd", 1, NULL, XT_HMARK_RND },
+ { "mod", 1, NULL, XT_HMARK_MODULUS },
+ { "offs", 1, NULL, XT_HMARK_OFFSET },
+ { "dnat", 1, NULL, XT_HMARK_USE_DNAT },
+ { "snat", 1, NULL, XT_HMARK_USE_SNAT },
+ { .name = NULL }
+};
+
+static int
+HMARK_parse(int c, char **argv, int invert, unsigned int *flags,
+ const void *entry, struct xt_entry_target **target)
+{
+ struct xt_hmark_info *hmarkinfo
+ = (struct xt_hmark_info *)(*target)->data;
+ unsigned int value = 0xffffffff;
+ unsigned int maxint = UINT32_MAX;
+
+ if ((c < XT_HMARK_SADR_AND) || (c > XT_HMARK_OFFSET)) {
+ xtables_error(PARAMETER_PROBLEM, "Bad HMARK option \"%s\"",
+ optarg);
+ return 0;
+ }
+
+ if (c >= XT_HMARK_SPORT_AND && c <= XT_HMARK_DPORT_OR)
+ maxint = UINT16_MAX;
+ else if (c == XT_HMARK_PROTO_AND)
+ maxint = UINT8_MAX;
+
+ if (!xtables_strtoui(optarg, NULL, &value, 0, maxint))
+ xtables_error(PARAMETER_PROBLEM, "Bad HMARK value \"%s\"",
+ optarg);
+
+ if (*flags == 0) {
+ memset(hmarkinfo, 0xff, sizeof(struct xt_hmark_info));
+ hmarkinfo->pset.v32 = 0;
+ hmarkinfo->flags = 0;
+ hmarkinfo->spiset = 0;
+ hmarkinfo->hoffs = 0;
+ hmarkinfo->hashrnd = DEF_HRAND;
+ }
+ switch (c) {
+ case XT_HMARK_SADR_AND:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-smask' once");
+ }
+ hmarkinfo->smask = htonl(value);
+ if (value == maxint)
+ c = 0;
+ break;
+
+ case XT_HMARK_DADR_AND:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-dmask' once");
+ }
+ hmarkinfo->dmask = htonl(value);
+ if (value == maxint)
+ c = 0;
+ break;
+
+ case XT_HMARK_MODULUS:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-mod' once");
+ }
+ if (value == 0) {
+ xtables_error(PARAMETER_PROBLEM,
+ "xxx modulus 0 ? "
+ "thats a div by 0");
+ value = 0xffffffff;
+ }
+ hmarkinfo->hmod = value;
+ if (value == maxint)
+ c = 0;
+ break;
+
+ case XT_HMARK_OFFSET:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-offs' once");
+ }
+ hmarkinfo->hoffs = value;
+ if (value == 0)
+ c = 0;
+ break;
+
+ case XT_HMARK_SPORT_AND:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-sp-mask' once");
+ }
+ hmarkinfo->pmask.p16.src = htons(value);
+ if (value == maxint)
+ c = 0;
+ break;
+
+ case XT_HMARK_DPORT_AND:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-dp-mask' once");
+ }
+ hmarkinfo->pmask.p16.dst = htons(value);
+ if (value == maxint)
+ c = 0;
+ break;
+
+ case XT_HMARK_SPI_AND:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-spi-mask' once");
+ }
+ hmarkinfo->spimask = htonl(value);
+ if (value == maxint)
+ c = 0;
+ break;
+
+ case XT_HMARK_SPORT_OR:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-sp-set' once");
+ }
+ hmarkinfo->pset.p16.src = htons(value);
+ if (!value)
+ c = 0;
+ break;
+
+ case XT_HMARK_DPORT_OR:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-dp-set' once");
+ }
+ hmarkinfo->pset.p16.dst = htons(value);
+ if (!value)
+ c = 0;
+ break;
+
+ case XT_HMARK_SPI_OR:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-spi-set' once");
+ }
+ hmarkinfo->spiset = htonl(value);
+ if (!value)
+ c = 0;
+ break;
+
+ case XT_HMARK_PROTO_AND:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify "
+ "`--hmark-proto-mask' once");
+ }
+ hmarkinfo->prmask = value;
+ if (value == maxint)
+ c = 0;
+ break;
+
+ case XT_HMARK_RND:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify `--hmark-rnd' once");
+ }
+ hmarkinfo->hashrnd = value;
+ if (value == DEF_HRAND)
+ c = 0;
+ break;
+
+ case XT_HMARK_USE_DNAT:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify `--hmark-rnd' once");
+ }
+ break;
+
+ case XT_HMARK_USE_SNAT:
+ if (*flags & (1 << c)) {
+ xtables_error(PARAMETER_PROBLEM,
+ "Can only specify `--hmark-rnd' once");
+ }
+ break;
+
+ default:
+ return 0;
+ }
+ *flags |= 1 << c;
+ hmarkinfo->flags = *flags;
+
+ return 1;
+}
+
+static void HMARK_check(unsigned int flags)
+{
+ if (!(flags & (1 << XT_HMARK_MODULUS)))
+ xtables_error(PARAMETER_PROBLEM, "HMARK: the --hmark-mod, "
+ "is not set, that means the nfmark will be in range"
+ " 0 - 0xffffffff");
+}
+
+static void HMARK_print(const void *ip, const struct xt_entry_target *target,
+ int numeric)
+{
+ const struct xt_hmark_info *info =
+ (const struct xt_hmark_info *)target->data;
+
+ printf(" HMARK ");
+ if (info->flags & (1 << XT_HMARK_USE_SNAT))
+ printf("snat, ");
+ if (info->flags & (1 << XT_HMARK_SADR_AND))
+ printf("smask 0x%x ", htonl(info->smask));
+
+ if (info->flags & (1 << XT_HMARK_USE_DNAT))
+ printf("dnat, ");
+ if (info->flags & (1 << XT_HMARK_DADR_AND))
+ printf("dmask 0x%x ", htonl(info->dmask));
+
+ if (info->flags & (1 << XT_HMARK_SPORT_AND))
+ printf("sp-mask 0x%x ", htons(info->pmask.p16.src));
+ if (info->flags & (1 << XT_HMARK_DPORT_AND))
+ printf("dp-mask 0x%x ", htons(info->pmask.p16.dst));
+ if (info->flags & (1 << XT_HMARK_SPI_AND))
+ printf("spi-mask 0x%x ", htonl(info->spimask));
+ if (info->flags & (1 << XT_HMARK_SPORT_OR))
+ printf("sp-set 0x%x ", htons(info->pset.p16.src));
+ if (info->flags & (1 << XT_HMARK_DPORT_OR))
+ printf("dp-set 0x%x ", htons(info->pset.p16.dst));
+ if (info->flags & (1 << XT_HMARK_SPI_OR))
+ printf("spi-set 0x%x ", htonl(info->spiset));
+ if (info->flags & (1 << XT_HMARK_PROTO_AND))
+ printf("proto-mask 0x%x ", info->prmask);
+ if (info->flags & (1 << XT_HMARK_RND))
+ printf("rnd 0x%x ", info->hashrnd);
+ if (info->flags & (1 << XT_HMARK_MODULUS))
+ printf("mark=hv %% 0x%x ", info->hmod);
+ if (info->flags & (1 << XT_HMARK_OFFSET))
+ printf("+ 0x%x ", info->hoffs);
+}
+
+static void HMARK_save(const void *ip, const struct xt_entry_target *target)
+{
+ const struct xt_hmark_info *info =
+ (const struct xt_hmark_info *)target->data;
+
+ if (info->flags & (1 << XT_HMARK_SADR_AND))
+ printf("--hmark-smask 0x%x ", htonl(info->smask));
+ if (info->flags & (1 << XT_HMARK_DADR_AND))
+ printf("--hmark-dmask 0x%x ", htonl(info->dmask));
+ if (info->flags & (1 << XT_HMARK_SPORT_AND))
+ printf("--hmark-sp-mask 0x%x ", htons(info->pmask.p16.src));
+ if (info->flags & (1 << XT_HMARK_DPORT_AND))
+ printf("--hmark-dp-mask 0x%x ", htons(info->pmask.p16.dst));
+ if (info->flags & (1 << XT_HMARK_SPI_AND))
+ printf("--hmark-spi-mask 0x%x ", htonl(info->spimask));
+ if (info->flags & (1 << XT_HMARK_SPORT_OR))
+ printf("--hmark-sp-set 0x%x ", htons(info->pset.p16.src));
+ if (info->flags & (1 << XT_HMARK_DPORT_OR))
+ printf("--hmark-dp-set 0x%x ", htons(info->pset.p16.dst));
+ if (info->flags & (1 << XT_HMARK_SPI_OR))
+ printf("--hmark-spi-set 0x%x ", htonl(info->spiset));
+ if (info->flags & (1 << XT_HMARK_PROTO_AND))
+ printf("--hmark-proto-mask 0x%x ", info->prmask);
+ if (info->flags & (1 << XT_HMARK_RND))
+ printf("--hmark-rnd 0x%x ", info->hashrnd);
+ if (info->flags & (1 << XT_HMARK_MODULUS))
+ printf("--hmark-mod 0x%x ", info->hmod);
+ if (info->flags & (1 << XT_HMARK_OFFSET))
+ printf("--hmark-offs 0x%x ", info->hoffs);
+ if (info->flags & (1 << XT_HMARK_USE_DNAT))
+ printf("--hmark-dnat ");
+ if (info->flags & (1 << XT_HMARK_USE_SNAT))
+ printf("--hmark-snat ");
+}
+
+static struct xtables_target mark_tg_reg[] = {
+ {
+ .family = NFPROTO_UNSPEC,
+ .name = "HMARK",
+ .version = XTABLES_VERSION,
+ .revision = 0,
+ .size = XT_ALIGN(sizeof(struct xt_hmark_info)),
+ .userspacesize = XT_ALIGN(sizeof(struct xt_hmark_info)),
+ .help = HMARK_help,
+ .parse = HMARK_parse,
+ .final_check = HMARK_check,
+ .print = HMARK_print,
+ .save = HMARK_save,
+ .extra_opts = HMARK_opts,
+ },
+};
+
+void _init(void)
+{
+ xtables_register_targets(mark_tg_reg, ARRAY_SIZE(mark_tg_reg));
+}
+
diff --git a/extensions/libxt_HMARK.man b/extensions/libxt_HMARK.man
new file mode 100644
index 0000000..8f44676
--- /dev/null
+++ b/extensions/libxt_HMARK.man
@@ -0,0 +1,66 @@
+This module does the same as MARK, i.e. set an fwmark, but the mark is based on a hash value.
+The hash is based on saddr, daddr, sport, dport and proto. The same mark will be produced independet of direction if no masks is set or the same masks is used for src and dest.
+The hash mark could be adjusted by modulus and finally an offset could be added, i.e the final mark will be within a range. If state RELATED is used icmp will be handled also, i.e. hash will be calculated on the original message not the icmp it self.
+Note: None of the parameters effect the packet it self only the calculated hash value.
+.PP
+Parameters:
+For all masks default is all "1:s", to disable a field use mask 0
+For IPv6 it's just the last 32 bits that is included in the hash
+.TP
+\fB\-\-hmark\-smask\fP \fIvalue\fP
+The value to AND the source address with (saddr & value).
+.TP
+\fB\-\-hmark\-dmask\fP \fIvalue\fP
+The value to AND the dest. address with (daddr & value).
+.TP
+\fB\-\-hmark\-sp\-mask\fP \fIvalue\fP
+A 16 bit value to AND the src port with (sport & value).
+.TP
+\fB\-\-hmark\-dp\-mask\fP \fIvalue\fP
+A 16 bit value to AND the dest port with (dport & value).
+.TP
+\fB\-\-hmark\-sp\-set\fP \fIvalue\fP
+A 16 bit value to OR the src port with (sport | value).
+.TP
+\fB\-\-hmark\-dp\-set\fP \fIvalue\fP
+A 16 bit value to OR the dest port with (dport | value).
+.TP
+\fB\-\-hmark\-spi\-mask\fP \fIvalue\fP
+Value to AND the spi field with (spi & value) valid for proto esp or ah.
+.TP
+\fB\-\-hmark\-spi\-set\fP \fIvalue\fP
+Value to OR the spi field with (spi | value) valid for proto esp or ah.
+.TP
+\fB\-\-hmark\-proto\-mask\fP \fIvalue\fP
+An 8 bit value to AND the L4 proto field with (proto & value).
+.TP
+\fB\-\-hmark\-rnd\fP \fIvalue\fP
+A 32 bit initial value for hash calc, default is 0xc175a3b8.
+.TP
+\fB\-\-hmark\-dnat\fP
+Replace src addr/port with original dst addr/port before calc, hash
+.TP
+\fB\-\-hmark\-dnat\fP
+Replace dst addr/port with original src addr/port before calc, hash
+.PP
+Final processing of the mark in order of execution.
+.TP
+\fB\-\-hmark\-mod\fP \fvalue (must be > 0)\fP
+The easiest way to describe this is: hash = hash mod <value>
+.TP
+\fB\-\-hmark\-offs\fP \fvalue\fP
+The easiest way to describe this is: hash = hash + <value>
+.PP
+\fIExamples:\fP
+.PP
+Default rule handles all TCP, UDP, SCTP, ESP & AH
+.IP
+iptables \-t mangle \-A PREROUTING \-m state \-\-state NEW,ESTABLISHED,RELATED
+ \-j HMARK \-\-hmark-offs 10000 \-\-hmark-mod 10
+.PP
+Handle SCTP and hash dest port only and produce a nfmark between 100-119.
+.IP
+iptables \-t mangle \-A PREROUTING -p SCTP \-j HMARK \-\-smask 0 \-\-dmask 0
+ \-\-sp\-mask 0 \-\-offs 100 \-\-mod 20
+.PP
+
diff --git a/include/linux/netfilter/xt_hmark.h b/include/linux/netfilter/xt_hmark.h
new file mode 100644
index 0000000..7b3ee5d
--- /dev/null
+++ b/include/linux/netfilter/xt_hmark.h
@@ -0,0 +1,48 @@
+#ifndef XT_HMARK_H_
+#define XT_HMARK_H_
+
+#include <linux/types.h>
+
+/*
+ * Flags must not start at 0, since it's used as none.
+ */
+enum {
+ XT_HMARK_USE_SNAT = 1, /* SNAT & DNAT are used by the kernel module */
+ XT_HMARK_USE_DNAT,
+ XT_HMARK_SADR_AND,
+ XT_HMARK_DADR_AND,
+ XT_HMARK_SPI_AND,
+ XT_HMARK_SPI_OR,
+ XT_HMARK_SPORT_AND,
+ XT_HMARK_DPORT_AND,
+ XT_HMARK_SPORT_OR,
+ XT_HMARK_DPORT_OR,
+ XT_HMARK_PROTO_AND,
+ XT_HMARK_RND,
+ XT_HMARK_MODULUS,
+ XT_HMARK_OFFSET,
+};
+
+union ports {
+ struct {
+ __u16 src;
+ __u16 dst;
+ } p16;
+ __u32 v32;
+};
+
+struct xt_hmark_info {
+ __u32 smask; /* Source address mask */
+ __u32 dmask; /* Dest address mask */
+ union ports pmask;
+ union ports pset;
+ __u32 spimask;
+ __u32 spiset;
+ __u16 flags; /* Print out only */
+ __u16 prmask; /* L4 Proto mask */
+ __u32 hashrnd;
+ __u32 hmod; /* Modulus */
+ __u32 hoffs; /* Offset */
+};
+
+#endif /* XT_HMARK_H_ */
--
1.7.4.4
^ permalink raw reply related
* Re: [PATCH net] bonding: properly stop queuing work when requested
From: David Miller @ 2011-10-03 17:48 UTC (permalink / raw)
To: andy; +Cc: netdev
In-Reply-To: <1316811214-15002-1-git-send-email-andy@greyhouse.net>
From: Andy Gospodarek <andy@greyhouse.net>
Date: Fri, 23 Sep 2011 16:53:34 -0400
> During a test where a pair of bonding interfaces using ARP monitoring
> were both brought up and torn down (with an rmmod) repeatedly, a panic
> in the timer code was noticed. I tracked this down and determined that
> any of the bonding functions that ran as workqueue handlers and requeued
> more work might not properly exit when the module was removed.
>
> There was a flag protected by the bond lock called kill_timers that is
> set when the interface goes down or the module is removed, but many of
> the functions that monitor link status now unlock the bond lock to take
> rtnl first. There is a chance that another CPU running the rmmod could
> get the lock and set kill_timers after the first check has passed.
>
> This patch does not allow any function to queue work that will make
> itself run unless kill_timers is not set. I also noticed while doing
> this work that bond_resend_igmp_join_requests did not have a check for
> kill_timers, so I added the needed call there as well.
>
> Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
> Reported-by: Liang Zheng <lzheng@redhat.com>
Applied, thanks Andy.
^ permalink raw reply
* Re: [PATCH] net: sh_eth: fix build failure
From: David Miller @ 2011-10-03 18:00 UTC (permalink / raw)
To: yoshihiro.shimoda.uh; +Cc: sfr, netdev, linux-sh
In-Reply-To: <4E8534A9.3050002@renesas.com>
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Date: Fri, 30 Sep 2011 12:16:57 +0900
> The following commit removed some including headers:
> "net: sh_eth: move the asm/sh_eth.h to include/linux/"
> (commit id: d4fa0e35fdbd54acf791fa3793d6d17f7795f7ae)
>
> Then, the build failure happened on the linux-next:
...
> This patch fixes the issue. This patch also get back include/kernel.h
> and linux/spinlock.h.
>
> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Applied, thanks.
^ permalink raw reply
* Re: [PATCH net-next] tcp: report ECN_SEEN in tcp_info
From: David Miller @ 2011-10-03 18:01 UTC (permalink / raw)
To: eric.dumazet; +Cc: shemminger, netdev
In-Reply-To: <1317357897.3274.11.camel@edumazet-laptop>
From: Eric Dumazet <eric.dumazet@gmail.com>
Date: Fri, 30 Sep 2011 06:44:57 +0200
> Allows ss command (iproute2) to display "ecnseen" if at least one packet
> with ECT(0) or ECT(1) or ECN was received by this socket.
>
> "ecn" means ECN was negociated at session establishment (TCP level)
>
> "ecnseen" means we received at least one packet with ECT fields set (IP
> level)
>
> ss -i
> ...
> ESTAB 0 0 192.168.20.110:22 192.168.20.144:38016
> ino:5950 sk:f178e400
> mem:(r0,w0,f0,t0) ts sack ecn ecnseen bic wscale:7,8 rto:210
> rtt:12.5/7.5 cwnd:10 send 9.3Mbps rcv_space:14480
>
> Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com>
Applied, thanks Eric.
^ permalink raw reply
* Re: big picture UDP/IP performance question re 2.6.18 -> 2.6.32
From: starlight @ 2011-10-03 18:02 UTC (permalink / raw)
To: Eric Dumazet
Cc: linux-kernel, netdev, Willy Tarreau, Peter Zijlstra,
Stephen Hemminger
At 06:16 PM 10/3/2011 +0200, Eric Dumazet wrote:
>
>It seems you use 4096 2MB hugepages, and your
>machine has 1GB pages availabe, you could
>try to use them.
>
>(boot cmd : hugepagesz=1GB hugepages=8 )
Tried it and got errno 12 on the segment
allocations. None were allocated, though
the count is six and the largest is exactly
1GB. Don't have time to dig into it.
^ permalink raw reply
* Re: [patch net-next-2.6] Repair wrong named definition aligned_u64
From: David Miller @ 2011-10-03 18:04 UTC (permalink / raw)
To: jzupka; +Cc: netdev, loke.chetan, jpirko
In-Reply-To: <1317384594-17014-1-git-send-email-jzupka@redhat.com>
From: Jiří Župka <jzupka@redhat.com>
Date: Fri, 30 Sep 2011 14:09:54 +0200
> This repairs problem with compile library in userspace (libnl).
>
> Signed-off-by: Jiří Župka <jzupka@redhat.com>
Applied, thanks.
^ permalink raw reply
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