* Re: [PATCH] Implement IP_EVIL socket option (RFC 3514)
From: David Miller @ 2012-04-02 9:35 UTC (permalink / raw)
To: martin; +Cc: linux-kernel, netdev
In-Reply-To: <20120402092410.GA7601@dezo.moloch.sk>
From: Martin Lucina <martin@lucina.net>
Date: Mon, 2 Apr 2012 11:24:10 +0200
> davem@davemloft.net said:
>>
>> I'm extremely disappointed with the april fools submissions this
>> year to be honest...
>
> Well, with Anonymous making their own distro, and the advertised "takedown
> of the Internet" on Saturday, it seemed timeley. I guess I should have
> written a more convincing blurb in the commit message...
It wasn't the blurb it was simply that you're at least the third
person to submit a patch like this over the years, here's one:
http://www.version6.net/patches/linux-2.4.20-rfc3514.dif
Someone did a netfilter iptables module too:
http://www.gossamer-threads.com/lists/linux/kernel/431645
^ permalink raw reply
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
From: Mike Sinkovsky @ 2012-04-02 9:40 UTC (permalink / raw)
To: Mark Brown; +Cc: netdev, linux-kernel
In-Reply-To: <20120331212303.GB19965@sirena.org.uk>
01.04.2012 3:23, Mark Brown wrote:
> On Fri, Mar 30, 2012 at 01:00:06PM +0600, Mike Sinkovsky wrote:
>
>> +config WIZNET_W5100
>> + tristate "WIZnet W5100 Ethernet support"
>> + depends on ARM || BLACKFIN
>
> What are the architecture dependencies here?
Original driver from chip manufacturer was written for ARM, and now we
use it on Blackfin.
Completely untested on other arch's, but should work. Maybe.
>> +static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
>> +{
>> + struct net_device *ndev = ndev_instance;
>> + struct w5100_priv *priv = netdev_priv(ndev);
>> +
>> + int ir = w5100_read(priv, W5100_S0_IR);
>> + w5100_write(priv, W5100_S0_IR, ir);
>> +
>> + if (ir& S0_IR_RECV) {
>> + if (napi_schedule_prep(&priv->napi)) {
>> + w5100_write(priv, W5100_IMR, 0);
>> + mmiowb();
>> + __napi_schedule(&priv->napi);
>> + }
>> + }
>> +
>> + if (ir& S0_IR_SENDOK) {
>> + if (unlikely(netif_queue_stopped(ndev)))
>> + netif_wake_queue(ndev);
>> + }
>> +
>> + return IRQ_HANDLED;
>
> This unconditionally acknowledges the interrupt even if one wasn't
> reported by the device.
Hm? Don't get you.
W5100_S0_IR register is R/W1C - writing back clears it.
Or what do you mean?
>> + irq = platform_get_irq(pdev, 0);
>> + if (irq< 0)
>> + return irq;
>> + ret = devm_request_irq(&pdev->dev, irq, w5100_interrupt,
>> + IRQ_TYPE_LEVEL_LOW, name, ndev);
>> + if (ret< 0)
>> + return ret;
>> + priv->irq = irq;
>> +
>> + link = platform_get_resource(pdev, IORESOURCE_IO, 0);
>> + if (!link) {
>> + priv->link_gpio = -1;
>
> This is rather an abuse of the resource API and will run into trouble on
> device tree based systems. You should use platform data for non-DT
> systems.
Ok, will move it to struct wiznet_platform_data.
But here is downside - this gpio is optional, and if board doesn't have
it - it must be initialized as negative value, not just omitted.
>> + if (request_irq(priv->link_irq, w5100_detect_link,
>> + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
>> + link_name, priv->ndev)< 0)
>
> Suggest using request_any_context_irq() to increase the range of
> supported interrupt controllers.
Could it be anything but hard irq?
But there is another bug - it should be devm_request_irq...
:)
>> +err_register:
>> + free_netdev(ndev);
>> + platform_set_drvdata(pdev, NULL);
>> + dev_info(&pdev->dev, "probe failed (%d)\n", err);
>
> This will be done for you by the driver core.
You mean platform_set_drvdata() and dev_info()? Maybe.
I'm sure platform_driver will not do free_netdev() for me.
--
Mike
^ permalink raw reply
* Re: [PATCH] Implement IP_EVIL socket option (RFC 3514)
From: Martin Lucina @ 2012-04-02 9:42 UTC (permalink / raw)
To: David Miller; +Cc: linux-kernel, netdev
In-Reply-To: <20120402.053544.1502825597915995582.davem@davemloft.net>
davem@davemloft.net said:
> It wasn't the blurb it was simply that you're at least the third
> person to submit a patch like this over the years, here's one:
>
> http://www.version6.net/patches/linux-2.4.20-rfc3514.dif
>
> Someone did a netfilter iptables module too:
>
> http://www.gossamer-threads.com/lists/linux/kernel/431645
I missed the former patch completely, sorry about that. Googling for "evil
bit implementation" did turn up the ipt_evil patch but no corresponding
patch to actually let an application *set* the bit.
--
Martin Lucina
http://lucina.net/ (interwebs/blogs/rants/consulting)
martin@lucina.net (smtp/xmpp/jabber/gtalk)
@matolucina (twitter)
^ permalink raw reply
* [PATCH 3.3.0] phy:icplus:fix Auto Power Saving in ip101a_config_init.
From: Srinivas KANDAGATLA @ 2012-04-02 10:02 UTC (permalink / raw)
To: netdev; +Cc: davem, peppe.cavallaro, srinivas.kandagatla
From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
This patch fixes Auto Power Saving configuration in ip101a_config_init
which was broken as there is no phy register write followed after
setting IP101A_APS_ON flag.
This patch also fixes the return value of ip101a_config_init.
Without this patch ip101a_config_init returns 2 which is not an error
accroding to IS_ERR and the mac driver will continue accessing 2 as
valid pointer to phy_dev resulting in memory fault.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
---
Hi All,
This patch fixes broken ip101a_config_init in icplus.c.
Thanks,
srini
drivers/net/phy/icplus.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index 0856e1b..f08c85a 100644
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -162,7 +162,8 @@ static int ip101a_g_config_init(struct phy_device *phydev)
/* Enable Auto Power Saving mode */
c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
c |= IP101A_G_APS_ON;
- return c;
+
+ return phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
}
static int ip175c_read_status(struct phy_device *phydev)
--
1.7.0.4
^ permalink raw reply related
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From: boris @ 2012-04-02 9:47 UTC (permalink / raw)
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^ permalink raw reply
* Re: [PATCH] ipv6: fix array index in ip6_mc_add_src()
From: RongQing Li @ 2012-04-02 10:16 UTC (permalink / raw)
To: David Miller; +Cc: netdev
In-Reply-To: <20120401.151318.984514868716173152.davem@davemloft.net>
2012/4/2 David Miller <davem@davemloft.net>:
> From: roy.qing.li@gmail.com
> Date: Sun, 1 Apr 2012 16:45:26 +0800
>
>> From: RongQing.Li <roy.qing.li@gmail.com>
>>
>> Convert array index from the loop bound to the loop index.
>>
>> Signed-off-by: RongQing.Li <roy.qing.li@gmail.com>
>
> That's not all you are doing:
>
>> - (void) ip6_mc_del1_src(pmc, sfmode, &psfsrc[i]);
>> + ip6_mc_del1_src(pmc, sfmode, &psfsrc[j]);
>
> You absolutely MUST mention and explain this (void) removal.
> It's probably there to elide an unchecked return value
> warning from the compiler.
since ip6_mc_del1_src() does not use __must_check likely attribute.
I try to compile with several gcc warning options, but do not
find which options can report the unchecked return value.
Maybe other tools will complain the unchecked return value.
So I will keep the void.
-R
^ permalink raw reply
* Re: one pci_id missing in sky2 driver
From: Mirko Lindner @ 2012-04-02 10:24 UTC (permalink / raw)
To: Stephen Hemminger
Cc: Xose Vazquez Perez, David Miller, Hardy Bastian,
netdev@vger.kernel.org
In-Reply-To: <20120401122235.714dab09@s6510.linuxnetplumber.net>
Thanks Stephen. The ID belongs to our newest device. We'll include the code
into the driver and send a patch to the list as soon the driver has passed our
internal tests.
- Mirko
On Sunday, April 01, 2012 12:22:35 PM Stephen Hemminger wrote:
> I would like to use this opportunity to have the developers at Marvell, test
> and submit this. They have the hardware (I don't) and often new chips
> require other special tweaks. Marvell expressed interest in taking over
> maintaining the sky2 driver, this would be a good first step.
^ permalink raw reply
* Re: [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1 csum
From: Giuseppe CAVALLARO @ 2012-04-02 11:07 UTC (permalink / raw)
To: Deepak SIKRI
Cc: netdev@vger.kernel.org, davem@davemloft.net, Srinivas KANDAGATLA,
spear-devel, Shiraz HASHIM, Viresh KUMAR,
bhutchings@solarflare.com
In-Reply-To: <4F6D921F.10400@st.com>
On 3/24/2012 10:21 AM, Deepak SIKRI wrote:
>
>
>
> On 3/23/2012 2:38 PM, Giuseppe CAVALLARO wrote:
>> [snip]
>>
>>
>> - priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
>> - if (priv->rx_coe)
>> - pr_info(" RX Checksum Offload Engine supported\n");
>> + if (priv->plat->rx_coe)
>> + pr_info(" RX Checksum Offload Engine supported (type %d)\n",
>> + priv->plat->rx_coe);
>> if (priv->plat->tx_coe)
>> pr_info(" TX Checksum insertion supported\n");
>>
>
> rx_coe needs to be enabled. Earlier it was being done. Any specific
> reasons to remove this.
> Instead this code needs to be moved post mac reset has been done.
Hello Deepak
sorry for this delay.
I've not clear at all your question.
The driver well uses the rx_coe as briefly described below:
probe funct
|__ hw_init
|_ check the RX type from HW cap reg
|__ Override the rx_coe if required
After that the rx_coe is used and passed to the core as expected.
In case of there is no HW cap register so the rx_coe from platform will
be used.
Peppe
>
> Regards
> Deepak
>
^ permalink raw reply
* Re: [PATCH 5/9] ipvs: use adaptive pause in master thread
From: Pablo Neira Ayuso @ 2012-04-02 11:11 UTC (permalink / raw)
To: Simon Horman
Cc: lvs-devel, netdev, netfilter-devel, Wensong Zhang,
Julian Anastasov
In-Reply-To: <1332320185-27157-6-git-send-email-horms@verge.net.au>
Hi Simon et al.
On Wed, Mar 21, 2012 at 05:56:20PM +0900, Simon Horman wrote:
> From: Julian Anastasov <ja@ssi.bg>
>
> High rate of sync messages in master can lead to
> overflowing the socket buffer and dropping the messages.
> Instead of using fixed pause try to adapt to the sync
> rate, so that we do not wakeup too often while at the same
> time staying below the socket buffer limit.
I see. You are avoiding the congestion in the socket queue by putting
the pressure in your sync_buff queue (I don't find any limit in
the code for the amount of memory that it may consume btw).
Please, correct me if I'm wrong, but from this I can se you're
assuming that there's always room in the syn_buff queue to store
messages. This is valid if the high peak of traffic lasts for short
time. However, if it lasts long, the worker thread may not be able to
consume all the messages in time under high stress situation that
lasts long and the sync_buffer may keep growing more and more.
Moreover, the backup may receive sync messages talking about old
states that are not useful anymore to recover the load-balancing in
case of failover.
One more concern, please see below.
> Signed-off-by: Julian Anastasov <ja@ssi.bg>
> Tested-by: Aleksey Chudov <aleksey.chudov@gmail.com>
> Signed-off-by: Simon Horman <horms@verge.net.au>
> ---
> net/netfilter/ipvs/ip_vs_sync.c | 60 +++++++++++++++++++++++++++++---------
> 1 files changed, 46 insertions(+), 14 deletions(-)
>
> diff --git a/net/netfilter/ipvs/ip_vs_sync.c b/net/netfilter/ipvs/ip_vs_sync.c
> index 0e36679..9201c43 100644
> --- a/net/netfilter/ipvs/ip_vs_sync.c
> +++ b/net/netfilter/ipvs/ip_vs_sync.c
> @@ -1392,18 +1392,22 @@ ip_vs_send_async(struct socket *sock, const char *buffer, const size_t length)
> return len;
> }
>
> -static void
> +static int
> ip_vs_send_sync_msg(struct socket *sock, struct ip_vs_sync_mesg *msg)
> {
> int msize;
> + int ret;
>
> msize = msg->size;
>
> /* Put size in network byte order */
> msg->size = htons(msg->size);
>
> - if (ip_vs_send_async(sock, (char *)msg, msize) != msize)
> - pr_err("ip_vs_send_async error\n");
> + ret = ip_vs_send_async(sock, (char *)msg, msize);
> + if (ret >= 0 || ret == -EAGAIN)
> + return ret;
> + pr_err("ip_vs_send_async error %d\n", ret);
> + return 0;
> }
>
> static int
> @@ -1428,33 +1432,61 @@ ip_vs_receive(struct socket *sock, char *buffer, const size_t buflen)
> return len;
> }
>
> +/* Get next buffer to send */
> +static inline struct ip_vs_sync_buff *
> +next_sync_buff(struct netns_ipvs *ipvs)
> +{
> + struct ip_vs_sync_buff *sb;
> +
> + sb = sb_dequeue(ipvs);
> + if (sb)
> + return sb;
> + /* Do not delay entries in buffer for more than 2 seconds */
> + return get_curr_sync_buff(ipvs, 2 * HZ);
> +}
>
> static int sync_thread_master(void *data)
> {
> struct ip_vs_sync_thread_data *tinfo = data;
> struct netns_ipvs *ipvs = net_ipvs(tinfo->net);
> - struct ip_vs_sync_buff *sb;
> + struct ip_vs_sync_buff *sb = NULL;
> + int pause = HZ / 10;
>
> pr_info("sync thread started: state = MASTER, mcast_ifn = %s, "
> "syncid = %d\n",
> ipvs->master_mcast_ifn, ipvs->master_syncid);
>
> while (!kthread_should_stop()) {
> - while ((sb = sb_dequeue(ipvs))) {
> - ip_vs_send_sync_msg(tinfo->sock, sb->mesg);
> - ip_vs_sync_buff_release(sb);
> - }
> + int count = 0;
>
> - /* check if entries stay in ipvs->sync_buff for 2 seconds */
> - sb = get_curr_sync_buff(ipvs, 2 * HZ);
> - if (sb) {
> - ip_vs_send_sync_msg(tinfo->sock, sb->mesg);
> - ip_vs_sync_buff_release(sb);
> + for (;;) {
> + if (!sb) {
> + sb = next_sync_buff(ipvs);
> + if (!sb)
> + break;
> + }
> + if (ip_vs_send_sync_msg(tinfo->sock, sb->mesg) >= 0 ||
> + pause == 1) {
> + ip_vs_sync_buff_release(sb);
> + sb = NULL;
> + count++;
> + } else {
> + pause = max(1, (pause >> 1));
> + break;
> + }
> }
>
> - schedule_timeout_interruptible(HZ);
> + /* Max packets to send at once */
> + if (count > 200)
> + pause = max(1, (pause - HZ / 20));
> + else if (count < 20)
> + pause = min(HZ / 4, (pause + HZ / 20));
> + schedule_timeout_interruptible(sb ? 1 : pause);
This rate-limits the amount of times the worker is woken up.
Still, this seems to me like an ad-hoc congestion solution. There's no
justification why those numbers has been chosed, eg. why do we assume
that we're congested if we've reached 200 packets in one single loop?
To me, congestion control is a complicated thing (there is plenty of
literature for TCP avoid it). I'm not sure how many patches will
follow after this one to try to improve your congestion control
solution.
So, my question is, are you sure you want to enter this domain?
IMO, better to stick to some simple solution, ie. just drop messages
if the worker thread receives a high peak of work, than trying to
define some sort of rate-limit solution based on assumptions that are
not generic enough for every setup.
^ permalink raw reply
* Re: [PATCH 09/10] stmmac: MDC clock dynamically based on the csr clock input
From: Giuseppe CAVALLARO @ 2012-04-02 11:17 UTC (permalink / raw)
To: David Laight
Cc: netdev, davem, srinivas.kandagatla, deepak.sikri, spear-devel,
shiraz.hashim, viresh.kumar, bhutchings
In-Reply-To: <AE90C24D6B3A694183C094C60CF0A2F6026B6EB8@saturn3.aculab.com>
On 3/23/2012 10:53 AM, David Laight wrote:
>
>
>> -----Original Message-----
>> From: netdev-owner@vger.kernel.org
>> [mailto:netdev-owner@vger.kernel.org] On Behalf Of Giuseppe CAVALLARO
>> Sent: 23 March 2012 09:09
>> To: netdev@vger.kernel.org
>> Cc: davem@davemloft.net; srinivas.kandagatla@st.com;
>> deepak.sikri@st.com; spear-devel@list.st.com;
>> shiraz.hashim@st.com; viresh.kumar@st.com;
>> bhutchings@solarflare.com; Giuseppe Cavallaro
>> Subject: [PATCH 09/10] stmmac: MDC clock dynamically based on
>> the csr clock input
>>
>> If a specific clk_csr value is passed from the platform
>> this means that the CSR Clock Range selection cannot be
>> changed at run-time and it is fixed (as reported in the driver
>> documentation). Viceversa the driver will try to set the MDC
>> clock dynamically according to the actual clock input.
>>
>> Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
>> Reviewed-by: Francesco Virlinzi <francesco.virlinzi@st.com>
>> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
>> ---
>> Documentation/networking/stmmac.txt | 2 +-
>> drivers/net/ethernet/stmicro/stmmac/common.h | 10 +++++
>> drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 +
>> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 40
>> +++++++++++++++++++++
>> drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 4 +-
>> 5 files changed, 54 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/networking/stmmac.txt
>> b/Documentation/networking/stmmac.txt
>> index eacb640..ab1e8d7 100644
>> --- a/Documentation/networking/stmmac.txt
>> +++ b/Documentation/networking/stmmac.txt
>> @@ -137,7 +137,7 @@ Where:
>> o pbl: the Programmable Burst Length is maximum number of beats to
>> be transferred in one DMA transaction.
>> GMAC also enables the 4xPBL by default.
>> - o clk_csr: CSR Clock range selection.
>> + o clk_csr: fixed CSR Clock range selection.
>> o has_gmac: uses the GMAC core.
>> o enh_desc: if sets the MAC will use the enhanced
>> descriptor structure.
>> o tx_coe: core is able to perform the tx csum in HW.
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h
>> b/drivers/net/ethernet/stmicro/stmmac/common.h
>> index f4df1eb..312e3f1 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/common.h
>> +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
>> @@ -97,6 +97,16 @@ struct stmmac_extra_stats {
>> unsigned long normal_irq_n;
>> };
>>
>> +/* CSR Frequency Access Defines*/
>> +#define CSR_F_35M 35000000
>> +#define CSR_F_60M 60000000
>> +#define CSR_F_100M 100000000
>> +#define CSR_F_150M 150000000
>> +#define CSR_F_250M 50000000
>> +#define CSR_F_300M 300000000
>
> The value of CSR_F_250M looks like a typo.
yes you are right, I'll fix it and re-send the all patches.
> These defines look rather pointless to me though!
>
> Another patch has:
>> -----------------------------------------
>> Selection MDC Clock
>> -----------------------------------------
>> 1000 clk_csr_i/4
>> 1001 clk_csr_i/6
>> 1010 clk_csr_i/8
>> 1011 clk_csr_i/10
>> 1100 clk_csr_i/12
>> 1101 clk_csr_i/14
>> 1110 clk_csr_i/16
>> 1111 clk_csr_i/18
> I detect a pattern ...
On this mac, the MDC clock can be set by user in several ways.
if the bit Reg4 bit 5 is 0 so the clock divisor will be driven according
to a fixed range of frq (CSR_F_35M & CO).
If the bit 5 is set then "custom" divisors can be used.
I know it's quite tricky but these patches (from SPEAr) that I reviewed,
indeed, added an useful fix to dynamically set the MDC clock according
to the actual clock source. This also helped somebody on custom boards.
Peppe
>
> David
>
>
>
>
^ permalink raw reply
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
From: Mark Brown @ 2012-04-02 11:21 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
In-Reply-To: <4F797402.1050109@permonline.ru>
[-- Attachment #1: Type: text/plain, Size: 2656 bytes --]
On Mon, Apr 02, 2012 at 03:40:18PM +0600, Mike Sinkovsky wrote:
> 01.04.2012 3:23, Mark Brown wrote:
> >On Fri, Mar 30, 2012 at 01:00:06PM +0600, Mike Sinkovsky wrote:
> >>+config WIZNET_W5100
> >>+ tristate "WIZnet W5100 Ethernet support"
> >>+ depends on ARM || BLACKFIN
> >What are the architecture dependencies here?
> Original driver from chip manufacturer was written for ARM, and now
> we use it on Blackfin.
> Completely untested on other arch's, but should work. Maybe.
Remove the dependency then. If there's an issue people can fix it.
> >>+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
> >>+{
> >>+ struct net_device *ndev = ndev_instance;
> >>+ struct w5100_priv *priv = netdev_priv(ndev);
> >>+
> >>+ int ir = w5100_read(priv, W5100_S0_IR);
> >>+ w5100_write(priv, W5100_S0_IR, ir);
> >>+
> >>+ if (ir& S0_IR_RECV) {
> >>+ if (napi_schedule_prep(&priv->napi)) {
> >>+ w5100_write(priv, W5100_IMR, 0);
> >>+ mmiowb();
> >>+ __napi_schedule(&priv->napi);
> >>+ }
> >>+ }
> >>+
> >>+ if (ir& S0_IR_SENDOK) {
> >>+ if (unlikely(netif_queue_stopped(ndev)))
> >>+ netif_wake_queue(ndev);
> >>+ }
> >>+
> >>+ return IRQ_HANDLED;
> >This unconditionally acknowledges the interrupt even if one wasn't
> >reported by the device.
> Hm? Don't get you.
> W5100_S0_IR register is R/W1C - writing back clears it.
> Or what do you mean?
If you read back and no interrupts are flagged (all bits in the IRQ
status register clear) you'll still return IRQ_HANDLED.
> >This is rather an abuse of the resource API and will run into trouble on
> >device tree based systems. You should use platform data for non-DT
> >systems.
> Ok, will move it to struct wiznet_platform_data.
> But here is downside - this gpio is optional, and if board doesn't
> have it - it must be initialized as negative value, not just
> omitted.
Sure, this is all totally standard to the Linux GPIO framework.
Realistically treating 0 as an invalid GPIO should be fine.
> >>+ if (request_irq(priv->link_irq, w5100_detect_link,
> >>+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
> >>+ link_name, priv->ndev)< 0)
> >Suggest using request_any_context_irq() to increase the range of
> >supported interrupt controllers.
> Could it be anything but hard irq?
It could be a threaded IRQ (if the interrupt controller can't be
accessed from hard IRQ context).
> >>+ platform_set_drvdata(pdev, NULL);
> >>+ dev_info(&pdev->dev, "probe failed (%d)\n", err);
> >This will be done for you by the driver core.
> You mean platform_set_drvdata() and dev_info()? Maybe.
> I'm sure platform_driver will not do free_netdev() for me.
The error logging.
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* RE: [RFC] net: bpf_jit: Two pass JIT and other changes
From: Indan Zupancic @ 2012-04-02 12:03 UTC (permalink / raw)
To: David Laight; +Cc: Eric Dumazet, netdev, linux-kernel
In-Reply-To: <AE90C24D6B3A694183C094C60CF0A2F6026B6ECF@saturn3.aculab.com>
On Mon, April 2, 2012 19:28, David Laight wrote:
>
>> 1) Sadly, gcc isn't always smart enough to inline emit_code().
>> So turn it into a macro to force gcc to inline it. This saves
>> about 500 bytes. Tested with gcc 4.6.0. An alternative to the
>> macro would be to create inline emit_code1(), emit_code2() etc.
>
> Does giving it the __attribute__((always_inline)) help?
> I had to mark a load of small static functions that way
> after a minor change (possibly to the overall size)
> stopped gcc inlining everything.
I did try that first, but it didn't work for some reason. Perhaps
the kernel uses some flag that overrides it when optimising for size.
Maybe plain -Os does that already, I don't know.
Greetings,
Indan
^ permalink raw reply
* new batman-adv maintainer
From: Marek Lindner @ 2012-04-02 12:16 UTC (permalink / raw)
To: davem-fT/PcQaiUtIeIZ0/mPfg9Q
Cc: netdev-u79uwXL29TY76Z2rM5mHXA,
The list for a Better Approach To Mobile Ad-hoc Networking
David,
I'd like to let you know that Antonio is going to replace me as linux kernel
integrator. He has been active in our project for more than 2 years and
closely follows the kernel development. Sven and I are still going to be
around to help whenver there are questions or problems to discuss.
Thanks,
Marek
^ permalink raw reply
* [PATCH 0/7]: arm: lpc32xx: Device tree support
From: Roland Stigge @ 2012-04-02 12:55 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge
This is the first series of patches to introduce device tree support for the
LPC32xx SoC. This series includes patches for the various subsystems to support
device tree to be used later by the machine's initialization.
The patches apply to various subsystems:
* staging/iio/adc
* rtc
* net
* arm-soc
* i2c
* wdt
Based on v3.4-rc1
You can also pull from
git://git.antcom.de/linux-2.6 lpc32xx/dt
I'm CC'ing the various subsystem maintainers and lists who can each see what's
going on and please pick their respective subsystem's changes. - Thanks!
Signed-off-by: Roland Stigge <stigge@antcom.de>
--
Roland Stigge (7):
iio: Add device tree support to LPC32xx ADC
rtc: Add device tree support for LPC32xx
net: Add device tree support to LPC32xx
arm: mach-pnx4008: Adjust i2c.c to updated i2c-pnx.c
i2c: Add device tree support to i2c-pnx.c
i2c-pnx.c: Fix suspend
wdt: Device tree support for pnx4008-wdt
Documentation/devicetree/bindings/i2c/pnx.txt | 36 ++
Documentation/devicetree/bindings/net/lpc-eth.txt | 25 +
Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt | 15
Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt | 16
Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt | 13
arch/arm/mach-pnx4008/i2c.c | 58 ++-
arch/arm/mach-pnx4008/include/mach/i2c.h | 64 ---
drivers/i2c/busses/i2c-pnx.c | 163 +++++++---
drivers/net/ethernet/nxp/lpc_eth.c | 76 ++--
drivers/rtc/rtc-lpc32xx.c | 12
drivers/staging/iio/adc/lpc32xx_adc.c | 10
drivers/watchdog/pnx4008_wdt.c | 10
include/linux/i2c-pnx.h | 10
13 files changed, 340 insertions(+), 168 deletions(-)
^ permalink raw reply
* [PATCH 1/7] iio: Add device tree support to LPC32xx ADC
From: Roland Stigge @ 2012-04-02 12:55 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge
In-Reply-To: <1333371364-21347-1-git-send-email-stigge@antcom.de>
This patch adds device tree support to the LPC32xx's ADC.
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt | 16 ++++++++++
drivers/staging/iio/adc/lpc32xx_adc.c | 10 ++++++
2 files changed, 26 insertions(+)
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt
@@ -0,0 +1,16 @@
+* NXP LPC32xx SoC ADC controller
+
+Required properties:
+- compatible: must be "nxp,lpc32xx-adc"
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- interrupts: The ADC interrupt
+
+Example:
+
+ adc@40048000 {
+ compatible = "nxp,lpc32xx-adc";
+ reg = <0x40048000 0x1000>;
+ interrupt-parent = <&mic>;
+ interrupts = <39 0>;
+ };
--- linux-2.6.orig/drivers/staging/iio/adc/lpc32xx_adc.c
+++ linux-2.6/drivers/staging/iio/adc/lpc32xx_adc.c
@@ -30,6 +30,7 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/completion.h>
+#include <linux/of.h>
#include "../iio.h"
#include "../sysfs.h"
@@ -221,12 +222,21 @@ static int __devexit lpc32xx_adc_remove(
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id lpc32xx_adc_match[] = {
+ { .compatible = "nxp,lpc32xx-adc" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, lpc32xx_adc_match);
+#endif
+
static struct platform_driver lpc32xx_adc_driver = {
.probe = lpc32xx_adc_probe,
.remove = __devexit_p(lpc32xx_adc_remove),
.driver = {
.name = MOD_NAME,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(lpc32xx_adc_match),
},
};
^ permalink raw reply
* [PATCH 2/7] rtc: Add device tree support for LPC32xx
From: Roland Stigge @ 2012-04-02 12:55 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge
In-Reply-To: <1333371364-21347-1-git-send-email-stigge@antcom.de>
This patch adds device tree support for rtc-lpc32xx.c
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt | 15 +++++++++++++++
drivers/rtc/rtc-lpc32xx.c | 12 +++++++++++-
2 files changed, 26 insertions(+), 1 deletion(-)
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt
@@ -0,0 +1,15 @@
+* NXP LPC32xx SoC Real Time Clock controller
+
+Required properties:
+- compatible: must be "nxp,lpc32xx-rtc"
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- interrupts: The RTC interrupt
+
+Example:
+
+ rtc@40024000 {
+ compatible = "nxp,lpc32xx-rtc";
+ reg = <0x40024000 0x1000>;
+ interrupts = <52 0>;
+ };
--- linux-2.6.orig/drivers/rtc/rtc-lpc32xx.c
+++ linux-2.6/drivers/rtc/rtc-lpc32xx.c
@@ -19,6 +19,7 @@
#include <linux/rtc.h>
#include <linux/slab.h>
#include <linux/io.h>
+#include <linux/of.h>
/*
* Clock and Power control register offsets
@@ -386,13 +387,22 @@ static const struct dev_pm_ops lpc32xx_r
#define LPC32XX_RTC_PM_OPS NULL
#endif
+#ifdef CONFIG_OF
+static const struct of_device_id lpc32xx_rtc_match[] = {
+ { .compatible = "nxp,lpc32xx-rtc" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, lpc32xx_rtc_match);
+#endif
+
static struct platform_driver lpc32xx_rtc_driver = {
.probe = lpc32xx_rtc_probe,
.remove = __devexit_p(lpc32xx_rtc_remove),
.driver = {
.name = RTC_NAME,
.owner = THIS_MODULE,
- .pm = LPC32XX_RTC_PM_OPS
+ .pm = LPC32XX_RTC_PM_OPS,
+ .of_match_table = of_match_ptr(lpc32xx_rtc_match),
},
};
^ permalink raw reply
* [PATCH 3/7] net: Add device tree support to LPC32xx
From: Roland Stigge @ 2012-04-02 12:56 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge
In-Reply-To: <1333371364-21347-1-git-send-email-stigge@antcom.de>
This patch adds device tree support for lpc_eth.c.
The runtime option for MII/RMII is solved via the "phy-mode" property, SRAM
("IRAM") usage for DMA can be chosen via "use-iram".
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
Documentation/devicetree/bindings/net/lpc-eth.txt | 24 ++++++
drivers/net/ethernet/nxp/lpc_eth.c | 77 +++++++++++++---------
2 files changed, 70 insertions(+), 31 deletions(-)
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/net/lpc-eth.txt
@@ -0,0 +1,24 @@
+* NXP LPC32xx SoC Ethernet Controller
+
+Required properties:
+- compatible: Should be "nxp,lpc-eth"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain ethernet controller interrupt
+
+Optional properties:
+- phy-mode: String, operation mode of the PHY interface.
+ Supported values are: "mii" (default), "rmii"
+- use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering
+- local-mac-address : 6 bytes, mac address
+
+Example:
+
+ mac: ethernet@31060000 {
+ compatible = "nxp,lpc-eth";
+ reg = <0x31060000 0x1000>;
+ interrupt-parent = <&mic>;
+ interrupts = <29 0>;
+
+ phy-mode = "rmii";
+ use-iram;
+ };
--- linux-2.6.orig/drivers/net/ethernet/nxp/lpc_eth.c
+++ linux-2.6/drivers/net/ethernet/nxp/lpc_eth.c
@@ -340,27 +340,15 @@
*/
#define LPC_POWERDOWN_MACAHB (1 << 31)
-/* Upon the upcoming introduction of device tree usage in LPC32xx,
- * lpc_phy_interface_mode() and use_iram_for_net() will be extended with a
- * device parameter for access to device tree information at runtime, instead
- * of defining the values at compile time
- */
-static inline phy_interface_t lpc_phy_interface_mode(void)
+static phy_interface_t lpc_phy_interface_mode(struct device *dev)
{
-#ifdef CONFIG_ARCH_LPC32XX_MII_SUPPORT
+ if (dev && dev->of_node) {
+ const char *mode = of_get_property(dev->of_node,
+ "phy-mode", NULL);
+ if (mode && !strcmp(mode, "rmii"))
+ return PHY_INTERFACE_MODE_RMII;
+ }
return PHY_INTERFACE_MODE_MII;
-#else
- return PHY_INTERFACE_MODE_RMII;
-#endif
-}
-
-static inline int use_iram_for_net(void)
-{
-#ifdef CONFIG_ARCH_LPC32XX_IRAM_FOR_NET
- return 1;
-#else
- return 0;
-#endif
}
/* Receive Status information word */
@@ -450,6 +438,7 @@ struct netdata_local {
int speed;
int duplex;
struct napi_struct napi;
+ bool use_iram;
};
/*
@@ -664,7 +653,7 @@ static void __lpc_eth_init(struct netdat
LPC_ENET_CLRT(pldat->net_base));
writel(LPC_IPGR_LOAD_PART2(0x12), LPC_ENET_IPGR(pldat->net_base));
- if (lpc_phy_interface_mode() == PHY_INTERFACE_MODE_MII)
+ if (lpc_phy_interface_mode(&pldat->pdev->dev) == PHY_INTERFACE_MODE_MII)
writel(LPC_COMMAND_PASSRUNTFRAME,
LPC_ENET_COMMAND(pldat->net_base));
else {
@@ -804,12 +793,13 @@ static int lpc_mii_probe(struct net_devi
}
/* Attach to the PHY */
- if (lpc_phy_interface_mode() == PHY_INTERFACE_MODE_MII)
+ if (lpc_phy_interface_mode(&pldat->pdev->dev) == PHY_INTERFACE_MODE_MII)
netdev_info(ndev, "using MII interface\n");
else
netdev_info(ndev, "using RMII interface\n");
phydev = phy_connect(ndev, dev_name(&phydev->dev),
- &lpc_handle_link_change, 0, lpc_phy_interface_mode());
+ &lpc_handle_link_change, 0,
+ lpc_phy_interface_mode(&pldat->pdev->dev));
if (IS_ERR(phydev)) {
netdev_err(ndev, "Could not attach to PHY\n");
@@ -843,7 +833,7 @@ static int lpc_mii_init(struct netdata_l
}
/* Setup MII mode */
- if (lpc_phy_interface_mode() == PHY_INTERFACE_MODE_MII)
+ if (lpc_phy_interface_mode(&pldat->pdev->dev) == PHY_INTERFACE_MODE_MII)
writel(LPC_COMMAND_PASSRUNTFRAME,
LPC_ENET_COMMAND(pldat->net_base));
else {
@@ -1315,18 +1305,26 @@ static const struct net_device_ops lpc_n
static int lpc_eth_drv_probe(struct platform_device *pdev)
{
struct resource *res;
- struct resource *dma_res;
struct net_device *ndev;
struct netdata_local *pldat;
struct phy_device *phydev;
dma_addr_t dma_handle;
int irq, ret;
+ u32 tmp;
+
+ /* Setup network interface for RMII mode */
+ tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);
+ tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;
+ if (lpc_phy_interface_mode(&pdev->dev) == PHY_INTERFACE_MODE_MII)
+ tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS;
+ else
+ tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;
+ __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);
/* Get platform resources */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
irq = platform_get_irq(pdev, 0);
- if ((!res) || (!dma_res) || (irq < 0) || (irq >= NR_IRQS)) {
+ if ((!res) || (irq < 0) || (irq >= NR_IRQS)) {
dev_err(&pdev->dev, "error getting resources.\n");
ret = -ENXIO;
goto err_exit;
@@ -1348,6 +1346,12 @@ static int lpc_eth_drv_probe(struct plat
spin_lock_init(&pldat->lock);
+ if (pdev->dev.of_node && of_get_property(pdev->dev.of_node,
+ "use-iram", NULL))
+ pldat->use_iram = true;
+ else
+ pldat->use_iram = false;
+
/* Save resources */
ndev->irq = irq;
@@ -1389,17 +1393,19 @@ static int lpc_eth_drv_probe(struct plat
sizeof(struct txrx_desc_t) + sizeof(struct rx_status_t));
pldat->dma_buff_base_v = 0;
- if (use_iram_for_net()) {
- dma_handle = dma_res->start;
+ if (pldat->use_iram) {
+ dma_handle = LPC32XX_IRAM_BASE;
if (pldat->dma_buff_size <= lpc32xx_return_iram_size())
pldat->dma_buff_base_v =
- io_p2v(dma_res->start);
+ io_p2v(LPC32XX_IRAM_BASE);
else
netdev_err(ndev,
"IRAM not big enough for net buffers, using SDRAM instead.\n");
}
if (pldat->dma_buff_base_v == 0) {
+ pldat->pdev->dev.coherent_dma_mask = 0xFFFFFFFF;
+ pldat->pdev->dev.dma_mask = &pldat->pdev->dev.coherent_dma_mask;
pldat->dma_buff_size = PAGE_ALIGN(pldat->dma_buff_size);
/* Allocate a chunk of memory for the DMA ethernet buffers
@@ -1488,7 +1494,7 @@ err_out_unregister_netdev:
platform_set_drvdata(pdev, NULL);
unregister_netdev(ndev);
err_out_dma_unmap:
- if (!use_iram_for_net() ||
+ if (!pldat->use_iram ||
pldat->dma_buff_size > lpc32xx_return_iram_size())
dma_free_coherent(&pldat->pdev->dev, pldat->dma_buff_size,
pldat->dma_buff_base_v,
@@ -1515,7 +1521,7 @@ static int lpc_eth_drv_remove(struct pla
unregister_netdev(ndev);
platform_set_drvdata(pdev, NULL);
- if (!use_iram_for_net() ||
+ if (!pldat->use_iram ||
pldat->dma_buff_size > lpc32xx_return_iram_size())
dma_free_coherent(&pldat->pdev->dev, pldat->dma_buff_size,
pldat->dma_buff_base_v,
@@ -1584,6 +1590,14 @@ static int lpc_eth_drv_resume(struct pla
}
#endif
+#ifdef CONFIG_OF
+static const struct of_device_id lpc_eth_match[] = {
+ { .compatible = "nxp,lpc-eth" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, lpc_eth_match);
+#endif
+
static struct platform_driver lpc_eth_driver = {
.probe = lpc_eth_drv_probe,
.remove = __devexit_p(lpc_eth_drv_remove),
@@ -1593,6 +1607,7 @@ static struct platform_driver lpc_eth_dr
#endif
.driver = {
.name = MODNAME,
+ .of_match_table = of_match_ptr(lpc_eth_match),
},
};
^ permalink raw reply
* [PATCH 4/7] arm: mach-pnx4008: Adjust i2c.c to updated i2c-pnx.c
From: Roland Stigge @ 2012-04-02 12:56 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge
In-Reply-To: <1333371364-21347-1-git-send-email-stigge@antcom.de>
The i2c bus driver i2c-pnx.c (used by mach-pnx4008 and mach-lpc32xx) was
updated to support device tree. In this process, the struct i2c_pnx_data was
eliminated. Therefore, the platform data of pnx4008 is adjusted with this patch
to use default resources for mem and irq. DT support for pnx4008 is still not
available, but i2c-pnx.c now supports both DT and non-DT.
arch/arm/mach-pnx4008/include/mach/i2c.h can safely be removed now since its
contents is integrated in the updated i2c-pnx.c driver and was duplicated
between platforms pnx4008 and lpc32xx.
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
arch/arm/mach-pnx4008/i2c.c | 58 +++++++++++++++++-----------
arch/arm/mach-pnx4008/include/mach/i2c.h | 64 -------------------------------
2 files changed, 36 insertions(+), 86 deletions(-)
--- linux-2.6.orig/arch/arm/mach-pnx4008/i2c.c
+++ linux-2.6/arch/arm/mach-pnx4008/i2c.c
@@ -16,48 +16,62 @@
#include <linux/err.h>
#include <mach/platform.h>
#include <mach/irqs.h>
-#include <mach/i2c.h>
-static struct i2c_pnx_data i2c0_data = {
- .name = I2C_CHIP_NAME "0",
- .base = PNX4008_I2C1_BASE,
- .irq = I2C_1_INT,
+static struct resource i2c0_resources[] = {
+ {
+ .start = PNX4008_I2C1_BASE,
+ .end = PNX4008_I2C1_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = I2C_1_INT,
+ .end = I2C_1_INT,
+ .flags = IORESOURCE_IRQ,
+ },
};
-static struct i2c_pnx_data i2c1_data = {
- .name = I2C_CHIP_NAME "1",
- .base = PNX4008_I2C2_BASE,
- .irq = I2C_2_INT,
+static struct resource i2c1_resources[] = {
+ {
+ .start = PNX4008_I2C2_BASE,
+ .end = PNX4008_I2C2_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = I2C_2_INT,
+ .end = I2C_2_INT,
+ .flags = IORESOURCE_IRQ,
+ },
};
-static struct i2c_pnx_data i2c2_data = {
- .name = "USB-I2C",
- .base = (PNX4008_USB_CONFIG_BASE + 0x300),
- .irq = USB_I2C_INT,
+static struct resource i2c2_resources[] = {
+ {
+ .start = PNX4008_USB_CONFIG_BASE + 0x300,
+ .end = PNX4008_USB_CONFIG_BASE + 0x300 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = USB_I2C_INT,
+ .end = USB_I2C_INT,
+ .flags = IORESOURCE_IRQ,
+ },
};
static struct platform_device i2c0_device = {
.name = "pnx-i2c",
.id = 0,
- .dev = {
- .platform_data = &i2c0_data,
- },
+ .resource = i2c0_resources,
+ .num_resources = ARRAY_SIZE(i2c0_resources),
};
static struct platform_device i2c1_device = {
.name = "pnx-i2c",
.id = 1,
- .dev = {
- .platform_data = &i2c1_data,
- },
+ .resource = i2c1_resources,
+ .num_resources = ARRAY_SIZE(i2c1_resources),
};
static struct platform_device i2c2_device = {
.name = "pnx-i2c",
.id = 2,
- .dev = {
- .platform_data = &i2c2_data,
- },
+ .resource = i2c2_resources,
+ .num_resources = ARRAY_SIZE(i2c2_resources),
};
static struct platform_device *devices[] __initdata = {
--- linux-2.6.orig/arch/arm/mach-pnx4008/include/mach/i2c.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * PNX4008-specific tweaks for I2C IP3204 block
- *
- * Author: Vitaly Wool <vwool@ru.mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASM_ARCH_I2C_H__
-#define __ASM_ARCH_I2C_H__
-
-enum {
- mstatus_tdi = 0x00000001,
- mstatus_afi = 0x00000002,
- mstatus_nai = 0x00000004,
- mstatus_drmi = 0x00000008,
- mstatus_active = 0x00000020,
- mstatus_scl = 0x00000040,
- mstatus_sda = 0x00000080,
- mstatus_rff = 0x00000100,
- mstatus_rfe = 0x00000200,
- mstatus_tff = 0x00000400,
- mstatus_tfe = 0x00000800,
-};
-
-enum {
- mcntrl_tdie = 0x00000001,
- mcntrl_afie = 0x00000002,
- mcntrl_naie = 0x00000004,
- mcntrl_drmie = 0x00000008,
- mcntrl_daie = 0x00000020,
- mcntrl_rffie = 0x00000040,
- mcntrl_tffie = 0x00000080,
- mcntrl_reset = 0x00000100,
- mcntrl_cdbmode = 0x00000400,
-};
-
-enum {
- rw_bit = 1 << 0,
- start_bit = 1 << 8,
- stop_bit = 1 << 9,
-};
-
-#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
-#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
-#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
-#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
-#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
-#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
-#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
-#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */
-#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */
-#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */
-#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */
-#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */
-#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */
-
-#define HCLK_MHZ 13
-#define I2C_CHIP_NAME "PNX4008-I2C"
-
-#endif /* __ASM_ARCH_I2C_H___ */
^ permalink raw reply
* [PATCH 5/7] i2c: Add device tree support to i2c-pnx.c
From: Roland Stigge @ 2012-04-02 12:56 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge
In-Reply-To: <1333371364-21347-1-git-send-email-stigge@antcom.de>
This patch adds device tree support to the pnx-i2c driver by using platform
resources for memory region and irq and removing dependency on mach includes.
The following platforms are affected:
* PNX
* LPC31xx (WIP)
* LPC32xx
The patch is based on a patch by Jon Smirl, working on lpc31xx integration
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
Updates:
* Introducing slave-addr for I2C controller (this convention already exists in
the kernel)
* Bugfix: of_i2c_register_devices() was missing
Documentation/devicetree/bindings/i2c/pnx.txt | 36 +++++
drivers/i2c/busses/i2c-pnx.c | 160 +++++++++++++++++++-------
include/linux/i2c-pnx.h | 10 -
3 files changed, 158 insertions(+), 48 deletions(-)
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/i2c/pnx.txt
@@ -0,0 +1,36 @@
+* NXP PNX I2C Controller
+
+Required properties:
+
+ - reg: Offset and length of the register set for the device
+ - compatible: should be "nxp,pnx-i2c"
+ - interrupts: <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt
+ - interrupt-parent: the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Optional properties:
+
+ - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz
+ - pnx,timeout: I2C bus timeout in milliseconds, Default: 10 ms
+ - slave-addr: Address used by the controller, Hardware default: 110
+
+Examples:
+
+ i2c1: i2c@400A0000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400A0000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <51 0>;
+ };
+
+ i2c2: i2c@400A8000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400A8000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <50 0>;
+ clock-frequency = <0x186a0>;
+ pnx,timeout = <0x64>;
+ slave-addr = <0x11>;
+ };
--- linux-2.6.orig/drivers/i2c/busses/i2c-pnx.c
+++ linux-2.6/drivers/i2c/busses/i2c-pnx.c
@@ -23,16 +23,61 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/of_i2c.h>
-#include <mach/hardware.h>
-#include <mach/i2c.h>
+#define I2C_PNX_TIMEOUT_DEFAULT 10 /* msec */
+#define I2C_PNX_SPEED_KHZ_DEFAULT 100
+#define I2C_PNX_REGION_SIZE 0x100
+
+enum {
+ mstatus_tdi = 0x00000001,
+ mstatus_afi = 0x00000002,
+ mstatus_nai = 0x00000004,
+ mstatus_drmi = 0x00000008,
+ mstatus_active = 0x00000020,
+ mstatus_scl = 0x00000040,
+ mstatus_sda = 0x00000080,
+ mstatus_rff = 0x00000100,
+ mstatus_rfe = 0x00000200,
+ mstatus_tff = 0x00000400,
+ mstatus_tfe = 0x00000800,
+};
+
+enum {
+ mcntrl_tdie = 0x00000001,
+ mcntrl_afie = 0x00000002,
+ mcntrl_naie = 0x00000004,
+ mcntrl_drmie = 0x00000008,
+ mcntrl_daie = 0x00000020,
+ mcntrl_rffie = 0x00000040,
+ mcntrl_tffie = 0x00000080,
+ mcntrl_reset = 0x00000100,
+ mcntrl_cdbmode = 0x00000400,
+};
-#define I2C_PNX_TIMEOUT 10 /* msec */
-#define I2C_PNX_SPEED_KHZ 100
-#define I2C_PNX_REGION_SIZE 0x100
+enum {
+ rw_bit = 1 << 0,
+ start_bit = 1 << 8,
+ stop_bit = 1 << 9,
+};
+
+#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
+#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
+#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
+#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
+#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
+#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
+#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
+#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */
+#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */
+#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */
+#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */
+#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */
+#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */
-static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
+static inline int wait_timeout(struct i2c_pnx_algo_data *data)
{
+ long timeout = data->timeout;
while (timeout > 0 &&
(ioread32(I2C_REG_STS(data)) & mstatus_active)) {
mdelay(1);
@@ -41,8 +86,9 @@ static inline int wait_timeout(long time
return (timeout <= 0);
}
-static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
+static inline int wait_reset(struct i2c_pnx_algo_data *data)
{
+ long timeout = data->timeout;
while (timeout > 0 &&
(ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
mdelay(1);
@@ -54,7 +100,7 @@ static inline int wait_reset(long timeou
static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
{
struct timer_list *timer = &alg_data->mif.timer;
- unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
+ unsigned long expires = msecs_to_jiffies(alg_data->timeout);
if (expires <= 1)
expires = 2;
@@ -92,7 +138,7 @@ static int i2c_pnx_start(unsigned char s
}
/* First, make sure bus is idle */
- if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
+ if (wait_timeout(alg_data)) {
/* Somebody else is monopolizing the bus */
dev_err(&alg_data->adapter.dev,
"%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
@@ -185,7 +231,7 @@ static int i2c_pnx_master_xmit(struct i2
if (alg_data->mif.len == 0) {
if (alg_data->last) {
/* Wait until the STOP is seen. */
- if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
+ if (wait_timeout(alg_data))
dev_err(&alg_data->adapter.dev,
"The bus is still active after timeout\n");
}
@@ -283,7 +329,7 @@ static int i2c_pnx_master_rcv(struct i2c
if (alg_data->mif.len == 0) {
if (alg_data->last)
/* Wait until the STOP is seen. */
- if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
+ if (wait_timeout(alg_data))
dev_err(&alg_data->adapter.dev,
"The bus is still active after timeout\n");
@@ -399,7 +445,7 @@ static void i2c_pnx_timeout(unsigned lon
ctl |= mcntrl_reset;
iowrite32(ctl, I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
alg_data->mif.ret = -EIO;
complete(&alg_data->mif.complete);
}
@@ -414,18 +460,18 @@ static inline void bus_reset_if_active(s
alg_data->adapter.name);
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
} else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
/* If there is data in the fifo's after transfer,
* flush fifo's by reset.
*/
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
} else if (stat & mstatus_nai) {
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
}
}
@@ -569,14 +615,9 @@ static int __devinit i2c_pnx_probe(struc
int ret = 0;
struct i2c_pnx_algo_data *alg_data;
unsigned long freq;
- struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
-
- if (!i2c_pnx || !i2c_pnx->name) {
- dev_err(&pdev->dev, "%s: no platform data supplied\n",
- __func__);
- ret = -EINVAL;
- goto out;
- }
+ struct resource *res;
+ u32 speed = I2C_PNX_SPEED_KHZ_DEFAULT * 1000;
+ u32 slave_addr = ~0;
alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
if (!alg_data) {
@@ -586,14 +627,22 @@ static int __devinit i2c_pnx_probe(struc
platform_set_drvdata(pdev, alg_data);
- strlcpy(alg_data->adapter.name, i2c_pnx->name,
- sizeof(alg_data->adapter.name));
alg_data->adapter.dev.parent = &pdev->dev;
alg_data->adapter.algo = &pnx_algorithm;
alg_data->adapter.algo_data = alg_data;
alg_data->adapter.nr = pdev->id;
- alg_data->i2c_pnx = i2c_pnx;
-
+ alg_data->timeout = I2C_PNX_TIMEOUT_DEFAULT;
+#ifdef CONFIG_OF
+ alg_data->adapter.dev.of_node = of_node_get(pdev->dev.of_node);
+ if (pdev->dev.of_node) {
+ of_property_read_u32(pdev->dev.of_node, "pnx,timeout",
+ &alg_data->timeout);
+ of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+ &speed);
+ of_property_read_u32(pdev->dev.of_node, "slave-addr",
+ &slave_addr);
+ }
+#endif
alg_data->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(alg_data->clk)) {
ret = PTR_ERR(alg_data->clk);
@@ -604,17 +653,27 @@ static int __devinit i2c_pnx_probe(struc
alg_data->mif.timer.function = i2c_pnx_timeout;
alg_data->mif.timer.data = (unsigned long)alg_data;
+ snprintf(alg_data->adapter.name, sizeof(alg_data->adapter.name),
+ "%s", pdev->name);
+
/* Register I/O resource */
- if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "Unable to get mem resource.\n");
+ ret = -EBUSY;
+ goto out_clkget;
+ }
+ if (!request_mem_region(res->start, I2C_PNX_REGION_SIZE,
pdev->name)) {
dev_err(&pdev->dev,
"I/O region 0x%08x for I2C already in use.\n",
- i2c_pnx->base);
- ret = -ENODEV;
+ res->start);
+ ret = -ENOMEM;
goto out_clkget;
}
- alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
+ alg_data->base = res->start;
+ alg_data->ioaddr = ioremap(res->start, I2C_PNX_REGION_SIZE);
if (!alg_data->ioaddr) {
dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
ret = -ENOMEM;
@@ -625,6 +684,9 @@ static int __devinit i2c_pnx_probe(struc
if (ret)
goto out_unmap;
+ if (slave_addr != ~0)
+ iowrite32(slave_addr, I2C_REG_ADR(alg_data));
+
freq = clk_get_rate(alg_data->clk);
/*
@@ -638,20 +700,25 @@ static int __devinit i2c_pnx_probe(struc
* the deglitching filter length.
*/
- tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
+ tmp = (freq / speed) / 2 - 2;
if (tmp > 0x3FF)
tmp = 0x3FF;
iowrite32(tmp, I2C_REG_CKH(alg_data));
iowrite32(tmp, I2C_REG_CKL(alg_data));
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
- if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
+ if (wait_reset(alg_data)) {
ret = -ENODEV;
goto out_clock;
}
init_completion(&alg_data->mif.complete);
- ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
+ alg_data->irq = platform_get_irq(pdev, 0);
+ if (alg_data->irq < 0) {
+ dev_err(&pdev->dev, "Failed to get IRQ from platform resource\n");
+ goto out_irq;
+ }
+ ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
0, pdev->name, alg_data);
if (ret)
goto out_clock;
@@ -663,39 +730,39 @@ static int __devinit i2c_pnx_probe(struc
goto out_irq;
}
+ of_i2c_register_devices(&alg_data->adapter);
+
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
- alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
+ alg_data->adapter.name, res->start, alg_data->irq);
return 0;
out_irq:
- free_irq(i2c_pnx->irq, alg_data);
+ free_irq(alg_data->irq, alg_data);
out_clock:
clk_disable(alg_data->clk);
out_unmap:
iounmap(alg_data->ioaddr);
out_release:
- release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
+ release_mem_region(res->start, I2C_PNX_REGION_SIZE);
out_clkget:
clk_put(alg_data->clk);
out_drvdata:
kfree(alg_data);
err_kzalloc:
platform_set_drvdata(pdev, NULL);
-out:
return ret;
}
static int __devexit i2c_pnx_remove(struct platform_device *pdev)
{
struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
- struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
- free_irq(i2c_pnx->irq, alg_data);
+ free_irq(alg_data->irq, alg_data);
i2c_del_adapter(&alg_data->adapter);
clk_disable(alg_data->clk);
iounmap(alg_data->ioaddr);
- release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
+ release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
clk_put(alg_data->clk);
kfree(alg_data);
platform_set_drvdata(pdev, NULL);
@@ -703,10 +770,21 @@ static int __devexit i2c_pnx_remove(stru
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id i2c_pnx_of_match[] = {
+ { .compatible = "nxp,pnx-i2c" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, i2c_pnx_of_match);
+#endif
+
static struct platform_driver i2c_pnx_driver = {
.driver = {
.name = "pnx-i2c",
.owner = THIS_MODULE,
+#ifdef CONFIG_OF
+ .of_match_table = i2c_pnx_of_match,
+#endif
},
.probe = i2c_pnx_probe,
.remove = __devexit_p(i2c_pnx_remove),
--- linux-2.6.orig/include/linux/i2c-pnx.h
+++ linux-2.6/include/linux/i2c-pnx.h
@@ -29,14 +29,10 @@ struct i2c_pnx_algo_data {
struct i2c_pnx_mif mif;
int last;
struct clk *clk;
- struct i2c_pnx_data *i2c_pnx;
struct i2c_adapter adapter;
-};
-
-struct i2c_pnx_data {
- const char *name;
- u32 base;
- int irq;
+ phys_addr_t base;
+ int irq;
+ u32 timeout;
};
#endif /* __I2C_PNX_H__ */
^ permalink raw reply
* [PATCH 6/7] i2c-pnx.c: Fix suspend
From: Roland Stigge @ 2012-04-02 12:56 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge, stable
In-Reply-To: <1333371364-21347-1-git-send-email-stigge@antcom.de>
In the driver's suspend function, clk_enable() was used instead of
clk_disable(). This is corrected with this patch.
Signed-off-by: Roland Stigge <stigge@antcom.de>
CC: stable@vger.kernel.org
---
Applies to v3.4-rc1
drivers/i2c/busses/i2c-pnx.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- linux-2.6.orig/drivers/i2c/busses/i2c-pnx.c
+++ linux-2.6/drivers/i2c/busses/i2c-pnx.c
@@ -592,8 +592,7 @@ static int i2c_pnx_controller_suspend(st
{
struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
- /* FIXME: shouldn't this be clk_disable? */
- clk_enable(alg_data->clk);
+ clk_disable(alg_data->clk);
return 0;
}
^ permalink raw reply
* [PATCH 7/7] wdt: Device tree support for pnx4008-wdt
From: Roland Stigge @ 2012-04-02 12:56 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim
Cc: Roland Stigge
In-Reply-To: <1333371364-21347-1-git-send-email-stigge@antcom.de>
This patch adds watchdog support to pnx4008-wdt.c
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt | 13 +++++++++++++
drivers/watchdog/pnx4008_wdt.c | 10 ++++++++++
2 files changed, 23 insertions(+)
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt
@@ -0,0 +1,13 @@
+* NXP PNX watchdog timer
+
+Required properties:
+- compatible: must be "nxp,pnx4008-wdt"
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+Example:
+
+ watchdog@4003C000 {
+ compatible = "nxp,pnx4008-wdt";
+ reg = <0x4003C000 0x1000>;
+ };
--- linux-2.6.orig/drivers/watchdog/pnx4008_wdt.c
+++ linux-2.6/drivers/watchdog/pnx4008_wdt.c
@@ -32,6 +32,7 @@
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/err.h>
+#include <linux/of.h>
#include <mach/hardware.h>
/* WatchDog Timer - Chapter 23 Page 207 */
@@ -201,10 +202,19 @@ static int __devexit pnx4008_wdt_remove(
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id pnx4008_wdt_match[] = {
+ { .compatible = "nxp,pnx4008-wdt" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, pnx4008_wdt_match);
+#endif
+
static struct platform_driver platform_wdt_driver = {
.driver = {
.name = "pnx4008-watchdog",
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(pnx4008_wdt_match),
},
.probe = pnx4008_wdt_probe,
.remove = __devexit_p(pnx4008_wdt_remove),
^ permalink raw reply
* Re: [REGRESSION][PATCH V4 1/3] bpf jit: Make the filter.c::__load_pointer helper non-static for the jits
From: Jan Seiffert @ 2012-04-02 13:02 UTC (permalink / raw)
To: David Laight
Cc: netdev, linux-kernel, linuxppc-dev, Matt Evans, Eric Dumazet,
David S. Miller
In-Reply-To: <AE90C24D6B3A694183C094C60CF0A2F6026B6ECE@saturn3.aculab.com>
David Laight schrieb:
>
>> The function is renamed to make it a little more clear what it does.
>> It is not added to any .h because it is not for general
>> consumption, only for bpf internal use (and so by the jits).
>
> I'd have thought it better to put in into a bfp_internal.h
> (or similar) with a big warning there about the asm users.
>
Hmmm, OK, where would i put the .h? Right there under ./include/linux/?
> Possibly even worth adding some other defs that the asm
> files will need (if there are any).
>
There is at least one other define, the lowest negative address range,
but it would be a copy of the same define in filter.h, or i would have
to massage filter.h to make it fit for inclusion by assembly.
So I'm unsure how to proceed.
> David
>
Greetings
Jan
--
An IPv4 address space walks into a bar: "A strong CIDR please. I'm
exhausted."
^ permalink raw reply
* Re: [PATCH 4/7] arm: mach-pnx4008: Adjust i2c.c to updated i2c-pnx.c
From: Arnd Bergmann @ 2012-04-02 13:07 UTC (permalink / raw)
To: Roland Stigge
Cc: arm-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
w.sang-bIcnvbaLZ9MEGnE8C9+IrQ, srinivas.bakki-3arQi8VN3Tc,
kevin.wells-3arQi8VN3Tc, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
netdev-u79uwXL29TY76Z2rM5mHXA, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA, wim-IQzOog9fTRqzQB+pC5nmwQ
In-Reply-To: <1333371364-21347-5-git-send-email-stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>
On Monday 02 April 2012, Roland Stigge wrote:
> The i2c bus driver i2c-pnx.c (used by mach-pnx4008 and mach-lpc32xx) was
> updated to support device tree. In this process, the struct i2c_pnx_data was
> eliminated. Therefore, the platform data of pnx4008 is adjusted with this patch
> to use default resources for mem and irq. DT support for pnx4008 is still not
> available, but i2c-pnx.c now supports both DT and non-DT.
>
> arch/arm/mach-pnx4008/include/mach/i2c.h can safely be removed now since its
> contents is integrated in the updated i2c-pnx.c driver and was duplicated
> between platforms pnx4008 and lpc32xx.
>
> Signed-off-by: Roland Stigge <stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>
Hi Roland,
The i2c changes look ok, but the order breaks bisection through the series.
Since the changes in pnx4008 are fairly localized, I would suggest merging
all three patches through the i2c tree and reorganizing the changes so
that each change is atomic. I would suggest an order like:
1. fix suspend
2. move contents of mach/i2c.h from pnx4008 and lpc32xx to i2c driver
3. change driver and platform device definitions to use resources instead
of platform data
4. add support for device tree based probing
Arnd
^ permalink raw reply
* Re: [PATCH 5/7] i2c: Add device tree support to i2c-pnx.c
From: Arnd Bergmann @ 2012-04-02 13:17 UTC (permalink / raw)
To: Roland Stigge
Cc: arm-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
w.sang-bIcnvbaLZ9MEGnE8C9+IrQ, srinivas.bakki-3arQi8VN3Tc,
kevin.wells-3arQi8VN3Tc, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
netdev-u79uwXL29TY76Z2rM5mHXA, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA, wim-IQzOog9fTRqzQB+pC5nmwQ
In-Reply-To: <1333371364-21347-6-git-send-email-stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>
On Monday 02 April 2012, Roland Stigge wrote:
> --- /dev/null
> +++ linux-2.6/Documentation/devicetree/bindings/i2c/pnx.txt
> @@ -0,0 +1,36 @@
> +* NXP PNX I2C Controller
> +
> +Required properties:
> +
> + - reg: Offset and length of the register set for the device
> + - compatible: should be "nxp,pnx-i2c"
> + - interrupts: <a b> where a is the interrupt number and b is a
> + field that represents an encoding of the sense and level
> + information for the interrupt
The encoding of the interrupt is specific to the controller and does
not belong here. Just write that there is one interrupt line to be
configure.
> + - interrupt-parent: the phandle for the interrupt controller that
> + services interrupts for this device.
interrupt-parent should be optional, it can be set in the (grand-)parent
device on systems where all devices use the same controller.
You should also require
#address-cells = <1>;
#size-cells = <0>;
To create an address space for i2c slave device numbers.
> +Examples:
> +
> + i2c1: i2c@400A0000 {
> + compatible = "nxp,pnx-i2c";
> + reg = <0x400A0000 0x100>;
> + interrupt-parent = <&mic>;
> + interrupts = <51 0>;
> + };
> +
> + i2c2: i2c@400A8000 {
> + compatible = "nxp,pnx-i2c";
> + reg = <0x400A8000 0x100>;
Best use all lowercase letters in the addresses.
> + interrupt-parent = <&mic>;
> + interrupts = <50 0>;
> + clock-frequency = <0x186a0>;
> + pnx,timeout = <0x64>;
> + slave-addr = <0x11>;
> + };
> static struct platform_driver i2c_pnx_driver = {
> .driver = {
> .name = "pnx-i2c",
> .owner = THIS_MODULE,
> +#ifdef CONFIG_OF
> + .of_match_table = i2c_pnx_of_match,
> +#endif
> },
> .probe = i2c_pnx_probe,
> .remove = __devexit_p(i2c_pnx_remove),
of_match_ptr() instead of this #ifdef, please.
Arnd
^ permalink raw reply
* Re: [PATCH 0/7]: arm: lpc32xx: Device tree support
From: Arnd Bergmann @ 2012-04-02 13:45 UTC (permalink / raw)
To: Roland Stigge
Cc: arm-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
w.sang-bIcnvbaLZ9MEGnE8C9+IrQ, srinivas.bakki-3arQi8VN3Tc,
kevin.wells-3arQi8VN3Tc, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
netdev-u79uwXL29TY76Z2rM5mHXA, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA, wim-IQzOog9fTRqzQB+pC5nmwQ
In-Reply-To: <1333371364-21347-1-git-send-email-stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>
On Monday 02 April 2012, Roland Stigge wrote:
> This is the first series of patches to introduce device tree support for the
> LPC32xx SoC. This series includes patches for the various subsystems to support
> device tree to be used later by the machine's initialization.
>
> The patches apply to various subsystems:
>
> * staging/iio/adc
> * rtc
> * net
> * arm-soc
> * i2c
> * wdt
>
> Based on v3.4-rc1
>
> You can also pull from
>
> git://git.antcom.de/linux-2.6 lpc32xx/dt
>
> I'm CC'ing the various subsystem maintainers and lists who can each see what's
> going on and please pick their respective subsystem's changes. - Thanks!
>
> Signed-off-by: Roland Stigge <stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>
Looks good overall.
I notice that you are missing the bindings for irq and gpio, which tend to be
quite important. Do you have another tree that has all the lpc32xx specific
parts or are these still under heavy development?
Do you plan to add DT support in parallel to the ATAGS based board you
already have, or do you plan to move everything over quickly?
In the latter case, it might be helpful to get Acks from the subsystem
maintainers and merge everything through arm-soc.
Arnd
^ permalink raw reply
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