* Re: NULL pointer dereference at __ip_route_output_key
From: Dave Jones @ 2012-04-03 0:22 UTC (permalink / raw)
To: David Miller; +Cc: netdev, kernel-team
In-Reply-To: <20120402.200711.2234324385609269937.davem@davemloft.net>
On Mon, Apr 02, 2012 at 08:07:11PM -0400, David Miller wrote:
> > We just had this reported. Look familiar to anyone ?
>
> If you could unravel the source file and line the OOPS occurs at, I
> can look at these kinds of reports much faster. As it stands, when I
> see a Fedora OOPS, it's a long process for me:
Ok, I'll try and pull these apart for you in future, as I usually
have the bits for the most recent builds around.
> Anyways in this case dev_out is NULL when we read it around line
> 2798 of net/ipv4/route.c:
>
> dev_out = FIB_RES_DEV(res);
> fl4->flowi4_oif = dev_out->ifindex;
>
> and we are thus OOPS'ing on the dev_out->ifindex.
>
> Unfortunately I've never seen a report like this. If the reporter can
> reproduce, you can try to extract more information by doing something
> like this right after the dev_out assignment:
>
> if (!dev_out) {
> pr_crit("ipv4: FIB_RES_DEV() is NULL, nh_sel=%d\n",
> res.nh_sel);
> rth = ERR_PTR(-EINVAL);
> goto out;
> }
>
> This debugging will also avoid the NULL pointer crash at least for
> that particular invocation.
ok, I'll do a test build with this change for the user to try out.
Hopefully he can retrigger it.
thanks,
Dave
^ permalink raw reply
* sky2: in free_buffers() do proper checks before call of rx_clean()
From: Lino Sanfilippo @ 2012-04-03 0:13 UTC (permalink / raw)
To: shemminger, mlindner; +Cc: davem, netdev, linux-kernel
In sky2_open() free_buffers() is called in case that alloc_buffers() failed.
Here we do the check for sky2->rx_le too late, since we already called
rx_clean() which accessed rx_le. Furthermore we lack a check for sky2->rx_ring
which is also accessed by rx_clean().
With this patch both sky2->rx_le and sky2->rx_ring are checked before
alloc_buffers() is called.
Signed-off-by: Lino Sanfilippo <LinoSanfilippo@gmx.de>
---
This applies against 3.3
drivers/net/ethernet/marvell/sky2.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/sky2.c b/drivers/net/ethernet/marvell/sky2.c
index 760c2b1..3e3eda6 100644
--- a/drivers/net/ethernet/marvell/sky2.c
+++ b/drivers/net/ethernet/marvell/sky2.c
@@ -1628,9 +1628,10 @@ static void sky2_free_buffers(struct sky2_port *sky2)
{
struct sky2_hw *hw = sky2->hw;
- sky2_rx_clean(sky2);
-
if (sky2->rx_le) {
+ if (sky2->rx_ring)
+ sky2_rx_clean(sky2);
+
pci_free_consistent(hw->pdev, RX_LE_BYTES,
sky2->rx_le, sky2->rx_le_map);
sky2->rx_le = NULL;
--
1.7.2.5
^ permalink raw reply related
* Re: NULL pointer dereference at __ip_route_output_key
From: David Miller @ 2012-04-03 0:07 UTC (permalink / raw)
To: davej; +Cc: netdev, kernel-team
In-Reply-To: <20120402194056.GA1002@redhat.com>
From: Dave Jones <davej@redhat.com>
Date: Mon, 2 Apr 2012 15:40:56 -0400
> We just had this reported. Look familiar to anyone ?
If you could unravel the source file and line the OOPS occurs at, I
can look at these kinds of reports much faster. As it stands, when I
see a Fedora OOPS, it's a long process for me:
1) Edit /boot/vmlinuz-3.3.0-8, stip image until gzip header and
store in x.gz, gzip -d x.gz
2) gdb ./x and try to match up symbols in System.map, which BTW
I have to become root to even friggin' _READ_, and oh yes
doubly stupid because there's a readable copy under /usr/src
3) Try to bisect where it's OOPS'ing in the source code, and given
GCC's optimizations where it moves basic blocks all over the
place, this is error prone and time consuming.
etc. etc.
Anyways in this case dev_out is NULL when we read it around line
2798 of net/ipv4/route.c:
dev_out = FIB_RES_DEV(res);
fl4->flowi4_oif = dev_out->ifindex;
and we are thus OOPS'ing on the dev_out->ifindex.
Unfortunately I've never seen a report like this. If the reporter can
reproduce, you can try to extract more information by doing something
like this right after the dev_out assignment:
if (!dev_out) {
pr_crit("ipv4: FIB_RES_DEV() is NULL, nh_sel=%d\n",
res.nh_sel);
rth = ERR_PTR(-EINVAL);
goto out;
}
This debugging will also avoid the NULL pointer crash at least for
that particular invocation.
^ permalink raw reply
* Re: be2net: when can I expect roce support patch will be merged?
From: Roland Dreier @ 2012-04-02 23:26 UTC (permalink / raw)
To: David Miller
Cc: Parav.Pandit-laKkSmNT4hbQT0dZR+AlfA,
netdev-u79uwXL29TY76Z2rM5mHXA, linux-rdma-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20120401.174852.1630093843785755332.davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
On Sun, Apr 1, 2012 at 2:48 PM, David Miller <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org> wrote:
> No problem, feel free to add:
>
> Acked-by: David S. Miller <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
Great, I pulled in these two patches, and I'll add the full ocrdma
driver soon and push it out for -next coverage (with the plan being
a merge to 3.5).
Thanks!
Roland
--
To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH] MAINTAINERS: update for Marvell Ethernet drivers
From: Stephen Hemminger @ 2012-04-02 22:59 UTC (permalink / raw)
To: David Miller, Mirko Lindner; +Cc: netdev
Marvell has agreed to do maintenance on the sky2 driver.
* Add the developer to the maintainers file
* Remove the old reference to the long gone (sk98lin) driver
* Rearrange to fit current topic organization
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
---
Please hold this patch until ack'd by Mirko.
--- a/MAINTAINERS 2012-04-02 15:51:44.458919901 -0700
+++ b/MAINTAINERS 2012-04-02 15:55:08.311443594 -0700
@@ -4311,6 +4311,13 @@ W: http://www.kernel.org/doc/man-pages
L: linux-man@vger.kernel.org
S: Maintained
+MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
+M: Mirko Lindner <mlindner@marvell.com>
+M: Stephen Hemminger <shemminger@vyatta.com>
+L: netdev@vger.kernel.org
+S: Maintained
+F: drivers/net/ethernet/marvell/sk*
+
MARVELL LIBERTAS WIRELESS DRIVER
M: Dan Williams <dcbw@redhat.com>
L: libertas-dev@lists.infradead.org
@@ -4341,12 +4348,6 @@ M: Nicolas Pitre <nico@fluxnic.net>
S: Odd Fixes
F: drivers/mmc/host/mvsdio.*
-MARVELL YUKON / SYSKONNECT DRIVER
-M: Mirko Lindner <mlindner@syskonnect.de>
-M: Ralph Roesler <rroesler@syskonnect.de>
-W: http://www.syskonnect.com
-S: Supported
-
MATROX FRAMEBUFFER DRIVER
L: linux-fbdev@vger.kernel.org
S: Orphan
@@ -6112,12 +6113,6 @@ W: http://www.winischhofer.at/linuxsisus
S: Maintained
F: drivers/usb/misc/sisusbvga/
-SKGE, SKY2 10/100/1000 GIGABIT ETHERNET DRIVERS
-M: Stephen Hemminger <shemminger@vyatta.com>
-L: netdev@vger.kernel.org
-S: Maintained
-F: drivers/net/ethernet/marvell/sk*
-
SLAB ALLOCATOR
M: Christoph Lameter <cl@linux-foundation.org>
M: Pekka Enberg <penberg@kernel.org>
^ permalink raw reply
* Re: [PATCH] sky2: dont overwrite settings for PHY Quick link
From: David Miller @ 2012-04-02 22:42 UTC (permalink / raw)
To: shemminger; +Cc: LinoSanfilippo, netdev, linux-kernel
In-Reply-To: <20120402153818.40e34c2c@s6510.linuxnetplumber.net>
From: Stephen Hemminger <shemminger@vyatta.com>
Date: Mon, 2 Apr 2012 15:38:18 -0700
> On Fri, 30 Mar 2012 19:28:59 +0200
> Lino Sanfilippo <LinoSanfilippo@gmx.de> wrote:
>
>> This patch corrects a bug in function sky2_open() of the Marvell Yukon 2 driver
>> in which the settings for PHY quick link are overwritten.
>>
>> Signed-off-by: Lino Sanfilippo <LinoSanfilippo@gmx.de>
...
> Acked-by: Stephen Hemminger <shemminger@vyattta.com>
Applied and queued up for -stable.
> Surprised that gcc did not detect the "or" of uninitialized value.
Especially since it warns for so much crap it shouldn't :-)
^ permalink raw reply
* Re: [PATCH] sky2: dont overwrite settings for PHY Quick link
From: Stephen Hemminger @ 2012-04-02 22:38 UTC (permalink / raw)
To: Lino Sanfilippo; +Cc: netdev, linux-kernel
In-Reply-To: <20120330172859.GB2703@Neptun>
On Fri, 30 Mar 2012 19:28:59 +0200
Lino Sanfilippo <LinoSanfilippo@gmx.de> wrote:
> This patch corrects a bug in function sky2_open() of the Marvell Yukon 2 driver
> in which the settings for PHY quick link are overwritten.
>
> Signed-off-by: Lino Sanfilippo <LinoSanfilippo@gmx.de>
> ---
> This applies against 3.3
>
> drivers/net/ethernet/marvell/sky2.c | 5 +++--
> 1 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/marvell/sky2.c b/drivers/net/ethernet/marvell/sky2.c
> index 760c2b1..d0132d8 100644
> --- a/drivers/net/ethernet/marvell/sky2.c
> +++ b/drivers/net/ethernet/marvell/sky2.c
> @@ -1756,13 +1756,14 @@ static int sky2_open(struct net_device *dev)
>
> sky2_hw_up(sky2);
>
> + /* Enable interrupts from phy/mac for port */
> + imask = sky2_read32(hw, B0_IMSK);
> +
> if (hw->chip_id == CHIP_ID_YUKON_OPT ||
> hw->chip_id == CHIP_ID_YUKON_PRM ||
> hw->chip_id == CHIP_ID_YUKON_OP_2)
> imask |= Y2_IS_PHY_QLNK; /* enable PHY Quick Link */
>
> - /* Enable interrupts from phy/mac for port */
> - imask = sky2_read32(hw, B0_IMSK);
> imask |= portirq_msk[port];
> sky2_write32(hw, B0_IMSK, imask);
> sky2_read32(hw, B0_IMSK);
Acked-by: Stephen Hemminger <shemminger@vyattta.com>
This should go to stable as well. Surprised that gcc did not detect
the "or" of uninitialized value.
^ permalink raw reply
* Re: [PATCH] tg3: Fix 5717 serdes powerdown problem
From: David Miller @ 2012-04-02 21:42 UTC (permalink / raw)
To: mcarlson; +Cc: netdev, mchan
In-Reply-To: <1333393300-5102-1-git-send-email-mcarlson@broadcom.com>
From: "Matt Carlson" <mcarlson@broadcom.com>
Date: Mon, 2 Apr 2012 12:01:40 -0700
> If port 0 of a 5717 serdes device powers down, it hides the phy from
> port 1. This patch works around the problem by keeping port 0's phy
> powered up.
>
> Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
> Signed-off-by: Michael Chan <mchan@broadcom.com>
Applied and queued up for -stable, thanks.
^ permalink raw reply
* Re: [PATCH] phonet: Check input from user before allocating
From: David Miller @ 2012-04-02 21:40 UTC (permalink / raw)
To: remi; +Cc: levinsasha928, remi.denis-courmont, davej, netdev, linux-kernel
In-Reply-To: <201204022201.41808.remi@remlab.net>
From: "Rémi Denis-Courmont" <remi@remlab.net>
Date: Mon, 2 Apr 2012 22:01:40 +0300
> Le lundi 2 avril 2012 23:31:00 Sasha Levin, vous avez écrit :
>> A phonet packet is limited to USHRT_MAX bytes, this is never checked during
>> tx which means that the user can specify any size he wishes, and the kernel
>> will attempt to allocate that size.
>
> Does this really solve the problem? I guess 128kb is still possible with
> USHRT_MAX plus skbuff overhead, which might still trigger OOM relatively
> easily once the memory gets sufficiently fragmented.
>
> How does UDP deal with this?
UDP generates a fragment list of MTU sized SKBs.
Phonet could avoid the large allocations by building page based
SKBs.
^ permalink raw reply
* Re: [PATCH] phonet: Check input from user before allocating
From: David Miller @ 2012-04-02 21:38 UTC (permalink / raw)
To: remi; +Cc: levinsasha928, remi.denis-courmont, davej, netdev, linux-kernel
In-Reply-To: <201204022200.41351.remi@remlab.net>
From: "Rémi Denis-Courmont" <remi@remlab.net>
Date: Mon, 2 Apr 2012 22:00:40 +0300
> Le lundi 2 avril 2012 23:31:00 Sasha Levin, vous avez écrit :
>> + if (len > USHRT_MAX)
>> + return -E2BIG;
>
> I think EMSGSIZE is specified in that case.
Agreed.
^ permalink raw reply
* Re: [PATCH V1 1/1] NET: add a bpf jit for Alpha
From: Jan Seiffert @ 2012-04-02 21:04 UTC (permalink / raw)
To: Matt Turner
Cc: netdev, linux-kernel, Matt Evans, Eric Dumazet, David S. Miller,
linux-arch, linux-alpha, rth
In-Reply-To: <CAEdQ38FnZXLiPM4CtOhT5X9qj9jLt84x=NhcSSbGO1agSNc24w@mail.gmail.com>
Matt Turner schrieb:
> On Mon, Apr 2, 2012 at 3:51 PM, Jan Seiffert
> <kaffeemonster@googlemail.com> wrote:
>> The weekend was cold and windy, so i wrote a bpf jit for the Alpha architecture.
>>
>> Signed-off-by: Jan Seiffert <kaffeemonster@googlemail.com>
>>
>> ---
>>
>> Patch is against net-next and needs Patch 1 of my "Fix negative offsets" Series
>> (to get bpf_internal_load_pointer_neg_helper)
>>
>> The Problem is: i don't have any Alpha machine nor do i really have any clue about
>> the arch.
>> So this is only compile tested.
>> I could really need some Alpha asm guru to give some advice and review this.
>> Are the calls done right, are the asm load helper ok, all the conditional and
>> sign handling is a little brittle in my mind, etc.
>
> Very cool. I'll try to find some time soon to test this.
>
That would be great.
But make sure to fasten your seat belts, it will prop. crash hard ;)
Here is a link to the Patch 1 you also need:
<http://marc.info/?l=linux-kernel&m=133312658915220&w=2>
> Thanks a lot!
> Matt
>
Greetings
Jan
--
Wherever I lay my .vimrc, there's my $HOME.
^ permalink raw reply
* Re: new batman-adv maintainer
From: David Miller @ 2012-04-02 20:51 UTC (permalink / raw)
To: lindner_marek-LWAfsSFWpa4
Cc: netdev-u79uwXL29TY76Z2rM5mHXA,
b.a.t.m.a.n-ZwoEplunGu2X36UT3dwllkB+6BGkLq7r
In-Reply-To: <201204021416.42200.lindner_marek-LWAfsSFWpa4@public.gmane.org>
From: Marek Lindner <lindner_marek-LWAfsSFWpa4@public.gmane.org>
Date: Mon, 2 Apr 2012 14:16:41 +0200
> I'd like to let you know that Antonio is going to replace me as linux kernel
> integrator. He has been active in our project for more than 2 years and
> closely follows the kernel development. Sven and I are still going to be
> around to help whenver there are questions or problems to discuss.
Ok, great.
^ permalink raw reply
* Re: [PATCH V1 1/1] NET: add a bpf jit for Alpha
From: Matt Turner @ 2012-04-02 20:43 UTC (permalink / raw)
To: Jan Seiffert
Cc: netdev, linux-kernel, Matt Evans, Eric Dumazet, David S. Miller,
linux-arch, linux-alpha, rth
In-Reply-To: <4F7A033D.4040901@googlemail.com>
On Mon, Apr 2, 2012 at 3:51 PM, Jan Seiffert
<kaffeemonster@googlemail.com> wrote:
> The weekend was cold and windy, so i wrote a bpf jit for the Alpha architecture.
>
> Signed-off-by: Jan Seiffert <kaffeemonster@googlemail.com>
>
> ---
>
> Patch is against net-next and needs Patch 1 of my "Fix negative offsets" Series
> (to get bpf_internal_load_pointer_neg_helper)
>
> The Problem is: i don't have any Alpha machine nor do i really have any clue about
> the arch.
> So this is only compile tested.
> I could really need some Alpha asm guru to give some advice and review this.
> Are the calls done right, are the asm load helper ok, all the conditional and
> sign handling is a little brittle in my mind, etc.
Very cool. I'll try to find some time soon to test this.
Thanks a lot!
Matt
^ permalink raw reply
* Re: [PATCH ethtool] Add the command to show the time stamping capabilities.
From: Ben Hutchings @ 2012-04-02 20:23 UTC (permalink / raw)
To: Richard Cochran
Cc: netdev, David Miller, Martin Porter, Jacob Keller, Jeff Kirsher,
John Ronciak, e1000-devel
In-Reply-To: <1333394758.5356.28.camel@bwh-desktop.uk.solarflarecom.com>
On Mon, 2012-04-02 at 20:25 +0100, Ben Hutchings wrote:
> On Sun, 2012-04-01 at 17:23 +0200, Richard Cochran wrote:
[...]
> > + if (info->tx_types & (1 << HWTSTAMP_TX_OFF))
> > + fprintf(stdout, "HWTSTAMP_TX_OFF\n");
> > +
> > + if (info->tx_types & (1 << HWTSTAMP_TX_ON))
> > + fprintf(stdout, "HWTSTAMP_TX_ON\n");
> > +
> > + if (info->tx_types & (1 << HWTSTAMP_TX_ONESTEP_SYNC))
> > + fprintf(stdout, "HWTSTAMP_TX_ONESTEP_SYNC\n");
>
> If there is no hardware timestamping available then shouldn't we see
> HWTSTAMP_TX_OFF reported here? But that's going to be the case. Not
+not
> sure whether the kernel or the ethtool utility should deal with that,
> but don't assume the ethtool utility is the only consumer.
[...]
--
Ben Hutchings, Staff Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.
^ permalink raw reply
* Re: [PATCH] ipv6: fix array index in ip6_mc_add_src()
From: David Miller @ 2012-04-02 20:19 UTC (permalink / raw)
To: roy.qing.li; +Cc: netdev
In-Reply-To: <CAJFZqHwAFao9En4LRBST3YSufbrjbtsV09_h9fOVTSsCHtsT_w@mail.gmail.com>
From: RongQing Li <roy.qing.li@gmail.com>
Date: Mon, 2 Apr 2012 18:16:14 +0800
> 2012/4/2 David Miller <davem@davemloft.net>:
>> From: roy.qing.li@gmail.com
>> Date: Sun, 1 Apr 2012 16:45:26 +0800
>>
>>> From: RongQing.Li <roy.qing.li@gmail.com>
>>>
>>> Convert array index from the loop bound to the loop index.
>>>
>>> Signed-off-by: RongQing.Li <roy.qing.li@gmail.com>
>>
>> That's not all you are doing:
>>
>>> - (void) ip6_mc_del1_src(pmc, sfmode, &psfsrc[i]);
>>> + ip6_mc_del1_src(pmc, sfmode, &psfsrc[j]);
>>
>> You absolutely MUST mention and explain this (void) removal.
>> It's probably there to elide an unchecked return value
>> warning from the compiler.
>
> since ip6_mc_del1_src() does not use __must_check likely attribute.
> I try to compile with several gcc warning options, but do not
> find which options can report the unchecked return value.
I said "probably", I didn't check myself.
The issue I had was that you didn't mention the void removal in the
commit message.
^ permalink raw reply
* [PATCH V1 1/1] NET: add a bpf jit for Alpha
From: Jan Seiffert @ 2012-04-02 19:51 UTC (permalink / raw)
To: netdev
Cc: linux-kernel, Matt Evans, Eric Dumazet, David S. Miller,
linux-arch, linux-alpha, rth
In-Reply-To: <4F75CA89.4010709@googlemail.com>
The weekend was cold and windy, so i wrote a bpf jit for the Alpha architecture.
Signed-off-by: Jan Seiffert <kaffeemonster@googlemail.com>
---
Patch is against net-next and needs Patch 1 of my "Fix negative offsets" Series
(to get bpf_internal_load_pointer_neg_helper)
The Problem is: i don't have any Alpha machine nor do i really have any clue about
the arch.
So this is only compile tested.
I could really need some Alpha asm guru to give some advice and review this.
Are the calls done right, are the asm load helper ok, all the conditional and
sign handling is a little brittle in my mind, etc.
The whole thing is C&P based on the PPC64 jit, so some of the signedness problems
may lurk there too.
A user space mock-up turns this:
struct bpf_insn udp_filter[] = {
/* 0 */ BPF_STMT(BPF_LDX|BPF_W|BPF_IMM, -1048576+(12)),
/* 1 */ BPF_STMT(BPF_LD|BPF_B|BPF_ABS, -1048576+(0)),
/* 2 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xf0),
/* 3 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0x40, 23 - 4, 0),
/* 4 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0x60, 5 - 5, 41 - 5),
/* 5 */ BPF_STMT(BPF_LD|BPF_W|BPF_ABS, -1048576+(8)),
/* 6 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0, 13 - 7, 0),
/* 7 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0x20010DB8, 41 - 8, 0),
/* 8 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0x20010002, 19 - 9, 0),
/* 9 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xfffffff0),
/* 10 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0x20010010, 41 - 11, 0),
/* 11 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xff000000),
/* 12 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xff000000, 41 - 13, 39 - 13),
/* 13 */ BPF_STMT(BPF_LD|BPF_W|BPF_ABS, -1048576+(12)),
/* 14 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0, 0, 39 - 15),
/* 15 */ BPF_STMT(BPF_LD|BPF_W|BPF_ABS, -1048576+(16)),
/* 16 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xffff, 22 - 17, 0),
/* 17 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0x0064FF9B, 22 - 18, 0),
/* 18 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0, 41 - 19, 39 - 19),
/* 19 */ BPF_STMT(BPF_LD|BPF_W|BPF_ABS, -1048576+(12)),
/* 20 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xffff0000),
/* 21 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0, 41 - 22, 39 - 22),
/* 22 */ BPF_STMT(BPF_LDX|BPF_W|BPF_IMM, -1048576+(20)),
/* 23 */ BPF_STMT(BPF_LD|BPF_W|BPF_IND, 0),
/* 24 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xffffffff, 41 - 25, 0),
/* 25 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xffffff00),
/* 26 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xC0000000, 41 - 27, 0),
/* 27 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xC0000200, 41 - 28, 0),
/* 28 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xC6336400, 41 - 29, 0),
/* 29 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xCB007100, 41 - 30, 0),
/* 30 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xC0586300, 41 - 31, 0),
/* 31 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xfffe0000),
/* 32 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xC6120000, 41 - 33, 0),
/* 33 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xff000000),
/* 34 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0, 41 - 35, 0),
/* 35 */ BPF_STMT(BPF_ALU|BPF_AND|BPF_K, 0xf0000000),
/* 36 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xE0000000, 41 - 37, 0),
/* 37 */ BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 0xF0000000, 41 - 38, 0),
/* 38 */ BPF_JUMP(BPF_JMP|BPF_JA, 39 - 39, 0, 0),
/* 39 */ BPF_STMT(BPF_LD|BPF_W|BPF_LEN, 0),
/* 40 */ BPF_STMT(BPF_RET|BPF_A, 0),
/* 41 */ BPF_STMT(BPF_RET|BPF_K, 0),
};
into this instruction sequence for Alpha:
0: 64 00 50 a0 ldl t1,100(a0)
4: 60 00 90 a0 ldl t3,96(a0)
8: 22 f6 41 48 zapnot t1,0xf,t1
c: 24 f6 81 48 zapnot t3,0xf,t3
10: c8 00 70 a4 ldq t2,200(a0)
14: 24 01 82 40 subl t3,t1,t3
18: 01 04 ff 47 clr t0
1c: 00 04 ff 47 clr v0
20: f0 ff 3f 24 ldah t0,-16
24: 01 90 21 40 addl t0,0xc,t0
28: f0 ff 1f 27 ldah t10,-16
2c: f7 fe 5b 24 ldah t1,-265(t12)
30: e0 7f 42 20 lda t1,32736(t1)
34: 00 40 e2 6a jsr t9,(t1),0x38
38: 72 00 80 f7 bne at,0x204
3c: 00 10 1e 44 and v0,0xf0,v0
40: 22 11 08 40 subl v0,0x40,t1
44: 02 00 e2 43 sextl t1,t1
48: 3e 00 40 e4 beq t1,0x144
4c: 22 11 0c 40 subl v0,0x60,t1
50: 02 00 e2 43 sextl t1,t1
54: 6a 00 40 f4 bne t1,0x200
58: f0 ff 1f 27 ldah t10,-16
5c: 18 10 01 43 addl t10,0x8,t10
60: f7 fe 5b 24 ldah t1,-265(t12)
64: c8 7f 42 20 lda t1,32712(t1)
68: 00 40 e2 6a jsr t9,(t1),0x6c
6c: 65 00 80 f7 bne at,0x204
70: 12 00 00 e4 beq v0,0xbc
74: ff df 40 24 ldah t1,-8193(v0)
78: 48 f2 42 20 lda t1,-3512(t1)
7c: 02 00 e2 43 sextl t1,t1
80: 5f 00 40 e4 beq t1,0x200
84: ff df 40 24 ldah t1,-8193(v0)
88: 22 51 40 40 subl t1,0x2,t1
8c: 02 00 e2 43 sextl t1,t1
90: 21 00 40 e4 beq t1,0x118
94: 00 f1 01 44 andnot v0,0xf,v0
98: ff df 40 24 ldah t1,-8193(v0)
9c: 22 11 42 40 subl t1,0x10,t1
a0: 02 00 e2 43 sextl t1,t1
a4: 56 00 40 e4 beq t1,0x200
a8: 20 16 01 48 zapnot v0,0x8,v0
ac: 00 01 40 24 ldah t1,256(v0)
b0: 02 00 e2 43 sextl t1,t1
b4: 52 00 40 e4 beq t1,0x200
b8: 4e 00 e0 c3 br 0x1f4
bc: f0 ff 1f 27 ldah t10,-16
c0: 18 90 01 43 addl t10,0xc,t10
c4: f7 fe 5b 24 ldah t1,-265(t12)
c8: c8 7f 42 20 lda t1,32712(t1)
cc: 00 40 e2 6a jsr t9,(t1),0xd0
d0: 4c 00 80 f7 bne at,0x204
d4: 47 00 00 f4 bne v0,0x1f4
d8: f0 ff 1f 27 ldah t10,-16
dc: 18 10 02 43 addl t10,0x10,t10
e0: f7 fe 5b 24 ldah t1,-265(t12)
e4: c8 7f 42 20 lda t1,32712(t1)
e8: 00 40 e2 6a jsr t9,(t1),0xec
ec: 45 00 80 f7 bne at,0x204
f0: ff ff 40 24 ldah t1,-1(v0)
f4: 02 30 40 40 addl t1,0x1,t1
f8: 02 00 e2 43 sextl t1,t1
fc: 0f 00 40 e4 beq t1,0x13c
100: 9b ff 40 24 ldah t1,-101(v0)
104: 02 b0 4c 40 addl t1,0x65,t1
108: 02 00 e2 43 sextl t1,t1
10c: 0b 00 40 e4 beq t1,0x13c
110: 3b 00 00 e4 beq v0,0x200
114: 37 00 e0 c3 br 0x1f4
118: f0 ff 1f 27 ldah t10,-16
11c: 18 90 01 43 addl t10,0xc,t10
120: f7 fe 5b 24 ldah t1,-265(t12)
124: c8 7f 42 20 lda t1,32712(t1)
128: 00 40 e2 6a jsr t9,(t1),0x12c
12c: 35 00 80 f7 bne at,0x204
130: 20 96 01 48 zapnot v0,0xc,v0
134: 32 00 00 e4 beq v0,0x200
138: 2e 00 e0 c3 br 0x1f4
13c: f0 ff 3f 24 ldah t0,-16
140: 01 90 22 40 addl t0,0x14,t0
144: 18 04 e1 47 mov t0,t10
148: 18 00 f8 43 sextl t10,t10
14c: f7 fe 5b 24 ldah t1,-265(t12)
150: c0 7f 42 20 lda t1,32704(t1)
154: 00 40 e2 6a jsr t9,(t1),0x158
158: 2a 00 80 f7 bne at,0x204
15c: 02 30 00 40 addl v0,0x1,t1
160: 02 00 e2 43 sextl t1,t1
164: 26 00 40 e4 beq t1,0x200
168: 20 d6 01 48 zapnot v0,0xe,v0
16c: 00 40 40 24 ldah t1,16384(v0)
170: 02 00 e2 43 sextl t1,t1
174: 22 00 40 e4 beq t1,0x200
178: 00 40 40 24 ldah t1,16384(v0)
17c: 00 fe 42 20 lda t1,-512(t1)
180: 02 00 e2 43 sextl t1,t1
184: 1e 00 40 e4 beq t1,0x200
188: cd 39 40 24 ldah t1,14797(v0)
18c: 00 9c 42 20 lda t1,-25600(t1)
190: 02 00 e2 43 sextl t1,t1
194: 1a 00 40 e4 beq t1,0x200
198: 00 35 40 24 ldah t1,13568(v0)
19c: 00 8f 42 20 lda t1,-28928(t1)
1a0: 02 00 e2 43 sextl t1,t1
1a4: 16 00 40 e4 beq t1,0x200
1a8: a8 3f 40 24 ldah t1,16296(v0)
1ac: 00 9d 42 20 lda t1,-25344(t1)
1b0: 02 00 e2 43 sextl t1,t1
1b4: 12 00 40 e4 beq t1,0x200
1b8: fe ff 5f 24 ldah t1,-2
1bc: 00 00 02 44 and v0,t1,v0
1c0: ee 39 40 24 ldah t1,14830(v0)
1c4: 02 00 e2 43 sextl t1,t1
1c8: 0d 00 40 e4 beq t1,0x200
1cc: 20 16 01 48 zapnot v0,0x8,v0
1d0: 0b 00 00 e4 beq v0,0x200
1d4: 00 f0 5f 24 ldah t1,-4096
1d8: 00 00 02 44 and v0,t1,v0
1dc: 00 20 40 24 ldah t1,8192(v0)
1e0: 02 00 e2 43 sextl t1,t1
1e4: 06 00 40 e4 beq t1,0x200
1e8: 00 10 40 24 ldah t1,4096(v0)
1ec: 02 00 e2 43 sextl t1,t1
1f0: 03 00 40 e4 beq t1,0x200
1f4: 60 00 10 a0 ldl v0,96(a0)
1f8: 20 f6 01 48 zapnot v0,0xf,v0
1fc: 01 80 fa 6b ret
200: 00 04 ff 47 clr v0
204: 01 80 fa 6b ret
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 56a4df9..eede373 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -15,6 +15,7 @@ config ALPHA
select GENERIC_IRQ_SHOW
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARCH_HAVE_NMI_SAFE_CMPXCHG
+ select HAVE_BPF_JIT if (NET)
help
The Alpha is a 64-bit general-purpose processor designed and
marketed by the Digital Equipment Corporation of blessed memory,
diff --git a/arch/alpha/Makefile b/arch/alpha/Makefile
index 4759fe7..e634f0c 100644
--- a/arch/alpha/Makefile
+++ b/arch/alpha/Makefile
@@ -38,7 +38,9 @@ KBUILD_CFLAGS += $(cflags-y) -Wa,-mev6
head-y := arch/alpha/kernel/head.o
-core-y += arch/alpha/kernel/ arch/alpha/mm/
+core-y += arch/alpha/kernel/ \
+ arch/alpha/mm/ \
+ arch/alpha/net/
core-$(CONFIG_MATHEMU) += arch/alpha/math-emu/
drivers-$(CONFIG_OPROFILE) += arch/alpha/oprofile/
libs-y += arch/alpha/lib/
diff --git a/arch/alpha/net/Makefile b/arch/alpha/net/Makefile
new file mode 100644
index 0000000..4a6ae5b
--- /dev/null
+++ b/arch/alpha/net/Makefile
@@ -0,0 +1,4 @@
+#
+# Arch-specific network modules
+#
+obj-$(CONFIG_BPF_JIT) += bpf_jit_helper.o bpf_jit_comp.o
diff --git a/arch/alpha/net/bpf_jit.h b/arch/alpha/net/bpf_jit.h
new file mode 100644
index 0000000..6513820
--- /dev/null
+++ b/arch/alpha/net/bpf_jit.h
@@ -0,0 +1,108 @@
+/* bpf_jit.h: BPF JIT compiler for Alpha
+ *
+ * Copyright 2012 Jan Seiffert <kaffeemonster@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+#ifndef _BPF_JIT_H
+#define _BPF_JIT_H
+
+#define BPF_ALPHA_STACKFRAME (64)
+#define BPF_HELPER_STACKFRAME (64+32)
+
+#ifdef __ASSEMBLY__
+# define REG_NAME(x) $##x
+#else
+# define REG_NAME(x) (x)
+#endif
+
+/*
+ * Generated code register usage:
+ *
+ * mostly like the C ABI? (e.g. $30=sp, $26=ra, no fp), with:
+ *
+ * skb a0 (Entry parameter)
+ * socket_filter isns a1 (Entry parameter)
+ * A register v0 (result register)
+ * X register t0
+ * scratch register t1
+ * skb->data t2
+ * skb headlen t3 (skb->len - skb->data_len)
+ *
+ * asm helper are called with a more asm ABI, they have to
+ * save regs are make things neat if they want to call out
+ * again.
+ * helper link register t9
+ * addr t10
+ */
+/* fixed register */
+#define r_ret REG_NAME(0)
+/* temp 1 - 8 */
+#define r_A REG_NAME(0)
+#define r_X REG_NAME(1)
+#define r_scratch1 REG_NAME(2)
+#define r_D REG_NAME(3)
+#define r_HL REG_NAME(4)
+#define r_curthread REG_NAME(8)
+/* saved 9 - 14 */
+#define r_fp REG_NAME(15) /* y */
+/* args 16 - 21 */
+#define r_skb REG_NAME(16)
+#define r_sf REG_NAME(17)
+/* temp 22 - 25 */
+/* div helper link register */
+#define r_div_link REG_NAME(23)
+/* div helper uses 24 & 25 as parameter */
+#define r_addr REG_NAME(24)
+#define r_ra REG_NAME(26) /* y */
+/* div helper returns result in 27, may clobber 28 */
+#define r_pv REG_NAME(27) /* n */
+#define r_at REG_NAME(28) /* n */
+#define r_gp REG_NAME(29) /* n */
+#define r_sp REG_NAME(30) /* y */
+#define r_zero REG_NAME(31)
+
+#define SEEN_DATAREF 0x10000 /* might call external helpers */
+#define SEEN_XREG 0x20000 /* X reg is used */
+#define SEEN_MEM 0x40000 /* SEEN_MEM+(1<<n) = mem[n] used */
+#define SEEN_DIV 0x80000 /* we need to call the div instruction helper */
+#define SEEN_MEM_MSK 0x0ffff
+
+#ifndef __ASSEMBLY__
+
+# define COND_MSK 0x7
+enum cond {
+ COND_EQ = 0x0,
+ COND_GE = 0x1,
+ COND_GT = 0x3,
+ COND_LE = 0x4,
+ COND_LT = 0x6,
+ COND_NE = 0x7
+};
+
+struct codegen_context {
+ unsigned int seen;
+ unsigned int idx;
+ int pc_ret0; /* bpf index of first RET #0 instruction (if any) */
+};
+
+/*
+ * Assembly helpers from arch/alpha/net/bpf_jit.S:
+ */
+extern u32 sk_load_word[1], sk_load_half[1], sk_load_byte[1], sk_load_byte_msh[1];
+extern u32 sk_load_word_positive_offset[1], sk_load_half_positive_offset[1];
+extern u32 sk_load_byte_positive_offset[1], sk_load_byte_msh_positive_offset[1];
+extern u32 sk_load_word_negative_offset[1], sk_load_half_negative_offset[1];
+extern u32 sk_load_byte_negative_offset[1], sk_load_byte_msh_negative_offset[1];
+extern u32 sk_load_word_bwx[1], sk_load_half_bwx[1];
+extern u32 sk_load_byte_bwx[1], sk_load_byte_msh_bwx[1];
+extern u32 sk_load_word_positive_offset_bwx[1], sk_load_half_positive_offset_bwx[1];
+extern u32 sk_load_byte_positive_offset_bwx[1], sk_load_byte_msh_positive_offset_bwx[1];
+extern u32 sk_load_word_negative_offset_bwx[1], sk_load_half_negative_offset_bwx[1];
+extern u32 sk_load_byte_negative_offset_bwx[1], sk_load_byte_msh_negative_offset_bwx[1];
+#endif /* __ASSEMBLY__ */
+
+#endif
diff --git a/arch/alpha/net/bpf_jit_comp.c b/arch/alpha/net/bpf_jit_comp.c
new file mode 100644
index 0000000..5ee67c5
--- /dev/null
+++ b/arch/alpha/net/bpf_jit_comp.c
@@ -0,0 +1,1148 @@
+/* bpf_jit_comp.c: BPF JIT compiler for Alpha
+ *
+ * Copyright 2012 Jan Seiffert <kaffeemonster@googlemail.com>
+ *
+ * Based on the PPC64 BPF compiler, Matt Evans <matt@ozlabs.org>,
+ * IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <linux/moduleloader.h>
+#include <asm/cacheflush.h>
+#include <linux/netdevice.h>
+#include <linux/filter.h>
+#include "bpf_jit.h"
+
+/*
+ * Instruction generation macros
+ */
+#define PLANT_INSTR(d, idx, instr) \
+ do { if (d) { (d)[idx] = instr; } idx++; } while (0)
+#define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr)
+
+#define ALPHA_INST_MEM(op, ra, rb, disp) \
+ ((((u32)op)<<26)|(((u32)ra)<<21)|(((u32)rb)<<16)|((disp)&0xffff))
+#define ALPHA_INST_JMP(op, ra, disp) \
+ ((((u32)op)<<26)|(((u32)ra)<<21)|((disp)&0x1FFFFF))
+#define ALPHA_INST_OPR(op, ra, rb, func, rc) \
+ ((((u32)op)<<26)|(((u32)ra)<<21)|(((u32)rb)<<16)|(((u32)func)<<5)|(rc))
+#define ALPHA_INST_OPI(op, ra, imm, func, rc) \
+ ((((u32)op)<<26)|(((u32)ra)<<21)|(((((u32)(imm)&0xff)<<1)|1)<<12)|(((u32)func)<<5)|(rc))
+
+/* ld/st */
+#define ALPHA_LDA(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x08, ra, rb, imm16))
+#define ALPHA_LDAH(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x09, ra, rb, imm16))
+#define ALPHA_LDQ_U(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x0b, ra, rb, imm16))
+#define ALPHA_LDQ(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x29, ra, rb, imm16))
+#define ALPHA_LDL(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x28, ra, rb, imm16))
+#define ALPHA_LDWU(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x0c, ra, rb, imm16))
+#define ALPHA_LDBU(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x0A, ra, rb, imm16))
+#define ALPHA_STQ(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x2d, ra, rb, imm16))
+#define ALPHA_STL(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x2c, ra, rb, imm16))
+#define ALPHA_STW(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x0d, ra, rb, imm16))
+#define ALPHA_STB(rb, imm16, ra) EMIT(ALPHA_INST_MEM(0x0e, ra, rb, imm16))
+/* control */
+#define ALPHA_BR(disp) EMIT(ALPHA_INST_JMP(0x30, r_zero, disp/4))
+#define ALPHA_BSR(ra, disp) EMIT(ALPHA_INST_JMP(0x34, ra, disp/4))
+#define ALPHA_BEQ(ra, disp) EMIT(ALPHA_INST_JMP(0x39, ra, disp/4))
+#define ALPHA_BNE(ra, disp) EMIT(ALPHA_INST_JMP(0x3d, ra, disp/4))
+#define ALPHA_BGE(ra, disp) EMIT(ALPHA_INST_JMP(0x3e, ra, disp/4))
+#define ALPHA_BGT(ra, disp) EMIT(ALPHA_INST_JMP(0x3f, ra, disp/4))
+#define ALPHA_BLE(ra, disp) EMIT(ALPHA_INST_JMP(0x3b, ra, disp/4))
+#define ALPHA_BLT(ra, disp) EMIT(ALPHA_INST_JMP(0x3a, ra, disp/4))
+#define ALPHA_JMP(ra, rb) EMIT(ALPHA_INST_MEM(0x1A, ra, rb, 0 << 14))
+#define ALPHA_JSR(ra, rb) EMIT(ALPHA_INST_MEM(0x1A, ra, rb, 1 << 14))
+#define ALPHA_JSR_COR(ra, rb) EMIT(ALPHA_INST_MEM(0x1A, ra, rb, 3 << 14))
+#define ALPHA_RET(ra, rb) EMIT(ALPHA_INST_MEM(0x1A, ra, rb, (2 << 14)|1))
+/* arith */
+#define ALPHA_ADDL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x10, ra, rb, 0x00, rc))
+#define ALPHA_ADDLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x10, ra, imm8, 0x00, rc))
+#define ALPHA_SUBL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x10, ra, rb, 0x09, rc))
+#define ALPHA_SUBLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x10, ra, imm8, 0x09, rc))
+#define ALPHA_MULL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x13, ra, rb, 0x00, rc))
+#define ALPHA_MULLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x13, ra, imm8, 0x00, rc))
+#define ALPHA_MULQ(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x13, ra, rb, 0x20, rc))
+#define ALPHA_MULQI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x13, ra, imm8, 0x20, rc))
+#define ALPHA_S4ADDL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x10, ra, rb, 0x02, rc))
+#define ALPHA_S4ADDLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x10, ra, imm8, 0x02, rc))
+#define ALPHA_S8ADDL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x10, ra, rb, 0x12, rc))
+#define ALPHA_S8ADDLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x10, ra, imm8, 0x12, rc))
+#define ALPHA_S4SUBL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x10, ra, rb, 0x0B, rc))
+#define ALPHA_S4SUBLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x10, ra, imm8, 0x0B, rc))
+#define ALPHA_S8SUBL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x10, ra, rb, 0x1B, rc))
+#define ALPHA_S8SUBLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x10, ra, imm8, 0x1B, rc))
+/* logic */
+#define ALPHA_AND(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x11, ra, rb, 0x00, rc))
+#define ALPHA_ANDI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x11, ra, imm8, 0x00, rc))
+#define ALPHA_BIC(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x11, ra, rb, 0x08, rc))
+#define ALPHA_BICI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x11, ra, imm8, 0x08, rc))
+#define ALPHA_BIS(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x11, ra, rb, 0x20, rc))
+#define ALPHA_BISI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x11, ra, imm8, 0x20, rc))
+#define ALPHA_ORNOT(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x11, ra, rb, 0x28, rc))
+#define ALPHA_ORNOTI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x11, ra, imm8, 0x28, rc))
+/* shift log */
+#define ALPHA_SRL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x34, rc))
+#define ALPHA_SRLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x34, rc))
+#define ALPHA_SLL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x39, rc))
+#define ALPHA_SLLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x39, rc))
+/* shift arith */
+#define ALPHA_SRA(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x3c, rc))
+#define ALPHA_SRAI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x3c, rc))
+/* manipulator */
+#define ALPHA_ZAP(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x30, rc))
+#define ALPHA_ZAPI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x30, rc))
+#define ALPHA_ZAPNOT(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x31, rc))
+#define ALPHA_ZAPNOTI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x31, rc))
+#define ALPHA_INSBL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x0b, rc))
+#define ALPHA_INSBLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x0b, rc))
+#define ALPHA_EXTBL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x06, rc))
+#define ALPHA_EXTBLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x06, rc))
+#define ALPHA_EXTWL(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x16, rc))
+#define ALPHA_EXTWLI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x16, rc))
+#define ALPHA_EXTWH(ra, rb, rc) EMIT(ALPHA_INST_OPR(0x12, ra, rb, 0x5a, rc))
+#define ALPHA_EXTWHI(ra, imm8, rc) EMIT(ALPHA_INST_OPI(0x12, ra, imm8, 0x5a, rc))
+
+/* pseudo instr */
+#define ALPHA_NEGL(ra, rb) ALPHA_SUBL(r_zero, ra, rb)
+#define ALPHA_NEGLI(imm8, rb) ALPHA_SUBLI(r_zero, imm8, rb)
+#define ALPHA_ZEXTL(ra, rb) ALPHA_ZAPNOTI(ra, 15, rb)
+#define ALPHA_ZEXTW(ra, rb) ALPHA_ZAPNOTI(ra, 3, rb)
+#define ALPHA_ZEXTB(ra, rb) ALPHA_ZAPNOTI(ra, 1, rb)
+#define ALPHA_SEXTL(ra, rb) ALPHA_ADDL(r_zero, ra, rb)
+#define ALPHA_SEXTLI(imm8, rb) ALPHA_ADDLI(r_zero, imm8, rb)
+#define ALPHA_MOV(ra, rb) ALPHA_BIS(r_zero, ra, rb)
+#define ALPHA_CLR(ra) ALPHA_BIS(r_zero, r_zero, ra)
+#define ALPHA_UNOP() ALPHA_LDQ_U(r_zero, 0, 0)
+/* shorthands */
+#define CLEAR_A() ALPHA_CLR(r_A)
+#define CLEAR_X() ALPHA_CLR(r_X)
+
+
+/*
+ * Vars
+ */
+int bpf_jit_enable __read_mostly;
+int optimize_size __read_mostly;
+
+/* Pseudo symbol to call out to div helper */
+extern u32 __divlu[1];
+
+/*
+ * Helper
+ */
+static inline bool is_imm8(unsigned int K)
+{
+ return K <= 255;
+}
+
+static inline bool is_imm16(int K)
+{
+ return K >= -32768 && K <= 32767;
+}
+
+#define is_imm_jdisp(k) _is_imm_jdisp(k, ctx->idx)
+
+static bool _is_imm_jdisp(int K, unsigned int idx)
+{
+ if ((K % 4) != 0)
+ pr_info("JIT: jump displacement of %i on idx %u is not evenly dividable by 4!\n", K, idx);
+ K /= 4;
+ return K >= (-0x1FFFFF) && K <= 0xfffff;
+}
+
+static void emit_single_c(u32 *image, struct codegen_context *ctx,
+ int K, int r_s, int r_t)
+{
+ if (K == 0) {
+ if (r_s != r_t)
+ ALPHA_MOV(r_s, r_t);
+ } else if (is_imm8(K))
+ ALPHA_ADDLI(r_s, K, r_t);
+ else if (is_imm8(-K))
+ ALPHA_SUBLI(r_s, -K, r_t);
+ else if (is_imm16(K))
+ ALPHA_LDA(r_s, K, r_t);
+ else if ((K & 0xffff) == 0)
+ ALPHA_LDAH(r_s, K>>16, r_t);
+ else {
+ pr_err("JIT: unexpected load constant");
+ BUG();
+ }
+}
+
+static void constant_breakdown(int K, int *low, int *extra, int *high)
+{
+ int diff;
+
+ *extra = 0;
+ /*
+ * typical RISC, constant handling is a PITA.
+ * taking a peak into GCC 3.3.6 how to break down a constant load.
+ */
+ *low = ((K & 0xffff) ^ 0x8000) - 0x8000;
+ diff = K - *low;
+ *high = (((diff >> 16) & 0xffff) ^ 0x8000) - 0x8000;
+
+ if ((*high & 0x8000) != 0 && K >= 0) {
+ *extra = 0x4000;
+ diff -= 0x40000000;
+ *high = ((diff >> 16) & 0xffff) - 2 * ((diff >> 16) & 0x8000);
+ }
+}
+
+static unsigned int constant_needs(int K)
+{
+ int low, extra, high;
+
+ constant_breakdown(K, &low, &extra, &high);
+ if (K == low || (low == 0 && extra == 0))
+ return 1;
+ if (extra)
+ return 3;
+ return 2;
+}
+
+static void add_constant(u32 *image, struct codegen_context *ctx,
+ int K, int r_s, int r_t)
+{
+ int low, extra, high;
+
+ constant_breakdown(K, &low, &extra, &high);
+
+ if (K == low || (low == 0 && extra == 0)) {
+ emit_single_c(image, ctx, K, r_s, r_t);
+ return;
+ }
+
+ emit_single_c(image, ctx, high << 16, r_s, r_t);
+ if (extra)
+ emit_single_c(image, ctx, extra << 16, r_t, r_t);
+ emit_single_c(image, ctx, low, r_t, r_t);
+}
+
+static void load_complex_constant(u32 *image, struct codegen_context *ctx,
+ unsigned int i, int K, int r)
+
+{
+ if (K == 0) {
+ ALPHA_CLR(r);
+ return;
+ }
+ if (optimize_size == 0 || constant_needs(K) < 2 ||
+ i > (0x7fff/sizeof(struct sock_filter))) {
+ add_constant(image, ctx, K, r_zero, r);
+ } else {
+ /* load the constant from the filter program */
+ ALPHA_LDL(r_sf, (i * sizeof(struct sock_filter)) +
+ offsetof(struct sock_filter, k), r);
+ }
+}
+
+static void optimize_add(u32 *image, struct codegen_context *ctx,
+ unsigned int i, unsigned int K, int r_t)
+{
+ if (K == 0)
+ return;
+
+ if (optimize_size == 0 || constant_needs(K) < 2 ||
+ i > (0x7fff/sizeof(struct sock_filter))) {
+ add_constant(image, ctx, K, r_A, r_t);
+ ALPHA_SEXTL(r_t, r_t);
+ } else {
+ /* load the constant from the filter program */
+ ALPHA_LDL(r_sf, (i * sizeof(struct sock_filter)) +
+ offsetof(struct sock_filter, k), r_scratch1);
+ ALPHA_ADDL(r_A, r_scratch1, r_t);
+ }
+}
+
+static void optimize_sub(u32 *image, struct codegen_context *ctx,
+ unsigned int i, unsigned int K, int r_t)
+{
+ if (K == 0)
+ return;
+
+ if (optimize_size == 0 || constant_needs(K) < 2 ||
+ i > (0x7fff/sizeof(struct sock_filter))) {
+ optimize_add(image, ctx, i, -K, r_t);
+ } else {
+ /* load the constant from the filter program */
+ ALPHA_LDL(r_sf, (i * sizeof(struct sock_filter)) +
+ offsetof(struct sock_filter, k), r_scratch1);
+ ALPHA_SUBL(r_A, r_scratch1, r_t);
+ }
+}
+
+static void optimize_mull(u32 *image, struct codegen_context *ctx,
+ unsigned int i, unsigned int K)
+{
+ switch (K) {
+ case 0:
+ CLEAR_A(); /* fallthrough */
+ case 1:
+ return;
+ case 2:
+ ALPHA_ADDL(r_A, r_A, r_A);
+ return;
+ case 3:
+ ALPHA_S4SUBL(r_A, r_A, r_A);
+ return;
+ case 4:
+ ALPHA_S4ADDL(r_A, r_zero, r_A);
+ return;
+ case 5:
+ ALPHA_S4ADDL(r_A, r_A, r_A);
+ return;
+ case 6:
+ ALPHA_S4ADDL(r_A, r_A, r_scratch1);
+ ALPHA_ADDL(r_A, r_scratch1, r_A);
+ return;
+ case 7:
+ ALPHA_S8SUBL(r_A, r_A, r_A);
+ return;
+ case 8:
+ ALPHA_S8ADDL(r_A, r_zero, r_A);
+ return;
+ case 9:
+ ALPHA_S8ADDL(r_A, r_A, r_A);
+ return;
+ case 10:
+ ALPHA_S8ADDL(r_A, r_A, r_scratch1);
+ ALPHA_ADDL(r_A, r_scratch1, r_A);
+ return;
+ case 11:
+ ALPHA_S8SUBL(r_A, r_A, r_scratch1);
+ ALPHA_S4ADDL(r_A, r_scratch1, r_A);
+ case 12:
+ ALPHA_S8ADDL(r_A, r_zero, r_scratch1);
+ ALPHA_S4ADDL(r_A, r_scratch1, r_A);
+ return;
+ case 13:
+ ALPHA_S8ADDL(r_A, r_A, r_scratch1);
+ ALPHA_S4ADDL(r_A, r_scratch1, r_A);
+/* TODO: test for more fun with s4add/s8add and shifts */
+ default:
+ break;
+ }
+
+ if (is_imm8(K)) {
+ ALPHA_MULLI(r_A, r_A, K);
+ } else {
+ load_complex_constant(image, ctx, i, K, r_scratch1);
+ ALPHA_MULL(r_A, r_scratch1, r_A);
+ }
+}
+
+static void optimize_and(u32 *image, struct codegen_context *ctx,
+ unsigned int i, unsigned int K, int r_t)
+{
+ unsigned int j, mask;
+ u8 bit;
+
+ if (K == 0xffffffff)
+ return;
+
+ if (K == 0) {
+ ALPHA_CLR(r_t);
+ return;
+ }
+ mask = 0xff; bit = 1;
+ for (j = 0; j < 4; j++, mask <<= 8, bit <<= 1) {
+ if (K == mask) {
+ ALPHA_ZAPNOTI(r_A, bit, r_t);
+ return;
+ }
+ }
+ mask = 0xff00ff; bit = 5;
+ for (j = 0; j < 2; j++, mask <<= 8, bit <<= 1) {
+ if (K == mask) {
+ ALPHA_ZAPNOTI(r_A, bit, r_t);
+ return;
+ }
+ }
+ mask = 0xffffff; bit = 7;
+ for (j = 0; j < 4; j++, mask = rol32(mask, 8), bit = rol8(bit, 1)) {
+ if (K == mask) {
+ ALPHA_ZAPNOTI(r_A, bit, r_t);
+ return;
+ }
+ }
+ mask = 0xffff; bit = 3;
+ for (j = 0; j < 4; j++, mask = rol32(mask, 8), bit = rol8(bit, 1)) {
+ if (K == mask) {
+ ALPHA_ZAPNOTI(r_A, bit, r_t);
+ return;
+ }
+ }
+
+/* TODO: test for more fun with zap/zapnot */
+
+ if (is_imm8(K)) {
+ ALPHA_ANDI(r_A, K, r_t);
+ } else if (is_imm8(~K)) {
+ ALPHA_BICI(r_A, ~K, r_t);
+ } else if ((constant_needs(K) != 1 && constant_needs(~K) == 1 &&
+ i <= (0x7fff/sizeof(struct sock_filter))) ||
+ (constant_needs(K) > constant_needs(~K) &&
+ (i > (0x7fff/sizeof(struct sock_filter)) ||
+ optimize_size == 0))) {
+ load_complex_constant(image, ctx, i, ~K, r_scratch1);
+ ALPHA_BIC(r_A, r_scratch1, r_t);
+ } else {
+ load_complex_constant(image, ctx, i, K, r_scratch1);
+ ALPHA_AND(r_A, r_scratch1, r_t);
+ }
+}
+
+static void optimize_or(u32 *image, struct codegen_context *ctx,
+ unsigned int i, unsigned int K)
+{
+ if (K == 0xffffffff) {
+ ALPHA_SUBLI(r_zero, 1, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ return;
+ }
+
+ if (K == 0)
+ return;
+
+ if (is_imm8(K)) {
+ ALPHA_BISI(r_A, K, r_A);
+ } else if (is_imm8(~K)) {
+ ALPHA_ORNOTI(r_A, ~K, r_A);
+ } else if ((constant_needs(K) != 1 && constant_needs(~K) == 1 &&
+ i <= (0x7fff/sizeof(struct sock_filter))) ||
+ (constant_needs(K) > constant_needs(~K) &&
+ (i > (0x7fff/sizeof(struct sock_filter)) ||
+ optimize_size == 0))) {
+ load_complex_constant(image, ctx, i, ~K, r_scratch1);
+ ALPHA_ORNOT(r_A, r_scratch1, r_A);
+ } else {
+ load_complex_constant(image, ctx, i, K, r_scratch1);
+ ALPHA_BIS(r_A, r_scratch1, r_A);
+ }
+}
+
+static void emit_ldwu(u32 *image, struct codegen_context *ctx,
+ unsigned int off, int r_p, int r)
+{
+ if (amask(AMASK_BWX)) {
+ ALPHA_LDWU(r_p, off, r);
+ } else if ((off & -4) != 3) {
+ ALPHA_LDL(r_p, off & -4, r);
+ off &= 4-1;
+ if (off == 0)
+ ALPHA_ZEXTW(r, r);
+ else
+ ALPHA_EXTWLI(r, off, r);
+ } else if ((off & -8) != 7) {
+ ALPHA_LDQ(r_p, off & -8, r);
+ off &= 8-1;
+ ALPHA_EXTWLI(r, off, r);
+ } else {
+ ALPHA_LDQ(r_p, off & -8, r_scratch1);
+ ALPHA_LDQ(r_p, (off & -8)+8, r);
+ off &= 8-1;
+ ALPHA_EXTWLI(r_scratch1, off, r_scratch1);
+ ALPHA_EXTWHI(r, off, r);
+ ALPHA_BIS(r, r_scratch1, r);
+ }
+}
+
+static void emit_jmp(u32 *image, struct codegen_context *ctx, unsigned int dest)
+{
+ long long ldisp = (long long)dest - ((ctx->idx + 1) * 4);
+ int disp;
+
+ if (ldisp == 0)
+ return;
+
+ if (ldisp < -2147483648 || ldisp > 2147483647) {
+ pr_err("JIT: 64 bit jump displacement: %lld 0x%16.16llx\n", ldisp, ldisp);
+ BUG();
+ }
+ disp = ldisp;
+ if (!is_imm_jdisp(disp)) {
+ add_constant(image, ctx, dest, r_pv, r_scratch1);
+ ALPHA_JMP(r_zero, r_scratch1);
+ return;
+ }
+ ALPHA_BR(disp);
+}
+
+static void emit_cjmp(u32 *image, struct codegen_context *ctx,
+ unsigned int dest, enum cond c, int r)
+{
+ long long ldisp = (long long)dest - ((ctx->idx + 1) * 4);
+ int disp;
+
+ if (ldisp < -2147483648 || ldisp > 2147483647) {
+ pr_err("JIT: 64 bit cjump displacement: %lld 0x%16.16llx\n", ldisp, ldisp);
+ BUG();
+ }
+ disp = ldisp;
+ if (!is_imm_jdisp(disp)) {
+ unsigned int cn = constant_needs(dest) + 1;
+ emit_cjmp(image, ctx, (ctx->idx + 1 + cn) * 4, c ^ COND_MSK, r);
+ add_constant(image, ctx, dest, r_pv, r_scratch1);
+ ALPHA_JMP(r_zero, r_scratch1);
+ return;
+ }
+
+ switch (c) {
+ case COND_EQ:
+ ALPHA_BEQ(r, disp);
+ break;
+ case COND_NE:
+ ALPHA_BNE(r, disp);
+ break;
+ case COND_GE:
+ ALPHA_BGE(r, disp);
+ break;
+ case COND_GT:
+ ALPHA_BGT(r, disp);
+ break;
+ case COND_LE:
+ ALPHA_BLE(r, disp);
+ break;
+ case COND_LT:
+ ALPHA_BLT(r, disp);
+ break;
+ }
+}
+
+static void emit_call(u32 *image, struct codegen_context *ctx,
+ void *func, int r)
+{
+ ptrdiff_t disp = (char *)func - (char *)&image[ctx->idx + 1];
+ if (disp >= -2147483648 && disp <= 2147483647) {
+ if (is_imm_jdisp(disp)) {
+ ALPHA_BSR(r, disp);
+ return;
+ }
+
+ disp = (char *)func - (char *)image;
+ if (disp >= -2147483648 && disp <= 2147483647) {
+ add_constant(image, ctx, disp, r_pv, r_scratch1);
+ ALPHA_JSR(r, r_scratch1);
+ return;
+ }
+ }
+
+ if (image != NULL) {
+ pr_err("JIT: 64 Bit call displacement: %td 0x%16.16tx\n", disp, disp);
+ BUG();
+ } else {
+ ctx->idx += 4;
+ }
+}
+
+/*
+ * Main functions
+ */
+#define need_epilogue(ctx) ((ctx->seen & (SEEN_MEM)) != 0)
+static void bpf_jit_build_prologue(struct sk_filter *fp, u32 *image,
+ struct codegen_context *ctx)
+{
+ const struct sock_filter *filter = fp->insns;
+
+ if (ctx->seen & (SEEN_MEM)) /* Make stackframe */
+ ALPHA_LDA(r_sp, -BPF_ALPHA_STACKFRAME, r_sp);
+
+ if (ctx->seen & SEEN_DATAREF) {
+ /*
+ * If this filter needs to access skb data,
+ * prepare r_D and r_HL:
+ * r_HL = skb->len - skb->data_len
+ * r_D = skb->data
+ */
+ ALPHA_LDL(r_skb, offsetof(struct sk_buff, data_len), r_scratch1);
+ ALPHA_LDL(r_skb, offsetof(struct sk_buff, len), r_HL);
+ ALPHA_ZEXTL(r_scratch1, r_scratch1);
+ ALPHA_ZEXTL(r_HL, r_HL);
+ ALPHA_LDQ(r_skb, offsetof(struct sk_buff, data), r_D);
+ ALPHA_SUBL(r_HL, r_scratch1, r_HL);
+ }
+
+ if (ctx->seen & SEEN_XREG) {
+ /*
+ * TODO: Could also detect whether first instr. sets X and
+ * avoid this (as below, with A).
+ */
+ CLEAR_X();
+ }
+
+ switch (filter[0].code) {
+ case BPF_S_RET_K:
+ case BPF_S_LD_W_LEN:
+ case BPF_S_ANC_PROTOCOL:
+ case BPF_S_ANC_IFINDEX:
+ case BPF_S_ANC_MARK:
+ case BPF_S_ANC_RXHASH:
+ case BPF_S_ANC_CPU:
+ case BPF_S_ANC_QUEUE:
+ case BPF_S_LD_W_ABS:
+ case BPF_S_LD_H_ABS:
+ case BPF_S_LD_B_ABS:
+ /* first instruction sets A register (or is RET 'constant') */
+ break;
+ default:
+ /* make sure we dont leak kernel information to user */
+ CLEAR_A();
+ }
+}
+
+static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
+{
+ if (ctx->seen & (SEEN_MEM))
+ ALPHA_LDA(r_sp, BPF_ALPHA_STACKFRAME, r_sp);
+ /* Our pristine return pointer should be in r26. */
+ ALPHA_RET(r_zero, r_ra);
+}
+
+#define CHOOSE_LOAD_FUNC(K, func) \
+ (amask(AMASK_BWX) ? \
+ ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset_bwx : func##_bwx) : func##_positive_offset_bwx) :\
+ ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset))
+
+/* Assemble the body code between the prologue & epilogue. */
+static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
+ struct codegen_context *ctx,
+ unsigned int *addrs)
+{
+ const struct sock_filter *filter = fp->insns;
+ u32 *func;
+ int flen = fp->len;
+ unsigned int off;
+ enum cond true_cond;
+ int i, r;
+
+ /* Start of epilogue code */
+ unsigned int exit_addr = addrs[flen];
+
+ for (i = 0; i < flen; i++) {
+ unsigned int K = filter[i].k;
+
+ /*
+ * addrs[] maps a BPF bytecode address into a real offset
+ * from the start of the body code.
+ */
+ addrs[i] = ctx->idx * 4;
+
+ switch (filter[i].code) {
+ /*** ALU ops ***/
+ case BPF_S_ALU_ADD_X: /* A += X; */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_ADDL(r_A, r_X, r_A);
+ break;
+ case BPF_S_ALU_ADD_K: /* A += K; */
+ optimize_add(image, ctx, i, K, r_A);
+ break;
+ case BPF_S_ALU_SUB_X: /* A -= X; */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_SUBL(r_A, r_X, r_A);
+ break;
+ case BPF_S_ALU_SUB_K: /* A -= K */
+ optimize_sub(image, ctx, i, K, r_A);
+ break;
+ case BPF_S_ALU_MUL_X: /* A *= X; */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_MULL(r_A, r_X, r_A);
+ break;
+ case BPF_S_ALU_MUL_K: /* A *= K */
+ optimize_mull(image, ctx, i, K);
+ break;
+ case BPF_S_ALU_DIV_X: /* A /= X; */
+ ctx->seen |= SEEN_XREG|SEEN_DIV;
+ if (ctx->pc_ret0 != -1) {
+ emit_cjmp(image, ctx, addrs[ctx->pc_ret0],
+ COND_EQ, r_X);
+ } else {
+ /* Exit, returning 0 */
+ emit_cjmp(image, ctx, (ctx->idx*4)+8,
+ COND_NE, r_X);
+ ctx->pc_ret0 = i;
+ ALPHA_CLR(r_ret);
+ emit_jmp(image, ctx, exit_addr);
+ }
+ ALPHA_MOV(r_pv, r_scratch1);
+ ALPHA_MOV(r_A, 24);
+ ALPHA_MOV(r_X, 25);
+ emit_call(image, ctx, __divlu, r_div_link);
+ ALPHA_MOV(27, r_A);
+ ALPHA_MOV(r_scratch1, r_pv);
+ break;
+ case BPF_S_ALU_DIV_K: /* A = reciprocal_divide(A, K); */
+ load_complex_constant(image, ctx, i, K, r_scratch1);
+ /* Top 32 bits of 64bit result -> A */
+ ALPHA_MULQ(r_A, r_scratch1, r_A);
+ ALPHA_SRLI(r_A, 32, r_A);
+ break;
+ case BPF_S_ALU_AND_X: /* A &= X; */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_AND(r_A, r_X, r_A);
+ break;
+ case BPF_S_ALU_AND_K: /* A &= K; */
+ optimize_and(image, ctx, i, K, r_A);
+ break;
+ case BPF_S_ALU_OR_X: /* A |= X; */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_BIS(r_A, r_X, r_A);
+ break;
+ case BPF_S_ALU_OR_K: /* A |= K; */
+ optimize_or(image, ctx, i, K);
+ break;
+ case BPF_S_ALU_LSH_X: /* A <<= X; */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_SLL(r_A, r_X, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ break;
+ case BPF_S_ALU_LSH_K: /* A <<= K; */
+ if (K != 0) {
+ ALPHA_SLLI(r_A, K & 0x3f, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ }
+ break;
+ case BPF_S_ALU_RSH_X: /* A >>= X; */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_SRL(r_A, r_X, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ break;
+ case BPF_S_ALU_RSH_K: /* A >>= K; */
+ if (K != 0) {
+ ALPHA_SRLI(r_A, K & 0x3f, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ }
+ break;
+ case BPF_S_ALU_NEG:
+ ALPHA_NEGL(r_A, r_A);
+ break;
+ case BPF_S_RET_K:
+ load_complex_constant(image, ctx, i, K, r_ret);
+ if (K == 0)
+ ctx->pc_ret0 = i;
+ /*
+ * If this isn't the very last instruction, branch to
+ * the epilogue if we've stuff to clean up. Otherwise,
+ * if there's nothing to tidy, just return. If we
+ * /are/ the last instruction, we're about to fall
+ * through to the epilogue to return.
+ */
+ if (i != flen - 1) {
+ if (!image || need_epilogue(ctx))
+ emit_jmp(image, ctx, exit_addr);
+ else
+ ALPHA_RET(r_zero, r_ra);
+ }
+ break;
+ case BPF_S_RET_A:
+ /* r_A and r_ret are the same reg */
+ /* ALPHA_MOV(r_A, r_ret); */
+ if (i != flen - 1) {
+ if (!image || need_epilogue(ctx))
+ emit_jmp(image, ctx, exit_addr);
+ else
+ ALPHA_RET(r_zero, r_ra);
+ }
+ break;
+ case BPF_S_MISC_TAX: /* X = A */
+ ALPHA_MOV(r_A, r_X);
+ break;
+ case BPF_S_MISC_TXA: /* A = X */
+ ctx->seen |= SEEN_XREG;
+ ALPHA_MOV(r_X, r_A);
+ break;
+
+ /*** Constant loads/M[] access ***/
+ case BPF_S_LD_IMM: /* A = K */
+ load_complex_constant(image, ctx, i, K, r_A);
+ break;
+ case BPF_S_LDX_IMM: /* X = K */
+ load_complex_constant(image, ctx, i, K, r_X);
+ break;
+ case BPF_S_LD_MEM: /* A = mem[K] */
+ ALPHA_LDL(r_sp, (K & 0xf) * 4, r_A);
+ ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
+ break;
+ case BPF_S_LDX_MEM: /* X = mem[K] */
+ ALPHA_LDL(r_sp, (K & 0xf) * 4, r_X);
+ ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
+ break;
+ case BPF_S_ST: /* mem[K] = A */
+ ALPHA_STL(r_sp, (K & 0xf) * 4, r_A);
+ ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
+ break;
+ case BPF_S_STX: /* mem[K] = X */
+ ALPHA_STL(r_sp, (K & 0xf) * 4, r_X);
+ ctx->seen |= SEEN_XREG | SEEN_MEM | (1<<(K & 0xf));
+ break;
+ case BPF_S_LD_W_LEN: /* A = skb->len; */
+ BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
+ off = offsetof(struct sk_buff, len);
+ ALPHA_LDL(r_skb, off, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ break;
+ case BPF_S_LDX_W_LEN: /* X = skb->len; */
+ off = offsetof(struct sk_buff, len);
+ ALPHA_LDL(r_skb, off, r_X);
+ ALPHA_ZEXTL(r_X, r_X);
+ break;
+
+ /*** Ancillary info loads ***/
+
+ /* None of the BPF_S_ANC* codes appear to be passed by
+ * sk_chk_filter(). The interpreter and the x86 BPF
+ * compiler implement them so we do too -- they may be
+ * planted in future.
+ */
+ case BPF_S_ANC_PROTOCOL: /* A = ntohs(skb->protocol); */
+ BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, protocol) != 2);
+ off = offsetof(struct sk_buff, protocol);
+ emit_ldwu(image, ctx, off, r_skb, r_A);
+ ALPHA_SRLI(r_A, 8, r_scratch1);
+ ALPHA_INSBLI(r_A, 1, r_A);
+ ALPHA_BIS(r_scratch1, r_A, r_A);
+ break;
+ case BPF_S_ANC_IFINDEX:
+ off = offsetof(struct sk_buff, dev);
+ ALPHA_LDQ(r_skb, off, r_scratch1);
+ if (ctx->pc_ret0 != -1) {
+ emit_cjmp(image, ctx, addrs[ctx->pc_ret0],
+ COND_EQ, r_scratch1);
+ } else {
+ /* Exit, returning 0; first pass hits here. */
+ emit_cjmp(image, ctx, (ctx->idx*4)+8,
+ COND_NE, r_scratch1);
+ ctx->pc_ret0 = i;
+ ALPHA_CLR(r_ret);
+ emit_jmp(image, ctx, exit_addr);
+ }
+ BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, ifindex) != 4);
+ off = offsetof(struct net_device, ifindex);
+ ALPHA_LDL(r_scratch1, off, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ break;
+ case BPF_S_ANC_MARK:
+ BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
+ off = offsetof(struct sk_buff, mark);
+ ALPHA_LDL(r_skb, off, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ break;
+ case BPF_S_ANC_RXHASH:
+ BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, rxhash) != 4);
+ off = offsetof(struct sk_buff, rxhash);
+ ALPHA_LDL(r_skb, off, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+ break;
+ case BPF_S_ANC_QUEUE:
+ BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, queue_mapping) != 2);
+ off = offsetof(struct sk_buff, queue_mapping);
+ emit_ldwu(image, ctx, off, r_skb, r_A);
+ break;
+ case BPF_S_ANC_CPU:
+#ifdef CONFIG_SMP
+ /*
+ * current_thread_info is in r8
+ * raw_smp_processor_id() = current_thread_info()->cpu
+ */
+ BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);
+ off = offsetof(struct thread_info, cpu);
+ ALPHA_LDL(r_curthread, off, r_A);
+ ALPHA_ZEXTL(r_A, r_A);
+#else
+ CLEAR_A();
+#endif
+ break;
+
+ /*** Absolute loads from packet header/data ***/
+ case BPF_S_LD_W_ABS:
+ func = CHOOSE_LOAD_FUNC(K, sk_load_word);
+ goto common_load;
+ case BPF_S_LD_H_ABS:
+ func = CHOOSE_LOAD_FUNC(K, sk_load_half);
+ goto common_load;
+ case BPF_S_LD_B_ABS:
+ func = CHOOSE_LOAD_FUNC(K, sk_load_byte);
+common_load:
+ /* Load from [K]. */
+ ctx->seen |= SEEN_DATAREF;
+ load_complex_constant(image, ctx, i, K, r_addr);
+ emit_call(image, ctx, func, r_div_link);
+ /*
+ * Helper returns != 0 in r28 on error, and an
+ * appropriate return value in r0
+ */
+ emit_cjmp(image, ctx, exit_addr, COND_NE, r_at);
+ break;
+
+ /*** Indirect loads from packet header/data ***/
+ case BPF_S_LD_W_IND:
+ func = sk_load_word;
+ goto common_load_ind;
+ case BPF_S_LD_H_IND:
+ func = sk_load_half;
+ goto common_load_ind;
+ case BPF_S_LD_B_IND:
+ func = sk_load_byte;
+common_load_ind:
+ /*
+ * Load from [X + K]. Negative offsets are tested for
+ * in the helper functions.
+ */
+ ctx->seen |= SEEN_DATAREF | SEEN_XREG;
+ add_constant(image, ctx, K, r_X, r_addr);
+ ALPHA_SEXTL(r_addr, r_addr);
+ emit_call(image, ctx, func, r_div_link);
+ /* If error, r28 set */
+ emit_cjmp(image, ctx, exit_addr, COND_NE, r_at);
+ break;
+
+ case BPF_S_LDX_B_MSH:
+ func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);
+ goto common_load;
+ break;
+
+ /*** Jump and branches ***/
+ case BPF_S_JMP_JA:
+ if (K != 0)
+ emit_jmp(image, ctx, addrs[i + 1 + K]);
+ break;
+
+ case BPF_S_JMP_JGT_K:
+ case BPF_S_JMP_JGT_X:
+ true_cond = COND_GT;
+ goto cond_branch;
+ case BPF_S_JMP_JGE_K:
+ case BPF_S_JMP_JGE_X:
+ true_cond = COND_GE;
+ goto cond_branch;
+ case BPF_S_JMP_JEQ_K:
+ case BPF_S_JMP_JEQ_X:
+ true_cond = COND_EQ;
+ goto cond_branch;
+ case BPF_S_JMP_JSET_K:
+ case BPF_S_JMP_JSET_X:
+ true_cond = COND_NE;
+ /* Fall through */
+cond_branch:
+ /* same targets, can avoid doing the test :) */
+ if (filter[i].jt == filter[i].jf) {
+ if (filter[i].jt > 0)
+ emit_jmp(image, ctx,
+ addrs[i + 1 + filter[i].jt]);
+ break;
+ }
+
+ r = r_scratch1;
+ switch (filter[i].code) {
+ case BPF_S_JMP_JGT_X:
+ case BPF_S_JMP_JGE_X:
+ case BPF_S_JMP_JEQ_X:
+ ctx->seen |= SEEN_XREG;
+ ALPHA_SUBL(r_A, r_X, r_scratch1);
+ break;
+ case BPF_S_JMP_JSET_X:
+ ctx->seen |= SEEN_XREG;
+ ALPHA_AND(r_A, r_X, r_scratch1);
+ break;
+ case BPF_S_JMP_JEQ_K:
+ case BPF_S_JMP_JGT_K:
+ case BPF_S_JMP_JGE_K:
+ if (K != 0)
+ optimize_sub(image, ctx, i, K, r_scratch1);
+ else
+ r = r_A;
+ break;
+ case BPF_S_JMP_JSET_K:
+ if (K != 0xffffffff && K != 0)
+ optimize_and(image, ctx, i, K, r_scratch1);
+ else if (K == 0)
+ goto cond_emit_fbr;
+ else
+ r = r_A;
+ break;
+ }
+ /* Sometimes branches are constructed "backward", with
+ * the false path being the branch and true path being
+ * a fallthrough to the next instruction.
+ */
+ if (filter[i].jt == 0) {
+ /* Swap the sense of the branch */
+ emit_cjmp(image, ctx, addrs[i + 1 + filter[i].jf],
+ true_cond ^ COND_MSK, r);
+ } else {
+ emit_cjmp(image, ctx, addrs[i + 1 + filter[i].jt],
+ true_cond, r);
+cond_emit_fbr:
+ if (filter[i].jf != 0)
+ emit_jmp(image, ctx, addrs[i + 1 + filter[i].jf]);
+ }
+ break;
+ default:
+ /* The filter contains something cruel & unusual.
+ * We don't handle it, but also there shouldn't be
+ * anything missing from our list.
+ */
+ if (printk_ratelimit())
+ pr_err("BPF filter opcode %04x (@%d) unsupported\n",
+ filter[i].code, i);
+ return -ENOTSUPP;
+ }
+ }
+ /* Set end-of-body-code address for exit. */
+ addrs[i] = ctx->idx * 4;
+
+ return 0;
+}
+
+static inline void bpf_flush_icache(void *start, void *end)
+{
+ mb();
+/*
+ * TODO: alpha is so loosly ordered, do we need to give it more
+ * whacks over the head?
+ */
+ flush_icache_range((unsigned long)start, (unsigned long)end);
+}
+
+void bpf_jit_compile(struct sk_filter *fp)
+{
+ unsigned int proglen, lastlen;
+ u32 *image = NULL;
+ u32 *code_base;
+ unsigned int *addrs;
+ struct codegen_context cgctx;
+ int pass;
+ int flen = fp->len;
+
+ if (!bpf_jit_enable)
+ return;
+
+ addrs = kzalloc((flen+1) * sizeof(*addrs), GFP_KERNEL);
+ if (addrs == NULL)
+ return;
+
+ /*
+ * There are multiple assembly passes as the generated code will change
+ * size as it settles down, figuring out the max branch offsets/exit
+ * paths required.
+ *
+ * The range of standard conditional branches is 21 bit, which is good
+ * for +/- 1M instructions. This should be enough for
+ * BPF_MAXINSNS = 4096.
+ *
+ * Current:
+ *
+ * First pass: No code buffer; Program is "faux-generated" -- no code
+ * emitted but maximum size of output determined (and addrs[] filled
+ * in). Also, we note whether we use M[], whether we use skb data, etc.
+ * All generation choices assumed to be 'worst-case', return path code
+ * reduction not available, etc.
+ *
+ * Second pass: Again no code buffer; addrs[] is filled and jumps
+ * should settle, since the exit points are set. This should get
+ * it mostly stable so no suprise growth happens. addrs[] is set agian.
+ *
+ * Other passes: Code buffer allocated with size determined previously.
+ * Prologue generated to support features we have seen used. addrs[]
+ * is filled in again, as code may be slightly smaller as a result.
+ *
+ */
+
+ cgctx.seen = 0;
+ cgctx.pc_ret0 = -1;
+ /* Scouting faux-generate pass 0 */
+ if (bpf_jit_build_body(fp, 0, &cgctx, addrs))
+ /* We hit something illegal or unsupported. */
+ goto out;
+ lastlen = cgctx.idx * 4;
+
+ /* reset */
+ cgctx.idx = 0;
+ /*
+ * Pretend to build an prologue, given the features we've seen.
+ * This may influence some offsets
+ */
+ bpf_jit_build_prologue(fp, 0, &cgctx);
+ proglen = cgctx.idx;
+ /* Let a second faux-generate pass run to settle some jumps */
+ if (bpf_jit_build_body(fp, 0, &cgctx, addrs))
+ /* We hit something illegal or unsupported. */
+ goto out;
+
+ if (bpf_jit_enable > 1)
+ pr_info("Pass 2: shrink = %d, seen = 0x%x\n",
+ lastlen - ((cgctx.idx - proglen) * 4), cgctx.seen);
+
+ /* Pretend to build epilogue, given the features we've seen. */
+ bpf_jit_build_epilogue(0, &cgctx);
+ /*
+ * Now ctgtx.idx is updated as we pretended to output instructions,
+ * the total size aproximation can now be calculated from idx.
+ */
+
+ lastlen = proglen = cgctx.idx * 4;
+ /* now allocate mem, to get the final mem addr */
+ image = module_alloc(max_t(unsigned int, proglen,
+ sizeof(struct work_struct)));
+ if (!image)
+ goto out;
+
+ code_base = image;
+
+ /* Code generation passes 3-n */
+ for (pass = 3; pass < 6; pass++, lastlen = cgctx.idx * 4) {
+ /* Now build the prologue, body code & epilogue for real. */
+ cgctx.idx = 0;
+ bpf_jit_build_prologue(fp, code_base, &cgctx);
+ bpf_jit_build_body(fp, code_base, &cgctx, addrs);
+ bpf_jit_build_epilogue(code_base, &cgctx);
+
+ if (bpf_jit_enable > 1)
+ pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass,
+ lastlen - (cgctx.idx * 4), cgctx.seen);
+ /* has size settled? */
+ if ((lastlen - (cgctx.idx * 4)) == 0)
+ break;
+ }
+
+ if (bpf_jit_enable > 1)
+ pr_info("flen=%d proglen=%u pass=%d image=%p\n",
+ flen, lastlen, pass, image);
+
+ if (image) {
+ if (bpf_jit_enable > 1)
+ print_hex_dump(KERN_ERR, "JIT code: ",
+ DUMP_PREFIX_ADDRESS,
+ 32, 4, code_base,
+ lastlen, false);
+
+ bpf_flush_icache(code_base, code_base + (proglen/4));
+ fp->bpf_func = (void *)image;
+ }
+out:
+ kfree(addrs);
+ return;
+}
+
+static void jit_free_defer(struct work_struct *arg)
+{
+ module_free(NULL, arg);
+}
+
+/* run from softirq, we must use a work_struct to call
+ * module_free() from process context
+ */
+void bpf_jit_free(struct sk_filter *fp)
+{
+ if (fp->bpf_func != sk_run_filter) {
+ struct work_struct *work = (struct work_struct *)fp->bpf_func;
+
+ INIT_WORK(work, jit_free_defer);
+ schedule_work(work);
+ }
+}
diff --git a/arch/alpha/net/bpf_jit_helper.S b/arch/alpha/net/bpf_jit_helper.S
new file mode 100644
index 0000000..1288c76
--- /dev/null
+++ b/arch/alpha/net/bpf_jit_helper.S
@@ -0,0 +1,469 @@
+/* bpf_jit_helper.S: Packet/header access helper functions
+ * for Alpha BPF compiler.
+ *
+ * Copyright 2012 Jan Seiffert <kaffeemonster@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <asm/regdef.h>
+#include "bpf_jit.h"
+
+#define FUNC_ALIGN 4
+#define SKF_MAX_OFF(ra, rc) ldah rc, -32(ra)
+
+ .align 4
+ .arch ev6
+ .set noat
+/*
+ * All of these routines are called directly from generated code,
+ * whose register usage is:
+ *
+ * r_skb skb
+ * r_A,r_X A,X
+ * r_ret filter return value
+ * r_addr *** address parameter to helper ***
+ * r_scratch1 scratch
+ * r_D skb->data
+ * r_HL skb headlen
+ * r_div_link return address
+ */
+
+ .p2align FUNC_ALIGN
+ .globl sk_load_word
+ .ent sk_load_word
+ .prologue 0
+sk_load_word:
+ .globl sk_load_word_bwx
+sk_load_word_bwx:
+ blt r_addr, bpf_slow_path_word_neg
+ .globl sk_load_word_positive_offset
+sk_load_word_positive_offset:
+ .globl sk_load_word_positive_offset_bwx
+sk_load_word_positive_offset_bwx:
+ /* Are we accessing past headlen? */
+ subl r_HL, 4, r_scratch1
+ subl r_scratch1, r_addr, r_scratch1
+ blt r_scratch1, bpf_slow_path_word
+ /* Nope, just hitting the header. */
+ addq r_D, r_addr, r_addr
+bpf_restart_word:
+ and r_addr, 3, r_A
+ bne r_A, bpf_load_word_unaligned
+ ldl r_A, 0(r_addr)
+ zapnot r_A, 15, r_A
+ br bpf_load_word_out
+ /* full mumbo jumbo needed? */
+bpf_load_word_unaligned:
+ ldq_u r_scratch1, 0(r_addr)
+ subq r_addr, r_scratch1, r_A
+ cmpult r_A, 5, r_A
+ beq r_A, bpf_load_half_complex
+ /* load simple */
+ ldq r_A, 0(r_scratch1)
+ extll r_A, r_addr, r_A
+ br bpf_load_word_out
+bpf_load_word_complex:
+ /* full mumbo jumbo */
+ ldq r_A, 0(r_scratch1)
+ ldq r_at, 8(r_scratch1)
+ extll r_A, r_addr, r_A
+ extlh r_at, r_addr, r_at
+ or r_at, r_A, r_A
+bpf_load_word_out:
+ /* byteswap. */
+ inslh r_A, 0x07, r_scratch1
+ inswl r_A, 0x03, r_A
+ or r_scratch1, r_A, r_A
+ srl r_A, 16, r_scratch1
+ zapnot r_A, 0x0a, r_A
+ zapnot r_scratch1, 0x05, r_scratch1
+ or r_A, r_scratch1, r_A
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+ .end sk_load_word
+
+ .p2align FUNC_ALIGN
+ .globl sk_load_half
+ .ent sk_load_half
+ .prologue 0
+sk_load_half:
+ blt r_addr, bpf_slow_path_half_neg
+ .globl sk_load_half_positive_offset
+sk_load_half_positive_offset:
+ /* Are we accessing past headlen? */
+ subl r_HL, 2, r_scratch1
+ subl r_scratch1, r_addr, r_scratch1
+ blt r_scratch1, bpf_slow_path_half
+ /* Nope, just hitting the header. */
+ addq r_D, r_addr, r_addr
+ /* full mumbo jumbo needed? */
+bpf_restart_half:
+bpf_load_half_unaligned:
+ ldq_u r_scratch1, 0(r_addr)
+ subq r_addr, r_scratch1, r_A
+ cmpult r_A, 7, r_A
+ beq r_A, bpf_load_half_complex
+ /* load simple */
+ ldq r_A, 0(r_scratch1)
+ extwl r_A, r_addr, r_A
+ br bpf_load_half_out
+bpf_load_half_complex:
+ /* full mumbo jumbo */
+ ldq r_A, 0(r_scratch1)
+ ldq r_at, 8(r_scratch1)
+ extwl r_A, r_addr, r_A
+ extwh r_at, r_addr, r_at
+ or r_at, r_A, r_A
+bpf_load_half_out:
+ /* byteswap. */
+ srl r_A, 8, r_scratch1
+ insbl r_A, 1, r_A
+ or r_scratch1, r_A, r_A
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+ .end sk_load_half
+
+ .p2align FUNC_ALIGN
+ .globl sk_load_byte
+ .ent sk_load_byte
+ .prologue 0
+sk_load_byte:
+ blt r_addr, bpf_slow_path_byte_neg
+ .globl sk_load_byte_positive_offset
+sk_load_byte_positive_offset:
+ /* Are we accessing past headlen? */
+ subl r_HL, r_addr, r_scratch1
+ ble r_scratch1, bpf_slow_path_byte
+ /* Nope, just hitting the header. */
+ addq r_D, r_addr, r_addr
+ /* load it */
+bpf_restart_byte:
+ ldq_u r_scratch1, 0(r_addr)
+ ldq r_A, 0(r_scratch1)
+ extbl r_A, r_addr, r_A
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+ .end sk_load_byte
+
+/*
+ * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf)
+ * r_addr is the offset value
+ */
+ .p2align FUNC_ALIGN
+ .globl sk_load_byte_msh
+ .ent sk_load_byte_msh
+ .prologue 0
+sk_load_byte_msh:
+ blt r_addr, bpf_slow_path_byte_msh_neg
+ .globl sk_load_byte_msh_positive_offset
+sk_load_byte_msh_positive_offset:
+ /* Are we accessing past headlen? */
+ subl r_HL, r_addr, r_scratch1
+ ble r_scratch1, bpf_slow_path_byte_msh
+ /* Nope, just hitting the header. */
+ addq r_D, r_addr, r_addr
+ /* load it */
+bpf_restart_byte_msh:
+ ldq_u r_scratch1, 0(r_addr)
+ ldq r_X, 0(r_scratch1)
+ extbl r_X, r_addr, r_X
+ /* munge */
+bpf_load_byte_msh_out:
+ and r_X, 0xf, r_X
+ sll r_X, 2, r_X
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+ .end sk_load_byte_msh
+
+/*
+ * BWX helper
+ */
+ .p2align FUNC_ALIGN
+ .globl sk_load_half_bwx
+ .ent sk_load_half_bwx
+ .prologue 0
+sk_load_half_bwx:
+ blt r_addr, bpf_slow_path_half_neg_bwx
+ .globl sk_load_half_positive_offset_bwx
+sk_load_half_positive_offset_bwx:
+ /* Are we accessing past headlen? */
+ subl r_HL, 2, r_scratch1
+ subl r_scratch1, r_addr, r_scratch1
+ blt r_scratch1, bpf_slow_path_half_bwx
+ /* Nope, just hitting the header. */
+ addq r_D, r_addr, r_addr
+ /* test alignment */
+bpf_restart_half_bwx:
+ and r_addr, 1, r_A
+ bne r_A, bpf_load_half_unaligned
+ ldwu r_A, 0(r_addr)
+ /* byteswap. */
+ srl r_A, 8, r_scratch1
+ insbl r_A, 1, r_A
+ or r_scratch1, r_A, r_A
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+ .end sk_load_half_bwx
+
+ .p2align FUNC_ALIGN
+ .globl sk_load_byte_bwx
+ .ent sk_load_byte_bwx
+ .prologue 0
+sk_load_byte_bwx:
+ blt r_addr, bpf_slow_path_byte_neg_bwx
+ .globl sk_load_byte_positive_offset_bwx
+sk_load_byte_positive_offset_bwx:
+ /* Are we accessing past headlen? */
+ subl r_HL, r_addr, r_scratch1
+ ble r_scratch1, bpf_slow_path_byte_bwx
+ /* Nope, just hitting the header. */
+ addq r_D, r_addr, r_addr
+bpf_restart_byte_bwx:
+ ldbu r_A, 0(r_addr)
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+ .end sk_load_byte_bwx
+
+/*
+ * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf)
+ * r_addr is the offset value
+ */
+ .p2align FUNC_ALIGN
+ .globl sk_load_byte_msh_bwx
+ .ent sk_load_byte_msh_bwx
+ .prologue 0
+sk_load_byte_msh_bwx:
+ blt r_addr, bpf_slow_path_byte_msh_neg_bwx
+ .globl sk_load_byte_msh_positive_offset_bwx
+sk_load_byte_msh_positive_offset_bwx:
+ /* Are we accessing past headlen? */
+ subl r_HL, r_addr, r_scratch1
+ ble r_scratch1, bpf_slow_path_byte_msh_bwx
+ /* Nope, just hitting the header. */
+ addq r_D, r_addr, r_addr
+bpf_restart_byte_msh_bwx:
+ ldbu r_X, 0(r_addr)
+ /* munge */
+ and r_X, 0xf, r_X
+ sll r_X, 2, r_X
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+ .end sk_load_byte_msh_bwx
+
+
+/* Call out to skb_copy_bits:
+ * We'll need to back up our volatile regs first;
+ * Allocate a new stack frame here
+ */
+#define bpf_slow_path_common(SIZE, SAVE_REG, RES_REG) \
+ lda r_sp, -BPF_HELPER_STACKFRAME(r_sp); \
+ stq SAVE_REG, 0(r_sp); \
+ stq r_D, 8(r_sp); \
+ stq r_HL, 16(r_sp); \
+ stq r_skb, 24(r_sp); \
+ stq r_sf, 32(r_sp); \
+ stq r_div_link, 40(r_sp); \
+ stq r_ra, 48(r_sp); \
+ stq r_pv, 56(r_sp); \
+ br pv, 1f; \
+1: ldgp gp, 0(pv); \
+ /* a0 = r_skb, as passed */ \
+ mov r_addr, a1; \
+ lda a2, 64(r_sp); \
+ lda a3, SIZE(zero); \
+ jsr ra, skb_copy_bits; \
+ /* v0 < 0 on error */ \
+ ldq r_div_link, 40(r_sp); \
+ ldq r_ra, 48(r_sp); \
+ ldq r_pv, 56(r_sp); \
+ blt v0, bpf_error_slow; \
+ ldq SAVE_REG, 0(r_sp); \
+ ldq r_D, 8(r_sp); \
+ ldq r_HL, 16(r_sp); \
+ ldq r_skb, 24(r_sp); \
+ ldq r_sf, 32(r_sp); \
+ ldq RES_REG, 64(r_sp); \
+ lda r_sp, BPF_HELPER_STACKFRAME(r_sp);
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_word:
+ bpf_slow_path_common(4, r_X, r_A)
+ zapnot r_A, 15, r_A
+ br bpf_load_word_out
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_half_bwx:
+bpf_slow_path_half:
+ bpf_slow_path_common(2, r_X, r_A)
+ zapnot r_A, 3, r_A
+ br bpf_load_half_out
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_byte_bwx:
+bpf_slow_path_byte:
+ bpf_slow_path_common(1, r_X, r_A)
+ zapnot r_A, 1, r_A
+ /* Return success, at == 0 */
+ clr r_at
+ ret r_zero, (r_div_link),1
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_byte_msh_bwx:
+bpf_slow_path_byte_msh:
+ bpf_slow_path_common(1, r_A, r_X)
+ br bpf_load_byte_msh_out
+
+/*
+ * Error outs, in the middle for positive and negative offsets
+ */
+ .p2align FUNC_ALIGN
+bpf_error_slow:
+ lda r_sp, BPF_HELPER_STACKFRAME(r_sp)
+bpf_error:
+ /* set the filter return value */
+ clr r_ret
+ /* set error condition */
+ subl r_zero, 1, r_at
+ ret r_zero, (r_div_link),1
+
+/* Call out to bpf_internal_load_pointer_neg_helper:
+ * We'll need to back up our volatile regs first;
+ * Allocate a new stack frame here.
+ */
+#define bpf_slow_path_neg_common(SIZE, SAVE_REG) \
+ lda r_sp, -BPF_HELPER_STACKFRAME(r_sp); \
+ stq SAVE_REG, 0(r_sp); \
+ stq r_D, 8(r_sp); \
+ stq r_HL, 16(r_sp); \
+ stq r_skb, 24(r_sp); \
+ stq r_sf, 32(r_sp); \
+ stq r_div_link, 40(r_sp); \
+ stq r_ra, 48(r_sp); \
+ stq r_pv, 56(r_sp); \
+ br pv, 1f; \
+1: ldgp gp,0(pv); \
+ /* a0 = r_skb, as passed */ \
+ mov r_addr, a1; \
+ lda a2, SIZE(r_zero); \
+ jsr ra, bpf_internal_load_pointer_neg_helper; \
+ /* v0 != 0 on success */ \
+ ldq r_div_link, 40(r_sp); \
+ ldq r_ra, 48(r_sp); \
+ ldq r_pv, 56(r_sp); \
+ beq v0, bpf_error_slow; \
+ mov v0, r_addr; \
+ ldq SAVE_REG, 0(r_sp); \
+ ldq r_D, 8(r_sp); \
+ ldq r_HL, 16(r_sp); \
+ ldq r_skb, 24(r_sp); \
+ ldq r_sf, 32(r_sp); \
+ lda r_sp, BPF_HELPER_STACKFRAME(r_sp);
+
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_word_neg:
+ SKF_MAX_OFF(r_addr, r_scratch1)
+ blt r_scratch1, bpf_error
+ .globl sk_load_word_negative_offset
+ .ent sk_load_word_negative_offset
+ .prologue 0
+sk_load_word_negative_offset:
+ .globl sk_load_word_negative_offset_bwx
+sk_load_word_negative_offset_bwx:
+ bpf_slow_path_neg_common(4, r_A)
+ br bpf_restart_word
+ .end sk_load_word_negative_offset
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_half_neg:
+ SKF_MAX_OFF(r_addr, r_scratch1)
+ blt r_scratch1, bpf_error
+ .globl sk_load_half_negative_offset
+ .ent sk_load_half_negative_offset
+ .prologue 0
+sk_load_half_negative_offset:
+ bpf_slow_path_neg_common(2, r_A)
+ br bpf_restart_half
+ .end sk_load_half_negative_offset
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_byte_neg:
+ SKF_MAX_OFF(r_addr, r_scratch1)
+ blt r_scratch1, bpf_error
+ .globl sk_load_byte_negative_offset
+ .ent sk_load_byte_negative_offset
+ .prologue 0
+sk_load_byte_negative_offset:
+ bpf_slow_path_neg_common(1, r_A)
+ br bpf_restart_byte
+ .end sk_load_byte_negative_offset
+
+/*
+ * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf)
+ * r_addr is the offset value
+ */
+ .p2align FUNC_ALIGN
+bpf_slow_path_byte_msh_neg:
+ SKF_MAX_OFF(r_addr, r_scratch1)
+ blt r_scratch1, bpf_error
+ .globl sk_load_byte_msh_negative_offset
+ .ent sk_load_byte_msh_negative_offset
+ .prologue 0
+sk_load_byte_msh_negative_offset:
+ bpf_slow_path_neg_common(1, r_X)
+ br bpf_restart_byte_msh
+ .end sk_load_byte_msh_negative_offset
+
+/*
+ * BWX helper
+ */
+ .p2align FUNC_ALIGN
+bpf_slow_path_half_neg_bwx:
+ SKF_MAX_OFF(r_addr, r_scratch1)
+ blt r_scratch1, bpf_error
+ .globl sk_load_half_negative_offset_bwx
+ .ent sk_load_half_negative_offset_bwx
+ .prologue 0
+sk_load_half_negative_offset_bwx:
+ bpf_slow_path_neg_common(2, r_A)
+ br bpf_restart_half_bwx
+ .end sk_load_half_negative_offset_bwx
+
+ .p2align FUNC_ALIGN
+bpf_slow_path_byte_neg_bwx:
+ SKF_MAX_OFF(r_addr, r_scratch1)
+ blt r_scratch1, bpf_error
+ .globl sk_load_byte_negative_offset_bwx
+ .ent sk_load_byte_negative_offset_bwx
+ .prologue 0
+sk_load_byte_negative_offset_bwx:
+ bpf_slow_path_neg_common(1, r_A)
+ br bpf_restart_byte_bwx
+ .end sk_load_byte_negative_offset_bwx
+
+/*
+ * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf)
+ * r_addr is the offset value
+ */
+ .p2align FUNC_ALIGN
+bpf_slow_path_byte_msh_neg_bwx:
+ SKF_MAX_OFF(r_addr, r_scratch1)
+ blt r_scratch1, bpf_error
+ .globl sk_load_byte_msh_negative_offset_bwx
+ .ent sk_load_byte_msh_negative_offset_bwx
+ .prologue 0
+sk_load_byte_msh_negative_offset_bwx:
+ bpf_slow_path_neg_common(1, r_X)
+ br bpf_restart_byte_msh_bwx
+ .end sk_load_byte_msh_negative_offset_bwx
^ permalink raw reply related
* NULL pointer dereference at __ip_route_output_key
From: Dave Jones @ 2012-04-02 19:40 UTC (permalink / raw)
To: netdev; +Cc: Fedora Kernel Team
We just had this reported. Look familiar to anyone ?
:BUG: unable to handle kernel NULL pointer dereference at 00000000000000d0
:IP: [<ffffffff81518d73>] __ip_route_output_key+0x703/0x9f0
:PGD 0
:Oops: 0000 [#1] SMP
:CPU 0
:Modules linked in: fuse ppdev parport_pc lp parport ebtable_nat ebtables
ipt_MASQUERADE iptable_nat nf_nat xt_CHECKSUM iptable_mangle bridge stp llc
lockd be2iscsi iscsi_boot_sysfs bnx2i cnic uio cxgb4i cxgb4 cxgb3i libcxgbi
cxgb3 mdio ib_iser rdma_cm ib_cm iw_cm ib_sa ib_addr iscsi_tcp libiscsi_tcp
libiscsi scsi_transport_iscsi ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6
ip6table_filter nf_conntrack_ipv4 ip6_tables nf_defrag_ipv4 xt_state
nf_conntrack usblp joydev raid10 binfmt_misc snd_hda_codec_hdmi
snd_hda_codec_realtek microcode sp5100_tco snd_hda_intel k10temp snd_hda_codec
serio_raw i2c_piix4 snd_hwdep snd_seq edac_core vhost_net edac_mce_amd
snd_seq_device macvtap macvlan tun virtio_net snd_pcm ib_qib kvm_amd snd_timer
snd kvm r8169 ib_mad soundcore snd_page_alloc ib_core mii uinput sunrpc
firewire_ohci ata_generic firewire_core pata_acpi crc_itu_t pata_atiixp wmi
usb_storage radeon ttm drm_kms_helper drm i2c_algo_bit i2c_core [last unloaded:
scsi_wait_scan]
:Pid: 3269, comm: sendmail Not tainted 3.3.0-8.fc16.x86_64 #1 Gigabyte
Technology Co., Ltd. GA-MA790X-UD4/GA-MA790X-UD4
:RIP: 0010:[<ffffffff81518d73>] [<ffffffff81518d73>]
__ip_route_output_key+0x703/0x9f0
:RSP: 0018:ffff880128be1da8 EFLAGS: 00010246
:RAX: 0000000000000000 RBX: ffff88010adda970 RCX: 0000000000000000
:RDX: 00000000017aa8c0 RSI: ffff880117ac2000 RDI: ffff880121ab6000
:RBP: ffff880128be1e38 R08: 0000000000000001 R09: 0000000000000000
:R10: ffff880123095480 R11: ffff880107e91b40 R12: 0000000000000000
:R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000
:FS: 00007f4ad68ae7c0(0000) GS:ffff88012fc00000(0000) knlGS:0000000000000000
:CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
:CR2: 00000000000000d0 CR3: 0000000102ef1000 CR4: 00000000000006f0
:DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
:DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
:Process sendmail (pid: 3269, threadinfo ffff880128be0000, task
ffff88009e48c590)
:Stack:
: 00000000fe07dd09 ffff88010adda680 b7da880128be1ed0 ffffffff81544440
: ffffffff81f74200 f1281bd40adda680 ffff880128be1e38 0000000000010000
: ffff880107e91b40 ffff880123095480 ffff880123307698 ffff880129693540
:Call Trace:
: [<ffffffff81544440>] ? udp_lib_lport_inuse+0xf0/0xf0
: [<ffffffff81542717>] ip4_datagram_connect+0x167/0x300
: [<ffffffff8154fca1>] inet_dgram_connect+0x31/0x90
: [<ffffffff814d156b>] sys_connect+0xeb/0x110
: [<ffffffff8117f98b>] ? fd_install+0x3b/0x70
: [<ffffffff810d347c>] ? __audit_syscall_entry+0xcc/0x310
: [<ffffffff810d3a96>] ? __audit_syscall_exit+0x3d6/0x410
: [<ffffffff814d0e40>] ? sys_socket+0x40/0x70
: [<ffffffff815fbca9>] system_call_fastpath+0x16/0x1b
:Code: 01 7e 08 3c 01 0f 84 d7 02 00 00 8b 53 14 85 d2 0f 84 aa 01 00 00 0f b6
45 a9 48 8d 04 c0 44 0f b6 45 aa 45 31 ff 4d 8b 64 c3 60 <41> 8b 84 24 d0 00 00
00 89 03 0f b6 c2 e9 a7 fa ff ff 31 d2 44
https://bugzilla.redhat.com/show_bug.cgi?id=808990
^ permalink raw reply
* Re: [PATCH v2 0/8]: arm: lpc32xx: Device tree support
From: Arnd Bergmann @ 2012-04-02 19:39 UTC (permalink / raw)
To: Roland Stigge
Cc: arm-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
w.sang-bIcnvbaLZ9MEGnE8C9+IrQ, srinivas.bakki-3arQi8VN3Tc,
kevin.wells-3arQi8VN3Tc, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
netdev-u79uwXL29TY76Z2rM5mHXA, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA, wim-IQzOog9fTRqzQB+pC5nmwQ,
jonsmirl-Re5JQEeQqe8AvxtiuMwx3w
In-Reply-To: <1333391587-26290-1-git-send-email-stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>
On Monday 02 April 2012, Roland Stigge wrote:
> This is the first series of patches to introduce device tree support for the
> LPC32xx SoC. This series includes patches for the various subsystems to support
> device tree to be used later by the machine's initialization.
>
> The patches apply to various subsystems:
>
> * staging/iio/adc (1)
> * rtc (1)
> * net (1)
> * wdt (1)
> * i2c (4)
> * arm-soc (i2c related in the former, to be merged via i2c, as suggested by
> Arnd Bergmann)
Looks good, please add
Reviewed-by: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
for the entire series.
Arnd
^ permalink raw reply
* Re: [PATCH v2 3/8] net: Add device tree support to LPC32xx
From: Arnd Bergmann @ 2012-04-02 19:37 UTC (permalink / raw)
To: Roland Stigge
Cc: a.zummo, srinivas.bakki, linux-watchdog, rtc-linux, gregkh,
w.sang, kevin.wells, linux-kernel, wim, arm, linux-i2c, netdev,
linux-arm-kernel, jonsmirl
In-Reply-To: <1333391587-26290-4-git-send-email-stigge@antcom.de>
On Monday 02 April 2012, Roland Stigge wrote:
>
> + if (pdev->dev.of_node && of_get_property(pdev->dev.of_node,
> + "use-iram", NULL))
> + pldat->use_iram = true;
> + else
> + pldat->use_iram = false;
> +
One more thing I just noticed:
this is equivalent to the much shorter
pldat->use_iram = of_property_read_bool(pdev->dev.of_node, "use-iram");
Everything else looks good here.
Arnd
^ permalink raw reply
* Re: [PATCH ethtool] Add the command to show the time stamping capabilities.
From: Ben Hutchings @ 2012-04-02 19:25 UTC (permalink / raw)
To: Richard Cochran
Cc: e1000-devel, netdev, Porter, John Ronciak, Martin, Jacob Keller,
David Miller
In-Reply-To: <1333293808-7729-1-git-send-email-richardcochran@gmail.com>
On Sun, 2012-04-01 at 17:23 +0200, Richard Cochran wrote:
[...]
> --- a/ethtool.c
> +++ b/ethtool.c
> @@ -38,6 +38,7 @@
> #include <netinet/in.h>
> #include <arpa/inet.h>
>
> +#include <linux/net_tstamp.h>
ethtool is meant to be compilable on quite old systems, so we can't
unconditionally include this header. Perhaps we should carry a copy of
it, like ethtool-copy.h?
> #include <linux/sockios.h>
>
> #ifndef MAX_ADDR_LEN
> @@ -1115,6 +1116,91 @@ static int dump_rxfhash(int fhash, u64 val)
> return 0;
> }
>
> +static int dump_tsinfo(const struct ethtool_ts_info *info)
> +{
> + if (info->so_timestamping & SOF_TIMESTAMPING_TX_HARDWARE)
> + fprintf(stdout, "SOF_TIMESTAMPING_TX_HARDWARE\n");
> +
> + if (info->so_timestamping & SOF_TIMESTAMPING_TX_SOFTWARE)
> + fprintf(stdout, "SOF_TIMESTAMPING_TX_SOFTWARE\n");
> +
> + if (info->so_timestamping & SOF_TIMESTAMPING_RX_HARDWARE)
> + fprintf(stdout, "SOF_TIMESTAMPING_RX_HARDWARE\n");
> +
> + if (info->so_timestamping & SOF_TIMESTAMPING_RX_SOFTWARE)
> + fprintf(stdout, "SOF_TIMESTAMPING_RX_SOFTWARE\n");
> +
> + if (info->so_timestamping & SOF_TIMESTAMPING_SOFTWARE)
> + fprintf(stdout, "SOF_TIMESTAMPING_SOFTWARE\n");
> +
> + if (info->so_timestamping & SOF_TIMESTAMPING_SYS_HARDWARE)
> + fprintf(stdout, "SOF_TIMESTAMPING_SYS_HARDWARE\n");
> +
> + if (info->so_timestamping & SOF_TIMESTAMPING_RAW_HARDWARE)
> + fprintf(stdout, "SOF_TIMESTAMPING_RAW_HARDWARE\n");
I would prefer for these to be shown as more human-understandable
capabilities. Include the flag name in parentheses if you like.
> + if (info->phc_index < 0)
> + fprintf(stdout, "No PTP Hardware Clock\n");
> + else
> + fprintf(stdout, "PTP Hardware Clock %d\n", info->phc_index);
ethtool generally reports settings as 'name: value' so how about
"PTP Hardware Clock: none" and "PTP Hardware Clock: %d"?
> + if (info->tx_types & (1 << HWTSTAMP_TX_OFF))
> + fprintf(stdout, "HWTSTAMP_TX_OFF\n");
> +
> + if (info->tx_types & (1 << HWTSTAMP_TX_ON))
> + fprintf(stdout, "HWTSTAMP_TX_ON\n");
> +
> + if (info->tx_types & (1 << HWTSTAMP_TX_ONESTEP_SYNC))
> + fprintf(stdout, "HWTSTAMP_TX_ONESTEP_SYNC\n");
If there is no hardware timestamping available then shouldn't we see
HWTSTAMP_TX_OFF reported here? But that's going to be the case. Not
sure whether the kernel or the ethtool utility should deal with that,
but don't assume the ethtool utility is the only consumer.
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_NONE))
> + fprintf(stdout, "HWTSTAMP_FILTER_NONE\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_ALL))
> + fprintf(stdout, "HWTSTAMP_FILTER_ALL\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_SOME))
> + fprintf(stdout, "HWTSTAMP_FILTER_SOME\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V1_L4_EVENT\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V1_L4_SYNC\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_L4_EVENT\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_L4_SYNC\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_L2_EVENT\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_L2_SYNC\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_EVENT))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_EVENT\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_SYNC))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_SYNC\n");
> +
> + if (info->rx_filters & (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ))
> + fprintf(stdout, "HWTSTAMP_FILTER_PTP_V2_DELAY_REQ\n");
Similarly, shouldn't we see HWTSTAMP_FILTER_NONE reported here?
I think each of the capability lists should have its own heading.
Combining all of my suggestions, I think you should see for example:
Capabilities:
receive-stack (SOF_TIMESTAMPING_RX_SOFTWARE)
transmit-stack (SOF_TIMESTAMPING_SOFTWARE)
transmit-driver (SOF_TIMESTAMPING_TX_SOFTWARE)
PTP Hardware Clock: none
Hardware Transmit Modes:
off (HWTSTAMP_TX_OFF)
Hardware Receive Filter Modes:
none (HWTSTAMP_FILTER_NONE)
or:
Capabilities:
software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE)
software-receive (SOF_TIMESTAMPING_RX_SOFTWARE)
software-system-clock (SOF_TIMESTAMPING_SOFTWARE)
hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE)
hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE)
hardware-system-clock (SOF_TIMESTAMPING_SYS_HARDWARE)
PTP Hardware Clock: 1
Hardware Transmit Modes:
off (HWTSTAMP_TX_OFF)
on (HWTSTAMP_TX_ON)
one-step (HWTSTAMP_TX_ONESTEP_SYNC)
Hardware Receive Filter Modes:
none (HWTSTAMP_FILTER_NONE)
ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT)
ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC)
(Maybe you can think of better names.)
> + return 0;
> +}
> +
> static struct ethtool_gstrings *
> get_stringset(struct cmd_context *ctx, enum ethtool_stringset set_id,
> ptrdiff_t drvinfo_offset)
> @@ -3077,6 +3163,23 @@ static int do_sprivflags(struct cmd_context *ctx)
> return 0;
> }
>
> +static int do_tsinfo(struct cmd_context *ctx)
> +{
> + struct ethtool_ts_info info;
> +
> + if (ctx->argc != 0)
> + exit_bad_args();
> +
> + fprintf(stdout, "Time stamping parameters for %s:\n", ctx->devname);
> + info.cmd = ETHTOOL_GET_TS_INFO;
> + if (send_ioctl(ctx, &info)) {
> + perror("Cannot get device time stamping settings");
> + return -1;
> + }
> + dump_tsinfo(&info);
> + return 0;
> +}
> +
> int send_ioctl(struct cmd_context *ctx, void *cmd)
> {
> #ifndef TEST_ETHTOOL
> @@ -3206,6 +3309,7 @@ static const struct option {
> " [ action %d ]\n"
> " [ loc %d]] |\n"
> " delete %d\n" },
> + { "-T|--timestamping", 1, do_tsinfo, "Show time stamping options" },
Surely 'capabilities'.
You need to add this new option to the manual page and unit tests
(test-cmdline.c) as well.
Ben.
> { "-x|--show-rxfh-indir", 1, do_grxfhindir,
> "Show Rx flow hash indirection" },
> { "-X|--set-rxfh-indir", 1, do_srxfhindir,
--
Ben Hutchings, Staff Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.
------------------------------------------------------------------------------
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^ permalink raw reply
* [PATCH] tg3: Fix 5717 serdes powerdown problem
From: Matt Carlson @ 2012-04-02 19:01 UTC (permalink / raw)
To: davem; +Cc: netdev, mcarlson, mchan
If port 0 of a 5717 serdes device powers down, it hides the phy from
port 1. This patch works around the problem by keeping port 0's phy
powered up.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
---
drivers/net/ethernet/broadcom/tg3.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 7b71387..d2ff8ee 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -2779,7 +2779,9 @@ static void tg3_power_down_phy(struct tg3 *tp, bool do_low_power)
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 ||
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 &&
- (tp->phy_flags & TG3_PHYFLG_MII_SERDES)))
+ (tp->phy_flags & TG3_PHYFLG_MII_SERDES)) ||
+ (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+ !tp->pci_fn))
return;
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX ||
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH] phonet: Check input from user before allocating
From: Rémi Denis-Courmont @ 2012-04-02 19:01 UTC (permalink / raw)
To: Sasha Levin; +Cc: remi.denis-courmont, davem, davej, netdev, linux-kernel
In-Reply-To: <1333398660-11552-1-git-send-email-levinsasha928@gmail.com>
Le lundi 2 avril 2012 23:31:00 Sasha Levin, vous avez écrit :
> A phonet packet is limited to USHRT_MAX bytes, this is never checked during
> tx which means that the user can specify any size he wishes, and the kernel
> will attempt to allocate that size.
Does this really solve the problem? I guess 128kb is still possible with
USHRT_MAX plus skbuff overhead, which might still trigger OOM relatively
easily once the memory gets sufficiently fragmented.
How does UDP deal with this?
--
Rémi Denis-Courmont
http://www.remlab.net/
http://fi.linkedin.com/in/remidenis
^ permalink raw reply
* Re: [PATCH] phonet: Check input from user before allocating
From: Rémi Denis-Courmont @ 2012-04-02 19:00 UTC (permalink / raw)
To: Sasha Levin; +Cc: remi.denis-courmont, davem, davej, netdev, linux-kernel
In-Reply-To: <1333398660-11552-1-git-send-email-levinsasha928@gmail.com>
Le lundi 2 avril 2012 23:31:00 Sasha Levin, vous avez écrit :
> A phonet packet is limited to USHRT_MAX bytes, this is never checked during
> tx which means that the user can specify any size he wishes, and the kernel
> will attempt to allocate that size.
>
> In the good case, it'll lead to the following warning, but it may also
> cause the kernel to kick in the OOM and kill a random task on the server.
>
> [ 8921.744094] WARNING: at mm/page_alloc.c:2255
> __alloc_pages_slowpath+0x65/0x730() [ 8921.749770] Pid: 5081, comm:
> trinity Tainted: G W 3.4.0-rc1-next-20120402-sasha #46 [
> 8921.756672] Call Trace:
> [ 8921.758185] [<ffffffff810b2ba7>] warn_slowpath_common+0x87/0xb0
> [ 8921.762868] [<ffffffff810b2be5>] warn_slowpath_null+0x15/0x20
> [ 8921.765399] [<ffffffff8117eae5>] __alloc_pages_slowpath+0x65/0x730
> [ 8921.769226] [<ffffffff81179c8a>] ? zone_watermark_ok+0x1a/0x20
> [ 8921.771686] [<ffffffff8117d045>] ? get_page_from_freelist+0x625/0x660
> [ 8921.773919] [<ffffffff8117f3a8>] __alloc_pages_nodemask+0x1f8/0x240
> [ 8921.776248] [<ffffffff811c03e0>] kmalloc_large_node+0x70/0xc0
> [ 8921.778294] [<ffffffff811c4bd4>] __kmalloc_node_track_caller+0x34/0x1c0
> [ 8921.780847] [<ffffffff821b0e3c>] ? sock_alloc_send_pskb+0xbc/0x260
> [ 8921.783179] [<ffffffff821b3c65>] __alloc_skb+0x75/0x170
> [ 8921.784971] [<ffffffff821b0e3c>] sock_alloc_send_pskb+0xbc/0x260
> [ 8921.787111] [<ffffffff821b002e>] ? release_sock+0x7e/0x90
> [ 8921.788973] [<ffffffff821b0ff0>] sock_alloc_send_skb+0x10/0x20
> [ 8921.791052] [<ffffffff824cfc20>] pep_sendmsg+0x60/0x380
> [ 8921.792931] [<ffffffff824cb4a6>] ? pn_socket_bind+0x156/0x180
> [ 8921.794917] [<ffffffff824cb50f>] ? pn_socket_autobind+0x3f/0x90
> [ 8921.797053] [<ffffffff824cb63f>] pn_socket_sendmsg+0x4f/0x70
> [ 8921.798992] [<ffffffff821ab8e7>] sock_aio_write+0x187/0x1b0
> [ 8921.801395] [<ffffffff810e325e>] ? sub_preempt_count+0xae/0xf0
> [ 8921.803501] [<ffffffff8111842c>] ? __lock_acquire+0x42c/0x4b0
> [ 8921.805505] [<ffffffff821ab760>] ? __sock_recv_ts_and_drops+0x140/0x140
> [ 8921.807860] [<ffffffff811e07cc>] do_sync_readv_writev+0xbc/0x110
> [ 8921.809986] [<ffffffff811958e7>] ? might_fault+0x97/0xa0
> [ 8921.811998] [<ffffffff817bd99e>] ? security_file_permission+0x1e/0x90
> [ 8921.814595] [<ffffffff811e17e2>] do_readv_writev+0xe2/0x1e0
> [ 8921.816702] [<ffffffff810b8dac>] ? do_setitimer+0x1ac/0x200
> [ 8921.818819] [<ffffffff810e2ec1>] ? get_parent_ip+0x11/0x50
> [ 8921.820863] [<ffffffff810e325e>] ? sub_preempt_count+0xae/0xf0
> [ 8921.823318] [<ffffffff811e1926>] vfs_writev+0x46/0x60
> [ 8921.825219] [<ffffffff811e1a3f>] sys_writev+0x4f/0xb0
> [ 8921.827127] [<ffffffff82658039>] system_call_fastpath+0x16/0x1b
> [ 8921.829384] ---[ end trace dffe390f30db9eb7 ]---
>
> Signed-off-by: Sasha Levin <levinsasha928@gmail.com>
> ---
> net/phonet/pep.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/net/phonet/pep.c b/net/phonet/pep.c
> index 9f60008..caee99e 100644
> --- a/net/phonet/pep.c
> +++ b/net/phonet/pep.c
> @@ -1130,6 +1130,9 @@ static int pep_sendmsg(struct kiocb *iocb, struct
> sock *sk, int flags = msg->msg_flags;
> int err, done;
>
> + if (len > USHRT_MAX)
> + return -E2BIG;
I think EMSGSIZE is specified in that case.
> +
> if ((msg->msg_flags & ~(MSG_DONTWAIT|MSG_EOR|MSG_NOSIGNAL|
> MSG_CMSG_COMPAT)) ||
> !(msg->msg_flags & MSG_EOR))
--
Rémi Denis-Courmont
http://www.remlab.net/
http://fi.linkedin.com/in/remidenis
^ permalink raw reply
* [PATCH v2 8/8] i2c: Add device tree support to i2c-pnx.c
From: Roland Stigge @ 2012-04-02 18:33 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim, jonsmirl
Cc: Roland Stigge
In-Reply-To: <1333391587-26290-1-git-send-email-stigge@antcom.de>
This patch adds device tree support to the pnx-i2c driver by using platform
resources for memory region and irq and removing dependency on mach includes.
The following platforms are affected:
* PNX
* LPC31xx (WIP)
* LPC32xx
The patch is based on a patch by Jon Smirl, working on lpc31xx integration
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
Documentation/devicetree/bindings/i2c/pnx.txt | 40 ++++++++++++++++
drivers/i2c/busses/i2c-pnx.c | 65 +++++++++++++++++++-------
include/linux/i2c-pnx.h | 1
3 files changed, 89 insertions(+), 17 deletions(-)
--- /dev/null
+++ linux-2.6/Documentation/devicetree/bindings/i2c/pnx.txt
@@ -0,0 +1,40 @@
+* NXP PNX I2C Controller
+
+Required properties:
+
+ - reg: Offset and length of the register set for the device
+ - compatible: should be "nxp,pnx-i2c"
+ - interrupts: configure one interrupt line
+ - #address-cells: always 1 (for i2c addresses)
+ - #size-cells: always 0
+
+Optional properties:
+
+ - interrupt-parent: the phandle for the interrupt controller that
+ services interrupts for this device.
+ - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz
+ - pnx,timeout: I2C bus timeout in milliseconds, Default: 10 ms
+ - slave-addr: Address used by the controller, Hardware default: 110
+
+Examples:
+
+ i2c1: i2c@400a0000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400a0000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <51 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@400a8000 {
+ compatible = "nxp,pnx-i2c";
+ reg = <0x400a8000 0x100>;
+ interrupt-parent = <&mic>;
+ interrupts = <50 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <0x186a0>;
+ pnx,timeout = <0x64>;
+ slave-addr = <0x11>;
+ };
--- linux-2.6.orig/drivers/i2c/busses/i2c-pnx.c
+++ linux-2.6/drivers/i2c/busses/i2c-pnx.c
@@ -23,10 +23,11 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/of_i2c.h>
-#define I2C_PNX_TIMEOUT 10 /* msec */
-#define I2C_PNX_SPEED_KHZ 100
-#define I2C_PNX_REGION_SIZE 0x100
+#define I2C_PNX_TIMEOUT_DEFAULT 10 /* msec */
+#define I2C_PNX_SPEED_KHZ_DEFAULT 100
+#define I2C_PNX_REGION_SIZE 0x100
enum {
mstatus_tdi = 0x00000001,
@@ -74,8 +75,9 @@ enum {
#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */
#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */
-static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
+static inline int wait_timeout(struct i2c_pnx_algo_data *data)
{
+ long timeout = data->timeout;
while (timeout > 0 &&
(ioread32(I2C_REG_STS(data)) & mstatus_active)) {
mdelay(1);
@@ -84,8 +86,9 @@ static inline int wait_timeout(long time
return (timeout <= 0);
}
-static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
+static inline int wait_reset(struct i2c_pnx_algo_data *data)
{
+ long timeout = data->timeout;
while (timeout > 0 &&
(ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
mdelay(1);
@@ -97,7 +100,7 @@ static inline int wait_reset(long timeou
static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
{
struct timer_list *timer = &alg_data->mif.timer;
- unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
+ unsigned long expires = msecs_to_jiffies(alg_data->timeout);
if (expires <= 1)
expires = 2;
@@ -135,7 +138,7 @@ static int i2c_pnx_start(unsigned char s
}
/* First, make sure bus is idle */
- if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
+ if (wait_timeout(alg_data)) {
/* Somebody else is monopolizing the bus */
dev_err(&alg_data->adapter.dev,
"%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
@@ -228,7 +231,7 @@ static int i2c_pnx_master_xmit(struct i2
if (alg_data->mif.len == 0) {
if (alg_data->last) {
/* Wait until the STOP is seen. */
- if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
+ if (wait_timeout(alg_data))
dev_err(&alg_data->adapter.dev,
"The bus is still active after timeout\n");
}
@@ -326,7 +329,7 @@ static int i2c_pnx_master_rcv(struct i2c
if (alg_data->mif.len == 0) {
if (alg_data->last)
/* Wait until the STOP is seen. */
- if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
+ if (wait_timeout(alg_data))
dev_err(&alg_data->adapter.dev,
"The bus is still active after timeout\n");
@@ -442,7 +445,7 @@ static void i2c_pnx_timeout(unsigned lon
ctl |= mcntrl_reset;
iowrite32(ctl, I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
alg_data->mif.ret = -EIO;
complete(&alg_data->mif.complete);
}
@@ -457,18 +460,18 @@ static inline void bus_reset_if_active(s
alg_data->adapter.name);
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
} else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
/* If there is data in the fifo's after transfer,
* flush fifo's by reset.
*/
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
} else if (stat & mstatus_nai) {
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
I2C_REG_CTL(alg_data));
- wait_reset(I2C_PNX_TIMEOUT, alg_data);
+ wait_reset(alg_data);
}
}
@@ -612,6 +615,8 @@ static int __devinit i2c_pnx_probe(struc
struct i2c_pnx_algo_data *alg_data;
unsigned long freq;
struct resource *res;
+ u32 speed = I2C_PNX_SPEED_KHZ_DEFAULT * 1000;
+ u32 slave_addr = ~0;
alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
if (!alg_data) {
@@ -626,6 +631,18 @@ static int __devinit i2c_pnx_probe(struc
alg_data->adapter.algo_data = alg_data;
alg_data->adapter.nr = pdev->id;
+ alg_data->timeout = I2C_PNX_TIMEOUT_DEFAULT;
+#ifdef CONFIG_OF
+ alg_data->adapter.dev.of_node = of_node_get(pdev->dev.of_node);
+ if (pdev->dev.of_node) {
+ of_property_read_u32(pdev->dev.of_node, "pnx,timeout",
+ &alg_data->timeout);
+ of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+ &speed);
+ of_property_read_u32(pdev->dev.of_node, "slave-addr",
+ &slave_addr);
+ }
+#endif
alg_data->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(alg_data->clk)) {
ret = PTR_ERR(alg_data->clk);
@@ -651,7 +668,7 @@ static int __devinit i2c_pnx_probe(struc
dev_err(&pdev->dev,
"I/O region 0x%08x for I2C already in use.\n",
res->start);
- ret = -ENODEV;
+ ret = -ENOMEM;
goto out_clkget;
}
@@ -667,6 +684,9 @@ static int __devinit i2c_pnx_probe(struc
if (ret)
goto out_unmap;
+ if (slave_addr != ~0)
+ iowrite32(slave_addr, I2C_REG_ADR(alg_data));
+
freq = clk_get_rate(alg_data->clk);
/*
@@ -680,14 +700,14 @@ static int __devinit i2c_pnx_probe(struc
* the deglitching filter length.
*/
- tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
+ tmp = (freq / speed) / 2 - 2;
if (tmp > 0x3FF)
tmp = 0x3FF;
iowrite32(tmp, I2C_REG_CKH(alg_data));
iowrite32(tmp, I2C_REG_CKL(alg_data));
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
- if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
+ if (wait_reset(alg_data)) {
ret = -ENODEV;
goto out_clock;
}
@@ -699,7 +719,7 @@ static int __devinit i2c_pnx_probe(struc
goto out_irq;
}
ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
- 0, pdev->name, alg_data);
+ 0, pdev->name, alg_data);
if (ret)
goto out_clock;
@@ -710,6 +730,8 @@ static int __devinit i2c_pnx_probe(struc
goto out_irq;
}
+ of_i2c_register_devices(&alg_data->adapter);
+
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
alg_data->adapter.name, res->start, alg_data->irq);
@@ -748,10 +770,19 @@ static int __devexit i2c_pnx_remove(stru
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id i2c_pnx_of_match[] = {
+ { .compatible = "nxp,pnx-i2c" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, i2c_pnx_of_match);
+#endif
+
static struct platform_driver i2c_pnx_driver = {
.driver = {
.name = "pnx-i2c",
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(i2c_pnx_of_match),
},
.probe = i2c_pnx_probe,
.remove = __devexit_p(i2c_pnx_remove),
--- linux-2.6.orig/include/linux/i2c-pnx.h
+++ linux-2.6/include/linux/i2c-pnx.h
@@ -32,6 +32,7 @@ struct i2c_pnx_algo_data {
struct i2c_adapter adapter;
phys_addr_t base;
int irq;
+ u32 timeout;
};
#endif /* __I2C_PNX_H__ */
^ permalink raw reply
* [PATCH v2 7/8] i2c-pnx.c: Remove duplicated i2c.h
From: Roland Stigge @ 2012-04-02 18:33 UTC (permalink / raw)
To: arm, linux-arm-kernel, linux-i2c, linux-kernel, w.sang,
srinivas.bakki, kevin.wells, gregkh, netdev, rtc-linux, a.zummo,
linux-watchdog, wim, jonsmirl
Cc: Roland Stigge
In-Reply-To: <1333391587-26290-1-git-send-email-stigge@antcom.de>
The platforms using i2c-pnx.c both defined a duplicated i2c.h (used nowhere
else). This patch removes those and integrates the contents into the driver
itself.
Signed-off-by: Roland Stigge <stigge@antcom.de>
---
Applies to v3.4-rc1
arch/arm/mach-lpc32xx/include/mach/i2c.h | 63 ------------------------------
arch/arm/mach-pnx4008/include/mach/i2c.h | 64 -------------------------------
drivers/i2c/busses/i2c-pnx.c | 49 ++++++++++++++++++++++-
3 files changed, 46 insertions(+), 130 deletions(-)
--- linux-2.6.orig/arch/arm/mach-lpc32xx/include/mach/i2c.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * PNX4008-specific tweaks for I2C IP3204 block
- *
- * Author: Vitaly Wool <vwool@ru.mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASM_ARCH_I2C_H
-#define __ASM_ARCH_I2C_H
-
-enum {
- mstatus_tdi = 0x00000001,
- mstatus_afi = 0x00000002,
- mstatus_nai = 0x00000004,
- mstatus_drmi = 0x00000008,
- mstatus_active = 0x00000020,
- mstatus_scl = 0x00000040,
- mstatus_sda = 0x00000080,
- mstatus_rff = 0x00000100,
- mstatus_rfe = 0x00000200,
- mstatus_tff = 0x00000400,
- mstatus_tfe = 0x00000800,
-};
-
-enum {
- mcntrl_tdie = 0x00000001,
- mcntrl_afie = 0x00000002,
- mcntrl_naie = 0x00000004,
- mcntrl_drmie = 0x00000008,
- mcntrl_daie = 0x00000020,
- mcntrl_rffie = 0x00000040,
- mcntrl_tffie = 0x00000080,
- mcntrl_reset = 0x00000100,
- mcntrl_cdbmode = 0x00000400,
-};
-
-enum {
- rw_bit = 1 << 0,
- start_bit = 1 << 8,
- stop_bit = 1 << 9,
-};
-
-#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
-#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
-#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
-#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
-#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
-#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
-#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
-#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */
-#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */
-#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */
-#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */
-#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */
-#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */
-
-#define I2C_CHIP_NAME "PNX4008-I2C"
-
-#endif /* __ASM_ARCH_I2C_H */
--- linux-2.6.orig/arch/arm/mach-pnx4008/include/mach/i2c.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * PNX4008-specific tweaks for I2C IP3204 block
- *
- * Author: Vitaly Wool <vwool@ru.mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASM_ARCH_I2C_H__
-#define __ASM_ARCH_I2C_H__
-
-enum {
- mstatus_tdi = 0x00000001,
- mstatus_afi = 0x00000002,
- mstatus_nai = 0x00000004,
- mstatus_drmi = 0x00000008,
- mstatus_active = 0x00000020,
- mstatus_scl = 0x00000040,
- mstatus_sda = 0x00000080,
- mstatus_rff = 0x00000100,
- mstatus_rfe = 0x00000200,
- mstatus_tff = 0x00000400,
- mstatus_tfe = 0x00000800,
-};
-
-enum {
- mcntrl_tdie = 0x00000001,
- mcntrl_afie = 0x00000002,
- mcntrl_naie = 0x00000004,
- mcntrl_drmie = 0x00000008,
- mcntrl_daie = 0x00000020,
- mcntrl_rffie = 0x00000040,
- mcntrl_tffie = 0x00000080,
- mcntrl_reset = 0x00000100,
- mcntrl_cdbmode = 0x00000400,
-};
-
-enum {
- rw_bit = 1 << 0,
- start_bit = 1 << 8,
- stop_bit = 1 << 9,
-};
-
-#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
-#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
-#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
-#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
-#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
-#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
-#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
-#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */
-#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */
-#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */
-#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */
-#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */
-#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */
-
-#define HCLK_MHZ 13
-#define I2C_CHIP_NAME "PNX4008-I2C"
-
-#endif /* __ASM_ARCH_I2C_H___ */
--- linux-2.6.orig/drivers/i2c/busses/i2c-pnx.c
+++ linux-2.6/drivers/i2c/busses/i2c-pnx.c
@@ -24,13 +24,56 @@
#include <linux/clk.h>
#include <linux/slab.h>
-#include <mach/hardware.h>
-#include <mach/i2c.h>
-
#define I2C_PNX_TIMEOUT 10 /* msec */
#define I2C_PNX_SPEED_KHZ 100
#define I2C_PNX_REGION_SIZE 0x100
+enum {
+ mstatus_tdi = 0x00000001,
+ mstatus_afi = 0x00000002,
+ mstatus_nai = 0x00000004,
+ mstatus_drmi = 0x00000008,
+ mstatus_active = 0x00000020,
+ mstatus_scl = 0x00000040,
+ mstatus_sda = 0x00000080,
+ mstatus_rff = 0x00000100,
+ mstatus_rfe = 0x00000200,
+ mstatus_tff = 0x00000400,
+ mstatus_tfe = 0x00000800,
+};
+
+enum {
+ mcntrl_tdie = 0x00000001,
+ mcntrl_afie = 0x00000002,
+ mcntrl_naie = 0x00000004,
+ mcntrl_drmie = 0x00000008,
+ mcntrl_daie = 0x00000020,
+ mcntrl_rffie = 0x00000040,
+ mcntrl_tffie = 0x00000080,
+ mcntrl_reset = 0x00000100,
+ mcntrl_cdbmode = 0x00000400,
+};
+
+enum {
+ rw_bit = 1 << 0,
+ start_bit = 1 << 8,
+ stop_bit = 1 << 9,
+};
+
+#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
+#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
+#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
+#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
+#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
+#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
+#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
+#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */
+#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */
+#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */
+#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */
+#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */
+#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */
+
static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
{
while (timeout > 0 &&
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