* Re: [PATCH V3 net-next 00/28] ethtool: support time stamping and phc clocks
From: Richard Cochran @ 2012-04-04 5:14 UTC (permalink / raw)
To: David Miller
Cc: mporter, e1000-devel, netdev, jacob.e.keller, john.ronciak,
bhutchings
In-Reply-To: <20120403.162542.2077088434639546515.davem@davemloft.net>
On Tue, Apr 03, 2012 at 04:25:42PM -0400, David Miller wrote:
> If these patches depend upon changes not in my tree, and you haven't
> even mentioned this, I'm going to be _extremely_ irritated.
Sorry for being so irritating, and not being clear enough about
this. I did mention that
Patch number 3 applies on top of my recent two igb/phc patches.
Patch number 12 applies on top of my recent e100 patch.
Jeff accepted all of those 'recent patches' into his queue, so perhaps
he would take #3 and #12.
Or should I just drop them for now?
Thanks,
Richard
------------------------------------------------------------------------------
Better than sec? Nothing is better than sec when it comes to
monitoring Big Data applications. Try Boundary one-second
resolution app monitoring today. Free.
http://p.sf.net/sfu/Boundary-dev2dev
_______________________________________________
E1000-devel mailing list
E1000-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/e1000-devel
To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
^ permalink raw reply
* [PATCH net-next 9/10] bnx2x: Change comments and white spaces
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yaniv Rosner, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
From: Yaniv Rosner <yaniv.rosner@broadcom.com>
A semantic patch, fixing style issues in the bnx2x's link code.
Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | 660 ++++++++--------------
1 files changed, 241 insertions(+), 419 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index 4df6199..08d82ef 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -139,7 +139,6 @@
-/* */
#define SFP_EEPROM_CON_TYPE_ADDR 0x2
#define SFP_EEPROM_CON_TYPE_VAL_LC 0x7
#define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21
@@ -405,8 +404,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
DP(NETIF_MSG_LINK, "ETS E2E3 disabled configuration\n");
- /*
- * mapping between entry priority to client number (0,1,2 -debug and
+ /* mapping between entry priority to client number (0,1,2 -debug and
* management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)
* 3bits client num.
* PRI4 | PRI3 | PRI2 | PRI1 | PRI0
@@ -414,8 +412,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
*/
REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688);
- /*
- * Bitmap of 5bits length. Each bit specifies whether the entry behaves
+ /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
* as strict. Bits 0,1,2 - debug and management entries, 3 -
* COS0 entry, 4 - COS1 entry.
* COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT
@@ -426,13 +423,11 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7);
/* defines which entries (clients) are subjected to WFQ arbitration */
REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0);
- /*
- * For strict priority entries defines the number of consecutive
+ /* For strict priority entries defines the number of consecutive
* slots for the highest priority.
*/
REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
- /*
- * mapping between the CREDIT_WEIGHT registers and actual client
+ /* mapping between the CREDIT_WEIGHT registers and actual client
* numbers
*/
REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0);
@@ -444,8 +439,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)
REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, 0);
/* ETS mode disable */
REG_WR(bp, PBF_REG_ETS_ENABLED, 0);
- /*
- * If ETS mode is enabled (there is no strict priority) defines a WFQ
+ /* If ETS mode is enabled (there is no strict priority) defines a WFQ
* weight for COS0/COS1.
*/
REG_WR(bp, PBF_REG_COS0_WEIGHT, 0x2710);
@@ -472,10 +466,9 @@ static u32 bnx2x_ets_get_min_w_val_nig(const struct link_vars *vars)
min_w_val = ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS;
} else
min_w_val = ETS_E3B0_NIG_MIN_W_VAL_20GBPS;
- /**
- * If the link isn't up (static configuration for example ) The
- * link will be according to 20GBPS.
- */
+ /* If the link isn't up (static configuration for example ) The
+ * link will be according to 20GBPS.
+ */
return min_w_val;
}
/******************************************************************************
@@ -539,8 +532,7 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
struct bnx2x *bp = params->bp;
const u8 port = params->port;
const u32 min_w_val = bnx2x_ets_get_min_w_val_nig(vars);
- /**
- * mapping between entry priority to client number (0,1,2 -debug and
+ /* Mapping between entry priority to client number (0,1,2 -debug and
* management clients, 3 - COS0 client, 4 - COS1, ... 8 -
* COS5)(HIGHEST) 4bits client num.TODO_ETS - Should be done by
* reset value or init tool
@@ -552,18 +544,14 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB, 0x76543210);
REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB, 0x8);
}
- /**
- * For strict priority entries defines the number of consecutive
- * slots for the highest priority.
- */
- /* TODO_ETS - Should be done by reset value or init tool */
+ /* For strict priority entries defines the number of consecutive
+ * slots for the highest priority.
+ */
REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS :
NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
- /**
- * mapping between the CREDIT_WEIGHT registers and actual client
+ /* Mapping between the CREDIT_WEIGHT registers and actual client
* numbers
*/
- /* TODO_ETS - Should be done by reset value or init tool */
if (port) {
/*Port 1 has 6 COS*/
REG_WR(bp, NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_LSB, 0x210543);
@@ -575,8 +563,7 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_MSB, 0x5);
}
- /**
- * Bitmap of 5bits length. Each bit specifies whether the entry behaves
+ /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
* as strict. Bits 0,1,2 - debug and management entries, 3 -
* COS0 entry, 4 - COS1 entry.
* COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT
@@ -591,13 +578,12 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,
REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ :
NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0);
- /**
- * Please notice the register address are note continuous and a
- * for here is note appropriate.In 2 port mode port0 only COS0-5
- * can be used. DEBUG1,DEBUG1,MGMT are never used for WFQ* In 4
- * port mode port1 only COS0-2 can be used. DEBUG1,DEBUG1,MGMT
- * are never used for WFQ
- */
+ /* Please notice the register address are note continuous and a
+ * for here is note appropriate.In 2 port mode port0 only COS0-5
+ * can be used. DEBUG1,DEBUG1,MGMT are never used for WFQ* In 4
+ * port mode port1 only COS0-2 can be used. DEBUG1,DEBUG1,MGMT
+ * are never used for WFQ
+ */
REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 :
NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0, 0x0);
REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 :
@@ -634,10 +620,9 @@ static void bnx2x_ets_e3b0_set_credit_upper_bound_pbf(
u32 base_upper_bound = 0;
u8 max_cos = 0;
u8 i = 0;
- /**
- * In 2 port mode port0 has COS0-5 that can be used for WFQ.In 4
- * port mode port1 has COS0-2 that can be used for WFQ.
- */
+ /* In 2 port mode port0 has COS0-5 that can be used for WFQ.In 4
+ * port mode port1 has COS0-2 that can be used for WFQ.
+ */
if (!port) {
base_upper_bound = PBF_REG_COS0_UPPER_BOUND_P0;
max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0;
@@ -667,8 +652,7 @@ static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params)
u32 base_weight = 0;
u8 max_cos = 0;
- /**
- * mapping between entry priority to client number 0 - COS0
+ /* Mapping between entry priority to client number 0 - COS0
* client, 2 - COS1, ... 5 - COS5)(HIGHEST) 4bits client num.
* TODO_ETS - Should be done by reset value or init tool
*/
@@ -696,10 +680,9 @@ static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params)
REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 :
PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0 , 0);
- /**
- * In 2 port mode port0 has COS0-5 that can be used for WFQ.
- * In 4 port mode port1 has COS0-2 that can be used for WFQ.
- */
+ /* In 2 port mode port0 has COS0-5 that can be used for WFQ.
+ * In 4 port mode port1 has COS0-2 that can be used for WFQ.
+ */
if (!port) {
base_weight = PBF_REG_COS0_WEIGHT_P0;
max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0;
@@ -739,7 +722,7 @@ static int bnx2x_ets_e3b0_disabled(const struct link_params *params,
/******************************************************************************
* Description:
* Disable will return basicly the values to init values.
-*.
+*
******************************************************************************/
int bnx2x_ets_disabled(struct link_params *params,
struct link_vars *vars)
@@ -868,7 +851,7 @@ static int bnx2x_ets_e3b0_set_cos_bw(struct bnx2x *bp,
/******************************************************************************
* Description:
* Calculate the total BW.A value of 0 isn't legal.
-*.
+*
******************************************************************************/
static int bnx2x_ets_e3b0_get_total_bw(
const struct link_params *params,
@@ -880,7 +863,6 @@ static int bnx2x_ets_e3b0_get_total_bw(
u8 is_bw_cos_exist = 0;
*total_bw = 0 ;
-
/* Calculate total BW requested */
for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) {
if (ets_params->cos[cos_idx].state == bnx2x_cos_state_bw) {
@@ -888,10 +870,9 @@ static int bnx2x_ets_e3b0_get_total_bw(
if (!ets_params->cos[cos_idx].params.bw_params.bw) {
DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config BW"
"was set to 0\n");
- /*
- * This is to prevent a state when ramrods
+ /* This is to prevent a state when ramrods
* can't be sent
- */
+ */
ets_params->cos[cos_idx].params.bw_params.bw
= 1;
}
@@ -909,8 +890,7 @@ static int bnx2x_ets_e3b0_get_total_bw(
}
DP(NETIF_MSG_LINK,
"bnx2x_ets_E3B0_config total BW should be 100\n");
- /*
- * We can handle a case whre the BW isn't 100 this can happen
+ /* We can handle a case whre the BW isn't 100 this can happen
* if the TC are joined.
*/
}
@@ -920,7 +900,7 @@ static int bnx2x_ets_e3b0_get_total_bw(
/******************************************************************************
* Description:
* Invalidate all the sp_pri_to_cos.
-*.
+*
******************************************************************************/
static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos)
{
@@ -932,7 +912,7 @@ static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos)
* Description:
* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers
* according to sp_pri_to_cos.
-*.
+*
******************************************************************************/
static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params,
u8 *sp_pri_to_cos, const u8 pri,
@@ -965,7 +945,7 @@ static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params,
* Description:
* Returns the correct value according to COS and priority in
* the sp_pri_cli register.
-*.
+*
******************************************************************************/
static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset,
const u8 pri_set,
@@ -982,7 +962,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset,
* Description:
* Returns the correct value according to COS and priority in the
* sp_pri_cli register for NIG.
-*.
+*
******************************************************************************/
static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set)
{
@@ -998,7 +978,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set)
* Description:
* Returns the correct value according to COS and priority in the
* sp_pri_cli register for PBF.
-*.
+*
******************************************************************************/
static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set)
{
@@ -1014,7 +994,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set)
* Description:
* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers
* according to sp_pri_to_cos.(which COS has higher priority)
-*.
+*
******************************************************************************/
static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params,
u8 *sp_pri_to_cos)
@@ -1150,8 +1130,7 @@ int bnx2x_ets_e3b0_config(const struct link_params *params,
return -EINVAL;
}
- /*
- * Upper bound is set according to current link speed (min_w_val
+ /* Upper bound is set according to current link speed (min_w_val
* should be the same for upper bound and COS credit val).
*/
bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig);
@@ -1161,8 +1140,7 @@ int bnx2x_ets_e3b0_config(const struct link_params *params,
for (cos_entry = 0; cos_entry < ets_params->num_of_cos; cos_entry++) {
if (bnx2x_cos_state_bw == ets_params->cos[cos_entry].state) {
cos_bw_bitmap |= (1 << cos_entry);
- /*
- * The function also sets the BW in HW(not the mappin
+ /* The function also sets the BW in HW(not the mappin
* yet)
*/
bnx2x_status = bnx2x_ets_e3b0_set_cos_bw(
@@ -1218,14 +1196,12 @@ static void bnx2x_ets_bw_limit_common(const struct link_params *params)
/* ETS disabled configuration */
struct bnx2x *bp = params->bp;
DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n");
- /*
- * defines which entries (clients) are subjected to WFQ arbitration
+ /* Defines which entries (clients) are subjected to WFQ arbitration
* COS0 0x8
* COS1 0x10
*/
REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0x18);
- /*
- * mapping between the ARB_CREDIT_WEIGHT registers and actual
+ /* Mapping between the ARB_CREDIT_WEIGHT registers and actual
* client numbers (WEIGHT_0 does not actually have to represent
* client 0)
* PRI4 | PRI3 | PRI2 | PRI1 | PRI0
@@ -1243,8 +1219,7 @@ static void bnx2x_ets_bw_limit_common(const struct link_params *params)
/* Defines the number of consecutive slots for the strict priority */
REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0);
- /*
- * Bitmap of 5bits length. Each bit specifies whether the entry behaves
+ /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
* as strict. Bits 0,1,2 - debug and management entries, 3 - COS0
* entry, 4 - COS1 entry.
* COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT
@@ -1299,8 +1274,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
u32 val = 0;
DP(NETIF_MSG_LINK, "ETS enabled strict configuration\n");
- /*
- * Bitmap of 5bits length. Each bit specifies whether the entry behaves
+ /* Bitmap of 5bits length. Each bit specifies whether the entry behaves
* as strict. Bits 0,1,2 - debug and management entries,
* 3 - COS0 entry, 4 - COS1 entry.
* COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT
@@ -1308,8 +1282,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
* MCP and debug are strict
*/
REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1F);
- /*
- * For strict priority entries defines the number of consecutive slots
+ /* For strict priority entries defines the number of consecutive slots
* for the highest priority.
*/
REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
@@ -1321,8 +1294,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
/* Defines the number of consecutive slots for the strict priority */
REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, strict_cos);
- /*
- * mapping between entry priority to client number (0,1,2 -debug and
+ /* Mapping between entry priority to client number (0,1,2 -debug and
* management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)
* 3bits client num.
* PRI4 | PRI3 | PRI2 | PRI1 | PRI0
@@ -1357,15 +1329,12 @@ static void bnx2x_update_pfc_xmac(struct link_params *params,
if (!(params->feature_config_flags &
FEATURE_CONFIG_PFC_ENABLED)) {
- /*
- * RX flow control - Process pause frame in receive direction
+ /* RX flow control - Process pause frame in receive direction
*/
if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
pause_val |= XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN;
- /*
- * TX flow control - Send pause packet when buffer is full
- */
+ /* TX flow control - Send pause packet when buffer is full */
if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
pause_val |= XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN;
} else {/* PFC support */
@@ -1451,8 +1420,7 @@ void bnx2x_pfc_statistic(struct link_params *params, struct link_vars *vars,
static void bnx2x_set_mdio_clk(struct bnx2x *bp, u32 chip_id, u8 port)
{
u32 mode, emac_base;
- /**
- * Set clause 45 mode, slow down the MDIO clock to 2.5MHz
+ /* Set clause 45 mode, slow down the MDIO clock to 2.5MHz
* (a value of 49==0x31) and make sure that the AUTO poll is off
*/
@@ -1572,15 +1540,6 @@ static void bnx2x_umac_enable(struct link_params *params,
DP(NETIF_MSG_LINK, "enabling UMAC\n");
- /**
- * This register determines on which events the MAC will assert
- * error on the i/f to the NIG along w/ EOP.
- */
-
- /**
- * BD REG_WR(bp, NIG_REG_P0_MAC_RSV_ERR_MASK +
- * params->port*0x14, 0xfffff.
- */
/* This register opens the gate for the UMAC despite its name */
REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1);
@@ -1643,8 +1602,7 @@ static void bnx2x_umac_enable(struct link_params *params,
val |= UMAC_COMMAND_CONFIG_REG_LOOP_ENA;
REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val);
- /*
- * Maximum Frame Length (RW). Defines a 14-Bit maximum frame
+ /* Maximum Frame Length (RW). Defines a 14-Bit maximum frame
* length used by the MAC receive logic to check frames.
*/
REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710);
@@ -1660,8 +1618,7 @@ static void bnx2x_xmac_init(struct link_params *params, u32 max_speed)
struct bnx2x *bp = params->bp;
u32 is_port4mode = bnx2x_is_4_port_mode(bp);
- /*
- * In 4-port mode, need to set the mode only once, so if XMAC is
+ /* In 4-port mode, need to set the mode only once, so if XMAC is
* already out of reset, it means the mode has already been set,
* and it must not* reset the XMAC again, since it controls both
* ports of the path
@@ -1685,13 +1642,13 @@ static void bnx2x_xmac_init(struct link_params *params, u32 max_speed)
if (is_port4mode) {
DP(NETIF_MSG_LINK, "Init XMAC to 2 ports x 10G per path\n");
- /* Set the number of ports on the system side to up to 2 */
+ /* Set the number of ports on the system side to up to 2 */
REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 1);
/* Set the number of ports on the Warp Core to 10G */
REG_WR(bp, MISC_REG_XMAC_PHY_PORT_MODE, 3);
} else {
- /* Set the number of ports on the system side to 1 */
+ /* Set the number of ports on the system side to 1 */
REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 0);
if (max_speed == SPEED_10000) {
DP(NETIF_MSG_LINK,
@@ -1723,8 +1680,7 @@ static void bnx2x_xmac_disable(struct link_params *params)
if (REG_RD(bp, MISC_REG_RESET_REG_2) &
MISC_REGISTERS_RESET_REG_2_XMAC) {
- /*
- * Send an indication to change the state in the NIG back to XON
+ /* Send an indication to change the state in the NIG back to XON
* Clearing this bit enables the next set of this bit to get
* rising edge
*/
@@ -1749,13 +1705,11 @@ static int bnx2x_xmac_enable(struct link_params *params,
bnx2x_xmac_init(params, vars->line_speed);
- /*
- * This register determines on which events the MAC will assert
+ /* This register determines on which events the MAC will assert
* error on the i/f to the NIG along w/ EOP.
*/
- /*
- * This register tells the NIG whether to send traffic to UMAC
+ /* This register tells the NIG whether to send traffic to UMAC
* or XMAC
*/
REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 0);
@@ -1857,8 +1811,7 @@ static int bnx2x_emac_enable(struct link_params *params,
val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE);
val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS;
- /*
- * Setting this bit causes MAC control frames (except for pause
+ /* Setting this bit causes MAC control frames (except for pause
* frames) to be passed on for processing. This setting has no
* affect on the operation of the pause frames. This bit effects
* all packets regardless of RX Parser packet sorting logic.
@@ -1957,8 +1910,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
struct link_vars *vars,
u8 is_lb)
{
- /*
- * Set rx control: Strip CRC and enable BigMAC to relay
+ /* Set rx control: Strip CRC and enable BigMAC to relay
* control packets to the system as well
*/
u32 wb_data[2];
@@ -2010,8 +1962,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2);
- /*
- * Set Time (based unit is 512 bit time) between automatic
+ /* Set Time (based unit is 512 bit time) between automatic
* re-sending of PP packets amd enable automatic re-send of
* Per-Priroity Packet as long as pp_gen is asserted and
* pp_disable is low.
@@ -2080,7 +2031,7 @@ static int bnx2x_pfc_brb_get_config_params(
config_val->default_class1.full_xon = 0;
if (CHIP_IS_E2(bp)) {
- /* class0 defaults */
+ /* Class0 defaults */
config_val->default_class0.pause_xoff =
DEFAULT0_E2_BRB_MAC_PAUSE_XOFF_THR;
config_val->default_class0.pause_xon =
@@ -2089,7 +2040,7 @@ static int bnx2x_pfc_brb_get_config_params(
DEFAULT0_E2_BRB_MAC_FULL_XOFF_THR;
config_val->default_class0.full_xon =
DEFAULT0_E2_BRB_MAC_FULL_XON_THR;
- /* pause able*/
+ /* Pause able*/
config_val->pauseable_th.pause_xoff =
PFC_E2_BRB_MAC_PAUSE_XOFF_THR_PAUSE;
config_val->pauseable_th.pause_xon =
@@ -2108,7 +2059,7 @@ static int bnx2x_pfc_brb_get_config_params(
config_val->non_pauseable_th.full_xon =
PFC_E2_BRB_MAC_FULL_XON_THR_NON_PAUSE;
} else if (CHIP_IS_E3A0(bp)) {
- /* class0 defaults */
+ /* Class0 defaults */
config_val->default_class0.pause_xoff =
DEFAULT0_E3A0_BRB_MAC_PAUSE_XOFF_THR;
config_val->default_class0.pause_xon =
@@ -2117,7 +2068,7 @@ static int bnx2x_pfc_brb_get_config_params(
DEFAULT0_E3A0_BRB_MAC_FULL_XOFF_THR;
config_val->default_class0.full_xon =
DEFAULT0_E3A0_BRB_MAC_FULL_XON_THR;
- /* pause able */
+ /* Pause able */
config_val->pauseable_th.pause_xoff =
PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_PAUSE;
config_val->pauseable_th.pause_xon =
@@ -2136,7 +2087,7 @@ static int bnx2x_pfc_brb_get_config_params(
config_val->non_pauseable_th.full_xon =
PFC_E3A0_BRB_MAC_FULL_XON_THR_NON_PAUSE;
} else if (CHIP_IS_E3B0(bp)) {
- /* class0 defaults */
+ /* Class0 defaults */
config_val->default_class0.pause_xoff =
DEFAULT0_E3B0_BRB_MAC_PAUSE_XOFF_THR;
config_val->default_class0.pause_xon =
@@ -2299,27 +2250,23 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
reg_th_config = &config_val.non_pauseable_th;
} else
reg_th_config = &config_val.default_class0;
- /*
- * The number of free blocks below which the pause signal to class 0
+ /* The number of free blocks below which the pause signal to class 0
* of MAC #n is asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XOFF_THRESHOLD_1 :
BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 ,
reg_th_config->pause_xoff);
- /*
- * The number of free blocks above which the pause signal to class 0
+ /* The number of free blocks above which the pause signal to class 0
* of MAC #n is de-asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XON_THRESHOLD_1 :
BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , reg_th_config->pause_xon);
- /*
- * The number of free blocks below which the full signal to class 0
+ /* The number of free blocks below which the full signal to class 0
* of MAC #n is asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_FULL_0_XOFF_THRESHOLD_1 :
BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , reg_th_config->full_xoff);
- /*
- * The number of free blocks above which the full signal to class 0
+ /* The number of free blocks above which the full signal to class 0
* of MAC #n is de-asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_FULL_0_XON_THRESHOLD_1 :
@@ -2333,30 +2280,26 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
reg_th_config = &config_val.non_pauseable_th;
} else
reg_th_config = &config_val.default_class1;
- /*
- * The number of free blocks below which the pause signal to
+ /* The number of free blocks below which the pause signal to
* class 1 of MAC #n is asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XOFF_THRESHOLD_1 :
BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0,
reg_th_config->pause_xoff);
- /*
- * The number of free blocks above which the pause signal to
+ /* The number of free blocks above which the pause signal to
* class 1 of MAC #n is de-asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XON_THRESHOLD_1 :
BRB1_REG_PAUSE_1_XON_THRESHOLD_0,
reg_th_config->pause_xon);
- /*
- * The number of free blocks below which the full signal to
+ /* The number of free blocks below which the full signal to
* class 1 of MAC #n is asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_FULL_1_XOFF_THRESHOLD_1 :
BRB1_REG_FULL_1_XOFF_THRESHOLD_0,
reg_th_config->full_xoff);
- /*
- * The number of free blocks above which the full signal to
+ /* The number of free blocks above which the full signal to
* class 1 of MAC #n is de-asserted. n=0,1
*/
REG_WR(bp, (port) ? BRB1_REG_FULL_1_XON_THRESHOLD_1 :
@@ -2373,49 +2316,41 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
REG_WR(bp, BRB1_REG_PER_CLASS_GUARANTY_MODE,
e3b0_val.per_class_guaranty_mode);
- /*
- * The hysteresis on the guarantied buffer space for the Lb
+ /* The hysteresis on the guarantied buffer space for the Lb
* port before signaling XON.
*/
REG_WR(bp, BRB1_REG_LB_GUARANTIED_HYST,
e3b0_val.lb_guarantied_hyst);
- /*
- * The number of free blocks below which the full signal to the
+ /* The number of free blocks below which the full signal to the
* LB port is asserted.
*/
REG_WR(bp, BRB1_REG_FULL_LB_XOFF_THRESHOLD,
e3b0_val.full_lb_xoff_th);
- /*
- * The number of free blocks above which the full signal to the
+ /* The number of free blocks above which the full signal to the
* LB port is de-asserted.
*/
REG_WR(bp, BRB1_REG_FULL_LB_XON_THRESHOLD,
e3b0_val.full_lb_xon_threshold);
- /*
- * The number of blocks guarantied for the MAC #n port. n=0,1
+ /* The number of blocks guarantied for the MAC #n port. n=0,1
*/
- /* The number of blocks guarantied for the LB port.*/
+ /* The number of blocks guarantied for the LB port. */
REG_WR(bp, BRB1_REG_LB_GUARANTIED,
e3b0_val.lb_guarantied);
- /*
- * The number of blocks guarantied for the MAC #n port.
- */
+ /* The number of blocks guarantied for the MAC #n port. */
REG_WR(bp, BRB1_REG_MAC_GUARANTIED_0,
2 * e3b0_val.mac_0_class_t_guarantied);
REG_WR(bp, BRB1_REG_MAC_GUARANTIED_1,
2 * e3b0_val.mac_1_class_t_guarantied);
- /*
- * The number of blocks guarantied for class #t in MAC0. t=0,1
+ /* The number of blocks guarantied for class #t in MAC0. t=0,1
*/
REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED,
e3b0_val.mac_0_class_t_guarantied);
REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED,
e3b0_val.mac_0_class_t_guarantied);
- /*
- * The hysteresis on the guarantied buffer space for class in
+ /* The hysteresis on the guarantied buffer space for class in
* MAC0. t=0,1
*/
REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED_HYST,
@@ -2423,15 +2358,13 @@ static int bnx2x_update_pfc_brb(struct link_params *params,
REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED_HYST,
e3b0_val.mac_0_class_t_guarantied_hyst);
- /*
- * The number of blocks guarantied for class #t in MAC1.t=0,1
+ /* The number of blocks guarantied for class #t in MAC1.t=0,1
*/
REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED,
e3b0_val.mac_1_class_t_guarantied);
REG_WR(bp, BRB1_REG_MAC_1_CLASS_1_GUARANTIED,
e3b0_val.mac_1_class_t_guarantied);
- /*
- * The hysteresis on the guarantied buffer space for class #t
+ /* The hysteresis on the guarantied buffer space for class #t
* in MAC1. t=0,1
*/
REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED_HYST,
@@ -2514,15 +2447,13 @@ static void bnx2x_update_pfc_nig(struct link_params *params,
FEATURE_CONFIG_PFC_ENABLED;
DP(NETIF_MSG_LINK, "updating pfc nig parameters\n");
- /*
- * When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set
+ /* When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set
* MAC control frames (that are not pause packets)
* will be forwarded to the XCM.
*/
xcm_mask = REG_RD(bp, port ? NIG_REG_LLH1_XCM_MASK :
NIG_REG_LLH0_XCM_MASK);
- /*
- * nig params will override non PFC params, since it's possible to
+ /* NIG params will override non PFC params, since it's possible to
* do transition from PFC to SAFC
*/
if (set_pfc) {
@@ -2542,7 +2473,7 @@ static void bnx2x_update_pfc_nig(struct link_params *params,
llfc_out_en = nig_params->llfc_out_en;
llfc_enable = nig_params->llfc_enable;
pause_enable = nig_params->pause_enable;
- } else /*defaul non PFC mode - PAUSE */
+ } else /* Default non PFC mode - PAUSE */
pause_enable = 1;
xcm_mask |= (port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN :
@@ -2602,8 +2533,7 @@ int bnx2x_update_pfc(struct link_params *params,
struct link_vars *vars,
struct bnx2x_nig_brb_pfc_port_params *pfc_params)
{
- /*
- * The PFC and pause are orthogonal to one another, meaning when
+ /* The PFC and pause are orthogonal to one another, meaning when
* PFC is enabled, the pause are disabled, and when PFC is
* disabled, pause are set according to the pause result.
*/
@@ -3142,7 +3072,6 @@ static int bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
EMAC_MDIO_STATUS_10MB);
/* address */
-
tmp = ((phy->addr << 21) | (devad << 16) | reg |
EMAC_MDIO_COMM_COMMAND_ADDRESS |
EMAC_MDIO_COMM_START_BUSY);
@@ -3331,8 +3260,7 @@ int bnx2x_phy_read(struct link_params *params, u8 phy_addr,
u8 devad, u16 reg, u16 *ret_val)
{
u8 phy_index;
- /*
- * Probe for the phy according to the given phy_addr, and execute
+ /* Probe for the phy according to the given phy_addr, and execute
* the read request on it
*/
for (phy_index = 0; phy_index < params->num_phys; phy_index++) {
@@ -3349,8 +3277,7 @@ int bnx2x_phy_write(struct link_params *params, u8 phy_addr,
u8 devad, u16 reg, u16 val)
{
u8 phy_index;
- /*
- * Probe for the phy according to the given phy_addr, and execute
+ /* Probe for the phy according to the given phy_addr, and execute
* the write request on it
*/
for (phy_index = 0; phy_index < params->num_phys; phy_index++) {
@@ -3376,7 +3303,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,
if (bnx2x_is_4_port_mode(bp)) {
u32 port_swap, port_swap_ovr;
- /*figure out path swap value */
+ /* Figure out path swap value */
path_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PATH_SWAP_OVWR);
if (path_swap_ovr & 0x1)
path_swap = (path_swap_ovr & 0x2);
@@ -3386,7 +3313,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,
if (path_swap)
path = path ^ 1;
- /*figure out port swap value */
+ /* Figure out port swap value */
port_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PORT_SWAP_OVWR);
if (port_swap_ovr & 0x1)
port_swap = (port_swap_ovr & 0x2);
@@ -3399,7 +3326,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,
lane = (port<<1) + path;
} else { /* two port mode - no port swap */
- /*figure out path swap value */
+ /* Figure out path swap value */
path_swap_ovr =
REG_RD(bp, MISC_REG_TWO_PORT_PATH_SWAP_OVWR);
if (path_swap_ovr & 0x1) {
@@ -3431,8 +3358,7 @@ static void bnx2x_set_aer_mmd(struct link_params *params,
if (USES_WARPCORE(bp)) {
aer_val = bnx2x_get_warpcore_lane(phy, params);
- /*
- * In Dual-lane mode, two lanes are joined together,
+ /* In Dual-lane mode, two lanes are joined together,
* so in order to configure them, the AER broadcast method is
* used here.
* 0x200 is the broadcast address for lanes 0,1
@@ -3512,8 +3438,7 @@ static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
{
struct bnx2x *bp = params->bp;
*ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;
- /**
- * resolve pause mode and advertisement Please refer to Table
+ /* Resolve pause mode and advertisement Please refer to Table
* 28B-3 of the 802.3ab-1999 spec
*/
@@ -3636,6 +3561,7 @@ static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)
vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE;
if (pause_result & (1<<1))
vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE;
+
}
static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy,
@@ -3665,6 +3591,7 @@ static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy,
bnx2x_pause_resolve(vars, pause_result);
}
+
static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy,
struct link_params *params,
struct link_vars *vars)
@@ -3770,9 +3697,7 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,
/* Advertise pause */
bnx2x_ext_phy_set_pause(params, phy, vars);
-
- /*
- * Set KR Autoneg Work-Around flag for Warpcore version older than D108
+ /* Set KR Autoneg Work-Around flag for Warpcore version older than D108
*/
bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_UC_INFO_B1_VERSION, &val16);
@@ -3780,7 +3705,6 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,
DP(NETIF_MSG_LINK, "Enable AN KR work-around\n");
vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY;
}
-
bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_DIGITAL5_MISC7, &val16);
@@ -3854,7 +3778,7 @@ static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy,
bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD,
MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0xB);
- /*Enable encoded forced speed */
+ /* Enable encoded forced speed */
bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x30);
@@ -4216,8 +4140,7 @@ static int bnx2x_get_mod_abs_int_cfg(struct bnx2x *bp,
PORT_HW_CFG_E3_MOD_ABS_MASK) >>
PORT_HW_CFG_E3_MOD_ABS_SHIFT;
- /*
- * Should not happen. This function called upon interrupt
+ /* Should not happen. This function called upon interrupt
* triggered by GPIO ( since EPIO can only generate interrupts
* to MCP).
* So if this function was called and none of the GPIOs was set,
@@ -4317,7 +4240,7 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy,
"link up, rx_tx_asic_rst 0x%x\n",
vars->rx_tx_asic_rst);
} else {
- /*reset the lane to see if link comes up.*/
+ /* Reset the lane to see if link comes up.*/
bnx2x_warpcore_reset_lane(bp, phy, 1);
bnx2x_warpcore_reset_lane(bp, phy, 0);
@@ -4338,7 +4261,6 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy,
} /*params->rx_tx_asic_rst*/
}
-
static void bnx2x_warpcore_config_init(struct bnx2x_phy *phy,
struct link_params *params,
struct link_vars *vars)
@@ -4496,7 +4418,7 @@ static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy,
/* Update those 1-copy registers */
CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK,
MDIO_AER_BLOCK_AER_REG, 0);
- /* Enable 1G MDIO (1-copy) */
+ /* Enable 1G MDIO (1-copy) */
bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,
MDIO_WC_REG_XGXSBLK0_XGXSCONTROL,
&val16);
@@ -4575,43 +4497,43 @@ void bnx2x_sync_link(struct link_params *params,
vars->duplex = DUPLEX_FULL;
switch (vars->link_status &
LINK_STATUS_SPEED_AND_DUPLEX_MASK) {
- case LINK_10THD:
- vars->duplex = DUPLEX_HALF;
- /* fall thru */
- case LINK_10TFD:
- vars->line_speed = SPEED_10;
- break;
+ case LINK_10THD:
+ vars->duplex = DUPLEX_HALF;
+ /* Fall thru */
+ case LINK_10TFD:
+ vars->line_speed = SPEED_10;
+ break;
- case LINK_100TXHD:
- vars->duplex = DUPLEX_HALF;
- /* fall thru */
- case LINK_100T4:
- case LINK_100TXFD:
- vars->line_speed = SPEED_100;
- break;
+ case LINK_100TXHD:
+ vars->duplex = DUPLEX_HALF;
+ /* Fall thru */
+ case LINK_100T4:
+ case LINK_100TXFD:
+ vars->line_speed = SPEED_100;
+ break;
- case LINK_1000THD:
- vars->duplex = DUPLEX_HALF;
- /* fall thru */
- case LINK_1000TFD:
- vars->line_speed = SPEED_1000;
- break;
+ case LINK_1000THD:
+ vars->duplex = DUPLEX_HALF;
+ /* Fall thru */
+ case LINK_1000TFD:
+ vars->line_speed = SPEED_1000;
+ break;
- case LINK_2500THD:
- vars->duplex = DUPLEX_HALF;
- /* fall thru */
- case LINK_2500TFD:
- vars->line_speed = SPEED_2500;
- break;
+ case LINK_2500THD:
+ vars->duplex = DUPLEX_HALF;
+ /* Fall thru */
+ case LINK_2500TFD:
+ vars->line_speed = SPEED_2500;
+ break;
- case LINK_10GTFD:
- vars->line_speed = SPEED_10000;
- break;
- case LINK_20GTFD:
- vars->line_speed = SPEED_20000;
- break;
- default:
- break;
+ case LINK_10GTFD:
+ vars->line_speed = SPEED_10000;
+ break;
+ case LINK_20GTFD:
+ vars->line_speed = SPEED_20000;
+ break;
+ default:
+ break;
}
vars->flow_ctrl = 0;
if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED)
@@ -4786,9 +4708,8 @@ static void bnx2x_set_swap_lanes(struct link_params *params,
struct bnx2x_phy *phy)
{
struct bnx2x *bp = params->bp;
- /*
- * Each two bits represents a lane number:
- * No swap is 0123 => 0x1b no need to enable the swap
+ /* Each two bits represents a lane number:
+ * No swap is 0123 => 0x1b no need to enable the swap
*/
u16 rx_lane_swap, tx_lane_swap;
@@ -5002,8 +4923,7 @@ static void bnx2x_program_serdes(struct bnx2x_phy *phy,
MDIO_REG_BANK_COMBO_IEEE0,
MDIO_COMBO_IEEE0_MII_CONTROL, reg_val);
- /*
- * program speed
+ /* Program speed
* - needed only if the speed is greater than 1G (2.5G or 10G)
*/
CL22_RD_OVER_CL45(bp, phy,
@@ -5038,8 +4958,6 @@ static void bnx2x_set_brcm_cl37_advertisement(struct bnx2x_phy *phy,
struct bnx2x *bp = params->bp;
u16 val = 0;
- /* configure the 48 bits for BAM AN */
-
/* set extended capabilities */
if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G)
val |= MDIO_OVER_1G_UP1_2_5G;
@@ -5185,11 +5103,8 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy,
}
}
-
-/*
- * link management
+/* Link management
*/
-
static int bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy,
struct link_params *params)
{
@@ -5334,8 +5249,7 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
"ustat_val(0x8371) = 0x%x\n", ustat_val);
return;
}
- /*
- * Step 3: Check CL37 Message Pages received to indicate LP
+ /* Step 3: Check CL37 Message Pages received to indicate LP
* supports only CL37
*/
CL22_RD_OVER_CL45(bp, phy,
@@ -5352,8 +5266,7 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
cl37_fsm_received);
return;
}
- /*
- * The combined cl37/cl73 fsm state information indicating that
+ /* The combined cl37/cl73 fsm state information indicating that
* we are connected to a device which does not support cl73, but
* does support cl37 BAM. In this case we disable cl73 and
* restart cl37 auto-neg
@@ -5924,8 +5837,7 @@ static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port,
{
u32 latch_status = 0;
- /*
- * Disable the MI INT ( external phy int ) by writing 1 to the
+ /* Disable the MI INT ( external phy int ) by writing 1 to the
* status register. Link down indication is high-active-signal,
* so in this case we need to write the status to clear the XOR
*/
@@ -5960,8 +5872,7 @@ static void bnx2x_link_int_ack(struct link_params *params,
struct bnx2x *bp = params->bp;
u8 port = params->port;
u32 mask;
- /*
- * First reset all status we assume only one line will be
+ /* First reset all status we assume only one line will be
* change at a time
*/
bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4,
@@ -5975,8 +5886,7 @@ static void bnx2x_link_int_ack(struct link_params *params,
if (is_10g_plus)
mask = NIG_STATUS_XGXS0_LINK10G;
else if (params->switch_cfg == SWITCH_CFG_10G) {
- /*
- * Disable the link interrupt by writing 1 to
+ /* Disable the link interrupt by writing 1 to
* the relevant lane in the status register
*/
u32 ser_lane =
@@ -6176,8 +6086,7 @@ int bnx2x_set_led(struct link_params *params,
break;
case LED_MODE_OPER:
- /*
- * For all other phys, OPER mode is same as ON, so in case
+ /* For all other phys, OPER mode is same as ON, so in case
* link is down, do nothing
*/
if (!vars->link_up)
@@ -6188,9 +6097,7 @@ int bnx2x_set_led(struct link_params *params,
(params->phy[EXT_PHY1].type ==
PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722)) &&
CHIP_IS_E2(bp) && params->num_phys == 2) {
- /*
- * This is a work-around for E2+8727 Configurations
- */
+ /* This is a work-around for E2+8727 Configurations */
if (mode == LED_MODE_ON ||
speed == SPEED_10000){
REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0);
@@ -6199,8 +6106,7 @@ int bnx2x_set_led(struct link_params *params,
tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
EMAC_WR(bp, EMAC_REG_EMAC_LED,
(tmp | EMAC_LED_OVERRIDE));
- /*
- * return here without enabling traffic
+ /* Return here without enabling traffic
* LED blink and setting rate in ON mode.
* In oper mode, enabling LED blink
* and setting rate is needed.
@@ -6209,8 +6115,7 @@ int bnx2x_set_led(struct link_params *params,
return rc;
}
} else if (SINGLE_MEDIA_DIRECT(params)) {
- /*
- * This is a work-around for HW issue found when link
+ /* This is a work-around for HW issue found when link
* is up in CL73
*/
if ((!CHIP_IS_E3(bp)) ||
@@ -6258,10 +6163,7 @@ int bnx2x_set_led(struct link_params *params,
(speed == SPEED_1000) ||
(speed == SPEED_100) ||
(speed == SPEED_10))) {
- /*
- * On Everest 1 Ax chip versions for speeds less than
- * 10G LED scheme is different
- */
+ /* For speeds less than 10G LED scheme is different */
REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0
+ port*4, 1);
REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 +
@@ -6281,8 +6183,7 @@ int bnx2x_set_led(struct link_params *params,
}
-/*
- * This function comes to reflect the actual link state read DIRECTLY from the
+/* This function comes to reflect the actual link state read DIRECTLY from the
* HW
*/
int bnx2x_test_link(struct link_params *params, struct link_vars *vars,
@@ -6370,16 +6271,14 @@ static int bnx2x_link_initialize(struct link_params *params,
int rc = 0;
u8 phy_index, non_ext_phy;
struct bnx2x *bp = params->bp;
- /*
- * In case of external phy existence, the line speed would be the
+ /* In case of external phy existence, the line speed would be the
* line speed linked up by the external phy. In case it is direct
* only, then the line_speed during initialization will be
* equal to the req_line_speed
*/
vars->line_speed = params->phy[INT_PHY].req_line_speed;
- /*
- * Initialize the internal phy in case this is a direct board
+ /* Initialize the internal phy in case this is a direct board
* (no external phys), or this board has external phy which requires
* to first.
*/
@@ -6411,8 +6310,7 @@ static int bnx2x_link_initialize(struct link_params *params,
} else {
for (phy_index = EXT_PHY1; phy_index < params->num_phys;
phy_index++) {
- /*
- * No need to initialize second phy in case of first
+ /* No need to initialize second phy in case of first
* phy only selection. In case of second phy, we do
* need to initialize the first phy, since they are
* connected.
@@ -6599,8 +6497,7 @@ static int bnx2x_update_link_up(struct link_params *params,
msleep(20);
return rc;
}
-/*
- * The bnx2x_link_update function should be called upon link
+/* The bnx2x_link_update function should be called upon link
* interrupt.
* Link is considered up as follows:
* - DIRECT_SINGLE_MEDIA - Only XGXS link (internal link) needs
@@ -6657,8 +6554,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
if (!CHIP_IS_E3(bp))
REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0);
- /*
- * Step 1:
+ /* Step 1:
* Check external link change only for external phys, and apply
* priority selection between them in case the link on both phys
* is up. Note that instead of the common vars, a temporary
@@ -6689,23 +6585,20 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
switch (bnx2x_phy_selection(params)) {
case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
- /*
- * In this option, the first PHY makes sure to pass the
+ /* In this option, the first PHY makes sure to pass the
* traffic through itself only.
* Its not clear how to reset the link on the second phy
*/
active_external_phy = EXT_PHY1;
break;
case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
- /*
- * In this option, the first PHY makes sure to pass the
+ /* In this option, the first PHY makes sure to pass the
* traffic through the second PHY.
*/
active_external_phy = EXT_PHY2;
break;
default:
- /*
- * Link indication on both PHYs with the following cases
+ /* Link indication on both PHYs with the following cases
* is invalid:
* - FIRST_PHY means that second phy wasn't initialized,
* hence its link is expected to be down
@@ -6722,8 +6615,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
}
}
prev_line_speed = vars->line_speed;
- /*
- * Step 2:
+ /* Step 2:
* Read the status of the internal phy. In case of
* DIRECT_SINGLE_MEDIA board, this link is the external link,
* otherwise this is the link between the 577xx and the first
@@ -6733,8 +6625,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
params->phy[INT_PHY].read_status(
¶ms->phy[INT_PHY],
params, vars);
- /*
- * The INT_PHY flow control reside in the vars. This include the
+ /* The INT_PHY flow control reside in the vars. This include the
* case where the speed or flow control are not set to AUTO.
* Otherwise, the active external phy flow control result is set
* to the vars. The ext_phy_line_speed is needed to check if the
@@ -6743,14 +6634,12 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
*/
if (active_external_phy > INT_PHY) {
vars->flow_ctrl = phy_vars[active_external_phy].flow_ctrl;
- /*
- * Link speed is taken from the XGXS. AN and FC result from
+ /* Link speed is taken from the XGXS. AN and FC result from
* the external phy.
*/
vars->link_status |= phy_vars[active_external_phy].link_status;
- /*
- * if active_external_phy is first PHY and link is up - disable
+ /* if active_external_phy is first PHY and link is up - disable
* disable TX on second external PHY
*/
if (active_external_phy == EXT_PHY1) {
@@ -6787,8 +6676,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
DP(NETIF_MSG_LINK, "vars->flow_ctrl = 0x%x, vars->link_status = 0x%x,"
" ext_phy_line_speed = %d\n", vars->flow_ctrl,
vars->link_status, ext_phy_line_speed);
- /*
- * Upon link speed change set the NIG into drain mode. Comes to
+ /* Upon link speed change set the NIG into drain mode. Comes to
* deals with possible FIFO glitch due to clk change when speed
* is decreased without link down indicator
*/
@@ -6813,8 +6701,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
bnx2x_link_int_ack(params, vars, link_10g_plus);
- /*
- * In case external phy link is up, and internal link is down
+ /* In case external phy link is up, and internal link is down
* (not initialized yet probably after link initialization, it
* needs to be initialized.
* Note that after link down-up as result of cable plug, the xgxs
@@ -6842,8 +6729,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)
vars);
}
}
- /*
- * Link is up only if both local phy and external phy (in case of
+ /* Link is up only if both local phy and external phy (in case of
* non-direct board) are up and no fault detected on active PHY.
*/
vars->link_up = (vars->phy_link_up &&
@@ -7069,8 +6955,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
}
/* XAUI workaround in 8073 A0: */
- /*
- * After loading the boot ROM and restarting Autoneg, poll
+ /* After loading the boot ROM and restarting Autoneg, poll
* Dev1, Reg $C820:
*/
@@ -7079,8 +6964,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
MDIO_PMA_DEVAD,
MDIO_PMA_REG_8073_SPEED_LINK_STATUS,
&val);
- /*
- * If bit [14] = 0 or bit [13] = 0, continue on with
+ /* If bit [14] = 0 or bit [13] = 0, continue on with
* system initialization (XAUI work-around not required, as
* these bits indicate 2.5G or 1G link up).
*/
@@ -7089,8 +6973,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
return 0;
} else if (!(val & (1<<15))) {
DP(NETIF_MSG_LINK, "bit 15 went off\n");
- /*
- * If bit 15 is 0, then poll Dev1, Reg $C841 until it's
+ /* If bit 15 is 0, then poll Dev1, Reg $C841 until it's
* MSB (bit15) goes to 1 (indicating that the XAUI
* workaround has completed), then continue on with
* system initialization.
@@ -7240,8 +7123,7 @@ static int bnx2x_8073_config_init(struct bnx2x_phy *phy,
val = (1<<7);
} else if (phy->req_line_speed == SPEED_2500) {
val = (1<<5);
- /*
- * Note that 2.5G works only when used with 1G
+ /* Note that 2.5G works only when used with 1G
* advertisement
*/
} else
@@ -7292,8 +7174,7 @@ static int bnx2x_8073_config_init(struct bnx2x_phy *phy,
/* Add support for CL37 (passive mode) III */
bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
- /*
- * The SNR will improve about 2db by changing BW and FEE main
+ /* The SNR will improve about 2db by changing BW and FEE main
* tap. Rest commands are executed after link is up
* Change FFE main cursor to 5 in EDC register
*/
@@ -7380,8 +7261,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
link_up = (((val1 & 4) == 4) || (an1000_status & (1<<1)));
if (link_up && bnx2x_8073_is_snr_needed(bp, phy)) {
- /*
- * The SNR will improve about 2dbby changing the BW and FEE main
+ /* The SNR will improve about 2dbby changing the BW and FEE main
* tap. The 1st write to change FFE main tap is set before
* restart AN. Change PLL Bandwidth in EDC register
*/
@@ -7428,8 +7308,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
bnx2x_cl45_read(bp, phy,
MDIO_XS_DEVAD,
MDIO_XS_REG_8073_RX_CTRL_PCIE, &val1);
- /*
- * Set bit 3 to invert Rx in 1G mode and clear this bit
+ /* Set bit 3 to invert Rx in 1G mode and clear this bit
* when it`s in 10G mode.
*/
if (vars->line_speed == SPEED_1000) {
@@ -7551,8 +7430,7 @@ static void bnx2x_set_disable_pmd_transmit(struct link_params *params,
u8 pmd_dis)
{
struct bnx2x *bp = params->bp;
- /*
- * Disable transmitter only for bootcodes which can enable it afterwards
+ /* Disable transmitter only for bootcodes which can enable it afterwards
* (for D3 link)
*/
if (pmd_dis) {
@@ -7729,9 +7607,6 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy,
u32 data_array[4];
u16 addr32;
struct bnx2x *bp = params->bp;
- /*DP(NETIF_MSG_LINK, "bnx2x_direct_read_sfp_module_eeprom:"
- " addr %d, cnt %d\n",
- addr, byte_cnt);*/
if (byte_cnt > 16) {
DP(NETIF_MSG_LINK,
"Reading from eeprom is limited to 16 bytes\n");
@@ -7796,8 +7671,7 @@ static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
MDIO_PMA_DEVAD,
MDIO_PMA_REG_SFP_TWO_WIRE_CTRL,
0x8002);
- /*
- * Wait appropriate time for two-wire command to finish before
+ /* Wait appropriate time for two-wire command to finish before
* polling the status register
*/
msleep(1);
@@ -7890,8 +7764,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
{
u8 copper_module_type;
phy->media_type = ETH_PHY_DA_TWINAX;
- /*
- * Check if its active cable (includes SFP+ module)
+ /* Check if its active cable (includes SFP+ module)
* of passive cable
*/
if (bnx2x_read_sfp_module_eeprom(phy,
@@ -7968,8 +7841,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
DP(NETIF_MSG_LINK, "EDC mode is set to 0x%x\n", *edc_mode);
return 0;
}
-/*
- * This function read the relevant field from the module (SFP+), and verify it
+/* This function read the relevant field from the module (SFP+), and verify it
* is compliant with this board
*/
static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy,
@@ -8049,8 +7921,7 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,
u8 val;
struct bnx2x *bp = params->bp;
u16 timeout;
- /*
- * Initialization time after hot-plug may take up to 300ms for
+ /* Initialization time after hot-plug may take up to 300ms for
* some phys type ( e.g. JDSU )
*/
@@ -8072,8 +7943,7 @@ static void bnx2x_8727_power_module(struct bnx2x *bp,
u8 is_power_up) {
/* Make sure GPIOs are not using for LED mode */
u16 val;
- /*
- * In the GPIO register, bit 4 is use to determine if the GPIOs are
+ /* In the GPIO register, bit 4 is use to determine if the GPIOs are
* operating as INPUT or as OUTPUT. Bit 1 is for input, and 0 for
* output
* Bits 0-1 determine the GPIOs value for OUTPUT in case bit 4 val is 0
@@ -8089,8 +7959,7 @@ static void bnx2x_8727_power_module(struct bnx2x *bp,
if (is_power_up)
val = (1<<4);
else
- /*
- * Set GPIO control to OUTPUT, and set the power bit
+ /* Set GPIO control to OUTPUT, and set the power bit
* to according to the is_power_up
*/
val = (1<<1);
@@ -8124,8 +7993,7 @@ static int bnx2x_8726_set_limiting_mode(struct bnx2x *bp,
DP(NETIF_MSG_LINK, "Setting LRM MODE\n");
- /*
- * Changing to LRM mode takes quite few seconds. So do it only
+ /* Changing to LRM mode takes quite few seconds. So do it only
* if current mode is limiting (default is LRM)
*/
if (cur_limiting_mode != EDC_MODE_LIMITING)
@@ -8260,8 +8128,7 @@ static void bnx2x_set_sfp_module_fault_led(struct link_params *params,
struct bnx2x *bp = params->bp;
DP(NETIF_MSG_LINK, "Setting SFP+ module fault LED to %d\n", gpio_mode);
if (CHIP_IS_E3(bp)) {
- /*
- * Low ==> if SFP+ module is supported otherwise
+ /* Low ==> if SFP+ module is supported otherwise
* High ==> if SFP+ module is not on the approved vendor list
*/
bnx2x_set_e3_module_fault_led(params, gpio_mode);
@@ -8286,8 +8153,7 @@ static void bnx2x_warpcore_power_module(struct link_params *params,
return;
DP(NETIF_MSG_LINK, "Setting SFP+ module power to %d using pin cfg %d\n",
power, pin_cfg);
- /*
- * Low ==> corresponding SFP+ module is powered
+ /* Low ==> corresponding SFP+ module is powered
* high ==> the SFP+ module is powered down
*/
bnx2x_set_cfg_pin(bp, pin_cfg, power ^ 1);
@@ -8421,14 +8287,12 @@ int bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW);
}
- /*
- * Check and set limiting mode / LRM mode on 8726. On 8727 it
+ /* Check and set limiting mode / LRM mode on 8726. On 8727 it
* is done automatically
*/
bnx2x_set_limiting_mode(params, phy, edc_mode);
- /*
- * Enable transmit for this module if the module is approved, or
+ /* Enable transmit for this module if the module is approved, or
* if unapproved modules should also enable the Tx laser
*/
if (rc == 0 ||
@@ -8483,8 +8347,7 @@ void bnx2x_handle_module_detect_int(struct link_params *params)
bnx2x_set_gpio_int(bp, gpio_num,
MISC_REGISTERS_GPIO_INT_OUTPUT_SET,
gpio_port);
- /*
- * Module was plugged out.
+ /* Module was plugged out.
* Disable transmit for this module
*/
phy->media_type = ETH_PHY_NOT_PRESENT;
@@ -8554,8 +8417,7 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy,
DP(NETIF_MSG_LINK, "8706/8726 rx_sd 0x%x pcs_status 0x%x 1Gbps"
" link_status 0x%x\n", rx_sd, pcs_status, val2);
- /*
- * link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status
+ /* Link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status
* are set, or if the autoneg bit 1 is set
*/
link_up = ((rx_sd & pcs_status & 0x1) || (val2 & (1<<1)));
@@ -8669,8 +8531,7 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy,
}
bnx2x_save_bcm_spirom_ver(bp, phy, params->port);
- /*
- * If TX Laser is controlled by GPIO_0, do not let PHY go into low
+ /* If TX Laser is controlled by GPIO_0, do not let PHY go into low
* power mode, if TX Laser is disabled
*/
@@ -8780,8 +8641,7 @@ static int bnx2x_8726_config_init(struct bnx2x_phy *phy,
bnx2x_8726_external_rom_boot(phy, params);
- /*
- * Need to call module detected on initialization since the module
+ /* Need to call module detected on initialization since the module
* detection triggered by actual module insertion might occur before
* driver is loaded, and when driver is loaded, it reset all
* registers, including the transmitter
@@ -8818,8 +8678,7 @@ static int bnx2x_8726_config_init(struct bnx2x_phy *phy,
MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
bnx2x_cl45_write(bp, phy,
MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200);
- /*
- * Enable RX-ALARM control to receive interrupt for 1G speed
+ /* Enable RX-ALARM control to receive interrupt for 1G speed
* change
*/
bnx2x_cl45_write(bp, phy,
@@ -8920,8 +8779,7 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy,
struct link_params *params) {
u32 swap_val, swap_override;
u8 port;
- /*
- * The PHY reset is controlled by GPIO 1. Fake the port number
+ /* The PHY reset is controlled by GPIO 1. Fake the port number
* to cancel the swap done in set_gpio()
*/
struct bnx2x *bp = params->bp;
@@ -8959,14 +8817,12 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
bnx2x_cl45_write(bp, phy,
MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, lasi_ctrl_val);
- /*
- * Initially configure MOD_ABS to interrupt when module is
+ /* Initially configure MOD_ABS to interrupt when module is
* presence( bit 8)
*/
bnx2x_cl45_read(bp, phy,
MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs);
- /*
- * Set EDC off by setting OPTXLOS signal input to low (bit 9).
+ /* Set EDC off by setting OPTXLOS signal input to low (bit 9).
* When the EDC is off it locks onto a reference clock and avoids
* becoming 'lost'
*/
@@ -8987,8 +8843,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
if (phy->flags & FLAGS_NOC)
val |= (3<<5);
- /*
- * Set 8727 GPIOs to input to allow reading from the 8727 GPIO0
+ /* Set 8727 GPIOs to input to allow reading from the 8727 GPIO0
* status which reflect SFP+ module over-current
*/
if (!(phy->flags & FLAGS_NOC))
@@ -9014,8 +8869,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
bnx2x_cl45_read(bp, phy,
MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1);
DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1);
- /*
- * Power down the XAUI until link is up in case of dual-media
+ /* Power down the XAUI until link is up in case of dual-media
* and 1G
*/
if (DUAL_MEDIA(params)) {
@@ -9040,8 +8894,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
bnx2x_cl45_write(bp, phy,
MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300);
} else {
- /*
- * Since the 8727 has only single reset pin, need to set the 10G
+ /* Since the 8727 has only single reset pin, need to set the 10G
* registers although it is default
*/
bnx2x_cl45_write(bp, phy,
@@ -9056,8 +8909,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
0x0008);
}
- /*
- * Set 2-wire transfer rate of SFP+ module EEPROM
+ /* Set 2-wire transfer rate of SFP+ module EEPROM
* to 100Khz since some DACs(direct attached cables) do
* not work at 400Khz.
*/
@@ -9080,8 +8932,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,
phy->tx_preemphasis[1]);
}
- /*
- * If TX Laser is controlled by GPIO_0, do not let PHY go into low
+ /* If TX Laser is controlled by GPIO_0, do not let PHY go into low
* power mode, if TX Laser is disabled
*/
tx_en_mode = REG_RD(bp, params->shmem_base +
@@ -9121,8 +8972,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
DP(NETIF_MSG_LINK,
"MOD_ABS indication show module is absent\n");
phy->media_type = ETH_PHY_NOT_PRESENT;
- /*
- * 1. Set mod_abs to detect next module
+ /* 1. Set mod_abs to detect next module
* presence event
* 2. Set EDC off by setting OPTXLOS signal input to low
* (bit 9).
@@ -9136,8 +8986,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
MDIO_PMA_DEVAD,
MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);
- /*
- * Clear RX alarm since it stays up as long as
+ /* Clear RX alarm since it stays up as long as
* the mod_abs wasn't changed
*/
bnx2x_cl45_read(bp, phy,
@@ -9148,8 +8997,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
/* Module is present */
DP(NETIF_MSG_LINK,
"MOD_ABS indication show module is present\n");
- /*
- * First disable transmitter, and if the module is ok, the
+ /* First disable transmitter, and if the module is ok, the
* module_detection will enable it
* 1. Set mod_abs to detect next module absent event ( bit 8)
* 2. Restore the default polarity of the OPRXLOS signal and
@@ -9163,8 +9011,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
MDIO_PMA_DEVAD,
MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);
- /*
- * Clear RX alarm since it stays up as long as the mod_abs
+ /* Clear RX alarm since it stays up as long as the mod_abs
* wasn't changed. This is need to be done before calling the
* module detection, otherwise it will clear* the link update
* alarm
@@ -9225,8 +9072,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
bnx2x_cl45_read(bp, phy,
MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &val1);
- /*
- * If a module is present and there is need to check
+ /* If a module is present and there is need to check
* for over current
*/
if (!(phy->flags & FLAGS_NOC) && !(rx_alarm_status & (1<<5))) {
@@ -9292,8 +9138,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
MDIO_PMA_DEVAD,
MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &link_status);
- /*
- * Bits 0..2 --> speed detected,
+ /* Bits 0..2 --> speed detected,
* Bits 13..15--> link is down
*/
if ((link_status & (1<<2)) && (!(link_status & (1<<15)))) {
@@ -9336,8 +9181,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
bnx2x_cl45_read(bp, phy,
MDIO_PMA_DEVAD,
MDIO_PMA_REG_8727_PCS_GP, &val1);
- /*
- * In case of dual-media board and 1G, power up the XAUI side,
+ /* In case of dual-media board and 1G, power up the XAUI side,
* otherwise power it down. For 10G it is done automatically
*/
if (link_up)
@@ -9504,8 +9348,7 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
/* Save spirom version */
bnx2x_save_848xx_spirom_version(phy, bp, params->port);
}
- /*
- * This phy uses the NIG latch mechanism since link indication
+ /* This phy uses the NIG latch mechanism since link indication
* arrives through its LED4 and not via its LASI signal, so we
* get steady signal instead of clear on read
*/
@@ -9610,8 +9453,7 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
if (phy->req_duplex == DUPLEX_FULL)
autoneg_val |= (1<<8);
- /*
- * Always write this if this is not 84833.
+ /* Always write this if this is not 84833.
* For 84833, write it only when it's a forced speed.
*/
if ((phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) ||
@@ -9850,8 +9692,7 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy,
/* Wait for GPHY to come out of reset */
msleep(50);
if (phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) {
- /*
- * BCM84823 requires that XGXS links up first @ 10G for normal
+ /* BCM84823 requires that XGXS links up first @ 10G for normal
* behavior.
*/
u16 temp;
@@ -10327,8 +10168,7 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
break;
}
- /*
- * This is a workaround for E3+84833 until autoneg
+ /* This is a workaround for E3+84833 until autoneg
* restart is fixed in f/w
*/
if (CHIP_IS_E3(bp)) {
@@ -10352,8 +10192,7 @@ static int bnx2x_54618se_config_init(struct bnx2x_phy *phy,
DP(NETIF_MSG_LINK, "54618SE cfg init\n");
usleep_range(1000, 1000);
- /*
- * This works with E3 only, no need to check the chip
+ /* This works with E3 only, no need to check the chip
* before determining the port.
*/
port = params->port;
@@ -10375,7 +10214,7 @@ static int bnx2x_54618se_config_init(struct bnx2x_phy *phy,
MDIO_PMA_REG_CTRL, 0x8000);
bnx2x_wait_reset_complete(bp, phy, params);
- /*wait for GPHY to reset */
+ /* Wait for GPHY to reset */
msleep(50);
/* Configure LED4: set to INTR (0x6). */
@@ -10581,13 +10420,11 @@ static void bnx2x_54618se_link_reset(struct bnx2x_phy *phy,
u32 cfg_pin;
u8 port;
- /*
- * In case of no EPIO routed to reset the GPHY, put it
+ /* In case of no EPIO routed to reset the GPHY, put it
* in low power mode.
*/
bnx2x_cl22_write(bp, phy, MDIO_PMA_REG_CTRL, 0x800);
- /*
- * This works with E3 only, no need to check the chip
+ /* This works with E3 only, no need to check the chip
* before determining the port.
*/
port = params->port;
@@ -10696,7 +10533,7 @@ static u8 bnx2x_54618se_read_status(struct bnx2x_phy *phy,
bnx2x_ext_phy_resolve_fc(phy, params, vars);
if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
- /* report LP advertised speeds */
+ /* Report LP advertised speeds */
bnx2x_cl22_read(bp, phy, 0x5, &val);
if (val & (1<<5))
@@ -10761,8 +10598,7 @@ static void bnx2x_54618se_config_loopback(struct bnx2x_phy *phy,
/* This register opens the gate for the UMAC despite its name */
REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1);
- /*
- * Maximum Frame Length (RW). Defines a 14-Bit maximum frame
+ /* Maximum Frame Length (RW). Defines a 14-Bit maximum frame
* length used by the MAC receive logic to check frames.
*/
REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710);
@@ -11041,17 +10877,17 @@ static struct bnx2x_phy phy_warpcore = {
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.mdio_ctrl = 0,
.supported = (SUPPORTED_10baseT_Half |
- SUPPORTED_10baseT_Full |
- SUPPORTED_100baseT_Half |
- SUPPORTED_100baseT_Full |
- SUPPORTED_1000baseT_Full |
- SUPPORTED_10000baseT_Full |
- SUPPORTED_20000baseKR2_Full |
- SUPPORTED_20000baseMLD2_Full |
- SUPPORTED_FIBRE |
- SUPPORTED_Autoneg |
- SUPPORTED_Pause |
- SUPPORTED_Asym_Pause),
+ SUPPORTED_10baseT_Full |
+ SUPPORTED_100baseT_Half |
+ SUPPORTED_100baseT_Full |
+ SUPPORTED_1000baseT_Full |
+ SUPPORTED_10000baseT_Full |
+ SUPPORTED_20000baseKR2_Full |
+ SUPPORTED_20000baseMLD2_Full |
+ SUPPORTED_FIBRE |
+ SUPPORTED_Autoneg |
+ SUPPORTED_Pause |
+ SUPPORTED_Asym_Pause),
.media_type = ETH_PHY_UNSPECIFIED,
.ver_addr = 0,
.req_flow_ctrl = 0,
@@ -11405,9 +11241,8 @@ static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,
/* Get the 4 lanes xgxs config rx and tx */
u32 rx = 0, tx = 0, i;
for (i = 0; i < 2; i++) {
- /*
- * INT_PHY and EXT_PHY1 share the same value location in the
- * shmem. When num_phys is greater than 1, than this value
+ /* INT_PHY and EXT_PHY1 share the same value location in
+ * the shmem. When num_phys is greater than 1, than this value
* applies only to EXT_PHY1
*/
if (phy_index == INT_PHY || phy_index == EXT_PHY1) {
@@ -11485,8 +11320,7 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,
offsetof(struct shmem_region, dev_info.
port_hw_config[port].default_cfg)) &
PORT_HW_CFG_NET_SERDES_IF_MASK);
- /*
- * Set the appropriate supported and flags indications per
+ /* Set the appropriate supported and flags indications per
* interface type of the chip
*/
switch (serdes_net_if) {
@@ -11544,8 +11378,7 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,
break;
}
- /*
- * Enable MDC/MDIO work-around for E3 A0 since free running MDC
+ /* Enable MDC/MDIO work-around for E3 A0 since free running MDC
* was not set as expected. For B0, ECO will be enabled so there
* won't be an issue there
*/
@@ -11658,8 +11491,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,
phy->addr = XGXS_EXT_PHY_ADDR(ext_phy_config);
bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);
- /*
- * The shmem address of the phy version is located on different
+ /* The shmem address of the phy version is located on different
* structures. In case this structure is too old, do not set
* the address
*/
@@ -11693,8 +11525,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,
if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) &&
(phy->ver_addr)) {
- /*
- * Remove 100Mb link supported for BCM84833 when phy fw
+ /* Remove 100Mb link supported for BCM84833 when phy fw
* version lower than or equal to 1.39
*/
u32 raw_ver = REG_RD(bp, phy->ver_addr);
@@ -11704,8 +11535,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,
SUPPORTED_100baseT_Full);
}
- /*
- * In case mdc/mdio_access of the external phy is different than the
+ /* In case mdc/mdio_access of the external phy is different than the
* mdc/mdio access of the XGXS, a HW lock must be taken in each access
* to prevent one port interfere with another port's CL45 operations.
*/
@@ -11884,8 +11714,7 @@ int bnx2x_phy_probe(struct link_params *params)
dev_info.port_hw_config[params->port].media_type);
media_types = REG_RD(bp, sync_offset);
- /*
- * Update media type for non-PMF sync only for the first time
+ /* Update media type for non-PMF sync only for the first time
* In case the media type changes afterwards, it will be updated
* using the update_status function
*/
@@ -11959,8 +11788,7 @@ void bnx2x_init_xmac_loopback(struct link_params *params,
vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
vars->mac_type = MAC_TYPE_XMAC;
vars->phy_flags = PHY_XGXS_FLAG;
- /*
- * Set WC to loopback mode since link is required to provide clock
+ /* Set WC to loopback mode since link is required to provide clock
* to the XMAC in 20G mode
*/
bnx2x_set_aer_mmd(params, ¶ms->phy[0]);
@@ -12243,7 +12071,8 @@ static int bnx2x_8073_common_init_phy(struct bnx2x *bp,
NIG_MASK_MI_INT));
/* Need to take the phy out of low power mode in order
- to write to access its registers */
+ * to write to access its registers
+ */
bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
MISC_REGISTERS_GPIO_OUTPUT_HIGH,
port);
@@ -12291,8 +12120,7 @@ static int bnx2x_8073_common_init_phy(struct bnx2x *bp,
(val | 1<<10));
}
- /*
- * Toggle Transmitter: Power down and then up with 600ms delay
+ /* Toggle Transmitter: Power down and then up with 600ms delay
* between
*/
msleep(600);
@@ -12435,8 +12263,7 @@ static int bnx2x_8727_common_init_phy(struct bnx2x *bp,
reset_gpio = MISC_REGISTERS_GPIO_1;
port = 1;
- /*
- * Retrieve the reset gpio/port which control the reset.
+ /* Retrieve the reset gpio/port which control the reset.
* Default is GPIO1, PORT1
*/
bnx2x_get_ext_phy_reset_gpio(bp, shmem_base_path[0],
@@ -12611,8 +12438,7 @@ static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],
break;
case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:
- /*
- * GPIO1 affects both ports, so there's need to pull
+ /* GPIO1 affects both ports, so there's need to pull
* it for single port alone
*/
rc = bnx2x_8726_common_init_phy(bp, shmem_base_path,
@@ -12620,8 +12446,7 @@ static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],
phy_index, chip_id);
break;
case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833:
- /*
- * GPIO3's are linked, and so both need to be toggled
+ /* GPIO3's are linked, and so both need to be toggled
* to obtain required 2us pulse.
*/
rc = bnx2x_84833_common_init_phy(bp, shmem_base_path,
@@ -12735,8 +12560,7 @@ static void bnx2x_analyze_link_error(struct link_params *params,
DP(NETIF_MSG_LINK, "Link changed:%x %x->%x\n", vars->link_up,
half_open_conn, lss_status);
- /*
- * a. Update shmem->link_status accordingly
+ /* a. Update shmem->link_status accordingly
* b. Update link_vars->link_up
*/
if (lss_status) {
@@ -12747,8 +12571,7 @@ static void bnx2x_analyze_link_error(struct link_params *params,
/* activate nig drain */
REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1);
- /*
- * Set LED mode to off since the PHY doesn't know about these
+ /* Set LED mode to off since the PHY doesn't know about these
* errors
*/
led_mode = LED_MODE_OFF;
@@ -12800,8 +12623,7 @@ int bnx2x_check_half_open_conn(struct link_params *params,
(REG_RD(bp, MISC_REG_RESET_REG_2) &
(MISC_REGISTERS_RESET_REG_2_XMAC))) {
/* Check E3 XMAC */
- /*
- * Note that link speed cannot be queried here, since it may be
+ /* Note that link speed cannot be queried here, since it may be
* zero while link is down. In case UMAC is active, LSS will
* simply not be set
*/
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 8/10] bnx2x: change to the rss engine
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Dmitry Kravkov, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
From: Dmitry Kravkov <dmitry@broadcom.com>
This patch revises the way by which rss are configured, removing
an unnecessary module paramater and unrequired modes.
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 1 -
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 88 ++++++--------------
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 13 +++-
.../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 7 +-
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 10 +--
drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c | 6 --
drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h | 3 -
7 files changed, 42 insertions(+), 86 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index 5eecafd..b0803ba 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1375,7 +1375,6 @@ struct bnx2x {
#define BNX2X_STATE_DIAG 0xe000
#define BNX2X_STATE_ERROR 0xf000
- int multi_mode;
#define BNX2X_MAX_PRIORITY 8
#define BNX2X_MAX_ENTRIES_PER_PRI 16
#define BNX2X_MAX_COS 3
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index 98b82eb..5caba1f 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -1460,20 +1460,11 @@ u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));
}
+
void bnx2x_set_num_queues(struct bnx2x *bp)
{
- switch (bp->multi_mode) {
- case ETH_RSS_MODE_DISABLED:
- bp->num_queues = 1;
- break;
- case ETH_RSS_MODE_REGULAR:
- bp->num_queues = bnx2x_calc_num_queues(bp);
- break;
-
- default:
- bp->num_queues = 1;
- break;
- }
+ /* RSS queues */
+ bp->num_queues = bnx2x_calc_num_queues(bp);
#ifdef BCM_CNIC
/* override in STORAGE SD mode */
@@ -1572,16 +1563,13 @@ static inline int bnx2x_init_rss_pf(struct bnx2x *bp)
u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0};
u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);
- /*
- * Prepare the inital contents fo the indirection table if RSS is
+ /* Prepare the initial contents fo the indirection table if RSS is
* enabled
*/
- if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
- for (i = 0; i < sizeof(ind_table); i++)
- ind_table[i] =
- bp->fp->cl_id +
- ethtool_rxfh_indir_default(i, num_eth_queues);
- }
+ for (i = 0; i < sizeof(ind_table); i++)
+ ind_table[i] =
+ bp->fp->cl_id +
+ ethtool_rxfh_indir_default(i, num_eth_queues);
/*
* For 57710 and 57711 SEARCHER configuration (rss_keys) is
@@ -1591,11 +1579,12 @@ static inline int bnx2x_init_rss_pf(struct bnx2x *bp)
* For 57712 and newer on the other hand it's a per-function
* configuration.
*/
- return bnx2x_config_rss_pf(bp, ind_table,
- bp->port.pmf || !CHIP_IS_E1x(bp));
+ return bnx2x_config_rss_eth(bp, ind_table,
+ bp->port.pmf || !CHIP_IS_E1x(bp));
}
-int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)
+int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
+ u8 *ind_table, bool config_hash)
{
struct bnx2x_config_rss_params params = {NULL};
int i;
@@ -1607,52 +1596,29 @@ int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)
* bp->multi_mode = ETH_RSS_MODE_DISABLED;
*/
- params.rss_obj = &bp->rss_conf_obj;
+ params.rss_obj = rss_obj;
__set_bit(RAMROD_COMP_WAIT, ¶ms.ramrod_flags);
- /* RSS mode */
- switch (bp->multi_mode) {
- case ETH_RSS_MODE_DISABLED:
- __set_bit(BNX2X_RSS_MODE_DISABLED, ¶ms.rss_flags);
- break;
- case ETH_RSS_MODE_REGULAR:
- __set_bit(BNX2X_RSS_MODE_REGULAR, ¶ms.rss_flags);
- break;
- case ETH_RSS_MODE_VLAN_PRI:
- __set_bit(BNX2X_RSS_MODE_VLAN_PRI, ¶ms.rss_flags);
- break;
- case ETH_RSS_MODE_E1HOV_PRI:
- __set_bit(BNX2X_RSS_MODE_E1HOV_PRI, ¶ms.rss_flags);
- break;
- case ETH_RSS_MODE_IP_DSCP:
- __set_bit(BNX2X_RSS_MODE_IP_DSCP, ¶ms.rss_flags);
- break;
- default:
- BNX2X_ERR("Unknown multi_mode: %d\n", bp->multi_mode);
- return -EINVAL;
- }
+ __set_bit(BNX2X_RSS_MODE_REGULAR, ¶ms.rss_flags);
- /* If RSS is enabled */
- if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
- /* RSS configuration */
- __set_bit(BNX2X_RSS_IPV4, ¶ms.rss_flags);
- __set_bit(BNX2X_RSS_IPV4_TCP, ¶ms.rss_flags);
- __set_bit(BNX2X_RSS_IPV6, ¶ms.rss_flags);
- __set_bit(BNX2X_RSS_IPV6_TCP, ¶ms.rss_flags);
+ /* RSS configuration */
+ __set_bit(BNX2X_RSS_IPV4, ¶ms.rss_flags);
+ __set_bit(BNX2X_RSS_IPV4_TCP, ¶ms.rss_flags);
+ __set_bit(BNX2X_RSS_IPV6, ¶ms.rss_flags);
+ __set_bit(BNX2X_RSS_IPV6_TCP, ¶ms.rss_flags);
- /* Hash bits */
- params.rss_result_mask = MULTI_MASK;
+ /* Hash bits */
+ params.rss_result_mask = MULTI_MASK;
- memcpy(params.ind_table, ind_table, sizeof(params.ind_table));
+ memcpy(params.ind_table, ind_table, sizeof(params.ind_table));
- if (config_hash) {
- /* RSS keys */
- for (i = 0; i < sizeof(params.rss_key) / 4; i++)
- params.rss_key[i] = random32();
+ if (config_hash) {
+ /* RSS keys */
+ for (i = 0; i < sizeof(params.rss_key) / 4; i++)
+ params.rss_key[i] = random32();
- __set_bit(BNX2X_RSS_SET_SRCH, ¶ms.rss_flags);
- }
+ __set_bit(BNX2X_RSS_SET_SRCH, ¶ms.rss_flags);
}
return bnx2x_config_rss(bp, ¶ms);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
index 7f3cb81..0c3b2c5 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
@@ -86,13 +86,15 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode);
void bnx2x_send_unload_done(struct bnx2x *bp);
/**
- * bnx2x_config_rss_pf - configure RSS parameters.
+ * bnx2x_config_rss_pf - configure RSS parameters in a PF.
*
* @bp: driver handle
+ * @rss_obj RSS object to use
* @ind_table: indirection table to configure
* @config_hash: re-configure RSS hash keys configuration
*/
-int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash);
+int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
+ u8 *ind_table, bool config_hash);
/**
* bnx2x__init_func_obj - init function object
@@ -967,6 +969,13 @@ static inline int func_by_vn(struct bnx2x *bp, int vn)
return 2 * vn + BP_PORT(bp);
}
+static inline int bnx2x_config_rss_eth(struct bnx2x *bp, u8 *ind_table,
+ bool config_hash)
+{
+ return bnx2x_config_rss_pf(bp, &bp->rss_conf_obj, ind_table,
+ config_hash);
+}
+
/**
* bnx2x_func_start - init function
*
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
index 93b5fc4..3c7d0cc 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
@@ -2393,10 +2393,7 @@ static int bnx2x_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
static u32 bnx2x_get_rxfh_indir_size(struct net_device *dev)
{
- struct bnx2x *bp = netdev_priv(dev);
-
- return (bp->multi_mode == ETH_RSS_MODE_DISABLED ?
- 0 : T_ETH_INDIRECTION_TABLE_SIZE);
+ return T_ETH_INDIRECTION_TABLE_SIZE;
}
static int bnx2x_get_rxfh_indir(struct net_device *dev, u32 *indir)
@@ -2442,7 +2439,7 @@ static int bnx2x_set_rxfh_indir(struct net_device *dev, const u32 *indir)
ind_table[i] = indir[i] + bp->fp->cl_id;
}
- return bnx2x_config_rss_pf(bp, ind_table, false);
+ return bnx2x_config_rss_eth(bp, ind_table, false);
}
static const struct ethtool_ops bnx2x_ethtool_ops = {
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 9e03067..eb4fc787 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -91,15 +91,11 @@ MODULE_FIRMWARE(FW_FILE_NAME_E1);
MODULE_FIRMWARE(FW_FILE_NAME_E1H);
MODULE_FIRMWARE(FW_FILE_NAME_E2);
-static int multi_mode = 1;
-module_param(multi_mode, int, 0);
-MODULE_PARM_DESC(multi_mode, " Multi queue mode "
- "(0 Disable; 1 Enable (default))");
int num_queues;
module_param(num_queues, int, 0);
-MODULE_PARM_DESC(num_queues, " Number of queues for multi_mode=1"
- " (default is as a number of CPUs)");
+MODULE_PARM_DESC(num_queues,
+ " Set number of queues (default is as a number of CPUs)");
static int disable_tpa;
module_param(disable_tpa, int, 0);
@@ -9969,8 +9965,6 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
if (BP_NOMCP(bp) && (func == 0))
dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n");
- bp->multi_mode = multi_mode;
-
bp->disable_tpa = disable_tpa;
#ifdef BCM_CNIC
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
index 3f52fad..fc6dc30 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
@@ -4090,12 +4090,6 @@ static int bnx2x_setup_rss(struct bnx2x *bp,
rss_mode = ETH_RSS_MODE_DISABLED;
else if (test_bit(BNX2X_RSS_MODE_REGULAR, &p->rss_flags))
rss_mode = ETH_RSS_MODE_REGULAR;
- else if (test_bit(BNX2X_RSS_MODE_VLAN_PRI, &p->rss_flags))
- rss_mode = ETH_RSS_MODE_VLAN_PRI;
- else if (test_bit(BNX2X_RSS_MODE_E1HOV_PRI, &p->rss_flags))
- rss_mode = ETH_RSS_MODE_E1HOV_PRI;
- else if (test_bit(BNX2X_RSS_MODE_IP_DSCP, &p->rss_flags))
- rss_mode = ETH_RSS_MODE_IP_DSCP;
data->rss_mode = rss_mode;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
index 61a7670..dee2f37 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
@@ -685,9 +685,6 @@ enum {
/* RSS_MODE bits are mutually exclusive */
BNX2X_RSS_MODE_DISABLED,
BNX2X_RSS_MODE_REGULAR,
- BNX2X_RSS_MODE_VLAN_PRI,
- BNX2X_RSS_MODE_E1HOV_PRI,
- BNX2X_RSS_MODE_IP_DSCP,
BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 10/10] bnx2x: Change to driver version 1.72.10-0
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index b0803ba..6627a5e 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -23,8 +23,8 @@
* (you will need to reboot afterwards) */
/* #define BNX2X_STOP_ON_ERROR */
-#define DRV_MODULE_VERSION "1.72.10-0"
-#define DRV_MODULE_RELDATE "2012/02/20"
+#define DRV_MODULE_VERSION "1.72.17-0"
+#define DRV_MODULE_RELDATE "2012/04/02"
#define BNX2X_BC_VER 0x040200
#if defined(CONFIG_DCB)
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 7/10] bnx2x: congestion management re-organization
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
The congestion management code has migrated into a common location,
allowing all fw writes controlling mf congestion to be made in a
single function in the code. This is a semantic change.
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 8 +-
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 32 +++-
drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h | 92 ++++++----
drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h | 217 +++++++++++++++++++++-
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 147 +++------------
5 files changed, 332 insertions(+), 164 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index 054ec9e..5eecafd 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -30,6 +30,10 @@
#if defined(CONFIG_DCB)
#define BCM_DCBNL
#endif
+
+
+#include "bnx2x_hsi.h"
+
#if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE)
#define BCM_CNIC 1
#include "../cnic_if.h"
@@ -1329,8 +1333,8 @@ struct bnx2x {
struct bnx2x_common common;
struct bnx2x_port port;
- struct cmng_struct_per_port cmng;
- u32 vn_weight_sum;
+ struct cmng_init cmng;
+
u32 mf_config[E1HVN_MAX];
u32 mf2_config[E2_FUNC_MAX];
u32 path_has_ovlan; /* E3 */
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
index b0d0c69..7f3cb81 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
@@ -961,6 +961,12 @@ static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp,
/************************* Init ******************************************/
+/* returns func by VN for current port */
+static inline int func_by_vn(struct bnx2x *bp, int vn)
+{
+ return 2 * vn + BP_PORT(bp);
+}
+
/**
* bnx2x_func_start - init function
*
@@ -1416,15 +1422,32 @@ static inline void storm_memset_func_cfg(struct bnx2x *bp,
}
static inline void storm_memset_cmng(struct bnx2x *bp,
- struct cmng_struct_per_port *cmng,
+ struct cmng_init *cmng,
u8 port)
{
+ int vn;
size_t size = sizeof(struct cmng_struct_per_port);
u32 addr = BAR_XSTRORM_INTMEM +
XSTORM_CMNG_PER_PORT_VARS_OFFSET(port);
- __storm_memset_struct(bp, addr, size, (u32 *)cmng);
+ __storm_memset_struct(bp, addr, size, (u32 *)&cmng->port);
+
+ for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) {
+ int func = func_by_vn(bp, vn);
+
+ addr = BAR_XSTRORM_INTMEM +
+ XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func);
+ size = sizeof(struct rate_shaping_vars_per_vn);
+ __storm_memset_struct(bp, addr, size,
+ (u32 *)&cmng->vnic.vnic_max_rate[vn]);
+
+ addr = BAR_XSTRORM_INTMEM +
+ XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func);
+ size = sizeof(struct fairness_vars_per_vn);
+ __storm_memset_struct(bp, addr, size,
+ (u32 *)&cmng->vnic.vnic_min_rate[vn]);
+ }
}
/**
@@ -1605,11 +1628,6 @@ static inline void bnx2x_bz_fp(struct bnx2x *bp, int index)
*/
void bnx2x_get_iscsi_info(struct bnx2x *bp);
#endif
-/* returns func by VN for current port */
-static inline int func_by_vn(struct bnx2x *bp, int vn)
-{
- return 2 * vn + BP_PORT(bp);
-}
/**
* bnx2x_link_sync_notify - send notification to other functions.
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
index 5d71b7d..6468da6 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
@@ -4445,6 +4445,65 @@ struct cmng_struct_per_port {
struct cmng_flags_per_port flags;
};
+/*
+ * a single rate shaping counter. can be used as protocol or vnic counter
+ */
+struct rate_shaping_counter {
+ u32 quota;
+#if defined(__BIG_ENDIAN)
+ u16 __reserved0;
+ u16 rate;
+#elif defined(__LITTLE_ENDIAN)
+ u16 rate;
+ u16 __reserved0;
+#endif
+};
+
+/*
+ * per-vnic rate shaping variables
+ */
+struct rate_shaping_vars_per_vn {
+ struct rate_shaping_counter vn_counter;
+};
+
+/*
+ * per-vnic fairness variables
+ */
+struct fairness_vars_per_vn {
+ u32 cos_credit_delta[MAX_COS_NUMBER];
+ u32 vn_credit_delta;
+ u32 __reserved0;
+};
+
+/*
+ * cmng port init state
+ */
+struct cmng_vnic {
+ struct rate_shaping_vars_per_vn vnic_max_rate[4];
+ struct fairness_vars_per_vn vnic_min_rate[4];
+};
+
+/*
+ * cmng port init state
+ */
+struct cmng_init {
+ struct cmng_struct_per_port port;
+ struct cmng_vnic vnic;
+};
+
+
+/*
+ * driver parameters for congestion management init, all rates are in Mbps
+ */
+struct cmng_init_input {
+ u32 port_rate;
+ u16 vnic_min_rate[4];
+ u16 vnic_max_rate[4];
+ u16 cos_min_rate[MAX_COS_NUMBER];
+ u16 cos_to_pause_mask[MAX_COS_NUMBER];
+ struct cmng_flags_per_port flags;
+};
+
/*
* Protocol-common command ID for slow path elements
@@ -4760,16 +4819,6 @@ enum fairness_mode {
/*
- * per-vnic fairness variables
- */
-struct fairness_vars_per_vn {
- u32 cos_credit_delta[MAX_COS_NUMBER];
- u32 vn_credit_delta;
- u32 __reserved0;
-};
-
-
-/*
* Priority and cos
*/
struct priority_cos {
@@ -5137,29 +5186,6 @@ struct protocol_common_spe {
/*
- * a single rate shaping counter. can be used as protocol or vnic counter
- */
-struct rate_shaping_counter {
- u32 quota;
-#if defined(__BIG_ENDIAN)
- u16 __reserved0;
- u16 rate;
-#elif defined(__LITTLE_ENDIAN)
- u16 rate;
- u16 __reserved0;
-#endif
-};
-
-
-/*
- * per-vnic rate shaping variables
- */
-struct rate_shaping_vars_per_vn {
- struct rate_shaping_counter vn_counter;
-};
-
-
-/*
* The send queue element
*/
struct slow_path_element {
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
index 29f5c3c..e6bb9f4 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
@@ -241,7 +241,8 @@ static inline void bnx2x_map_q_cos(struct bnx2x *bp, u32 q_num, u32 new_cos)
REG_WR(bp, reg_addr, reg_bit_map | q_bit_map);
/* set/clear queue bit in command-queue bit map
- (E2/E3A0 only, valid COS values are 0/1) */
+ * (E2/E3A0 only, valid COS values are 0/1)
+ */
if (!(INIT_MODE_FLAGS(bp) & MODE_E3_B0)) {
reg_addr = BNX2X_Q_CMDQ_REG_ADDR(pf_q_num);
reg_bit_map = REG_RD(bp, reg_addr);
@@ -277,7 +278,215 @@ static inline void bnx2x_dcb_config_qm(struct bnx2x *bp, enum cos_mode mode,
}
-/* Returns the index of start or end of a specific block stage in ops array*/
+/* congestion managment port init api description
+ * the api works as follows:
+ * the driver should pass the cmng_init_input struct, the port_init function
+ * will prepare the required internal ram structure which will be passed back
+ * to the driver (cmng_init) that will write it into the internal ram.
+ *
+ * IMPORTANT REMARKS:
+ * 1. the cmng_init struct does not represent the contiguous internal ram
+ * structure. the driver should use the XSTORM_CMNG_PERPORT_VARS_OFFSET
+ * offset in order to write the port sub struct and the
+ * PFID_FROM_PORT_AND_VNIC offset for writing the vnic sub struct (in other
+ * words - don't use memcpy!).
+ * 2. although the cmng_init struct is filled for the maximal vnic number
+ * possible, the driver should only write the valid vnics into the internal
+ * ram according to the appropriate port mode.
+ */
+#define BITS_TO_BYTES(x) ((x)/8)
+
+/* CMNG constants, as derived from system spec calculations */
+
+/* default MIN rate in case VNIC min rate is configured to zero- 100Mbps */
+#define DEF_MIN_RATE 100
+
+/* resolution of the rate shaping timer - 400 usec */
+#define RS_PERIODIC_TIMEOUT_USEC 400
+
+/* number of bytes in single QM arbitration cycle -
+ * coefficient for calculating the fairness timer
+ */
+#define QM_ARB_BYTES 160000
+
+/* resolution of Min algorithm 1:100 */
+#define MIN_RES 100
+
+/* how many bytes above threshold for
+ * the minimal credit of Min algorithm
+ */
+#define MIN_ABOVE_THRESH 32768
+
+/* Fairness algorithm integration time coefficient -
+ * for calculating the actual Tfair
+ */
+#define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES)
+
+/* Memory of fairness algorithm - 2 cycles */
+#define FAIR_MEM 2
+#define SAFC_TIMEOUT_USEC 52
+
+#define SDM_TICKS 4
+
+
+static inline void bnx2x_init_max(const struct cmng_init_input *input_data,
+ u32 r_param, struct cmng_init *ram_data)
+{
+ u32 vnic;
+ struct cmng_vnic *vdata = &ram_data->vnic;
+ struct cmng_struct_per_port *pdata = &ram_data->port;
+ /* rate shaping per-port variables
+ * 100 micro seconds in SDM ticks = 25
+ * since each tick is 4 microSeconds
+ */
+
+ pdata->rs_vars.rs_periodic_timeout =
+ RS_PERIODIC_TIMEOUT_USEC / SDM_TICKS;
+
+ /* this is the threshold below which no timer arming will occur.
+ * 1.25 coefficient is for the threshold to be a little bigger
+ * then the real time to compensate for timer in-accuracy
+ */
+ pdata->rs_vars.rs_threshold =
+ (5 * RS_PERIODIC_TIMEOUT_USEC * r_param)/4;
+
+ /* rate shaping per-vnic variables */
+ for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {
+ /* global vnic counter */
+ vdata->vnic_max_rate[vnic].vn_counter.rate =
+ input_data->vnic_max_rate[vnic];
+ /* maximal Mbps for this vnic
+ * the quota in each timer period - number of bytes
+ * transmitted in this period
+ */
+ vdata->vnic_max_rate[vnic].vn_counter.quota =
+ RS_PERIODIC_TIMEOUT_USEC *
+ (u32)vdata->vnic_max_rate[vnic].vn_counter.rate / 8;
+ }
+
+}
+
+static inline void bnx2x_init_min(const struct cmng_init_input *input_data,
+ u32 r_param, struct cmng_init *ram_data)
+{
+ u32 vnic, fair_periodic_timeout_usec, vnicWeightSum, tFair;
+ struct cmng_vnic *vdata = &ram_data->vnic;
+ struct cmng_struct_per_port *pdata = &ram_data->port;
+
+ /* this is the resolution of the fairness timer */
+ fair_periodic_timeout_usec = QM_ARB_BYTES / r_param;
+
+ /* fairness per-port variables
+ * for 10G it is 1000usec. for 1G it is 10000usec.
+ */
+ tFair = T_FAIR_COEF / input_data->port_rate;
+
+ /* this is the threshold below which we won't arm the timer anymore */
+ pdata->fair_vars.fair_threshold = QM_ARB_BYTES;
+
+ /* we multiply by 1e3/8 to get bytes/msec. We don't want the credits
+ * to pass a credit of the T_FAIR*FAIR_MEM (algorithm resolution)
+ */
+ pdata->fair_vars.upper_bound = r_param * tFair * FAIR_MEM;
+
+ /* since each tick is 4 microSeconds */
+ pdata->fair_vars.fairness_timeout =
+ fair_periodic_timeout_usec / SDM_TICKS;
+
+ /* calculate sum of weights */
+ vnicWeightSum = 0;
+
+ for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++)
+ vnicWeightSum += input_data->vnic_min_rate[vnic];
+
+ /* global vnic counter */
+ if (vnicWeightSum > 0) {
+ /* fairness per-vnic variables */
+ for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {
+ /* this is the credit for each period of the fairness
+ * algorithm - number of bytes in T_FAIR (this vnic
+ * share of the port rate)
+ */
+ vdata->vnic_min_rate[vnic].vn_credit_delta =
+ (u32)input_data->vnic_min_rate[vnic] * 100 *
+ T_FAIR_COEF / (8 * 100 * vnicWeightSum);
+ if (vdata->vnic_min_rate[vnic].vn_credit_delta <
+ pdata->fair_vars.fair_threshold +
+ MIN_ABOVE_THRESH) {
+ vdata->vnic_min_rate[vnic].vn_credit_delta =
+ pdata->fair_vars.fair_threshold +
+ MIN_ABOVE_THRESH;
+ }
+ }
+ }
+}
+
+static inline void bnx2x_init_fw_wrr(const struct cmng_init_input *input_data,
+ u32 r_param, struct cmng_init *ram_data)
+{
+ u32 vnic, cos;
+ u32 cosWeightSum = 0;
+ struct cmng_vnic *vdata = &ram_data->vnic;
+ struct cmng_struct_per_port *pdata = &ram_data->port;
+
+ for (cos = 0; cos < MAX_COS_NUMBER; cos++)
+ cosWeightSum += input_data->cos_min_rate[cos];
+
+ if (cosWeightSum > 0) {
+
+ for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {
+ /* Since cos and vnic shouldn't work together the rate
+ * to divide between the coses is the port rate.
+ */
+ u32 *ccd = vdata->vnic_min_rate[vnic].cos_credit_delta;
+ for (cos = 0; cos < MAX_COS_NUMBER; cos++) {
+ /* this is the credit for each period of
+ * the fairness algorithm - number of bytes
+ * in T_FAIR (this cos share of the vnic rate)
+ */
+ ccd[cos] =
+ (u32)input_data->cos_min_rate[cos] * 100 *
+ T_FAIR_COEF / (8 * 100 * cosWeightSum);
+ if (ccd[cos] < pdata->fair_vars.fair_threshold
+ + MIN_ABOVE_THRESH) {
+ ccd[cos] =
+ pdata->fair_vars.fair_threshold +
+ MIN_ABOVE_THRESH;
+ }
+ }
+ }
+ }
+}
+
+static inline void bnx2x_init_safc(const struct cmng_init_input *input_data,
+ struct cmng_init *ram_data)
+{
+ /* in microSeconds */
+ ram_data->port.safc_vars.safc_timeout_usec = SAFC_TIMEOUT_USEC;
+}
+
+/* Congestion management port init */
+static inline void bnx2x_init_cmng(const struct cmng_init_input *input_data,
+ struct cmng_init *ram_data)
+{
+ u32 r_param;
+ memset(ram_data, 0, sizeof(struct cmng_init));
+
+ ram_data->port.flags = input_data->flags;
+
+ /* number of bytes transmitted in a rate of 10Gbps
+ * in one usec = 1.25KB.
+ */
+ r_param = BITS_TO_BYTES(input_data->port_rate);
+ bnx2x_init_max(input_data, r_param, ram_data);
+ bnx2x_init_min(input_data, r_param, ram_data);
+ bnx2x_init_fw_wrr(input_data, r_param, ram_data);
+ bnx2x_init_safc(input_data, ram_data);
+}
+
+
+
+/* Returns the index of start or end of a specific block stage in ops array */
#define BLOCK_OPS_IDX(block, stage, end) \
(2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end))
@@ -499,9 +708,7 @@ static inline void bnx2x_disable_blocks_parity(struct bnx2x *bp)
bnx2x_set_mcp_parity(bp, false);
}
-/**
- * Clear the parity error status registers.
- */
+/* Clear the parity error status registers. */
static inline void bnx2x_clear_blocks_parity(struct bnx2x *bp)
{
int i;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index faf12d0..9e03067 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -2155,40 +2155,6 @@ u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes)
return rc;
}
-static void bnx2x_init_port_minmax(struct bnx2x *bp)
-{
- u32 r_param = bp->link_vars.line_speed / 8;
- u32 fair_periodic_timeout_usec;
- u32 t_fair;
-
- memset(&(bp->cmng.rs_vars), 0,
- sizeof(struct rate_shaping_vars_per_port));
- memset(&(bp->cmng.fair_vars), 0, sizeof(struct fairness_vars_per_port));
-
- /* 100 usec in SDM ticks = 25 since each tick is 4 usec */
- bp->cmng.rs_vars.rs_periodic_timeout = RS_PERIODIC_TIMEOUT_USEC / 4;
-
- /* this is the threshold below which no timer arming will occur
- 1.25 coefficient is for the threshold to be a little bigger
- than the real time, to compensate for timer in-accuracy */
- bp->cmng.rs_vars.rs_threshold =
- (RS_PERIODIC_TIMEOUT_USEC * r_param * 5) / 4;
-
- /* resolution of fairness timer */
- fair_periodic_timeout_usec = QM_ARB_BYTES / r_param;
- /* for 10G it is 1000usec. for 1G it is 10000usec. */
- t_fair = T_FAIR_COEF / bp->link_vars.line_speed;
-
- /* this is the threshold below which we won't arm the timer anymore */
- bp->cmng.fair_vars.fair_threshold = QM_ARB_BYTES;
-
- /* we multiply by 1e3/8 to get bytes/msec.
- We don't want the credits to pass a credit
- of the t_fair*FAIR_MEM (algorithm resolution) */
- bp->cmng.fair_vars.upper_bound = r_param * t_fair * FAIR_MEM;
- /* since each tick is 4 usec */
- bp->cmng.fair_vars.fairness_timeout = fair_periodic_timeout_usec / 4;
-}
/* Calculates the sum of vn_min_rates.
It's needed for further normalizing of the min_rates.
@@ -2199,12 +2165,12 @@ static void bnx2x_init_port_minmax(struct bnx2x *bp)
In the later case fainess algorithm should be deactivated.
If not all min_rates are zero then those that are zeroes will be set to 1.
*/
-static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp)
+static void bnx2x_calc_vn_min(struct bnx2x *bp,
+ struct cmng_init_input *input)
{
int all_zero = 1;
int vn;
- bp->vn_weight_sum = 0;
for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) {
u32 vn_cfg = bp->mf_config[vn];
u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >>
@@ -2212,106 +2178,56 @@ static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp)
/* Skip hidden vns */
if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE)
- continue;
-
+ vn_min_rate = 0;
/* If min rate is zero - set it to 1 */
- if (!vn_min_rate)
+ else if (!vn_min_rate)
vn_min_rate = DEF_MIN_RATE;
else
all_zero = 0;
- bp->vn_weight_sum += vn_min_rate;
+ input->vnic_min_rate[vn] = vn_min_rate;
}
/* if ETS or all min rates are zeros - disable fairness */
if (BNX2X_IS_ETS_ENABLED(bp)) {
- bp->cmng.flags.cmng_enables &=
+ input->flags.cmng_enables &=
~CMNG_FLAGS_PER_PORT_FAIRNESS_VN;
DP(NETIF_MSG_IFUP, "Fairness will be disabled due to ETS\n");
} else if (all_zero) {
- bp->cmng.flags.cmng_enables &=
+ input->flags.cmng_enables &=
~CMNG_FLAGS_PER_PORT_FAIRNESS_VN;
- DP(NETIF_MSG_IFUP, "All MIN values are zeroes"
- " fairness will be disabled\n");
+ DP(NETIF_MSG_IFUP,
+ "All MIN values are zeroes fairness will be disabled\n");
} else
- bp->cmng.flags.cmng_enables |=
+ input->flags.cmng_enables |=
CMNG_FLAGS_PER_PORT_FAIRNESS_VN;
}
-static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn)
+static void bnx2x_calc_vn_max(struct bnx2x *bp, int vn,
+ struct cmng_init_input *input)
{
- struct rate_shaping_vars_per_vn m_rs_vn;
- struct fairness_vars_per_vn m_fair_vn;
+ u16 vn_max_rate;
u32 vn_cfg = bp->mf_config[vn];
- int func = func_by_vn(bp, vn);
- u16 vn_min_rate, vn_max_rate;
- int i;
- /* If function is hidden - set min and max to zeroes */
- if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE) {
- vn_min_rate = 0;
+ if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE)
vn_max_rate = 0;
-
- } else {
+ else {
u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg);
- vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >>
- FUNC_MF_CFG_MIN_BW_SHIFT) * 100;
- /* If fairness is enabled (not all min rates are zeroes) and
- if current min rate is zero - set it to 1.
- This is a requirement of the algorithm. */
- if (bp->vn_weight_sum && (vn_min_rate == 0))
- vn_min_rate = DEF_MIN_RATE;
-
- if (IS_MF_SI(bp))
+ if (IS_MF_SI(bp)) {
/* maxCfg in percents of linkspeed */
vn_max_rate = (bp->link_vars.line_speed * maxCfg) / 100;
- else
+ } else /* SD modes */
/* maxCfg is absolute in 100Mb units */
vn_max_rate = maxCfg * 100;
}
- DP(NETIF_MSG_IFUP,
- "func %d: vn_min_rate %d vn_max_rate %d vn_weight_sum %d\n",
- func, vn_min_rate, vn_max_rate, bp->vn_weight_sum);
-
- memset(&m_rs_vn, 0, sizeof(struct rate_shaping_vars_per_vn));
- memset(&m_fair_vn, 0, sizeof(struct fairness_vars_per_vn));
-
- /* global vn counter - maximal Mbps for this vn */
- m_rs_vn.vn_counter.rate = vn_max_rate;
-
- /* quota - number of bytes transmitted in this period */
- m_rs_vn.vn_counter.quota =
- (vn_max_rate * RS_PERIODIC_TIMEOUT_USEC) / 8;
-
- if (bp->vn_weight_sum) {
- /* credit for each period of the fairness algorithm:
- number of bytes in T_FAIR (the vn share the port rate).
- vn_weight_sum should not be larger than 10000, thus
- T_FAIR_COEF / (8 * vn_weight_sum) will always be greater
- than zero */
- m_fair_vn.vn_credit_delta =
- max_t(u32, (vn_min_rate * (T_FAIR_COEF /
- (8 * bp->vn_weight_sum))),
- (bp->cmng.fair_vars.fair_threshold +
- MIN_ABOVE_THRESH));
- DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n",
- m_fair_vn.vn_credit_delta);
- }
-
- /* Store it to internal memory */
- for (i = 0; i < sizeof(struct rate_shaping_vars_per_vn)/4; i++)
- REG_WR(bp, BAR_XSTRORM_INTMEM +
- XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func) + i * 4,
- ((u32 *)(&m_rs_vn))[i]);
-
- for (i = 0; i < sizeof(struct fairness_vars_per_vn)/4; i++)
- REG_WR(bp, BAR_XSTRORM_INTMEM +
- XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func) + i * 4,
- ((u32 *)(&m_fair_vn))[i]);
+ DP(NETIF_MSG_IFUP, "vn %d: vn_max_rate %d\n", vn, vn_max_rate);
+
+ input->vnic_max_rate[vn] = vn_max_rate;
}
+
static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp)
{
if (CHIP_REV_IS_SLOW(bp))
@@ -2353,34 +2269,31 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp)
static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type)
{
+ struct cmng_init_input input;
+ memset(&input, 0, sizeof(struct cmng_init_input));
+
+ input.port_rate = bp->link_vars.line_speed;
if (cmng_type == CMNG_FNS_MINMAX) {
int vn;
- /* clear cmng_enables */
- bp->cmng.flags.cmng_enables = 0;
-
/* read mf conf from shmem */
if (read_cfg)
bnx2x_read_mf_cfg(bp);
- /* Init rate shaping and fairness contexts */
- bnx2x_init_port_minmax(bp);
-
/* vn_weight_sum and enable fairness if not 0 */
- bnx2x_calc_vn_weight_sum(bp);
+ bnx2x_calc_vn_min(bp, &input);
/* calculate and set min-max rate for each vn */
if (bp->port.pmf)
for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++)
- bnx2x_init_vn_minmax(bp, vn);
+ bnx2x_calc_vn_max(bp, vn, &input);
/* always enable rate shaping and fairness */
- bp->cmng.flags.cmng_enables |=
+ input.flags.cmng_enables |=
CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN;
- if (!bp->vn_weight_sum)
- DP(NETIF_MSG_IFUP, "All MIN values are zeroes"
- " fairness will be disabled\n");
+
+ bnx2x_init_cmng(&input, &bp->cmng);
return;
}
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 6/10] bnx2x: Added support for a new device - 57811
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Barak Witkowski, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
From: Barak Witkowski <barak@broadcom.com>
Notice this patch includes lines with over 80 characters, as to not
break strings.
Signed-off-by: Barak Witkowski <barak@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 6 ++++
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 30 +++++++++++++++++++--
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h | 5 +++
3 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index ae0dcd4..054ec9e 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -815,6 +815,8 @@ struct bnx2x_common {
#define CHIP_NUM_57800_MF 0x16a5
#define CHIP_NUM_57810 0x168e
#define CHIP_NUM_57810_MF 0x16ae
+#define CHIP_NUM_57811 0x163d
+#define CHIP_NUM_57811_MF 0x163e
#define CHIP_NUM_57840 0x168d
#define CHIP_NUM_57840_MF 0x16ab
#define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710)
@@ -826,6 +828,8 @@ struct bnx2x_common {
#define CHIP_IS_57800_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_MF)
#define CHIP_IS_57810(bp) (CHIP_NUM(bp) == CHIP_NUM_57810)
#define CHIP_IS_57810_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_MF)
+#define CHIP_IS_57811(bp) (CHIP_NUM(bp) == CHIP_NUM_57811)
+#define CHIP_IS_57811_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57811_MF)
#define CHIP_IS_57840(bp) (CHIP_NUM(bp) == CHIP_NUM_57840)
#define CHIP_IS_57840_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_MF)
#define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \
@@ -836,6 +840,8 @@ struct bnx2x_common {
CHIP_IS_57800_MF(bp) || \
CHIP_IS_57810(bp) || \
CHIP_IS_57810_MF(bp) || \
+ CHIP_IS_57811(bp) || \
+ CHIP_IS_57811_MF(bp) || \
CHIP_IS_57840(bp) || \
CHIP_IS_57840_MF(bp))
#define CHIP_IS_E1x(bp) (CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp)))
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index c5f85ad..faf12d0 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -139,7 +139,9 @@ enum bnx2x_board_type {
BCM57810,
BCM57810_MF,
BCM57840,
- BCM57840_MF
+ BCM57840_MF,
+ BCM57811,
+ BCM57811_MF
};
/* indexed by board_type, above */
@@ -156,8 +158,9 @@ static struct {
{ "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet" },
{ "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet Multi Function" },
{ "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet" },
- { "Broadcom NetXtreme II BCM57840 10/20 Gigabit "
- "Ethernet Multi Function"}
+ { "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet Multi Function"},
+ { "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet"},
+ { "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet Multi Function"},
};
#ifndef PCI_DEVICE_ID_NX2_57710
@@ -193,6 +196,12 @@ static struct {
#ifndef PCI_DEVICE_ID_NX2_57840_MF
#define PCI_DEVICE_ID_NX2_57840_MF CHIP_NUM_57840_MF
#endif
+#ifndef PCI_DEVICE_ID_NX2_57811
+#define PCI_DEVICE_ID_NX2_57811 CHIP_NUM_57811
+#endif
+#ifndef PCI_DEVICE_ID_NX2_57811_MF
+#define PCI_DEVICE_ID_NX2_57811_MF CHIP_NUM_57811_MF
+#endif
static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = {
{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57710), BCM57710 },
{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57711), BCM57711 },
@@ -205,6 +214,8 @@ static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = {
{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57810_MF), BCM57810_MF },
{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840), BCM57840 },
{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840_MF), BCM57840_MF },
+ { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811), BCM57811 },
+ { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811_MF), BCM57811_MF },
{ 0 }
};
@@ -8859,6 +8870,17 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
id |= (val & 0xf);
bp->common.chip_id = id;
+ /* force 57811 according to MISC register */
+ if (REG_RD(bp, MISC_REG_CHIP_TYPE) & MISC_REG_CHIP_TYPE_57811_MASK) {
+ if (CHIP_IS_57810(bp))
+ bp->common.chip_id = (CHIP_NUM_57811 << 16) |
+ (bp->common.chip_id & 0x0000FFFF);
+ else if (CHIP_IS_57810_MF(bp))
+ bp->common.chip_id = (CHIP_NUM_57811_MF << 16) |
+ (bp->common.chip_id & 0x0000FFFF);
+ bp->common.chip_id |= 0x1;
+ }
+
/* Set doorbell size */
bp->db_size = (1 << BNX2X_DB_SHIFT);
@@ -10975,6 +10997,8 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
case BCM57810_MF:
case BCM57840:
case BCM57840_MF:
+ case BCM57811:
+ case BCM57811_MF:
max_cos_est = BNX2X_MULTI_TX_COS_E3B0;
break;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
index fd7fb45..2db0380 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
@@ -1482,6 +1482,11 @@
starts at 0x0 for the A0 tape-out and increments by one for each
all-layer tape-out. */
#define MISC_REG_CHIP_REV 0xa40c
+/* [R 14] otp_misc_do[100:0] spare bits collection: 13:11-
+ * otp_misc_do[100:98]; 10:7 - otp_misc_do[87:84]; 6:3 - otp_misc_do[75:72];
+ * 2:1 - otp_misc_do[51:50]; 0 - otp_misc_do[1]. */
+#define MISC_REG_CHIP_TYPE 0xac60
+#define MISC_REG_CHIP_TYPE_57811_MASK (1<<1)
/* [RW 32] The following driver registers(1...16) represent 16 drivers and
32 clients. Each client can be controlled by one driver only. One in each
bit represent that this driver control the appropriate client (Ex: bit 5
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 5/10] bnx2x: Add remote-fault link detection
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yaniv Rosner, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
From: Yaniv Rosner <yaniv.rosner@broadcom.com>
Restore remote-faule detection, which periodically checks for
remote-fault on the MAC layer. In case physical link appear to be
up but fault is set, it will provide a link down indication, and
when the fault is cleared, it will indicate link up again.
Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | 69 ++++++++++++++++------
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h | 3 +
2 files changed, 53 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index beb4cdb..4df6199 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -6440,7 +6440,6 @@ static int bnx2x_link_initialize(struct link_params *params,
NIG_STATUS_XGXS0_LINK_STATUS |
NIG_STATUS_SERDES0_LINK_STATUS |
NIG_MASK_MI_INT));
- bnx2x_update_mng(params, vars->link_status);
return rc;
}
@@ -6525,7 +6524,7 @@ static int bnx2x_update_link_up(struct link_params *params,
u8 link_10g)
{
struct bnx2x *bp = params->bp;
- u8 port = params->port;
+ u8 phy_idx, port = params->port;
int rc = 0;
vars->link_status |= (LINK_STATUS_LINK_UP |
@@ -6589,6 +6588,14 @@ static int bnx2x_update_link_up(struct link_params *params,
/* update shared memory */
bnx2x_update_mng(params, vars->link_status);
+
+ /* Check remote fault */
+ for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) {
+ if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) {
+ bnx2x_check_half_open_conn(params, vars, 0);
+ break;
+ }
+ }
msleep(20);
return rc;
}
@@ -11028,7 +11035,8 @@ static struct bnx2x_phy phy_warpcore = {
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT,
.addr = 0xff,
.def_md_devad = 0,
- .flags = FLAGS_HW_LOCK_REQUIRED,
+ .flags = (FLAGS_HW_LOCK_REQUIRED |
+ FLAGS_TX_ERROR_CHECK),
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.mdio_ctrl = 0,
@@ -11185,7 +11193,8 @@ static struct bnx2x_phy phy_8726 = {
.addr = 0xff,
.def_md_devad = 0,
.flags = (FLAGS_HW_LOCK_REQUIRED |
- FLAGS_INIT_XGXS_FIRST),
+ FLAGS_INIT_XGXS_FIRST |
+ FLAGS_TX_ERROR_CHECK),
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.mdio_ctrl = 0,
@@ -11216,7 +11225,8 @@ static struct bnx2x_phy phy_8727 = {
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727,
.addr = 0xff,
.def_md_devad = 0,
- .flags = FLAGS_FAN_FAILURE_DET_REQ,
+ .flags = (FLAGS_FAN_FAILURE_DET_REQ |
+ FLAGS_TX_ERROR_CHECK),
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.mdio_ctrl = 0,
@@ -11281,8 +11291,9 @@ static struct bnx2x_phy phy_84823 = {
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823,
.addr = 0xff,
.def_md_devad = 0,
- .flags = FLAGS_FAN_FAILURE_DET_REQ |
- FLAGS_REARM_LATCH_SIGNAL,
+ .flags = (FLAGS_FAN_FAILURE_DET_REQ |
+ FLAGS_REARM_LATCH_SIGNAL |
+ FLAGS_TX_ERROR_CHECK),
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.mdio_ctrl = 0,
@@ -11317,8 +11328,9 @@ static struct bnx2x_phy phy_84833 = {
.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833,
.addr = 0xff,
.def_md_devad = 0,
- .flags = FLAGS_FAN_FAILURE_DET_REQ |
- FLAGS_REARM_LATCH_SIGNAL,
+ .flags = (FLAGS_FAN_FAILURE_DET_REQ |
+ FLAGS_REARM_LATCH_SIGNAL |
+ FLAGS_TX_ERROR_CHECK),
.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
.mdio_ctrl = 0,
@@ -11863,6 +11875,10 @@ int bnx2x_phy_probe(struct link_params *params)
if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)
break;
+ if (params->feature_config_flags &
+ FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET)
+ phy->flags &= ~FLAGS_TX_ERROR_CHECK;
+
sync_offset = params->shmem_base +
offsetof(struct shmem_region,
dev_info.port_hw_config[params->port].media_type);
@@ -12086,6 +12102,7 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
bnx2x_link_int_enable(params);
break;
}
+ bnx2x_update_mng(params, vars->link_status);
return 0;
}
@@ -12703,7 +12720,8 @@ static void bnx2x_check_over_curr(struct link_params *params,
}
static void bnx2x_analyze_link_error(struct link_params *params,
- struct link_vars *vars, u32 lss_status)
+ struct link_vars *vars, u32 lss_status,
+ u8 notify)
{
struct bnx2x *bp = params->bp;
/* Compare new value with previous value */
@@ -12726,6 +12744,9 @@ static void bnx2x_analyze_link_error(struct link_params *params,
vars->link_status &= ~LINK_STATUS_LINK_UP;
vars->link_up = 0;
vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG;
+
+ /* activate nig drain */
+ REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1);
/*
* Set LED mode to off since the PHY doesn't know about these
* errors
@@ -12737,7 +12758,11 @@ static void bnx2x_analyze_link_error(struct link_params *params,
vars->link_up = 1;
vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG;
led_mode = LED_MODE_OPER;
+
+ /* Clear nig drain */
+ REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
}
+ bnx2x_sync_link(params, vars);
/* Update the LED according to the link state */
bnx2x_set_led(params, vars, led_mode, SPEED_10000);
@@ -12746,7 +12771,8 @@ static void bnx2x_analyze_link_error(struct link_params *params,
/* C. Trigger General Attention */
vars->periodic_flags |= PERIODIC_FLAGS_LINK_EVENT;
- bnx2x_notify_link_changed(bp);
+ if (notify)
+ bnx2x_notify_link_changed(bp);
}
/******************************************************************************
@@ -12758,15 +12784,17 @@ static void bnx2x_analyze_link_error(struct link_params *params,
* a fault, for example, due to break in the TX side of fiber.
*
******************************************************************************/
-static void bnx2x_check_half_open_conn(struct link_params *params,
- struct link_vars *vars)
+int bnx2x_check_half_open_conn(struct link_params *params,
+ struct link_vars *vars,
+ u8 notify)
{
struct bnx2x *bp = params->bp;
u32 lss_status = 0;
u32 mac_base;
/* In case link status is physically up @ 10G do */
- if ((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0)
- return;
+ if (((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0) ||
+ (REG_RD(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4)))
+ return 0;
if (CHIP_IS_E3(bp) &&
(REG_RD(bp, MISC_REG_RESET_REG_2) &
@@ -12787,7 +12815,7 @@ static void bnx2x_check_half_open_conn(struct link_params *params,
if (REG_RD(bp, mac_base + XMAC_REG_RX_LSS_STATUS))
lss_status = 1;
- bnx2x_analyze_link_error(params, vars, lss_status);
+ bnx2x_analyze_link_error(params, vars, lss_status, notify);
} else if (REG_RD(bp, MISC_REG_RESET_REG_2) &
(MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) {
/* Check E1X / E2 BMAC */
@@ -12804,18 +12832,21 @@ static void bnx2x_check_half_open_conn(struct link_params *params,
REG_RD_DMAE(bp, mac_base + lss_status_reg, wb_data, 2);
lss_status = (wb_data[0] > 0);
- bnx2x_analyze_link_error(params, vars, lss_status);
+ bnx2x_analyze_link_error(params, vars, lss_status, notify);
}
+ return 0;
}
void bnx2x_period_func(struct link_params *params, struct link_vars *vars)
{
- struct bnx2x *bp = params->bp;
u16 phy_idx;
+ struct bnx2x *bp = params->bp;
for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) {
if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) {
bnx2x_set_aer_mmd(params, ¶ms->phy[phy_idx]);
- bnx2x_check_half_open_conn(params, vars);
+ if (bnx2x_check_half_open_conn(params, vars, 1) !=
+ 0)
+ DP(NETIF_MSG_LINK, "Fault detection failed\n");
break;
}
}
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
index 7ba557a..9e2eed8 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
@@ -254,6 +254,7 @@ struct link_params {
#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3)
#define FEATURE_CONFIG_AUTOGREEEN_ENABLED (1<<9)
#define FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED (1<<10)
+#define FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET (1<<11)
/* Will be populated during common init */
struct bnx2x_phy phy[MAX_PHYS];
@@ -493,4 +494,6 @@ int bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
void bnx2x_period_func(struct link_params *params, struct link_vars *vars);
+int bnx2x_check_half_open_conn(struct link_params *params,
+ struct link_vars *vars, u8 notify);
#endif /* BNX2X_LINK_H */
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 4/10] bnx2x: added support for working with one msix irq.
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Dmitry Kravkov, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
From: Dmitry Kravkov <dmitry@broadcom.com>
Until now, the bnx2x driver needed at least 2 available msix interrupt
vectors in order to use msix. This patch add the possibility of configuring
msix when only one interrupt vector is available.
Notice this patch contains lines with over 80 characters, as it keeps print
strings in a single line.
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 1 +
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 66 +++++++++++++++-------
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 4 +-
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 20 ++++--
4 files changed, 61 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index e37161f..ae0dcd4 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1293,6 +1293,7 @@ struct bnx2x {
#define NO_ISCSI_FLAG (1 << 14)
#define NO_FCOE_FLAG (1 << 15)
#define BC_SUPPORTS_PFC_STATS (1 << 17)
+#define USING_SINGLE_MSIX_FLAG (1 << 20)
#define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG)
#define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index 0a95242..98b82eb 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -1211,16 +1211,15 @@ static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)
void bnx2x_free_irq(struct bnx2x *bp)
{
- if (bp->flags & USING_MSIX_FLAG)
+ if (bp->flags & USING_MSIX_FLAG &&
+ !(bp->flags & USING_SINGLE_MSIX_FLAG))
bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) +
CNIC_PRESENT + 1);
- else if (bp->flags & USING_MSI_FLAG)
- free_irq(bp->pdev->irq, bp->dev);
else
- free_irq(bp->pdev->irq, bp->dev);
+ free_irq(bp->dev->irq, bp->dev);
}
-int bnx2x_enable_msix(struct bnx2x *bp)
+int __devinit bnx2x_enable_msix(struct bnx2x *bp)
{
int msix_vec = 0, i, rc, req_cnt;
@@ -1260,8 +1259,8 @@ int bnx2x_enable_msix(struct bnx2x *bp)
rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc);
if (rc) {
- BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
- return rc;
+ BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
+ goto no_msix;
}
/*
* decrease number of queues by number of unallocated entries
@@ -1269,18 +1268,34 @@ int bnx2x_enable_msix(struct bnx2x *bp)
bp->num_queues -= diff;
BNX2X_DEV_INFO("New queue configuration set: %d\n",
- bp->num_queues);
- } else if (rc) {
- /* fall to INTx if not enough memory */
- if (rc == -ENOMEM)
- bp->flags |= DISABLE_MSI_FLAG;
+ bp->num_queues);
+ } else if (rc > 0) {
+ /* Get by with single vector */
+ rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], 1);
+ if (rc) {
+ BNX2X_DEV_INFO("Single MSI-X is not attainable rc %d\n",
+ rc);
+ goto no_msix;
+ }
+
+ BNX2X_DEV_INFO("Using single MSI-X vector\n");
+ bp->flags |= USING_SINGLE_MSIX_FLAG;
+
+ } else if (rc < 0) {
BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
- return rc;
+ goto no_msix;
}
bp->flags |= USING_MSIX_FLAG;
return 0;
+
+no_msix:
+ /* fall to INTx if not enough memory */
+ if (rc == -ENOMEM)
+ bp->flags |= DISABLE_MSI_FLAG;
+
+ return rc;
}
static int bnx2x_req_msix_irqs(struct bnx2x *bp)
@@ -1342,22 +1357,26 @@ int bnx2x_enable_msi(struct bnx2x *bp)
static int bnx2x_req_irq(struct bnx2x *bp)
{
unsigned long flags;
- int rc;
+ unsigned int irq;
- if (bp->flags & USING_MSI_FLAG)
+ if (bp->flags & (USING_MSI_FLAG | USING_MSIX_FLAG))
flags = 0;
else
flags = IRQF_SHARED;
- rc = request_irq(bp->pdev->irq, bnx2x_interrupt, flags,
- bp->dev->name, bp->dev);
- return rc;
+ if (bp->flags & USING_MSIX_FLAG)
+ irq = bp->msix_table[0].vector;
+ else
+ irq = bp->pdev->irq;
+
+ return request_irq(irq, bnx2x_interrupt, flags, bp->dev->name, bp->dev);
}
static inline int bnx2x_setup_irqs(struct bnx2x *bp)
{
int rc = 0;
- if (bp->flags & USING_MSIX_FLAG) {
+ if (bp->flags & USING_MSIX_FLAG &&
+ !(bp->flags & USING_SINGLE_MSIX_FLAG)) {
rc = bnx2x_req_msix_irqs(bp);
if (rc)
return rc;
@@ -1370,8 +1389,13 @@ static inline int bnx2x_setup_irqs(struct bnx2x *bp)
}
if (bp->flags & USING_MSI_FLAG) {
bp->dev->irq = bp->pdev->irq;
- netdev_info(bp->dev, "using MSI IRQ %d\n",
- bp->pdev->irq);
+ netdev_info(bp->dev, "using MSI IRQ %d\n",
+ bp->dev->irq);
+ }
+ if (bp->flags & USING_MSIX_FLAG) {
+ bp->dev->irq = bp->msix_table[0].vector;
+ netdev_info(bp->dev, "using MSIX IRQ %d\n",
+ bp->dev->irq);
}
}
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
index 8b16338..b0d0c69 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
@@ -482,7 +482,7 @@ void bnx2x_netif_start(struct bnx2x *bp);
* fills msix_table, requests vectors, updates num_queues
* according to number of available vectors.
*/
-int bnx2x_enable_msix(struct bnx2x *bp);
+int __devinit bnx2x_enable_msix(struct bnx2x *bp);
/**
* bnx2x_enable_msi - request msi mode from OS, updated internals accordingly
@@ -840,7 +840,7 @@ static inline void bnx2x_disable_msi(struct bnx2x *bp)
{
if (bp->flags & USING_MSIX_FLAG) {
pci_disable_msix(bp->pdev);
- bp->flags &= ~USING_MSIX_FLAG;
+ bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG);
} else if (bp->flags & USING_MSI_FLAG) {
pci_disable_msi(bp->pdev);
bp->flags &= ~USING_MSI_FLAG;
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 16de19f..c5f85ad 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -1333,8 +1333,9 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp)
static void bnx2x_igu_int_enable(struct bnx2x *bp)
{
u32 val;
- int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0;
- int msi = (bp->flags & USING_MSI_FLAG) ? 1 : 0;
+ bool msix = (bp->flags & USING_MSIX_FLAG) ? true : false;
+ bool single_msix = (bp->flags & USING_SINGLE_MSIX_FLAG) ? true : false;
+ bool msi = (bp->flags & USING_MSI_FLAG) ? true : false;
val = REG_RD(bp, IGU_REG_PF_CONFIGURATION);
@@ -1344,6 +1345,9 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp)
val |= (IGU_PF_CONF_FUNC_EN |
IGU_PF_CONF_MSI_MSIX_EN |
IGU_PF_CONF_ATTN_BIT_EN);
+
+ if (single_msix)
+ val |= IGU_PF_CONF_SINGLE_ISR_EN;
} else if (msi) {
val &= ~IGU_PF_CONF_INT_LINE_EN;
val |= (IGU_PF_CONF_FUNC_EN |
@@ -7144,7 +7148,7 @@ static void __devinit bnx2x_set_int_mode(struct bnx2x *bp)
BNX2X_DEV_INFO("set number of queues to 1\n");
break;
default:
- /* Set number of queues according to bp->multi_mode value */
+ /* Set number of queues for MSI-X mode */
bnx2x_set_num_queues(bp);
BNX2X_DEV_INFO("set number of queues to %d\n", bp->num_queues);
@@ -7153,15 +7157,17 @@ static void __devinit bnx2x_set_int_mode(struct bnx2x *bp)
* so try to enable MSI-X with the requested number of fp's
* and fallback to MSI or legacy INTx with one fp
*/
- if (bnx2x_enable_msix(bp)) {
- /* failed to enable MSI-X */
- BNX2X_DEV_INFO("Failed to enable MSI-X (%d), set number of queues to %d\n",
+ if (bnx2x_enable_msix(bp) ||
+ bp->flags & USING_SINGLE_MSIX_FLAG) {
+ /* failed to enable multiple MSI-X */
+ BNX2X_DEV_INFO("Failed to enable multiple MSI-X (%d), set number of queues to %d\n",
bp->num_queues, 1 + NON_ETH_CONTEXT_USE);
bp->num_queues = 1 + NON_ETH_CONTEXT_USE;
/* Try to enable MSI */
- if (!(bp->flags & DISABLE_MSI_FLAG))
+ if (!(bp->flags & USING_SINGLE_MSIX_FLAG) &&
+ !(bp->flags & DISABLE_MSI_FLAG))
bnx2x_enable_msi(bp);
}
break;
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 1/10] bnx2x: remove unnecessary .h dependencies
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 1 -
.../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 3 ---
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 1 -
3 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index f1f3ca6..0a95242 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -23,7 +23,6 @@
#include <linux/ip.h>
#include <net/ipv6.h>
#include <net/ip6_checksum.h>
-#include <linux/firmware.h>
#include <linux/prefetch.h>
#include "bnx2x_cmn.h"
#include "bnx2x_init.h"
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
index 2cc0a17..93b5fc4 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
@@ -22,13 +22,10 @@
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/crc32.h>
-
-
#include "bnx2x.h"
#include "bnx2x_cmn.h"
#include "bnx2x_dump.h"
#include "bnx2x_init.h"
-#include "bnx2x_sp.h"
/* Note: in the format strings below %s is replaced by the queue-name which is
* either its index or 'fcoe' for the fcoe queue. Make sure the format string
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index f7f9aa8..c03e4ab 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -39,7 +39,6 @@
#include <linux/time.h>
#include <linux/ethtool.h>
#include <linux/mii.h>
-#include <linux/if.h>
#include <linux/if_vlan.h>
#include <net/ip.h>
#include <net/ipv6.h>
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 3/10] bnx2x: enable inta on the pci bus when used
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
During boot-from-SAN, if msix interrupts are unavailable and inta
is requested, it is possible that inta would be disabled in the
pci bus. This patch enables inta when requested.
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 44b6f9f..16de19f 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -1363,6 +1363,9 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp)
REG_WR(bp, IGU_REG_PF_CONFIGURATION, val);
+ if (val & IGU_PF_CONF_INT_LINE_EN)
+ pci_intx(bp->pdev, true);
+
barrier();
/* init leading/trailing edge */
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 2/10] bnx2x: remove unnecessary dmae code
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yuval Mintz
In-Reply-To: <1333514492-20425-1-git-send-email-yuvalmin@broadcom.com>
Removed uninformative debug prints, as well as two functions
which were hardly used in the code.
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 91 +---------------------
1 files changed, 4 insertions(+), 87 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index c03e4ab..44b6f9f 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -303,67 +303,6 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr)
#define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]"
#define DMAE_DP_DST_NONE "dst_addr [none]"
-static void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae,
- int msglvl)
-{
- u32 src_type = dmae->opcode & DMAE_COMMAND_SRC;
-
- switch (dmae->opcode & DMAE_COMMAND_DST) {
- case DMAE_CMD_DST_PCI:
- if (src_type == DMAE_CMD_SRC_PCI)
- DP(msglvl, "DMAE: opcode 0x%08x\n"
- "src [%x:%08x], len [%d*4], dst [%x:%08x]\n"
- "comp_addr [%x:%08x], comp_val 0x%08x\n",
- dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
- dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo,
- dmae->comp_addr_hi, dmae->comp_addr_lo,
- dmae->comp_val);
- else
- DP(msglvl, "DMAE: opcode 0x%08x\n"
- "src [%08x], len [%d*4], dst [%x:%08x]\n"
- "comp_addr [%x:%08x], comp_val 0x%08x\n",
- dmae->opcode, dmae->src_addr_lo >> 2,
- dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo,
- dmae->comp_addr_hi, dmae->comp_addr_lo,
- dmae->comp_val);
- break;
- case DMAE_CMD_DST_GRC:
- if (src_type == DMAE_CMD_SRC_PCI)
- DP(msglvl, "DMAE: opcode 0x%08x\n"
- "src [%x:%08x], len [%d*4], dst_addr [%08x]\n"
- "comp_addr [%x:%08x], comp_val 0x%08x\n",
- dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
- dmae->len, dmae->dst_addr_lo >> 2,
- dmae->comp_addr_hi, dmae->comp_addr_lo,
- dmae->comp_val);
- else
- DP(msglvl, "DMAE: opcode 0x%08x\n"
- "src [%08x], len [%d*4], dst [%08x]\n"
- "comp_addr [%x:%08x], comp_val 0x%08x\n",
- dmae->opcode, dmae->src_addr_lo >> 2,
- dmae->len, dmae->dst_addr_lo >> 2,
- dmae->comp_addr_hi, dmae->comp_addr_lo,
- dmae->comp_val);
- break;
- default:
- if (src_type == DMAE_CMD_SRC_PCI)
- DP(msglvl, "DMAE: opcode 0x%08x\n"
- "src_addr [%x:%08x] len [%d * 4] dst_addr [none]\n"
- "comp_addr [%x:%08x] comp_val 0x%08x\n",
- dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
- dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo,
- dmae->comp_val);
- else
- DP(msglvl, "DMAE: opcode 0x%08x\n"
- "src_addr [%08x] len [%d * 4] dst_addr [none]\n"
- "comp_addr [%x:%08x] comp_val 0x%08x\n",
- dmae->opcode, dmae->src_addr_lo >> 2,
- dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo,
- dmae->comp_val);
- break;
- }
-
-}
/* copy command into DMAE command memory and set DMAE command go */
void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx)
@@ -500,8 +439,6 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
dmae.dst_addr_hi = 0;
dmae.len = len32;
- bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF);
-
/* issue the command and wait for completion */
bnx2x_issue_dmae_with_comp(bp, &dmae);
}
@@ -534,8 +471,6 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)
dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data));
dmae.len = len32;
- bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF);
-
/* issue the command and wait for completion */
bnx2x_issue_dmae_with_comp(bp, &dmae);
}
@@ -556,27 +491,6 @@ static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,
bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len);
}
-/* used only for slowpath so not inlined */
-static void bnx2x_wb_wr(struct bnx2x *bp, int reg, u32 val_hi, u32 val_lo)
-{
- u32 wb_write[2];
-
- wb_write[0] = val_hi;
- wb_write[1] = val_lo;
- REG_WR_DMAE(bp, reg, wb_write, 2);
-}
-
-#ifdef USE_WB_RD
-static u64 bnx2x_wb_rd(struct bnx2x *bp, int reg)
-{
- u32 wb_data[2];
-
- REG_RD_DMAE(bp, reg, wb_data, 2);
-
- return HILO_U64(wb_data[0], wb_data[1]);
-}
-#endif
-
static int bnx2x_mc_assert(struct bnx2x *bp)
{
char last_idx;
@@ -6634,13 +6548,16 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr)
{
int reg;
+ u32 wb_write[2];
if (CHIP_IS_E1(bp))
reg = PXP2_REG_RQ_ONCHIP_AT + index*8;
else
reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8;
- bnx2x_wb_wr(bp, reg, ONCHIP_ADDR1(addr), ONCHIP_ADDR2(addr));
+ wb_write[0] = ONCHIP_ADDR1(addr);
+ wb_write[1] = ONCHIP_ADDR2(addr);
+ REG_WR_DMAE(bp, reg, wb_write, 2);
}
static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id)
--
1.7.9.rc2
^ permalink raw reply related
* [PATCH net-next 0/10] bnx2x: Feature (+semantic) patch series
From: Yuval Mintz @ 2012-04-04 4:41 UTC (permalink / raw)
To: davem, netdev; +Cc: eilong, Yuval Mintz
Hello Dave,
This patch series contains several patch, some of them semantic in
nature (removing dead code, fixing styling issues), while others
include new features, such as support for the new 57811 device and
remote fault detection.
Please consider applying this patch series to 'net-next'.
Thanks,
Yuval
^ permalink raw reply
* RE: [PATCH] ARM: OMAP: AM33XX: CAN: d_can: Add support for Bosch D_CAN controller
From: Bhupesh SHARMA @ 2012-04-04 3:43 UTC (permalink / raw)
To: AnilKumar, Chimata, Marc Kleine-Budde
Cc: Wolfgang Grandegger, socketcan@hartkopp.net,
m.kleine-budde@pengutronix.de, linux-can@vger.kernel.org,
netdev@vger.kernel.org, linux-omap@vger.kernel.org,
linux-kernel@vger.kernel.org, Gole, Anant, Nori, Sekhar
In-Reply-To: <331ABD5ECB02734CA317220B2BBEABC1317D88B7@DBDE01.ent.ti.com>
> -----Original Message-----
> From: linux-can-owner@vger.kernel.org [mailto:linux-can-
> owner@vger.kernel.org] On Behalf Of AnilKumar, Chimata
> Sent: Tuesday, April 03, 2012 9:28 PM
> To: Marc Kleine-Budde
> Cc: Wolfgang Grandegger; socketcan@hartkopp.net; m.kleine-
> budde@pengutronix.de; linux-can@vger.kernel.org;
> netdev@vger.kernel.org; linux-omap@vger.kernel.org; linux-
> kernel@vger.kernel.org; Gole, Anant; Nori, Sekhar
> Subject: RE: [PATCH] ARM: OMAP: AM33XX: CAN: d_can: Add support for
> Bosch D_CAN controller
>
> On Tue, Apr 03, 2012 at 21:03:40, Marc Kleine-Budde wrote:
> > On 04/03/2012 04:29 PM, AnilKumar, Chimata wrote:
> > >>>> Please explain why this CAN controller cannot be handled by the
> existing
> > >>>> C_CAN driver, eventually with some extensions. The register
> layout seems
> > >>>> almost identical, at least.
> > >>>>
> > >>>> Wolfgang.
> > >>>>
> > >>>
> > >>> These are the some of the pointers I can say, why I had gone for
> separate
> > >>> file instead of existing driver:
> > >>> * In case of D_CAN driver we can see all the registers are 32bit
> length
> > >>> but in case of C_CAN registers are in 16bit length.
> > >>
> > >> How many bits in these 32 bit registers are used?
> > >
> > > In some cases (D_CAN_TXRQ, D_CAN_INTPND, D_CAN_MSGVAL) I have used
> all the
> > > bits, in some cases used few bits.
> > >
> > > Roughly I can say that its (higher 16bits) % of usages is similar
> as compare
> > > to 16bits
> > >
> > > While checking the status of TXRequest registers and INT pending
> register,
> > > which is a hot code path, we have to put if checks for register
> access.
> >
> > The c_can already has a c_can_read_reg32() function. It's for example
> > used in the rx_poll function. You can make it a function pointer
> (i.e.
> > pric->read_reg32()) for easy abstraction.
>
> This won't fit for D_CAN case because offsets are different in c_can
> compared
> to d_can. For example if I read CONTROL_REG register (0x0) in case of
> d_can,
> which will read only control register. In case of c_can it will read
> CONTROL_REG + STATUS register values in single read
C_CAN core has both 16-bit as well as 32-bit registers.
While the registers like NEWDATA and INTPND are 32-bit the others
like Control and Status are 16-bit.
These cases are handled by the present C_CAN driver already.
If you will see the C_CAN driver then you will see that the normal
read/write operations are 16-bit whereas a special variant is provided
for 32-bit access.
Are you sure you cannot use them as it is?
> >
> > >>> * Some of the registers, bit masks are different, so we have to
> add
> > >>> checks on every API for differentiating the kind of device
> > >>
> > >> Which registers are this? Can you give us an example?
> > >
> > > I am pointing out some of the resisters
> > > * Single registers in case of D_CAN but multiple register in case
> of C_CAN
> > > So masks will change MASK, ARB, INTPND
> > > * D_CAN_IFCMD is the combination of COMM request and COMM mask
> registers
> >
> > Maybe you can use the read_reg32 function on both c_can and d_can.
>
> Above comment applies here as well
>
This can be easily handled. I have worked on several drivers that do that.
See for example the STMPE multi-function device driver (MFD), here [1]
There are various variants of STMPE devices (like STMPE801 etc..) and they
can be handled by using a common driver and passing different platform data
intelligently that provides specific handling for a specific STMPE device.
Regards,
Bhupesh
[1] http://lxr.linux.no/linux+v3.3.1/drivers/mfd/stmpe.c
^ permalink raw reply
* [PATCH 2/5] net: remove ixp2000 ethernet driver
From: Rob Herring @ 2012-04-04 1:34 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel
Cc: Alex Duyck, Russell King, Arnd Bergmann, Nicolas Pitre,
Don Skidmore, Peter P Waskiewicz Jr, Bruce Allan,
Jesse Brandeburg, Rob Herring, Greg Rose, John Ronciak,
Jeff Kirsher, netdev, Olof Johansson, Carolyn Wyborny
In-Reply-To: <1333503243-7702-1-git-send-email-robherring2@gmail.com>
From: Rob Herring <rob.herring@calxeda.com>
The platform is removed, so there are no users of this driver.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Bruce Allan <bruce.w.allan@intel.com>
Cc: Carolyn Wyborny <carolyn.wyborny@intel.com>
Cc: Don Skidmore <donald.c.skidmore@intel.com>
Cc: Greg Rose <gregory.v.rose@intel.com>
Cc: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Cc: Alex Duyck <alexander.h.duyck@intel.com>
Cc: John Ronciak <john.ronciak@intel.com>
Cc: netdev@vger.kernel.org
---
MAINTAINERS | 6 -
drivers/net/ethernet/intel/Kconfig | 2 +-
drivers/net/ethernet/xscale/Kconfig | 6 +-
drivers/net/ethernet/xscale/Makefile | 1 -
drivers/net/ethernet/xscale/ixp2000/Kconfig | 6 -
drivers/net/ethernet/xscale/ixp2000/Makefile | 3 -
drivers/net/ethernet/xscale/ixp2000/caleb.c | 136 ------
drivers/net/ethernet/xscale/ixp2000/caleb.h | 22 -
drivers/net/ethernet/xscale/ixp2000/enp2611.c | 232 -----------
drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c | 212 ----------
drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h | 115 -----
drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc | 408 ------------------
.../net/ethernet/xscale/ixp2000/ixp2400_rx.ucode | 130 ------
drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc | 272 ------------
.../net/ethernet/xscale/ixp2000/ixp2400_tx.ucode | 98 -----
drivers/net/ethernet/xscale/ixp2000/ixpdev.c | 437 --------------------
drivers/net/ethernet/xscale/ixp2000/ixpdev.h | 29 --
drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h | 57 ---
drivers/net/ethernet/xscale/ixp2000/pm3386.c | 351 ----------------
drivers/net/ethernet/xscale/ixp2000/pm3386.h | 29 --
20 files changed, 3 insertions(+), 2549 deletions(-)
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/Kconfig
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/Makefile
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/caleb.c
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/caleb.h
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/enp2611.c
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixpdev.c
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixpdev.h
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/pm3386.c
delete mode 100644 drivers/net/ethernet/xscale/ixp2000/pm3386.h
diff --git a/MAINTAINERS b/MAINTAINERS
index defc06a..3dfc27c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3503,12 +3503,6 @@ M: Deepak Saxena <dsaxena@plexity.net>
S: Maintained
F: drivers/char/hw_random/ixp4xx-rng.c
-INTEL IXP2000 ETHERNET DRIVER
-M: Lennert Buytenhek <kernel@wantstofly.org>
-L: netdev@vger.kernel.org
-S: Maintained
-F: drivers/net/ethernet/xscale/ixp2000/
-
INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe/ixgbevf)
M: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
M: Jesse Brandeburg <jesse.brandeburg@intel.com>
diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig
index 7621316..2d33898 100644
--- a/drivers/net/ethernet/intel/Kconfig
+++ b/drivers/net/ethernet/intel/Kconfig
@@ -7,7 +7,7 @@ config NET_VENDOR_INTEL
default y
depends on PCI || PCI_MSI || ISA || ISA_DMA_API || ARM || \
ARCH_ACORN || MCA || MCA_LEGACY || SNI_RM || SUN3 || \
- GSC || BVME6000 || MVME16x || ARCH_ENP2611 || \
+ GSC || BVME6000 || MVME16x || \
(ARM && ARCH_IXP4XX && IXP4XX_NPE && IXP4XX_QMGR) || \
EXPERIMENTAL
---help---
diff --git a/drivers/net/ethernet/xscale/Kconfig b/drivers/net/ethernet/xscale/Kconfig
index cf67352..3f43101 100644
--- a/drivers/net/ethernet/xscale/Kconfig
+++ b/drivers/net/ethernet/xscale/Kconfig
@@ -5,8 +5,8 @@
config NET_VENDOR_XSCALE
bool "Intel XScale IXP devices"
default y
- depends on NET_VENDOR_INTEL && ((ARM && ARCH_IXP4XX && \
- IXP4XX_NPE && IXP4XX_QMGR) || ARCH_ENP2611)
+ depends on NET_VENDOR_INTEL && (ARM && ARCH_IXP4XX && \
+ IXP4XX_NPE && IXP4XX_QMGR)
---help---
If you have a network (Ethernet) card belonging to this class, say Y
and read the Ethernet-HOWTO, available from
@@ -27,6 +27,4 @@ config IXP4XX_ETH
Say Y here if you want to use built-in Ethernet ports
on IXP4xx processor.
-source "drivers/net/ethernet/xscale/ixp2000/Kconfig"
-
endif # NET_VENDOR_XSCALE
diff --git a/drivers/net/ethernet/xscale/Makefile b/drivers/net/ethernet/xscale/Makefile
index b195b9d..abc3b03 100644
--- a/drivers/net/ethernet/xscale/Makefile
+++ b/drivers/net/ethernet/xscale/Makefile
@@ -2,5 +2,4 @@
# Makefile for the Intel XScale IXP device drivers.
#
-obj-$(CONFIG_ENP2611_MSF_NET) += ixp2000/
obj-$(CONFIG_IXP4XX_ETH) += ixp4xx_eth.o
diff --git a/drivers/net/ethernet/xscale/ixp2000/Kconfig b/drivers/net/ethernet/xscale/ixp2000/Kconfig
deleted file mode 100644
index 58dbc5b..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/Kconfig
+++ /dev/null
@@ -1,6 +0,0 @@
-config ENP2611_MSF_NET
- tristate "Radisys ENP2611 MSF network interface support"
- depends on ARCH_ENP2611
- ---help---
- This is a driver for the MSF network interface unit in
- the IXP2400 on the Radisys ENP2611 platform.
diff --git a/drivers/net/ethernet/xscale/ixp2000/Makefile b/drivers/net/ethernet/xscale/ixp2000/Makefile
deleted file mode 100644
index fd38351..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-obj-$(CONFIG_ENP2611_MSF_NET) += enp2611_mod.o
-
-enp2611_mod-objs := caleb.o enp2611.o ixp2400-msf.o ixpdev.o pm3386.o
diff --git a/drivers/net/ethernet/xscale/ixp2000/caleb.c b/drivers/net/ethernet/xscale/ixp2000/caleb.c
deleted file mode 100644
index 7dea5b9..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/caleb.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <asm/io.h>
-#include "caleb.h"
-
-#define CALEB_IDLO 0x00
-#define CALEB_IDHI 0x01
-#define CALEB_RID 0x02
-#define CALEB_RESET 0x03
-#define CALEB_INTREN0 0x04
-#define CALEB_INTREN1 0x05
-#define CALEB_INTRSTAT0 0x06
-#define CALEB_INTRSTAT1 0x07
-#define CALEB_PORTEN 0x08
-#define CALEB_BURST 0x09
-#define CALEB_PORTPAUS 0x0A
-#define CALEB_PORTPAUSD 0x0B
-#define CALEB_PHY0RX 0x10
-#define CALEB_PHY1RX 0x11
-#define CALEB_PHY0TX 0x12
-#define CALEB_PHY1TX 0x13
-#define CALEB_IXPRX_HI_CNTR 0x15
-#define CALEB_PHY0RX_HI_CNTR 0x16
-#define CALEB_PHY1RX_HI_CNTR 0x17
-#define CALEB_IXPRX_CNTR 0x18
-#define CALEB_PHY0RX_CNTR 0x19
-#define CALEB_PHY1RX_CNTR 0x1A
-#define CALEB_IXPTX_CNTR 0x1B
-#define CALEB_PHY0TX_CNTR 0x1C
-#define CALEB_PHY1TX_CNTR 0x1D
-#define CALEB_DEBUG0 0x1E
-#define CALEB_DEBUG1 0x1F
-
-
-static u8 caleb_reg_read(int reg)
-{
- u8 value;
-
- value = *((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg));
-
-// printk(KERN_INFO "caleb_reg_read(%d) = %.2x\n", reg, value);
-
- return value;
-}
-
-static void caleb_reg_write(int reg, u8 value)
-{
- u8 dummy;
-
-// printk(KERN_INFO "caleb_reg_write(%d, %.2x)\n", reg, value);
-
- *((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg)) = value;
-
- dummy = *((volatile u8 *)ENP2611_CALEB_VIRT_BASE);
- __asm__ __volatile__("mov %0, %0" : "+r" (dummy));
-}
-
-
-void caleb_reset(void)
-{
- /*
- * Perform a chip reset.
- */
- caleb_reg_write(CALEB_RESET, 0x02);
- udelay(1);
-
- /*
- * Enable all interrupt sources. This is needed to get
- * meaningful results out of the status bits (register 6
- * and 7.)
- */
- caleb_reg_write(CALEB_INTREN0, 0xff);
- caleb_reg_write(CALEB_INTREN1, 0x07);
-
- /*
- * Set RX and TX FIFO thresholds to 1.5kb.
- */
- caleb_reg_write(CALEB_PHY0RX, 0x11);
- caleb_reg_write(CALEB_PHY1RX, 0x11);
- caleb_reg_write(CALEB_PHY0TX, 0x11);
- caleb_reg_write(CALEB_PHY1TX, 0x11);
-
- /*
- * Program SPI-3 burst size.
- */
- caleb_reg_write(CALEB_BURST, 0); // 64-byte RBUF mpackets
-// caleb_reg_write(CALEB_BURST, 1); // 128-byte RBUF mpackets
-// caleb_reg_write(CALEB_BURST, 2); // 256-byte RBUF mpackets
-}
-
-void caleb_enable_rx(int port)
-{
- u8 temp;
-
- temp = caleb_reg_read(CALEB_PORTEN);
- temp |= 1 << port;
- caleb_reg_write(CALEB_PORTEN, temp);
-}
-
-void caleb_disable_rx(int port)
-{
- u8 temp;
-
- temp = caleb_reg_read(CALEB_PORTEN);
- temp &= ~(1 << port);
- caleb_reg_write(CALEB_PORTEN, temp);
-}
-
-void caleb_enable_tx(int port)
-{
- u8 temp;
-
- temp = caleb_reg_read(CALEB_PORTEN);
- temp |= 1 << (port + 4);
- caleb_reg_write(CALEB_PORTEN, temp);
-}
-
-void caleb_disable_tx(int port)
-{
- u8 temp;
-
- temp = caleb_reg_read(CALEB_PORTEN);
- temp &= ~(1 << (port + 4));
- caleb_reg_write(CALEB_PORTEN, temp);
-}
diff --git a/drivers/net/ethernet/xscale/ixp2000/caleb.h b/drivers/net/ethernet/xscale/ixp2000/caleb.h
deleted file mode 100644
index e93a1ef..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/caleb.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __CALEB_H
-#define __CALEB_H
-
-void caleb_reset(void);
-void caleb_enable_rx(int port);
-void caleb_disable_rx(int port);
-void caleb_enable_tx(int port);
-void caleb_disable_tx(int port);
-
-
-#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/enp2611.c b/drivers/net/ethernet/xscale/ixp2000/enp2611.c
deleted file mode 100644
index 34a6cfd..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/enp2611.c
+++ /dev/null
@@ -1,232 +0,0 @@
-/*
- * IXP2400 MSF network device driver for the Radisys ENP2611
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/init.h>
-#include <linux/moduleparam.h>
-#include <asm/hardware/uengine.h>
-#include <asm/mach-types.h>
-#include <asm/io.h>
-#include "ixpdev.h"
-#include "caleb.h"
-#include "ixp2400-msf.h"
-#include "pm3386.h"
-
-/***********************************************************************
- * The Radisys ENP2611 is a PCI form factor board with three SFP GBIC
- * slots, connected via two PMC/Sierra 3386s and an SPI-3 bridge FPGA
- * to the IXP2400.
- *
- * +-------------+
- * SFP GBIC #0 ---+ | +---------+
- * | PM3386 #0 +-------+ |
- * SFP GBIC #1 ---+ | | "Caleb" | +---------+
- * +-------------+ | | | |
- * | SPI-3 +---------+ IXP2400 |
- * +-------------+ | bridge | | |
- * SFP GBIC #2 ---+ | | FPGA | +---------+
- * | PM3386 #1 +-------+ |
- * | | +---------+
- * +-------------+
- * ^ ^ ^
- * | 1.25Gbaud | 104MHz | 104MHz
- * | SERDES ea. | SPI-3 ea. | SPI-3
- *
- ***********************************************************************/
-static struct ixp2400_msf_parameters enp2611_msf_parameters =
-{
- .rx_mode = IXP2400_RX_MODE_UTOPIA_POS |
- IXP2400_RX_MODE_1x32 |
- IXP2400_RX_MODE_MPHY |
- IXP2400_RX_MODE_MPHY_32 |
- IXP2400_RX_MODE_MPHY_POLLED_STATUS |
- IXP2400_RX_MODE_MPHY_LEVEL3 |
- IXP2400_RX_MODE_RBUF_SIZE_64,
-
- .rxclk01_multiplier = IXP2400_PLL_MULTIPLIER_16,
-
- .rx_poll_ports = 3,
-
- .rx_channel_mode = {
- IXP2400_PORT_RX_MODE_MASTER |
- IXP2400_PORT_RX_MODE_POS_PHY |
- IXP2400_PORT_RX_MODE_POS_PHY_L3 |
- IXP2400_PORT_RX_MODE_ODD_PARITY |
- IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,
-
- IXP2400_PORT_RX_MODE_MASTER |
- IXP2400_PORT_RX_MODE_POS_PHY |
- IXP2400_PORT_RX_MODE_POS_PHY_L3 |
- IXP2400_PORT_RX_MODE_ODD_PARITY |
- IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,
-
- IXP2400_PORT_RX_MODE_MASTER |
- IXP2400_PORT_RX_MODE_POS_PHY |
- IXP2400_PORT_RX_MODE_POS_PHY_L3 |
- IXP2400_PORT_RX_MODE_ODD_PARITY |
- IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,
-
- IXP2400_PORT_RX_MODE_MASTER |
- IXP2400_PORT_RX_MODE_POS_PHY |
- IXP2400_PORT_RX_MODE_POS_PHY_L3 |
- IXP2400_PORT_RX_MODE_ODD_PARITY |
- IXP2400_PORT_RX_MODE_2_CYCLE_DECODE
- },
-
- .tx_mode = IXP2400_TX_MODE_UTOPIA_POS |
- IXP2400_TX_MODE_1x32 |
- IXP2400_TX_MODE_MPHY |
- IXP2400_TX_MODE_MPHY_32 |
- IXP2400_TX_MODE_MPHY_POLLED_STATUS |
- IXP2400_TX_MODE_MPHY_LEVEL3 |
- IXP2400_TX_MODE_TBUF_SIZE_64,
-
- .txclk01_multiplier = IXP2400_PLL_MULTIPLIER_16,
-
- .tx_poll_ports = 3,
-
- .tx_channel_mode = {
- IXP2400_PORT_TX_MODE_MASTER |
- IXP2400_PORT_TX_MODE_POS_PHY |
- IXP2400_PORT_TX_MODE_ODD_PARITY |
- IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,
-
- IXP2400_PORT_TX_MODE_MASTER |
- IXP2400_PORT_TX_MODE_POS_PHY |
- IXP2400_PORT_TX_MODE_ODD_PARITY |
- IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,
-
- IXP2400_PORT_TX_MODE_MASTER |
- IXP2400_PORT_TX_MODE_POS_PHY |
- IXP2400_PORT_TX_MODE_ODD_PARITY |
- IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,
-
- IXP2400_PORT_TX_MODE_MASTER |
- IXP2400_PORT_TX_MODE_POS_PHY |
- IXP2400_PORT_TX_MODE_ODD_PARITY |
- IXP2400_PORT_TX_MODE_2_CYCLE_DECODE
- }
-};
-
-static struct net_device *nds[3];
-static struct timer_list link_check_timer;
-
-/* @@@ Poll the SFP moddef0 line too. */
-/* @@@ Try to use the pm3386 DOOL interrupt as well. */
-static void enp2611_check_link_status(unsigned long __dummy)
-{
- int i;
-
- for (i = 0; i < 3; i++) {
- struct net_device *dev;
- int status;
-
- dev = nds[i];
- if (dev == NULL)
- continue;
-
- status = pm3386_is_link_up(i);
- if (status && !netif_carrier_ok(dev)) {
- /* @@@ Should report autonegotiation status. */
- printk(KERN_INFO "%s: NIC Link is Up\n", dev->name);
-
- pm3386_enable_tx(i);
- caleb_enable_tx(i);
- netif_carrier_on(dev);
- } else if (!status && netif_carrier_ok(dev)) {
- printk(KERN_INFO "%s: NIC Link is Down\n", dev->name);
-
- netif_carrier_off(dev);
- caleb_disable_tx(i);
- pm3386_disable_tx(i);
- }
- }
-
- link_check_timer.expires = jiffies + HZ / 10;
- add_timer(&link_check_timer);
-}
-
-static void enp2611_set_port_admin_status(int port, int up)
-{
- if (up) {
- caleb_enable_rx(port);
-
- pm3386_set_carrier(port, 1);
- pm3386_enable_rx(port);
- } else {
- caleb_disable_tx(port);
- pm3386_disable_tx(port);
- /* @@@ Flush out pending packets. */
- pm3386_set_carrier(port, 0);
-
- pm3386_disable_rx(port);
- caleb_disable_rx(port);
- }
-}
-
-static int __init enp2611_init_module(void)
-{
- int ports;
- int i;
-
- if (!machine_is_enp2611())
- return -ENODEV;
-
- caleb_reset();
- pm3386_reset();
-
- ports = pm3386_port_count();
- for (i = 0; i < ports; i++) {
- nds[i] = ixpdev_alloc(i, sizeof(struct ixpdev_priv));
- if (nds[i] == NULL) {
- while (--i >= 0)
- free_netdev(nds[i]);
- return -ENOMEM;
- }
-
- pm3386_init_port(i);
- pm3386_get_mac(i, nds[i]->dev_addr);
- }
-
- ixp2400_msf_init(&enp2611_msf_parameters);
-
- if (ixpdev_init(ports, nds, enp2611_set_port_admin_status)) {
- for (i = 0; i < ports; i++)
- if (nds[i])
- free_netdev(nds[i]);
- return -EINVAL;
- }
-
- init_timer(&link_check_timer);
- link_check_timer.function = enp2611_check_link_status;
- link_check_timer.expires = jiffies;
- add_timer(&link_check_timer);
-
- return 0;
-}
-
-static void __exit enp2611_cleanup_module(void)
-{
- int i;
-
- del_timer_sync(&link_check_timer);
-
- ixpdev_deinit();
- for (i = 0; i < 3; i++)
- free_netdev(nds[i]);
-}
-
-module_init(enp2611_init_module);
-module_exit(enp2611_cleanup_module);
-MODULE_LICENSE("GPL");
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c b/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c
deleted file mode 100644
index f5ffd7e..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Generic library functions for the MSF (Media and Switch Fabric) unit
- * found on the Intel IXP2400 network processor.
- *
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as
- * published by the Free Software Foundation; either version 2.1 of the
- * License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <mach/hardware.h>
-#include <mach/ixp2000-regs.h>
-#include <asm/delay.h>
-#include <asm/io.h>
-#include "ixp2400-msf.h"
-
-/*
- * This is the Intel recommended PLL init procedure as described on
- * page 340 of the IXP2400/IXP2800 Programmer's Reference Manual.
- */
-static void ixp2400_pll_init(struct ixp2400_msf_parameters *mp)
-{
- int rx_dual_clock;
- int tx_dual_clock;
- u32 value;
-
- /*
- * If the RX mode is not 1x32, we have to enable both RX PLLs
- * (#0 and #1.) The same thing for the TX direction.
- */
- rx_dual_clock = !!(mp->rx_mode & IXP2400_RX_MODE_WIDTH_MASK);
- tx_dual_clock = !!(mp->tx_mode & IXP2400_TX_MODE_WIDTH_MASK);
-
- /*
- * Read initial value.
- */
- value = ixp2000_reg_read(IXP2000_MSF_CLK_CNTRL);
-
- /*
- * Put PLLs in powerdown and bypass mode.
- */
- value |= 0x0000f0f0;
- ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
-
- /*
- * Set single or dual clock mode bits.
- */
- value &= ~0x03000000;
- value |= (rx_dual_clock << 24) | (tx_dual_clock << 25);
-
- /*
- * Set multipliers.
- */
- value &= ~0x00ff0000;
- value |= mp->rxclk01_multiplier << 16;
- value |= mp->rxclk23_multiplier << 18;
- value |= mp->txclk01_multiplier << 20;
- value |= mp->txclk23_multiplier << 22;
-
- /*
- * And write value.
- */
- ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
-
- /*
- * Disable PLL bypass mode.
- */
- value &= ~(0x00005000 | rx_dual_clock << 13 | tx_dual_clock << 15);
- ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
-
- /*
- * Turn on PLLs.
- */
- value &= ~(0x00000050 | rx_dual_clock << 5 | tx_dual_clock << 7);
- ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);
-
- /*
- * Wait for PLLs to lock. There are lock status bits, but IXP2400
- * erratum #65 says that these lock bits should not be relied upon
- * as they might not accurately reflect the true state of the PLLs.
- */
- udelay(100);
-}
-
-/*
- * Needed according to p480 of Programmer's Reference Manual.
- */
-static void ixp2400_msf_free_rbuf_entries(struct ixp2400_msf_parameters *mp)
-{
- int size_bits;
- int i;
-
- /*
- * Work around IXP2400 erratum #69 (silent RBUF-to-DRAM transfer
- * corruption) in the Intel-recommended way: do not add the RBUF
- * elements susceptible to corruption to the freelist.
- */
- size_bits = mp->rx_mode & IXP2400_RX_MODE_RBUF_SIZE_MASK;
- if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_64) {
- for (i = 1; i < 128; i++) {
- if (i == 9 || i == 18 || i == 27)
- continue;
- ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);
- }
- } else if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_128) {
- for (i = 1; i < 64; i++) {
- if (i == 4 || i == 9 || i == 13)
- continue;
- ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);
- }
- } else if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_256) {
- for (i = 1; i < 32; i++) {
- if (i == 2 || i == 4 || i == 6)
- continue;
- ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);
- }
- }
-}
-
-static u32 ixp2400_msf_valid_channels(u32 reg)
-{
- u32 channels;
-
- channels = 0;
- switch (reg & IXP2400_RX_MODE_WIDTH_MASK) {
- case IXP2400_RX_MODE_1x32:
- channels = 0x1;
- if (reg & IXP2400_RX_MODE_MPHY &&
- !(reg & IXP2400_RX_MODE_MPHY_32))
- channels = 0xf;
- break;
-
- case IXP2400_RX_MODE_2x16:
- channels = 0x5;
- break;
-
- case IXP2400_RX_MODE_4x8:
- channels = 0xf;
- break;
-
- case IXP2400_RX_MODE_1x16_2x8:
- channels = 0xd;
- break;
- }
-
- return channels;
-}
-
-static void ixp2400_msf_enable_rx(struct ixp2400_msf_parameters *mp)
-{
- u32 value;
-
- value = ixp2000_reg_read(IXP2000_MSF_RX_CONTROL) & 0x0fffffff;
- value |= ixp2400_msf_valid_channels(mp->rx_mode) << 28;
- ixp2000_reg_write(IXP2000_MSF_RX_CONTROL, value);
-}
-
-static void ixp2400_msf_enable_tx(struct ixp2400_msf_parameters *mp)
-{
- u32 value;
-
- value = ixp2000_reg_read(IXP2000_MSF_TX_CONTROL) & 0x0fffffff;
- value |= ixp2400_msf_valid_channels(mp->tx_mode) << 28;
- ixp2000_reg_write(IXP2000_MSF_TX_CONTROL, value);
-}
-
-
-void ixp2400_msf_init(struct ixp2400_msf_parameters *mp)
-{
- u32 value;
- int i;
-
- /*
- * Init the RX/TX PLLs based on the passed parameter block.
- */
- ixp2400_pll_init(mp);
-
- /*
- * Reset MSF. Bit 7 in IXP_RESET_0 resets the MSF.
- */
- value = ixp2000_reg_read(IXP2000_RESET0);
- ixp2000_reg_write(IXP2000_RESET0, value | 0x80);
- ixp2000_reg_write(IXP2000_RESET0, value & ~0x80);
-
- /*
- * Initialise the RX section.
- */
- ixp2000_reg_write(IXP2000_MSF_RX_MPHY_POLL_LIMIT, mp->rx_poll_ports - 1);
- ixp2000_reg_write(IXP2000_MSF_RX_CONTROL, mp->rx_mode);
- for (i = 0; i < 4; i++) {
- ixp2000_reg_write(IXP2000_MSF_RX_UP_CONTROL_0 + i,
- mp->rx_channel_mode[i]);
- }
- ixp2400_msf_free_rbuf_entries(mp);
- ixp2400_msf_enable_rx(mp);
-
- /*
- * Initialise the TX section.
- */
- ixp2000_reg_write(IXP2000_MSF_TX_MPHY_POLL_LIMIT, mp->tx_poll_ports - 1);
- ixp2000_reg_write(IXP2000_MSF_TX_CONTROL, mp->tx_mode);
- for (i = 0; i < 4; i++) {
- ixp2000_reg_write(IXP2000_MSF_TX_UP_CONTROL_0 + i,
- mp->tx_channel_mode[i]);
- }
- ixp2400_msf_enable_tx(mp);
-}
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h b/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h
deleted file mode 100644
index 3ac1af2..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Generic library functions for the MSF (Media and Switch Fabric) unit
- * found on the Intel IXP2400 network processor.
- *
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as
- * published by the Free Software Foundation; either version 2.1 of the
- * License, or (at your option) any later version.
- */
-
-#ifndef __IXP2400_MSF_H
-#define __IXP2400_MSF_H
-
-struct ixp2400_msf_parameters
-{
- u32 rx_mode;
- unsigned rxclk01_multiplier:2;
- unsigned rxclk23_multiplier:2;
- unsigned rx_poll_ports:6;
- u32 rx_channel_mode[4];
-
- u32 tx_mode;
- unsigned txclk01_multiplier:2;
- unsigned txclk23_multiplier:2;
- unsigned tx_poll_ports:6;
- u32 tx_channel_mode[4];
-};
-
-void ixp2400_msf_init(struct ixp2400_msf_parameters *mp);
-
-#define IXP2400_PLL_MULTIPLIER_48 0x00
-#define IXP2400_PLL_MULTIPLIER_24 0x01
-#define IXP2400_PLL_MULTIPLIER_16 0x02
-#define IXP2400_PLL_MULTIPLIER_12 0x03
-
-#define IXP2400_RX_MODE_CSIX 0x00400000
-#define IXP2400_RX_MODE_UTOPIA_POS 0x00000000
-#define IXP2400_RX_MODE_WIDTH_MASK 0x00300000
-#define IXP2400_RX_MODE_1x16_2x8 0x00300000
-#define IXP2400_RX_MODE_4x8 0x00200000
-#define IXP2400_RX_MODE_2x16 0x00100000
-#define IXP2400_RX_MODE_1x32 0x00000000
-#define IXP2400_RX_MODE_MPHY 0x00080000
-#define IXP2400_RX_MODE_SPHY 0x00000000
-#define IXP2400_RX_MODE_MPHY_32 0x00040000
-#define IXP2400_RX_MODE_MPHY_4 0x00000000
-#define IXP2400_RX_MODE_MPHY_POLLED_STATUS 0x00020000
-#define IXP2400_RX_MODE_MPHY_DIRECT_STATUS 0x00000000
-#define IXP2400_RX_MODE_CBUS_FULL_DUPLEX 0x00010000
-#define IXP2400_RX_MODE_CBUS_SIMPLEX 0x00000000
-#define IXP2400_RX_MODE_MPHY_LEVEL2 0x00004000
-#define IXP2400_RX_MODE_MPHY_LEVEL3 0x00000000
-#define IXP2400_RX_MODE_CBUS_8BIT 0x00002000
-#define IXP2400_RX_MODE_CBUS_4BIT 0x00000000
-#define IXP2400_RX_MODE_CSIX_SINGLE_FREELIST 0x00000200
-#define IXP2400_RX_MODE_CSIX_SPLIT_FREELISTS 0x00000000
-#define IXP2400_RX_MODE_RBUF_SIZE_MASK 0x0000000c
-#define IXP2400_RX_MODE_RBUF_SIZE_256 0x00000008
-#define IXP2400_RX_MODE_RBUF_SIZE_128 0x00000004
-#define IXP2400_RX_MODE_RBUF_SIZE_64 0x00000000
-
-#define IXP2400_PORT_RX_MODE_SLAVE 0x00000040
-#define IXP2400_PORT_RX_MODE_MASTER 0x00000000
-#define IXP2400_PORT_RX_MODE_POS_PHY_L3 0x00000020
-#define IXP2400_PORT_RX_MODE_POS_PHY_L2 0x00000000
-#define IXP2400_PORT_RX_MODE_POS_PHY 0x00000010
-#define IXP2400_PORT_RX_MODE_UTOPIA 0x00000000
-#define IXP2400_PORT_RX_MODE_EVEN_PARITY 0x0000000c
-#define IXP2400_PORT_RX_MODE_ODD_PARITY 0x00000008
-#define IXP2400_PORT_RX_MODE_NO_PARITY 0x00000000
-#define IXP2400_PORT_RX_MODE_UTOPIA_BIG_CELLS 0x00000002
-#define IXP2400_PORT_RX_MODE_UTOPIA_NORMAL_CELLS 0x00000000
-#define IXP2400_PORT_RX_MODE_2_CYCLE_DECODE 0x00000001
-#define IXP2400_PORT_RX_MODE_1_CYCLE_DECODE 0x00000000
-
-#define IXP2400_TX_MODE_CSIX 0x00400000
-#define IXP2400_TX_MODE_UTOPIA_POS 0x00000000
-#define IXP2400_TX_MODE_WIDTH_MASK 0x00300000
-#define IXP2400_TX_MODE_1x16_2x8 0x00300000
-#define IXP2400_TX_MODE_4x8 0x00200000
-#define IXP2400_TX_MODE_2x16 0x00100000
-#define IXP2400_TX_MODE_1x32 0x00000000
-#define IXP2400_TX_MODE_MPHY 0x00080000
-#define IXP2400_TX_MODE_SPHY 0x00000000
-#define IXP2400_TX_MODE_MPHY_32 0x00040000
-#define IXP2400_TX_MODE_MPHY_4 0x00000000
-#define IXP2400_TX_MODE_MPHY_POLLED_STATUS 0x00020000
-#define IXP2400_TX_MODE_MPHY_DIRECT_STATUS 0x00000000
-#define IXP2400_TX_MODE_CBUS_FULL_DUPLEX 0x00010000
-#define IXP2400_TX_MODE_CBUS_SIMPLEX 0x00000000
-#define IXP2400_TX_MODE_MPHY_LEVEL2 0x00004000
-#define IXP2400_TX_MODE_MPHY_LEVEL3 0x00000000
-#define IXP2400_TX_MODE_CBUS_8BIT 0x00002000
-#define IXP2400_TX_MODE_CBUS_4BIT 0x00000000
-#define IXP2400_TX_MODE_TBUF_SIZE_MASK 0x0000000c
-#define IXP2400_TX_MODE_TBUF_SIZE_256 0x00000008
-#define IXP2400_TX_MODE_TBUF_SIZE_128 0x00000004
-#define IXP2400_TX_MODE_TBUF_SIZE_64 0x00000000
-
-#define IXP2400_PORT_TX_MODE_SLAVE 0x00000040
-#define IXP2400_PORT_TX_MODE_MASTER 0x00000000
-#define IXP2400_PORT_TX_MODE_POS_PHY 0x00000010
-#define IXP2400_PORT_TX_MODE_UTOPIA 0x00000000
-#define IXP2400_PORT_TX_MODE_EVEN_PARITY 0x0000000c
-#define IXP2400_PORT_TX_MODE_ODD_PARITY 0x00000008
-#define IXP2400_PORT_TX_MODE_NO_PARITY 0x00000000
-#define IXP2400_PORT_TX_MODE_UTOPIA_BIG_CELLS 0x00000002
-#define IXP2400_PORT_TX_MODE_2_CYCLE_DECODE 0x00000001
-#define IXP2400_PORT_TX_MODE_1_CYCLE_DECODE 0x00000000
-
-
-#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc b/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc
deleted file mode 100644
index 42a73e3..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc
+++ /dev/null
@@ -1,408 +0,0 @@
-/*
- * RX ucode for the Intel IXP2400 in POS-PHY mode.
- * Copyright (C) 2004, 2005 Lennert Buytenhek
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * Assumptions made in this code:
- * - The IXP2400 MSF is configured for POS-PHY mode, in a mode where
- * only one full element list is used. This includes, for example,
- * 1x32 SPHY and 1x32 MPHY32, but not 4x8 SPHY or 1x32 MPHY4. (This
- * is not an exhaustive list.)
- * - The RBUF uses 64-byte mpackets.
- * - RX descriptors reside in SRAM, and have the following format:
- * struct rx_desc
- * {
- * // to uengine
- * u32 buf_phys_addr;
- * u32 buf_length;
- *
- * // from uengine
- * u32 channel;
- * u32 pkt_length;
- * };
- * - Packet data resides in DRAM.
- * - Packet buffer addresses are 8-byte aligned.
- * - Scratch ring 0 is rx_pending.
- * - Scratch ring 1 is rx_done, and has status condition 'full'.
- * - The host triggers rx_done flush and rx_pending refill on seeing INTA.
- * - This code is run on all eight threads of the microengine it runs on.
- *
- * Local memory is used for per-channel RX state.
- */
-
-#define RX_THREAD_FREELIST_0 0x0030
-#define RBUF_ELEMENT_DONE 0x0044
-
-#define CHANNEL_FLAGS *l$index0[0]
-#define CHANNEL_FLAG_RECEIVING 1
-#define PACKET_LENGTH *l$index0[1]
-#define PACKET_CHECKSUM *l$index0[2]
-#define BUFFER_HANDLE *l$index0[3]
-#define BUFFER_START *l$index0[4]
-#define BUFFER_LENGTH *l$index0[5]
-
-#define CHANNEL_STATE_SIZE 24 // in bytes
-#define CHANNEL_STATE_SHIFT 5 // ceil(log2(state size))
-
-
- .sig volatile sig1
- .sig volatile sig2
- .sig volatile sig3
-
- .sig mpacket_arrived
- .reg add_to_rx_freelist
- .reg read $rsw0, $rsw1
- .xfer_order $rsw0 $rsw1
-
- .reg zero
-
- /*
- * Initialise add_to_rx_freelist.
- */
- .begin
- .reg temp
- .reg temp2
-
- immed[add_to_rx_freelist, RX_THREAD_FREELIST_0]
- immed_w1[add_to_rx_freelist, (&$rsw0 | (&mpacket_arrived << 12))]
-
- local_csr_rd[ACTIVE_CTX_STS]
- immed[temp, 0]
- alu[temp2, temp, and, 0x1f]
- alu_shf[add_to_rx_freelist, add_to_rx_freelist, or, temp2, <<20]
- alu[temp2, temp, and, 0x80]
- alu_shf[add_to_rx_freelist, add_to_rx_freelist, or, temp2, <<18]
- .end
-
- immed[zero, 0]
-
- /*
- * Skip context 0 initialisation?
- */
- .begin
- br!=ctx[0, mpacket_receive_loop#]
- .end
-
- /*
- * Initialise local memory.
- */
- .begin
- .reg addr
- .reg temp
-
- immed[temp, 0]
- init_local_mem_loop#:
- alu_shf[addr, --, b, temp, <<CHANNEL_STATE_SHIFT]
- local_csr_wr[ACTIVE_LM_ADDR_0, addr]
- nop
- nop
- nop
-
- immed[CHANNEL_FLAGS, 0]
-
- alu[temp, temp, +, 1]
- alu[--, temp, and, 0x20]
- beq[init_local_mem_loop#]
- .end
-
- /*
- * Initialise signal pipeline.
- */
- .begin
- local_csr_wr[SAME_ME_SIGNAL, (&sig1 << 3)]
- .set_sig sig1
-
- local_csr_wr[SAME_ME_SIGNAL, (&sig2 << 3)]
- .set_sig sig2
-
- local_csr_wr[SAME_ME_SIGNAL, (&sig3 << 3)]
- .set_sig sig3
- .end
-
-mpacket_receive_loop#:
- /*
- * Synchronise and wait for mpacket.
- */
- .begin
- ctx_arb[sig1]
- local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig1 << 3))]
-
- msf[fast_wr, --, add_to_rx_freelist, 0]
- .set_sig mpacket_arrived
- ctx_arb[mpacket_arrived]
- .set $rsw0 $rsw1
- .end
-
- /*
- * We halt if we see {inbparerr,parerr,null,soperror}.
- */
- .begin
- alu_shf[--, 0x1b, and, $rsw0, >>8]
- bne[abort_rswerr#]
- .end
-
- /*
- * Point local memory pointer to this channel's state area.
- */
- .begin
- .reg chanaddr
-
- alu[chanaddr, $rsw0, and, 0x1f]
- alu_shf[chanaddr, --, b, chanaddr, <<CHANNEL_STATE_SHIFT]
- local_csr_wr[ACTIVE_LM_ADDR_0, chanaddr]
- nop
- nop
- nop
- .end
-
- /*
- * Check whether we received a SOP mpacket while we were already
- * working on a packet, or a non-SOP mpacket while there was no
- * packet pending. (SOP == RECEIVING -> abort) If everything's
- * okay, update the RECEIVING flag to reflect our new state.
- */
- .begin
- .reg temp
- .reg eop
-
- #if CHANNEL_FLAG_RECEIVING != 1
- #error CHANNEL_FLAG_RECEIVING is not 1
- #endif
-
- alu_shf[temp, 1, and, $rsw0, >>15]
- alu[temp, temp, xor, CHANNEL_FLAGS]
- alu[--, temp, and, CHANNEL_FLAG_RECEIVING]
- beq[abort_proterr#]
-
- alu_shf[eop, 1, and, $rsw0, >>14]
- alu[CHANNEL_FLAGS, temp, xor, eop]
- .end
-
- /*
- * Copy the mpacket into the right spot, and in case of EOP,
- * write back the descriptor and pass the packet on.
- */
- .begin
- .reg buffer_offset
- .reg _packet_length
- .reg _packet_checksum
- .reg _buffer_handle
- .reg _buffer_start
- .reg _buffer_length
-
- /*
- * Determine buffer_offset, _packet_length and
- * _packet_checksum.
- */
- .begin
- .reg temp
-
- alu[--, 1, and, $rsw0, >>15]
- beq[not_sop#]
-
- immed[PACKET_LENGTH, 0]
- immed[PACKET_CHECKSUM, 0]
-
- not_sop#:
- alu[buffer_offset, --, b, PACKET_LENGTH]
- alu_shf[temp, 0xff, and, $rsw0, >>16]
- alu[_packet_length, buffer_offset, +, temp]
- alu[PACKET_LENGTH, --, b, _packet_length]
-
- immed[temp, 0xffff]
- alu[temp, $rsw1, and, temp]
- alu[_packet_checksum, PACKET_CHECKSUM, +, temp]
- alu[PACKET_CHECKSUM, --, b, _packet_checksum]
- .end
-
- /*
- * Allocate buffer in case of SOP.
- */
- .begin
- .reg temp
-
- alu[temp, 1, and, $rsw0, >>15]
- beq[skip_buffer_alloc#]
-
- .begin
- .sig zzz
- .reg read $stemp $stemp2
- .xfer_order $stemp $stemp2
-
- rx_nobufs#:
- scratch[get, $stemp, zero, 0, 1], ctx_swap[zzz]
- alu[_buffer_handle, --, b, $stemp]
- beq[rx_nobufs#]
-
- sram[read, $stemp, _buffer_handle, 0, 2],
- ctx_swap[zzz]
- alu[_buffer_start, --, b, $stemp]
- alu[_buffer_length, --, b, $stemp2]
- .end
-
- skip_buffer_alloc#:
- .end
-
- /*
- * Resynchronise.
- */
- .begin
- ctx_arb[sig2]
- local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig2 << 3))]
- .end
-
- /*
- * Synchronise buffer state.
- */
- .begin
- .reg temp
-
- alu[temp, 1, and, $rsw0, >>15]
- beq[copy_from_local_mem#]
-
- alu[BUFFER_HANDLE, --, b, _buffer_handle]
- alu[BUFFER_START, --, b, _buffer_start]
- alu[BUFFER_LENGTH, --, b, _buffer_length]
- br[sync_state_done#]
-
- copy_from_local_mem#:
- alu[_buffer_handle, --, b, BUFFER_HANDLE]
- alu[_buffer_start, --, b, BUFFER_START]
- alu[_buffer_length, --, b, BUFFER_LENGTH]
-
- sync_state_done#:
- .end
-
-#if 0
- /*
- * Debug buffer state management.
- */
- .begin
- .reg temp
-
- alu[temp, 1, and, $rsw0, >>14]
- beq[no_poison#]
- immed[BUFFER_HANDLE, 0xdead]
- immed[BUFFER_START, 0xdead]
- immed[BUFFER_LENGTH, 0xdead]
- no_poison#:
-
- immed[temp, 0xdead]
- alu[--, _buffer_handle, -, temp]
- beq[state_corrupted#]
- alu[--, _buffer_start, -, temp]
- beq[state_corrupted#]
- alu[--, _buffer_length, -, temp]
- beq[state_corrupted#]
- .end
-#endif
-
- /*
- * Check buffer length.
- */
- .begin
- alu[--, _buffer_length, -, _packet_length]
- blo[buffer_overflow#]
- .end
-
- /*
- * Copy the mpacket and give back the RBUF element.
- */
- .begin
- .reg element
- .reg xfer_size
- .reg temp
- .sig copy_sig
-
- alu_shf[element, 0x7f, and, $rsw0, >>24]
- alu_shf[xfer_size, 0xff, and, $rsw0, >>16]
-
- alu[xfer_size, xfer_size, -, 1]
- alu_shf[xfer_size, 0x10, or, xfer_size, >>3]
- alu_shf[temp, 0x10, or, xfer_size, <<21]
- alu_shf[temp, temp, or, element, <<11]
- alu_shf[--, temp, or, 1, <<18]
-
- dram[rbuf_rd, --, _buffer_start, buffer_offset, max_8],
- indirect_ref, sig_done[copy_sig]
- ctx_arb[copy_sig]
-
- alu[temp, RBUF_ELEMENT_DONE, or, element, <<16]
- msf[fast_wr, --, temp, 0]
- .end
-
- /*
- * If EOP, write back the packet descriptor.
- */
- .begin
- .reg write $stemp $stemp2
- .xfer_order $stemp $stemp2
- .sig zzz
-
- alu_shf[--, 1, and, $rsw0, >>14]
- beq[no_writeback#]
-
- alu[$stemp, $rsw0, and, 0x1f]
- alu[$stemp2, --, b, _packet_length]
- sram[write, $stemp, _buffer_handle, 8, 2], ctx_swap[zzz]
-
- no_writeback#:
- .end
-
- /*
- * Resynchronise.
- */
- .begin
- ctx_arb[sig3]
- local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig3 << 3))]
- .end
-
- /*
- * If EOP, put the buffer back onto the scratch ring.
- */
- .begin
- .reg write $stemp
- .sig zzz
-
- br_inp_state[SCR_Ring1_Status, rx_done_ring_overflow#]
-
- alu_shf[--, 1, and, $rsw0, >>14]
- beq[mpacket_receive_loop#]
-
- alu[--, 1, and, $rsw0, >>10]
- bne[rxerr#]
-
- alu[$stemp, --, b, _buffer_handle]
- scratch[put, $stemp, zero, 4, 1], ctx_swap[zzz]
- cap[fast_wr, 0, XSCALE_INT_A]
- br[mpacket_receive_loop#]
-
- rxerr#:
- alu[$stemp, --, b, _buffer_handle]
- scratch[put, $stemp, zero, 0, 1], ctx_swap[zzz]
- br[mpacket_receive_loop#]
- .end
- .end
-
-
-abort_rswerr#:
- halt
-
-abort_proterr#:
- halt
-
-state_corrupted#:
- halt
-
-buffer_overflow#:
- halt
-
-rx_done_ring_overflow#:
- halt
-
-
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode b/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode
deleted file mode 100644
index e8aee2f..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode
+++ /dev/null
@@ -1,130 +0,0 @@
-static struct ixp2000_uengine_code ixp2400_rx =
-{
- .cpu_model_bitmask = 0x000003fe,
- .cpu_min_revision = 0,
- .cpu_max_revision = 255,
-
- .uengine_parameters = IXP2000_UENGINE_8_CONTEXTS |
- IXP2000_UENGINE_PRN_UPDATE_EVERY |
- IXP2000_UENGINE_NN_FROM_PREVIOUS |
- IXP2000_UENGINE_ASSERT_EMPTY_AT_0 |
- IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT |
- IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT,
-
- .initial_reg_values = (struct ixp2000_reg_value []) {
- { -1, -1 }
- },
-
- .num_insns = 109,
- .insns = (u8 []) {
- 0xf0, 0x00, 0x0c, 0xc0, 0x05,
- 0xf4, 0x44, 0x0c, 0x00, 0x05,
- 0xfc, 0x04, 0x4c, 0x00, 0x00,
- 0xf0, 0x00, 0x00, 0x3b, 0x00,
- 0xb4, 0x40, 0xf0, 0x3b, 0x1f,
- 0x8a, 0xc0, 0x50, 0x3e, 0x05,
- 0xb4, 0x40, 0xf0, 0x3b, 0x80,
- 0x9a, 0xe0, 0x00, 0x3e, 0x05,
- 0xf0, 0x00, 0x00, 0x07, 0x00,
- 0xd8, 0x05, 0xc0, 0x00, 0x11,
- 0xf0, 0x00, 0x00, 0x0f, 0x00,
- 0x91, 0xb0, 0x20, 0x0e, 0x00,
- 0xfc, 0x06, 0x60, 0x0b, 0x00,
- 0xf0, 0x00, 0x0c, 0x03, 0x00,
- 0xf0, 0x00, 0x0c, 0x03, 0x00,
- 0xf0, 0x00, 0x0c, 0x03, 0x00,
- 0xf0, 0x00, 0x0c, 0x02, 0x00,
- 0xb0, 0xc0, 0x30, 0x0f, 0x01,
- 0xa4, 0x70, 0x00, 0x0f, 0x20,
- 0xd8, 0x02, 0xc0, 0x01, 0x00,
- 0xfc, 0x10, 0xac, 0x23, 0x08,
- 0xfc, 0x10, 0xac, 0x43, 0x10,
- 0xfc, 0x10, 0xac, 0x63, 0x18,
- 0xe0, 0x00, 0x00, 0x00, 0x02,
- 0xfc, 0x10, 0xae, 0x23, 0x88,
- 0x3d, 0x00, 0x04, 0x03, 0x20,
- 0xe0, 0x00, 0x00, 0x00, 0x10,
- 0x84, 0x82, 0x02, 0x01, 0x3b,
- 0xd8, 0x1a, 0x00, 0x01, 0x01,
- 0xb4, 0x00, 0x8c, 0x7d, 0x80,
- 0x91, 0xb0, 0x80, 0x22, 0x00,
- 0xfc, 0x06, 0x60, 0x23, 0x00,
- 0xf0, 0x00, 0x0c, 0x03, 0x00,
- 0xf0, 0x00, 0x0c, 0x03, 0x00,
- 0xf0, 0x00, 0x0c, 0x03, 0x00,
- 0x94, 0xf0, 0x92, 0x01, 0x21,
- 0xac, 0x40, 0x60, 0x26, 0x00,
- 0xa4, 0x30, 0x0c, 0x04, 0x06,
- 0xd8, 0x1a, 0x40, 0x01, 0x00,
- 0x94, 0xe0, 0xa2, 0x01, 0x21,
- 0xac, 0x20, 0x00, 0x28, 0x06,
- 0x84, 0xf2, 0x02, 0x01, 0x21,
- 0xd8, 0x0b, 0x40, 0x01, 0x00,
- 0xf0, 0x00, 0x0c, 0x02, 0x01,
- 0xf0, 0x00, 0x0c, 0x02, 0x02,
- 0xa0, 0x00, 0x08, 0x04, 0x00,
- 0x95, 0x00, 0xc6, 0x01, 0xff,
- 0xa0, 0x80, 0x10, 0x30, 0x00,
- 0xa0, 0x60, 0x1c, 0x00, 0x01,
- 0xf0, 0x0f, 0xf0, 0x33, 0xff,
- 0xb4, 0x00, 0xc0, 0x31, 0x81,
- 0xb0, 0x80, 0xb0, 0x32, 0x02,
- 0xa0, 0x20, 0x20, 0x2c, 0x00,
- 0x94, 0xf0, 0xd2, 0x01, 0x21,
- 0xd8, 0x0f, 0x40, 0x01, 0x00,
- 0x19, 0x40, 0x10, 0x04, 0x20,
- 0xa0, 0x00, 0x26, 0x04, 0x00,
- 0xd8, 0x0d, 0xc0, 0x01, 0x00,
- 0x00, 0x42, 0x10, 0x80, 0x02,
- 0xb0, 0x00, 0x46, 0x04, 0x00,
- 0xb0, 0x00, 0x56, 0x08, 0x00,
- 0xe0, 0x00, 0x00, 0x00, 0x04,
- 0xfc, 0x10, 0xae, 0x43, 0x90,
- 0x84, 0xf0, 0x32, 0x01, 0x21,
- 0xd8, 0x11, 0x40, 0x01, 0x00,
- 0xa0, 0x60, 0x3c, 0x00, 0x02,
- 0xa0, 0x20, 0x40, 0x10, 0x00,
- 0xa0, 0x20, 0x50, 0x14, 0x00,
- 0xd8, 0x12, 0x00, 0x00, 0x18,
- 0xa0, 0x00, 0x28, 0x0c, 0x00,
- 0xb0, 0x00, 0x48, 0x10, 0x00,
- 0xb0, 0x00, 0x58, 0x14, 0x00,
- 0xaa, 0xf0, 0x00, 0x14, 0x01,
- 0xd8, 0x1a, 0xc0, 0x01, 0x05,
- 0x85, 0x80, 0x42, 0x01, 0xff,
- 0x95, 0x00, 0x66, 0x01, 0xff,
- 0xba, 0xc0, 0x60, 0x1b, 0x01,
- 0x9a, 0x30, 0x60, 0x19, 0x30,
- 0x9a, 0xb0, 0x70, 0x1a, 0x30,
- 0x9b, 0x50, 0x78, 0x1e, 0x04,
- 0x8a, 0xe2, 0x08, 0x1e, 0x21,
- 0x6a, 0x4e, 0x00, 0x13, 0x00,
- 0xe0, 0x00, 0x00, 0x00, 0x30,
- 0x9b, 0x00, 0x7a, 0x92, 0x04,
- 0x3d, 0x00, 0x04, 0x1f, 0x20,
- 0x84, 0xe2, 0x02, 0x01, 0x21,
- 0xd8, 0x16, 0x80, 0x01, 0x00,
- 0xa4, 0x18, 0x0c, 0x7d, 0x80,
- 0xa0, 0x58, 0x1c, 0x00, 0x01,
- 0x01, 0x42, 0x00, 0xa0, 0x02,
- 0xe0, 0x00, 0x00, 0x00, 0x08,
- 0xfc, 0x10, 0xae, 0x63, 0x98,
- 0xd8, 0x1b, 0x00, 0xc2, 0x14,
- 0x84, 0xe2, 0x02, 0x01, 0x21,
- 0xd8, 0x05, 0xc0, 0x01, 0x00,
- 0x84, 0xa2, 0x02, 0x01, 0x21,
- 0xd8, 0x19, 0x40, 0x01, 0x01,
- 0xa0, 0x58, 0x0c, 0x00, 0x02,
- 0x1a, 0x40, 0x00, 0x04, 0x24,
- 0x33, 0x00, 0x01, 0x2f, 0x20,
- 0xd8, 0x05, 0xc0, 0x00, 0x18,
- 0xa0, 0x58, 0x0c, 0x00, 0x02,
- 0x1a, 0x40, 0x00, 0x04, 0x20,
- 0xd8, 0x05, 0xc0, 0x00, 0x18,
- 0xe0, 0x00, 0x02, 0x00, 0x00,
- 0xe0, 0x00, 0x02, 0x00, 0x00,
- 0xe0, 0x00, 0x02, 0x00, 0x00,
- 0xe0, 0x00, 0x02, 0x00, 0x00,
- 0xe0, 0x00, 0x02, 0x00, 0x00,
- }
-};
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc b/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc
deleted file mode 100644
index d090d18..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc
+++ /dev/null
@@ -1,272 +0,0 @@
-/*
- * TX ucode for the Intel IXP2400 in POS-PHY mode.
- * Copyright (C) 2004, 2005 Lennert Buytenhek
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * Assumptions made in this code:
- * - The IXP2400 MSF is configured for POS-PHY mode, in a mode where
- * only one TBUF partition is used. This includes, for example,
- * 1x32 SPHY and 1x32 MPHY32, but not 4x8 SPHY or 1x32 MPHY4. (This
- * is not an exhaustive list.)
- * - The TBUF uses 64-byte mpackets.
- * - TX descriptors reside in SRAM, and have the following format:
- * struct tx_desc
- * {
- * // to uengine
- * u32 buf_phys_addr;
- * u32 pkt_length;
- * u32 channel;
- * };
- * - Packet data resides in DRAM.
- * - Packet buffer addresses are 8-byte aligned.
- * - Scratch ring 2 is tx_pending.
- * - Scratch ring 3 is tx_done, and has status condition 'full'.
- * - This code is run on all eight threads of the microengine it runs on.
- */
-
-#define TX_SEQUENCE_0 0x0060
-#define TBUF_CTRL 0x1800
-
-#define PARTITION_SIZE 128
-#define PARTITION_THRESH 96
-
-
- .sig volatile sig1
- .sig volatile sig2
- .sig volatile sig3
-
- .reg @old_tx_seq_0
- .reg @mpkts_in_flight
- .reg @next_tbuf_mpacket
-
- .reg @buffer_handle
- .reg @buffer_start
- .reg @packet_length
- .reg @channel
- .reg @packet_offset
-
- .reg zero
-
- immed[zero, 0]
-
- /*
- * Skip context 0 initialisation?
- */
- .begin
- br!=ctx[0, mpacket_tx_loop#]
- .end
-
- /*
- * Wait until all pending TBUF elements have been transmitted.
- */
- .begin
- .reg read $tx
- .sig zzz
-
- loop_empty#:
- msf[read, $tx, zero, TX_SEQUENCE_0, 1], ctx_swap[zzz]
- alu_shf[--, --, b, $tx, >>31]
- beq[loop_empty#]
-
- alu[@old_tx_seq_0, --, b, $tx]
- .end
-
- immed[@mpkts_in_flight, 0]
- alu[@next_tbuf_mpacket, @old_tx_seq_0, and, (PARTITION_SIZE - 1)]
-
- immed[@buffer_handle, 0]
-
- /*
- * Initialise signal pipeline.
- */
- .begin
- local_csr_wr[SAME_ME_SIGNAL, (&sig1 << 3)]
- .set_sig sig1
-
- local_csr_wr[SAME_ME_SIGNAL, (&sig2 << 3)]
- .set_sig sig2
-
- local_csr_wr[SAME_ME_SIGNAL, (&sig3 << 3)]
- .set_sig sig3
- .end
-
-mpacket_tx_loop#:
- .begin
- .reg tbuf_element_index
- .reg buffer_handle
- .reg sop_eop
- .reg packet_data
- .reg channel
- .reg mpacket_size
-
- /*
- * If there is no packet currently being transmitted,
- * dequeue the next TX descriptor, and fetch the buffer
- * address, packet length and destination channel number.
- */
- .begin
- .reg read $stemp $stemp2 $stemp3
- .xfer_order $stemp $stemp2 $stemp3
- .sig zzz
-
- ctx_arb[sig1]
-
- alu[--, --, b, @buffer_handle]
- bne[already_got_packet#]
-
- tx_nobufs#:
- scratch[get, $stemp, zero, 8, 1], ctx_swap[zzz]
- alu[@buffer_handle, --, b, $stemp]
- beq[tx_nobufs#]
-
- sram[read, $stemp, $stemp, 0, 3], ctx_swap[zzz]
- alu[@buffer_start, --, b, $stemp]
- alu[@packet_length, --, b, $stemp2]
- beq[zero_byte_packet#]
- alu[@channel, --, b, $stemp3]
- immed[@packet_offset, 0]
-
- already_got_packet#:
- local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig1 << 3))]
- .end
-
- /*
- * Determine tbuf element index, SOP/EOP flags, mpacket
- * offset and mpacket size and cache buffer_handle and
- * channel number.
- */
- .begin
- alu[tbuf_element_index, --, b, @next_tbuf_mpacket]
- alu[@next_tbuf_mpacket, @next_tbuf_mpacket, +, 1]
- alu[@next_tbuf_mpacket, @next_tbuf_mpacket, and,
- (PARTITION_SIZE - 1)]
-
- alu[buffer_handle, --, b, @buffer_handle]
- immed[@buffer_handle, 0]
-
- immed[sop_eop, 1]
-
- alu[packet_data, --, b, @packet_offset]
- bne[no_sop#]
- alu[sop_eop, sop_eop, or, 2]
- no_sop#:
- alu[packet_data, packet_data, +, @buffer_start]
-
- alu[channel, --, b, @channel]
-
- alu[mpacket_size, @packet_length, -, @packet_offset]
- alu[--, 64, -, mpacket_size]
- bhs[eop#]
- alu[@buffer_handle, --, b, buffer_handle]
- immed[mpacket_size, 64]
- alu[sop_eop, sop_eop, and, 2]
- eop#:
-
- alu[@packet_offset, @packet_offset, +, mpacket_size]
- .end
-
- /*
- * Wait until there's enough space in the TBUF.
- */
- .begin
- .reg read $tx
- .reg temp
- .sig zzz
-
- ctx_arb[sig2]
-
- br[test_space#]
-
- loop_space#:
- msf[read, $tx, zero, TX_SEQUENCE_0, 1], ctx_swap[zzz]
-
- alu[temp, $tx, -, @old_tx_seq_0]
- alu[temp, temp, and, 0xff]
- alu[@mpkts_in_flight, @mpkts_in_flight, -, temp]
-
- alu[@old_tx_seq_0, --, b, $tx]
-
- test_space#:
- alu[--, PARTITION_THRESH, -, @mpkts_in_flight]
- blo[loop_space#]
-
- alu[@mpkts_in_flight, @mpkts_in_flight, +, 1]
-
- local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig2 << 3))]
- .end
-
- /*
- * Copy the packet data to the TBUF.
- */
- .begin
- .reg temp
- .sig copy_sig
-
- alu[temp, mpacket_size, -, 1]
- alu_shf[temp, 0x10, or, temp, >>3]
- alu_shf[temp, 0x10, or, temp, <<21]
- alu_shf[temp, temp, or, tbuf_element_index, <<11]
- alu_shf[--, temp, or, 1, <<18]
-
- dram[tbuf_wr, --, packet_data, 0, max_8],
- indirect_ref, sig_done[copy_sig]
- ctx_arb[copy_sig]
- .end
-
- /*
- * Mark TBUF element as ready-to-be-transmitted.
- */
- .begin
- .reg write $tsw $tsw2
- .xfer_order $tsw $tsw2
- .reg temp
- .sig zzz
-
- alu_shf[temp, channel, or, mpacket_size, <<24]
- alu_shf[$tsw, temp, or, sop_eop, <<8]
- immed[$tsw2, 0]
-
- immed[temp, TBUF_CTRL]
- alu_shf[temp, temp, or, tbuf_element_index, <<3]
- msf[write, $tsw, temp, 0, 2], ctx_swap[zzz]
- .end
-
- /*
- * Resynchronise.
- */
- .begin
- ctx_arb[sig3]
- local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&sig3 << 3))]
- .end
-
- /*
- * If this was an EOP mpacket, recycle the TX buffer
- * and signal the host.
- */
- .begin
- .reg write $stemp
- .sig zzz
-
- alu[--, sop_eop, and, 1]
- beq[mpacket_tx_loop#]
-
- tx_done_ring_full#:
- br_inp_state[SCR_Ring3_Status, tx_done_ring_full#]
-
- alu[$stemp, --, b, buffer_handle]
- scratch[put, $stemp, zero, 12, 1], ctx_swap[zzz]
- cap[fast_wr, 0, XSCALE_INT_A]
- br[mpacket_tx_loop#]
- .end
- .end
-
-
-zero_byte_packet#:
- halt
-
-
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode b/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode
deleted file mode 100644
index a433e24..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode
+++ /dev/null
@@ -1,98 +0,0 @@
-static struct ixp2000_uengine_code ixp2400_tx =
-{
- .cpu_model_bitmask = 0x000003fe,
- .cpu_min_revision = 0,
- .cpu_max_revision = 255,
-
- .uengine_parameters = IXP2000_UENGINE_8_CONTEXTS |
- IXP2000_UENGINE_PRN_UPDATE_EVERY |
- IXP2000_UENGINE_NN_FROM_PREVIOUS |
- IXP2000_UENGINE_ASSERT_EMPTY_AT_0 |
- IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT |
- IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT,
-
- .initial_reg_values = (struct ixp2000_reg_value []) {
- { -1, -1 }
- },
-
- .num_insns = 77,
- .insns = (u8 []) {
- 0xf0, 0x00, 0x00, 0x07, 0x00,
- 0xd8, 0x03, 0x00, 0x00, 0x11,
- 0x3c, 0x40, 0x00, 0x04, 0xe0,
- 0x81, 0xf2, 0x02, 0x01, 0x00,
- 0xd8, 0x00, 0x80, 0x01, 0x00,
- 0xb0, 0x08, 0x06, 0x00, 0x00,
- 0xf0, 0x00, 0x0c, 0x00, 0x80,
- 0xb4, 0x49, 0x02, 0x03, 0x7f,
- 0xf0, 0x00, 0x02, 0x83, 0x00,
- 0xfc, 0x10, 0xac, 0x23, 0x08,
- 0xfc, 0x10, 0xac, 0x43, 0x10,
- 0xfc, 0x10, 0xac, 0x63, 0x18,
- 0xe0, 0x00, 0x00, 0x00, 0x02,
- 0xa0, 0x30, 0x02, 0x80, 0x00,
- 0xd8, 0x06, 0x00, 0x01, 0x01,
- 0x19, 0x40, 0x00, 0x04, 0x28,
- 0xb0, 0x0a, 0x06, 0x00, 0x00,
- 0xd8, 0x03, 0xc0, 0x01, 0x00,
- 0x00, 0x44, 0x00, 0x80, 0x80,
- 0xa0, 0x09, 0x06, 0x00, 0x00,
- 0xb0, 0x0b, 0x06, 0x04, 0x00,
- 0xd8, 0x13, 0x00, 0x01, 0x00,
- 0xb0, 0x0c, 0x06, 0x08, 0x00,
- 0xf0, 0x00, 0x0c, 0x00, 0xa0,
- 0xfc, 0x10, 0xae, 0x23, 0x88,
- 0xa0, 0x00, 0x12, 0x40, 0x00,
- 0xb0, 0xc9, 0x02, 0x43, 0x01,
- 0xb4, 0x49, 0x02, 0x43, 0x7f,
- 0xb0, 0x00, 0x22, 0x80, 0x00,
- 0xf0, 0x00, 0x02, 0x83, 0x00,
- 0xf0, 0x00, 0x0c, 0x04, 0x02,
- 0xb0, 0x40, 0x6c, 0x00, 0xa0,
- 0xd8, 0x08, 0x80, 0x01, 0x01,
- 0xaa, 0x00, 0x2c, 0x08, 0x02,
- 0xa0, 0xc0, 0x30, 0x18, 0x90,
- 0xa0, 0x00, 0x43, 0x00, 0x00,
- 0xba, 0xc0, 0x32, 0xc0, 0xa0,
- 0xaa, 0xb0, 0x00, 0x0f, 0x40,
- 0xd8, 0x0a, 0x80, 0x01, 0x04,
- 0xb0, 0x0a, 0x00, 0x08, 0x00,
- 0xf0, 0x00, 0x00, 0x0f, 0x40,
- 0xa4, 0x00, 0x2c, 0x08, 0x02,
- 0xa0, 0x8a, 0x00, 0x0c, 0xa0,
- 0xe0, 0x00, 0x00, 0x00, 0x04,
- 0xd8, 0x0c, 0x80, 0x00, 0x18,
- 0x3c, 0x40, 0x00, 0x04, 0xe0,
- 0xba, 0x80, 0x42, 0x01, 0x80,
- 0xb4, 0x40, 0x40, 0x13, 0xff,
- 0xaa, 0x88, 0x00, 0x10, 0x80,
- 0xb0, 0x08, 0x06, 0x00, 0x00,
- 0xaa, 0xf0, 0x0d, 0x80, 0x80,
- 0xd8, 0x0b, 0x40, 0x01, 0x05,
- 0xa0, 0x88, 0x0c, 0x04, 0x80,
- 0xfc, 0x10, 0xae, 0x43, 0x90,
- 0xba, 0xc0, 0x50, 0x0f, 0x01,
- 0x9a, 0x30, 0x50, 0x15, 0x30,
- 0x9a, 0xb0, 0x50, 0x16, 0x30,
- 0x9b, 0x50, 0x58, 0x16, 0x01,
- 0x8a, 0xe2, 0x08, 0x16, 0x21,
- 0x6b, 0x4e, 0x00, 0x83, 0x03,
- 0xe0, 0x00, 0x00, 0x00, 0x30,
- 0x9a, 0x80, 0x70, 0x0e, 0x04,
- 0x8b, 0x88, 0x08, 0x1e, 0x02,
- 0xf0, 0x00, 0x0c, 0x01, 0x81,
- 0xf0, 0x01, 0x80, 0x1f, 0x00,
- 0x9b, 0xd0, 0x78, 0x1e, 0x01,
- 0x3d, 0x42, 0x00, 0x1c, 0x20,
- 0xe0, 0x00, 0x00, 0x00, 0x08,
- 0xfc, 0x10, 0xae, 0x63, 0x98,
- 0xa4, 0x30, 0x0c, 0x04, 0x02,
- 0xd8, 0x03, 0x00, 0x01, 0x00,
- 0xd8, 0x11, 0xc1, 0x42, 0x14,
- 0xa0, 0x18, 0x00, 0x08, 0x00,
- 0x1a, 0x40, 0x00, 0x04, 0x2c,
- 0x33, 0x00, 0x01, 0x2f, 0x20,
- 0xd8, 0x03, 0x00, 0x00, 0x18,
- 0xe0, 0x00, 0x02, 0x00, 0x00,
- }
-};
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev.c b/drivers/net/ethernet/xscale/ixp2000/ixpdev.c
deleted file mode 100644
index 4500837..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixpdev.c
+++ /dev/null
@@ -1,437 +0,0 @@
-/*
- * IXP2000 MSF network device driver
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/moduleparam.h>
-#include <linux/gfp.h>
-#include <asm/hardware/uengine.h>
-#include <asm/io.h>
-#include "ixp2400_rx.ucode"
-#include "ixp2400_tx.ucode"
-#include "ixpdev_priv.h"
-#include "ixpdev.h"
-#include "pm3386.h"
-
-#define DRV_MODULE_VERSION "0.2"
-
-static int nds_count;
-static struct net_device **nds;
-static int nds_open;
-static void (*set_port_admin_status)(int port, int up);
-
-static struct ixpdev_rx_desc * const rx_desc =
- (struct ixpdev_rx_desc *)(IXP2000_SRAM0_VIRT_BASE + RX_BUF_DESC_BASE);
-static struct ixpdev_tx_desc * const tx_desc =
- (struct ixpdev_tx_desc *)(IXP2000_SRAM0_VIRT_BASE + TX_BUF_DESC_BASE);
-static int tx_pointer;
-
-
-static int ixpdev_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct ixpdev_priv *ip = netdev_priv(dev);
- struct ixpdev_tx_desc *desc;
- int entry;
- unsigned long flags;
-
- if (unlikely(skb->len > PAGE_SIZE)) {
- /* @@@ Count drops. */
- dev_kfree_skb(skb);
- return NETDEV_TX_OK;
- }
-
- entry = tx_pointer;
- tx_pointer = (tx_pointer + 1) % TX_BUF_COUNT;
-
- desc = tx_desc + entry;
- desc->pkt_length = skb->len;
- desc->channel = ip->channel;
-
- skb_copy_and_csum_dev(skb, phys_to_virt(desc->buf_addr));
- dev_kfree_skb(skb);
-
- ixp2000_reg_write(RING_TX_PENDING,
- TX_BUF_DESC_BASE + (entry * sizeof(struct ixpdev_tx_desc)));
-
- local_irq_save(flags);
- ip->tx_queue_entries++;
- if (ip->tx_queue_entries == TX_BUF_COUNT_PER_CHAN)
- netif_stop_queue(dev);
- local_irq_restore(flags);
-
- return NETDEV_TX_OK;
-}
-
-
-static int ixpdev_rx(struct net_device *dev, int processed, int budget)
-{
- while (processed < budget) {
- struct ixpdev_rx_desc *desc;
- struct sk_buff *skb;
- void *buf;
- u32 _desc;
-
- _desc = ixp2000_reg_read(RING_RX_DONE);
- if (_desc == 0)
- return 0;
-
- desc = rx_desc +
- ((_desc - RX_BUF_DESC_BASE) / sizeof(struct ixpdev_rx_desc));
- buf = phys_to_virt(desc->buf_addr);
-
- if (desc->pkt_length < 4 || desc->pkt_length > PAGE_SIZE) {
- printk(KERN_ERR "ixp2000: rx err, length %d\n",
- desc->pkt_length);
- goto err;
- }
-
- if (desc->channel < 0 || desc->channel >= nds_count) {
- printk(KERN_ERR "ixp2000: rx err, channel %d\n",
- desc->channel);
- goto err;
- }
-
- /* @@@ Make FCS stripping configurable. */
- desc->pkt_length -= 4;
-
- if (unlikely(!netif_running(nds[desc->channel])))
- goto err;
-
- skb = netdev_alloc_skb_ip_align(dev, desc->pkt_length);
- if (likely(skb != NULL)) {
- skb_copy_to_linear_data(skb, buf, desc->pkt_length);
- skb_put(skb, desc->pkt_length);
- skb->protocol = eth_type_trans(skb, nds[desc->channel]);
-
- netif_receive_skb(skb);
- }
-
-err:
- ixp2000_reg_write(RING_RX_PENDING, _desc);
- processed++;
- }
-
- return processed;
-}
-
-/* dev always points to nds[0]. */
-static int ixpdev_poll(struct napi_struct *napi, int budget)
-{
- struct ixpdev_priv *ip = container_of(napi, struct ixpdev_priv, napi);
- struct net_device *dev = ip->dev;
- int rx;
-
- rx = 0;
- do {
- ixp2000_reg_write(IXP2000_IRQ_THD_RAW_STATUS_A_0, 0x00ff);
-
- rx = ixpdev_rx(dev, rx, budget);
- if (rx >= budget)
- break;
- } while (ixp2000_reg_read(IXP2000_IRQ_THD_RAW_STATUS_A_0) & 0x00ff);
-
- napi_complete(napi);
- ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_SET_A_0, 0x00ff);
-
- return rx;
-}
-
-static void ixpdev_tx_complete(void)
-{
- int channel;
- u32 wake;
-
- wake = 0;
- while (1) {
- struct ixpdev_priv *ip;
- u32 desc;
- int entry;
-
- desc = ixp2000_reg_read(RING_TX_DONE);
- if (desc == 0)
- break;
-
- /* @@@ Check whether entries come back in order. */
- entry = (desc - TX_BUF_DESC_BASE) / sizeof(struct ixpdev_tx_desc);
- channel = tx_desc[entry].channel;
-
- if (channel < 0 || channel >= nds_count) {
- printk(KERN_ERR "ixp2000: txcomp channel index "
- "out of bounds (%d, %.8i, %d)\n",
- channel, (unsigned int)desc, entry);
- continue;
- }
-
- ip = netdev_priv(nds[channel]);
- if (ip->tx_queue_entries == TX_BUF_COUNT_PER_CHAN)
- wake |= 1 << channel;
- ip->tx_queue_entries--;
- }
-
- for (channel = 0; wake != 0; channel++) {
- if (wake & (1 << channel)) {
- netif_wake_queue(nds[channel]);
- wake &= ~(1 << channel);
- }
- }
-}
-
-static irqreturn_t ixpdev_interrupt(int irq, void *dev_id)
-{
- u32 status;
-
- status = ixp2000_reg_read(IXP2000_IRQ_THD_STATUS_A_0);
- if (status == 0)
- return IRQ_NONE;
-
- /*
- * Any of the eight receive units signaled RX?
- */
- if (status & 0x00ff) {
- struct net_device *dev = nds[0];
- struct ixpdev_priv *ip = netdev_priv(dev);
-
- ixp2000_reg_wrb(IXP2000_IRQ_THD_ENABLE_CLEAR_A_0, 0x00ff);
- if (likely(napi_schedule_prep(&ip->napi))) {
- __napi_schedule(&ip->napi);
- } else {
- printk(KERN_CRIT "ixp2000: irq while polling!!\n");
- }
- }
-
- /*
- * Any of the eight transmit units signaled TXdone?
- */
- if (status & 0xff00) {
- ixp2000_reg_wrb(IXP2000_IRQ_THD_RAW_STATUS_A_0, 0xff00);
- ixpdev_tx_complete();
- }
-
- return IRQ_HANDLED;
-}
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void ixpdev_poll_controller(struct net_device *dev)
-{
- disable_irq(IRQ_IXP2000_THDA0);
- ixpdev_interrupt(IRQ_IXP2000_THDA0, dev);
- enable_irq(IRQ_IXP2000_THDA0);
-}
-#endif
-
-static int ixpdev_open(struct net_device *dev)
-{
- struct ixpdev_priv *ip = netdev_priv(dev);
- int err;
-
- napi_enable(&ip->napi);
- if (!nds_open++) {
- err = request_irq(IRQ_IXP2000_THDA0, ixpdev_interrupt,
- IRQF_SHARED, "ixp2000_eth", nds);
- if (err) {
- nds_open--;
- napi_disable(&ip->napi);
- return err;
- }
-
- ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_SET_A_0, 0xffff);
- }
-
- set_port_admin_status(ip->channel, 1);
- netif_start_queue(dev);
-
- return 0;
-}
-
-static int ixpdev_close(struct net_device *dev)
-{
- struct ixpdev_priv *ip = netdev_priv(dev);
-
- netif_stop_queue(dev);
- napi_disable(&ip->napi);
- set_port_admin_status(ip->channel, 0);
-
- if (!--nds_open) {
- ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_CLEAR_A_0, 0xffff);
- free_irq(IRQ_IXP2000_THDA0, nds);
- }
-
- return 0;
-}
-
-static struct net_device_stats *ixpdev_get_stats(struct net_device *dev)
-{
- struct ixpdev_priv *ip = netdev_priv(dev);
-
- pm3386_get_stats(ip->channel, &(dev->stats));
-
- return &(dev->stats);
-}
-
-static const struct net_device_ops ixpdev_netdev_ops = {
- .ndo_open = ixpdev_open,
- .ndo_stop = ixpdev_close,
- .ndo_start_xmit = ixpdev_xmit,
- .ndo_change_mtu = eth_change_mtu,
- .ndo_validate_addr = eth_validate_addr,
- .ndo_set_mac_address = eth_mac_addr,
- .ndo_get_stats = ixpdev_get_stats,
-#ifdef CONFIG_NET_POLL_CONTROLLER
- .ndo_poll_controller = ixpdev_poll_controller,
-#endif
-};
-
-struct net_device *ixpdev_alloc(int channel, int sizeof_priv)
-{
- struct net_device *dev;
- struct ixpdev_priv *ip;
-
- dev = alloc_etherdev(sizeof_priv);
- if (dev == NULL)
- return NULL;
-
- dev->netdev_ops = &ixpdev_netdev_ops;
-
- dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
-
- ip = netdev_priv(dev);
- ip->dev = dev;
- netif_napi_add(dev, &ip->napi, ixpdev_poll, 64);
- ip->channel = channel;
- ip->tx_queue_entries = 0;
-
- return dev;
-}
-
-int ixpdev_init(int __nds_count, struct net_device **__nds,
- void (*__set_port_admin_status)(int port, int up))
-{
- int i;
- int err;
-
- BUILD_BUG_ON(RX_BUF_COUNT > 192 || TX_BUF_COUNT > 192);
-
- printk(KERN_INFO "IXP2000 MSF ethernet driver %s\n", DRV_MODULE_VERSION);
-
- nds_count = __nds_count;
- nds = __nds;
- set_port_admin_status = __set_port_admin_status;
-
- for (i = 0; i < RX_BUF_COUNT; i++) {
- void *buf;
-
- buf = (void *)get_zeroed_page(GFP_KERNEL);
- if (buf == NULL) {
- err = -ENOMEM;
- while (--i >= 0)
- free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));
- goto err_out;
- }
- rx_desc[i].buf_addr = virt_to_phys(buf);
- rx_desc[i].buf_length = PAGE_SIZE;
- }
-
- /* @@@ Maybe we shouldn't be preallocating TX buffers. */
- for (i = 0; i < TX_BUF_COUNT; i++) {
- void *buf;
-
- buf = (void *)get_zeroed_page(GFP_KERNEL);
- if (buf == NULL) {
- err = -ENOMEM;
- while (--i >= 0)
- free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));
- goto err_free_rx;
- }
- tx_desc[i].buf_addr = virt_to_phys(buf);
- }
-
- /* 256 entries, ring status set means 'empty', base address 0x0000. */
- ixp2000_reg_write(RING_RX_PENDING_BASE, 0x44000000);
- ixp2000_reg_write(RING_RX_PENDING_HEAD, 0x00000000);
- ixp2000_reg_write(RING_RX_PENDING_TAIL, 0x00000000);
-
- /* 256 entries, ring status set means 'full', base address 0x0400. */
- ixp2000_reg_write(RING_RX_DONE_BASE, 0x40000400);
- ixp2000_reg_write(RING_RX_DONE_HEAD, 0x00000000);
- ixp2000_reg_write(RING_RX_DONE_TAIL, 0x00000000);
-
- for (i = 0; i < RX_BUF_COUNT; i++) {
- ixp2000_reg_write(RING_RX_PENDING,
- RX_BUF_DESC_BASE + (i * sizeof(struct ixpdev_rx_desc)));
- }
-
- ixp2000_uengine_load(0, &ixp2400_rx);
- ixp2000_uengine_start_contexts(0, 0xff);
-
- /* 256 entries, ring status set means 'empty', base address 0x0800. */
- ixp2000_reg_write(RING_TX_PENDING_BASE, 0x44000800);
- ixp2000_reg_write(RING_TX_PENDING_HEAD, 0x00000000);
- ixp2000_reg_write(RING_TX_PENDING_TAIL, 0x00000000);
-
- /* 256 entries, ring status set means 'full', base address 0x0c00. */
- ixp2000_reg_write(RING_TX_DONE_BASE, 0x40000c00);
- ixp2000_reg_write(RING_TX_DONE_HEAD, 0x00000000);
- ixp2000_reg_write(RING_TX_DONE_TAIL, 0x00000000);
-
- ixp2000_uengine_load(1, &ixp2400_tx);
- ixp2000_uengine_start_contexts(1, 0xff);
-
- for (i = 0; i < nds_count; i++) {
- err = register_netdev(nds[i]);
- if (err) {
- while (--i >= 0)
- unregister_netdev(nds[i]);
- goto err_free_tx;
- }
- }
-
- for (i = 0; i < nds_count; i++) {
- printk(KERN_INFO "%s: IXP2000 MSF ethernet (port %d), %pM.\n",
- nds[i]->name, i, nds[i]->dev_addr);
- }
-
- return 0;
-
-err_free_tx:
- for (i = 0; i < TX_BUF_COUNT; i++)
- free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));
-
-err_free_rx:
- for (i = 0; i < RX_BUF_COUNT; i++)
- free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));
-
-err_out:
- return err;
-}
-
-void ixpdev_deinit(void)
-{
- int i;
-
- /* @@@ Flush out pending packets. */
-
- for (i = 0; i < nds_count; i++)
- unregister_netdev(nds[i]);
-
- ixp2000_uengine_stop_contexts(1, 0xff);
- ixp2000_uengine_stop_contexts(0, 0xff);
- ixp2000_uengine_reset(0x3);
-
- for (i = 0; i < TX_BUF_COUNT; i++)
- free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));
-
- for (i = 0; i < RX_BUF_COUNT; i++)
- free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));
-}
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev.h b/drivers/net/ethernet/xscale/ixp2000/ixpdev.h
deleted file mode 100644
index 391ece6..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixpdev.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * IXP2000 MSF network device driver
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __IXPDEV_H
-#define __IXPDEV_H
-
-struct ixpdev_priv
-{
- struct net_device *dev;
- struct napi_struct napi;
- int channel;
- int tx_queue_entries;
-};
-
-struct net_device *ixpdev_alloc(int channel, int sizeof_priv);
-int ixpdev_init(int num_ports, struct net_device **nds,
- void (*set_port_admin_status)(int port, int up));
-void ixpdev_deinit(void);
-
-
-#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h b/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h
deleted file mode 100644
index 86aa08e..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * IXP2000 MSF network device driver
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __IXPDEV_PRIV_H
-#define __IXPDEV_PRIV_H
-
-#define RX_BUF_DESC_BASE 0x00001000
-#define RX_BUF_COUNT ((3 * PAGE_SIZE) / (4 * sizeof(struct ixpdev_rx_desc)))
-#define TX_BUF_DESC_BASE 0x00002000
-#define TX_BUF_COUNT ((3 * PAGE_SIZE) / (4 * sizeof(struct ixpdev_tx_desc)))
-#define TX_BUF_COUNT_PER_CHAN (TX_BUF_COUNT / 4)
-
-#define RING_RX_PENDING ((u32 *)IXP2000_SCRATCH_RING_VIRT_BASE)
-#define RING_RX_DONE ((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 4))
-#define RING_TX_PENDING ((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 8))
-#define RING_TX_DONE ((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 12))
-
-#define SCRATCH_REG(x) ((u32 *)(IXP2000_GLOBAL_REG_VIRT_BASE | 0x0800 | (x)))
-#define RING_RX_PENDING_BASE SCRATCH_REG(0x00)
-#define RING_RX_PENDING_HEAD SCRATCH_REG(0x04)
-#define RING_RX_PENDING_TAIL SCRATCH_REG(0x08)
-#define RING_RX_DONE_BASE SCRATCH_REG(0x10)
-#define RING_RX_DONE_HEAD SCRATCH_REG(0x14)
-#define RING_RX_DONE_TAIL SCRATCH_REG(0x18)
-#define RING_TX_PENDING_BASE SCRATCH_REG(0x20)
-#define RING_TX_PENDING_HEAD SCRATCH_REG(0x24)
-#define RING_TX_PENDING_TAIL SCRATCH_REG(0x28)
-#define RING_TX_DONE_BASE SCRATCH_REG(0x30)
-#define RING_TX_DONE_HEAD SCRATCH_REG(0x34)
-#define RING_TX_DONE_TAIL SCRATCH_REG(0x38)
-
-struct ixpdev_rx_desc
-{
- u32 buf_addr;
- u32 buf_length;
- u32 channel;
- u32 pkt_length;
-};
-
-struct ixpdev_tx_desc
-{
- u32 buf_addr;
- u32 pkt_length;
- u32 channel;
- u32 unused;
-};
-
-
-#endif
diff --git a/drivers/net/ethernet/xscale/ixp2000/pm3386.c b/drivers/net/ethernet/xscale/ixp2000/pm3386.c
deleted file mode 100644
index e08d3f9..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/pm3386.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/*
- * Helper functions for the PM3386s on the Radisys ENP2611
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <asm/io.h>
-#include "pm3386.h"
-
-/*
- * Read from register 'reg' of PM3386 device 'pm'.
- */
-static u16 pm3386_reg_read(int pm, int reg)
-{
- void *_reg;
- u16 value;
-
- _reg = (void *)ENP2611_PM3386_0_VIRT_BASE;
- if (pm == 1)
- _reg = (void *)ENP2611_PM3386_1_VIRT_BASE;
-
- value = *((volatile u16 *)(_reg + (reg << 1)));
-
-// printk(KERN_INFO "pm3386_reg_read(%d, %.3x) = %.8x\n", pm, reg, value);
-
- return value;
-}
-
-/*
- * Write to register 'reg' of PM3386 device 'pm', and perform
- * a readback from the identification register.
- */
-static void pm3386_reg_write(int pm, int reg, u16 value)
-{
- void *_reg;
- u16 dummy;
-
-// printk(KERN_INFO "pm3386_reg_write(%d, %.3x, %.8x)\n", pm, reg, value);
-
- _reg = (void *)ENP2611_PM3386_0_VIRT_BASE;
- if (pm == 1)
- _reg = (void *)ENP2611_PM3386_1_VIRT_BASE;
-
- *((volatile u16 *)(_reg + (reg << 1))) = value;
-
- dummy = *((volatile u16 *)_reg);
- __asm__ __volatile__("mov %0, %0" : "+r" (dummy));
-}
-
-/*
- * Read from port 'port' register 'reg', where the registers
- * for the different ports are 'spacing' registers apart.
- */
-static u16 pm3386_port_reg_read(int port, int _reg, int spacing)
-{
- int reg;
-
- reg = _reg;
- if (port & 1)
- reg += spacing;
-
- return pm3386_reg_read(port >> 1, reg);
-}
-
-/*
- * Write to port 'port' register 'reg', where the registers
- * for the different ports are 'spacing' registers apart.
- */
-static void pm3386_port_reg_write(int port, int _reg, int spacing, u16 value)
-{
- int reg;
-
- reg = _reg;
- if (port & 1)
- reg += spacing;
-
- pm3386_reg_write(port >> 1, reg, value);
-}
-
-int pm3386_secondary_present(void)
-{
- return pm3386_reg_read(1, 0) == 0x3386;
-}
-
-void pm3386_reset(void)
-{
- u8 mac[3][6];
- int secondary;
-
- secondary = pm3386_secondary_present();
-
- /* Save programmed MAC addresses. */
- pm3386_get_mac(0, mac[0]);
- pm3386_get_mac(1, mac[1]);
- if (secondary)
- pm3386_get_mac(2, mac[2]);
-
- /* Assert analog and digital reset. */
- pm3386_reg_write(0, 0x002, 0x0060);
- if (secondary)
- pm3386_reg_write(1, 0x002, 0x0060);
- mdelay(1);
-
- /* Deassert analog reset. */
- pm3386_reg_write(0, 0x002, 0x0062);
- if (secondary)
- pm3386_reg_write(1, 0x002, 0x0062);
- mdelay(10);
-
- /* Deassert digital reset. */
- pm3386_reg_write(0, 0x002, 0x0063);
- if (secondary)
- pm3386_reg_write(1, 0x002, 0x0063);
- mdelay(10);
-
- /* Restore programmed MAC addresses. */
- pm3386_set_mac(0, mac[0]);
- pm3386_set_mac(1, mac[1]);
- if (secondary)
- pm3386_set_mac(2, mac[2]);
-
- /* Disable carrier on all ports. */
- pm3386_set_carrier(0, 0);
- pm3386_set_carrier(1, 0);
- if (secondary)
- pm3386_set_carrier(2, 0);
-}
-
-static u16 swaph(u16 x)
-{
- return ((x << 8) | (x >> 8)) & 0xffff;
-}
-
-int pm3386_port_count(void)
-{
- return 2 + pm3386_secondary_present();
-}
-
-void pm3386_init_port(int port)
-{
- int pm = port >> 1;
-
- /*
- * Work around ENP2611 bootloader programming MAC address
- * in reverse.
- */
- if (pm3386_port_reg_read(port, 0x30a, 0x100) == 0x0000 &&
- (pm3386_port_reg_read(port, 0x309, 0x100) & 0xff00) == 0x5000) {
- u16 temp[3];
-
- temp[0] = pm3386_port_reg_read(port, 0x308, 0x100);
- temp[1] = pm3386_port_reg_read(port, 0x309, 0x100);
- temp[2] = pm3386_port_reg_read(port, 0x30a, 0x100);
- pm3386_port_reg_write(port, 0x308, 0x100, swaph(temp[2]));
- pm3386_port_reg_write(port, 0x309, 0x100, swaph(temp[1]));
- pm3386_port_reg_write(port, 0x30a, 0x100, swaph(temp[0]));
- }
-
- /*
- * Initialise narrowbanding mode. See application note 2010486
- * for more information. (@@@ We also need to issue a reset
- * when ROOL or DOOL are detected.)
- */
- pm3386_port_reg_write(port, 0x708, 0x10, 0xd055);
- udelay(500);
- pm3386_port_reg_write(port, 0x708, 0x10, 0x5055);
-
- /*
- * SPI-3 ingress block. Set 64 bytes SPI-3 burst size
- * towards SPI-3 bridge.
- */
- pm3386_port_reg_write(port, 0x122, 0x20, 0x0002);
-
- /*
- * Enable ingress protocol checking, and soft reset the
- * SPI-3 ingress block.
- */
- pm3386_reg_write(pm, 0x103, 0x0003);
- while (!(pm3386_reg_read(pm, 0x103) & 0x80))
- ;
-
- /*
- * SPI-3 egress block. Gather 12288 bytes of the current
- * packet in the TX fifo before initiating transmit on the
- * SERDES interface. (Prevents TX underflows.)
- */
- pm3386_port_reg_write(port, 0x221, 0x20, 0x0007);
-
- /*
- * Enforce odd parity from the SPI-3 bridge, and soft reset
- * the SPI-3 egress block.
- */
- pm3386_reg_write(pm, 0x203, 0x000d & ~(4 << (port & 1)));
- while ((pm3386_reg_read(pm, 0x203) & 0x000c) != 0x000c)
- ;
-
- /*
- * EGMAC block. Set this channels to reject long preambles,
- * not send or transmit PAUSE frames, enable preamble checking,
- * disable frame length checking, enable FCS appending, enable
- * TX frame padding.
- */
- pm3386_port_reg_write(port, 0x302, 0x100, 0x0113);
-
- /*
- * Soft reset the EGMAC block.
- */
- pm3386_port_reg_write(port, 0x301, 0x100, 0x8000);
- pm3386_port_reg_write(port, 0x301, 0x100, 0x0000);
-
- /*
- * Auto-sense autonegotiation status.
- */
- pm3386_port_reg_write(port, 0x306, 0x100, 0x0100);
-
- /*
- * Allow reception of jumbo frames.
- */
- pm3386_port_reg_write(port, 0x310, 0x100, 9018);
-
- /*
- * Allow transmission of jumbo frames.
- */
- pm3386_port_reg_write(port, 0x336, 0x100, 9018);
-
- /* @@@ Should set 0x337/0x437 (RX forwarding threshold.) */
-
- /*
- * Set autonegotiation parameters to 'no PAUSE, full duplex.'
- */
- pm3386_port_reg_write(port, 0x31c, 0x100, 0x0020);
-
- /*
- * Enable and restart autonegotiation.
- */
- pm3386_port_reg_write(port, 0x318, 0x100, 0x0003);
- pm3386_port_reg_write(port, 0x318, 0x100, 0x0002);
-}
-
-void pm3386_get_mac(int port, u8 *mac)
-{
- u16 temp;
-
- temp = pm3386_port_reg_read(port, 0x308, 0x100);
- mac[0] = temp & 0xff;
- mac[1] = (temp >> 8) & 0xff;
-
- temp = pm3386_port_reg_read(port, 0x309, 0x100);
- mac[2] = temp & 0xff;
- mac[3] = (temp >> 8) & 0xff;
-
- temp = pm3386_port_reg_read(port, 0x30a, 0x100);
- mac[4] = temp & 0xff;
- mac[5] = (temp >> 8) & 0xff;
-}
-
-void pm3386_set_mac(int port, u8 *mac)
-{
- pm3386_port_reg_write(port, 0x308, 0x100, (mac[1] << 8) | mac[0]);
- pm3386_port_reg_write(port, 0x309, 0x100, (mac[3] << 8) | mac[2]);
- pm3386_port_reg_write(port, 0x30a, 0x100, (mac[5] << 8) | mac[4]);
-}
-
-static u32 pm3386_get_stat(int port, u16 base)
-{
- u32 value;
-
- value = pm3386_port_reg_read(port, base, 0x100);
- value |= pm3386_port_reg_read(port, base + 1, 0x100) << 16;
-
- return value;
-}
-
-void pm3386_get_stats(int port, struct net_device_stats *stats)
-{
- /*
- * Snapshot statistics counters.
- */
- pm3386_port_reg_write(port, 0x500, 0x100, 0x0001);
- while (pm3386_port_reg_read(port, 0x500, 0x100) & 0x0001)
- ;
-
- memset(stats, 0, sizeof(*stats));
-
- stats->rx_packets = pm3386_get_stat(port, 0x510);
- stats->tx_packets = pm3386_get_stat(port, 0x590);
- stats->rx_bytes = pm3386_get_stat(port, 0x514);
- stats->tx_bytes = pm3386_get_stat(port, 0x594);
- /* @@@ Add other stats. */
-}
-
-void pm3386_set_carrier(int port, int state)
-{
- pm3386_port_reg_write(port, 0x703, 0x10, state ? 0x1001 : 0x0000);
-}
-
-int pm3386_is_link_up(int port)
-{
- u16 temp;
-
- temp = pm3386_port_reg_read(port, 0x31a, 0x100);
- temp = pm3386_port_reg_read(port, 0x31a, 0x100);
-
- return !!(temp & 0x0002);
-}
-
-void pm3386_enable_rx(int port)
-{
- u16 temp;
-
- temp = pm3386_port_reg_read(port, 0x303, 0x100);
- temp |= 0x1000;
- pm3386_port_reg_write(port, 0x303, 0x100, temp);
-}
-
-void pm3386_disable_rx(int port)
-{
- u16 temp;
-
- temp = pm3386_port_reg_read(port, 0x303, 0x100);
- temp &= 0xefff;
- pm3386_port_reg_write(port, 0x303, 0x100, temp);
-}
-
-void pm3386_enable_tx(int port)
-{
- u16 temp;
-
- temp = pm3386_port_reg_read(port, 0x303, 0x100);
- temp |= 0x4000;
- pm3386_port_reg_write(port, 0x303, 0x100, temp);
-}
-
-void pm3386_disable_tx(int port)
-{
- u16 temp;
-
- temp = pm3386_port_reg_read(port, 0x303, 0x100);
- temp &= 0xbfff;
- pm3386_port_reg_write(port, 0x303, 0x100, temp);
-}
-
-MODULE_LICENSE("GPL");
diff --git a/drivers/net/ethernet/xscale/ixp2000/pm3386.h b/drivers/net/ethernet/xscale/ixp2000/pm3386.h
deleted file mode 100644
index cc4183d..0000000
--- a/drivers/net/ethernet/xscale/ixp2000/pm3386.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Helper functions for the PM3386s on the Radisys ENP2611
- * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
- * Dedicated to Marija Kulikova.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __PM3386_H
-#define __PM3386_H
-
-void pm3386_reset(void);
-int pm3386_port_count(void);
-void pm3386_init_port(int port);
-void pm3386_get_mac(int port, u8 *mac);
-void pm3386_set_mac(int port, u8 *mac);
-void pm3386_get_stats(int port, struct net_device_stats *stats);
-void pm3386_set_carrier(int port, int state);
-int pm3386_is_link_up(int port);
-void pm3386_enable_rx(int port);
-void pm3386_disable_rx(int port);
-void pm3386_enable_tx(int port);
-void pm3386_disable_tx(int port);
-
-
-#endif
--
1.7.5.4
^ permalink raw reply related
* Re: [PATCH net-next 25/34] xircom_cb: stop using net_device.{base_addr, irq} and convert to __iomem.
From: Grant Grundler @ 2012-04-04 1:23 UTC (permalink / raw)
To: Francois Romieu; +Cc: netdev, David Miller, Grant Grundler
In-Reply-To: <d01b498a140cc8f7245d2c05443706807f62e62a.1331814082.git.romieu@fr.zoreil.com>
On Thu, Mar 15, 2012 at 6:57 AM, Francois Romieu <romieu@fr.zoreil.com> wrote:
> Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
> Cc: Grant Grundler <grundler@parisc-linux.org>
> ---
> drivers/net/ethernet/dec/tulip/xircom_cb.c | 37 ++++++++++++++++++----------
> 1 files changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/net/ethernet/dec/tulip/xircom_cb.c b/drivers/net/ethernet/dec/tulip/xircom_cb.c
> index cbcc6d6..4aed477 100644
> --- a/drivers/net/ethernet/dec/tulip/xircom_cb.c
> +++ b/drivers/net/ethernet/dec/tulip/xircom_cb.c
> @@ -41,7 +41,9 @@ MODULE_DESCRIPTION("Xircom Cardbus ethernet driver");
> MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>");
> MODULE_LICENSE("GPL");
>
> -
> +#define outl iowrite32
> +#define inl ioread32
> +#define inb ioread8
Everything but the hunk to redefine inl/outl functions looks good to
me. IIRC, you offered to resubmit with outl/inl calls replaced with
respective iowrite/ioread calls. I still think that's preferable even
if the patch is much bigger.
thanks,
grant
>
> /* IO registers on the card, offsets */
> #define CSR0 0x00
> @@ -83,7 +85,7 @@ struct xircom_private {
>
> struct sk_buff *tx_skb[4];
>
> - unsigned long io_port;
> + void __iomem *io_port;
> int open;
>
> /* transmit_used is the rotating counter that indicates which transmit
> @@ -253,10 +255,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
>
> private->dev = dev;
> private->pdev = pdev;
> - private->io_port = pci_resource_start(pdev, 0);
> +
> + /* IO range. */
> + private->io_port = pci_iomap(pdev, 0, 0);
> + if (!private->io_port)
> + goto reg_fail;
> +
> spin_lock_init(&private->lock);
> - dev->irq = pdev->irq;
> - dev->base_addr = private->io_port;
>
> initialize_card(private);
> read_mac_address(private);
> @@ -268,7 +273,7 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
> rc = register_netdev(dev);
> if (rc < 0) {
> pr_err("%s: netdevice registration failed\n", __func__);
> - goto reg_fail;
> + goto err_unmap;
> }
>
> netdev_info(dev, "Xircom cardbus revision %i at irq %i\n",
> @@ -286,6 +291,8 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
> out:
> return rc;
>
> +err_unmap:
> + pci_iounmap(pdev, private->io_port);
> reg_fail:
> pci_set_drvdata(pdev, NULL);
> dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle);
> @@ -314,6 +321,7 @@ static void __devexit xircom_remove(struct pci_dev *pdev)
> struct device *d = &pdev->dev;
>
> unregister_netdev(dev);
> + pci_iounmap(pdev, card->io_port);
> pci_set_drvdata(pdev, NULL);
> dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle);
> dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle);
> @@ -438,11 +446,11 @@ static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
> static int xircom_open(struct net_device *dev)
> {
> struct xircom_private *xp = netdev_priv(dev);
> + const int irq = xp->pdev->irq;
> int retval;
>
> - netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n",
> - dev->irq);
> - retval = request_irq(dev->irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);
> + netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq);
> + retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);
> if (retval)
> return retval;
>
> @@ -474,7 +482,7 @@ static int xircom_close(struct net_device *dev)
> spin_unlock_irqrestore(&card->lock,flags);
>
> card->open = 0;
> - free_irq(dev->irq,dev);
> + free_irq(card->pdev->irq, dev);
>
> return 0;
>
> @@ -484,9 +492,12 @@ static int xircom_close(struct net_device *dev)
> #ifdef CONFIG_NET_POLL_CONTROLLER
> static void xircom_poll_controller(struct net_device *dev)
> {
> - disable_irq(dev->irq);
> - xircom_interrupt(dev->irq, dev);
> - enable_irq(dev->irq);
> + struct xircom_private *xp = netdev_priv(dev);
> + const int irq = xp->pdev->irq;
> +
> + disable_irq(irq);
> + xircom_interrupt(irq, dev);
> + enable_irq(irq);
> }
> #endif
>
> --
> 1.7.7.6
>
^ permalink raw reply
* Re: [PATCH net-next 26/34] de2104x: stop using net_device.{base_addr, irq}.
From: Grant Grundler @ 2012-04-04 1:15 UTC (permalink / raw)
To: Francois Romieu; +Cc: netdev, David Miller, Grant Grundler
In-Reply-To: <15bee571dc5bdd3164718b6030d994628c7ddc62.1331814082.git.romieu@fr.zoreil.com>
On Thu, Mar 15, 2012 at 6:57 AM, Francois Romieu <romieu@fr.zoreil.com> wrote:
> Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
> Cc: Grant Grundler <grundler@parisc-linux.org>
Acked-by: Grant Grundler <grundler@parisc-linux.org>
thanks!
grant
> ---
> drivers/net/ethernet/dec/tulip/de2104x.c | 34 ++++++++++++++---------------
> 1 files changed, 16 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/net/ethernet/dec/tulip/de2104x.c b/drivers/net/ethernet/dec/tulip/de2104x.c
> index 68f1c39..61cc093 100644
> --- a/drivers/net/ethernet/dec/tulip/de2104x.c
> +++ b/drivers/net/ethernet/dec/tulip/de2104x.c
> @@ -1380,6 +1380,7 @@ static void de_free_rings (struct de_private *de)
> static int de_open (struct net_device *dev)
> {
> struct de_private *de = netdev_priv(dev);
> + const int irq = de->pdev->irq;
> int rc;
>
> netif_dbg(de, ifup, dev, "enabling interface\n");
> @@ -1394,10 +1395,9 @@ static int de_open (struct net_device *dev)
>
> dw32(IntrMask, 0);
>
> - rc = request_irq(dev->irq, de_interrupt, IRQF_SHARED, dev->name, dev);
> + rc = request_irq(irq, de_interrupt, IRQF_SHARED, dev->name, dev);
> if (rc) {
> - netdev_err(dev, "IRQ %d request failure, err=%d\n",
> - dev->irq, rc);
> + netdev_err(dev, "IRQ %d request failure, err=%d\n", irq, rc);
> goto err_out_free;
> }
>
> @@ -1413,7 +1413,7 @@ static int de_open (struct net_device *dev)
> return 0;
>
> err_out_free_irq:
> - free_irq(dev->irq, dev);
> + free_irq(irq, dev);
> err_out_free:
> de_free_rings(de);
> return rc;
> @@ -1434,7 +1434,7 @@ static int de_close (struct net_device *dev)
> netif_carrier_off(dev);
> spin_unlock_irqrestore(&de->lock, flags);
>
> - free_irq(dev->irq, dev);
> + free_irq(de->pdev->irq, dev);
>
> de_free_rings(de);
> de_adapter_sleep(de);
> @@ -1444,6 +1444,7 @@ static int de_close (struct net_device *dev)
> static void de_tx_timeout (struct net_device *dev)
> {
> struct de_private *de = netdev_priv(dev);
> + const int irq = de->pdev->irq;
>
> netdev_dbg(dev, "NIC status %08x mode %08x sia %08x desc %u/%u/%u\n",
> dr32(MacStatus), dr32(MacMode), dr32(SIAStatus),
> @@ -1451,7 +1452,7 @@ static void de_tx_timeout (struct net_device *dev)
>
> del_timer_sync(&de->media_timer);
>
> - disable_irq(dev->irq);
> + disable_irq(irq);
> spin_lock_irq(&de->lock);
>
> de_stop_hw(de);
> @@ -1459,12 +1460,12 @@ static void de_tx_timeout (struct net_device *dev)
> netif_carrier_off(dev);
>
> spin_unlock_irq(&de->lock);
> - enable_irq(dev->irq);
> + enable_irq(irq);
>
> /* Update the error counts. */
> __de_get_stats(de);
>
> - synchronize_irq(dev->irq);
> + synchronize_irq(irq);
> de_clean_rings(de);
>
> de_init_rings(de);
> @@ -2024,8 +2025,6 @@ static int __devinit de_init_one (struct pci_dev *pdev,
> goto err_out_res;
> }
>
> - dev->irq = pdev->irq;
> -
> /* obtain and check validity of PCI I/O address */
> pciaddr = pci_resource_start(pdev, 1);
> if (!pciaddr) {
> @@ -2050,7 +2049,6 @@ static int __devinit de_init_one (struct pci_dev *pdev,
> pciaddr, pci_name(pdev));
> goto err_out_res;
> }
> - dev->base_addr = (unsigned long) regs;
> de->regs = regs;
>
> de_adapter_wake(de);
> @@ -2078,11 +2076,9 @@ static int __devinit de_init_one (struct pci_dev *pdev,
> goto err_out_iomap;
>
> /* print info about board and interface just registered */
> - netdev_info(dev, "%s at 0x%lx, %pM, IRQ %d\n",
> + netdev_info(dev, "%s at %p, %pM, IRQ %d\n",
> de->de21040 ? "21040" : "21041",
> - dev->base_addr,
> - dev->dev_addr,
> - dev->irq);
> + regs, dev->dev_addr, pdev->irq);
>
> pci_set_drvdata(pdev, dev);
>
> @@ -2130,9 +2126,11 @@ static int de_suspend (struct pci_dev *pdev, pm_message_t state)
>
> rtnl_lock();
> if (netif_running (dev)) {
> + const int irq = pdev->irq;
> +
> del_timer_sync(&de->media_timer);
>
> - disable_irq(dev->irq);
> + disable_irq(irq);
> spin_lock_irq(&de->lock);
>
> de_stop_hw(de);
> @@ -2141,12 +2139,12 @@ static int de_suspend (struct pci_dev *pdev, pm_message_t state)
> netif_carrier_off(dev);
>
> spin_unlock_irq(&de->lock);
> - enable_irq(dev->irq);
> + enable_irq(irq);
>
> /* Update the error counts. */
> __de_get_stats(de);
>
> - synchronize_irq(dev->irq);
> + synchronize_irq(irq);
> de_clean_rings(de);
>
> de_adapter_sleep(de);
> --
> 1.7.7.6
>
^ permalink raw reply
* Re: [PATCH net-next 24/34] xircom_cb: fix device probe error path.
From: Grant Grundler @ 2012-04-04 1:10 UTC (permalink / raw)
To: Francois Romieu; +Cc: netdev, David Miller, Grant Grundler
In-Reply-To: <c55334ebf0479837862671e84137f2ff3ef55279.1331814082.git.romieu@fr.zoreil.com>
On Thu, Mar 15, 2012 at 6:57 AM, Francois Romieu <romieu@fr.zoreil.com> wrote:
> - unbalanced pci_disable_device
> - PCI ressources were not released
> - mismatching pci_alloc_.../kfree pairs are replaced by DMA alloc helpers.
>
> Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
> Cc: Grant Grundler <grundler@parisc-linux.org>
Francois,
Apologies for such a long delay to review. This looks good to me.
Acked-by: Grant Grundler <grundler@parisc-linux.org>
thanks,
grundler
> ---
> drivers/net/ethernet/dec/tulip/xircom_cb.c | 53 ++++++++++++++++++----------
> 1 files changed, 34 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/net/ethernet/dec/tulip/xircom_cb.c b/drivers/net/ethernet/dec/tulip/xircom_cb.c
> index fdb329f..cbcc6d6 100644
> --- a/drivers/net/ethernet/dec/tulip/xircom_cb.c
> +++ b/drivers/net/ethernet/dec/tulip/xircom_cb.c
> @@ -192,15 +192,18 @@ static const struct net_device_ops netdev_ops = {
> */
> static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> {
> + struct device *d = &pdev->dev;
> struct net_device *dev = NULL;
> struct xircom_private *private;
> unsigned long flags;
> unsigned short tmp16;
> + int rc;
>
> /* First do the PCI initialisation */
>
> - if (pci_enable_device(pdev))
> - return -ENODEV;
> + rc = pci_enable_device(pdev);
> + if (rc < 0)
> + goto out;
>
> /* disable all powermanagement */
> pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000);
> @@ -211,11 +214,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
> pci_read_config_word (pdev,PCI_STATUS, &tmp16);
> pci_write_config_word (pdev, PCI_STATUS,tmp16);
>
> - if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) {
> + rc = pci_request_regions(pdev, "xircom_cb");
> + if (rc < 0) {
> pr_err("%s: failed to allocate io-region\n", __func__);
> - return -ENODEV;
> + goto err_disable;
> }
>
> + rc = -ENOMEM;
> /*
> Before changing the hardware, allocate the memory.
> This way, we can fail gracefully if not enough memory
> @@ -223,17 +228,21 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
> */
> dev = alloc_etherdev(sizeof(struct xircom_private));
> if (!dev)
> - goto device_fail;
> + goto err_release;
>
> private = netdev_priv(dev);
>
> /* Allocate the send/receive buffers */
> - private->rx_buffer = pci_alloc_consistent(pdev,8192,&private->rx_dma_handle);
> + private->rx_buffer = dma_alloc_coherent(d, 8192,
> + &private->rx_dma_handle,
> + GFP_KERNEL);
> if (private->rx_buffer == NULL) {
> pr_err("%s: no memory for rx buffer\n", __func__);
> goto rx_buf_fail;
> }
> - private->tx_buffer = pci_alloc_consistent(pdev,8192,&private->tx_dma_handle);
> + private->tx_buffer = dma_alloc_coherent(d, 8192,
> + &private->tx_dma_handle,
> + GFP_KERNEL);
> if (private->tx_buffer == NULL) {
> pr_err("%s: no memory for tx buffer\n", __func__);
> goto tx_buf_fail;
> @@ -256,7 +265,8 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
> dev->netdev_ops = &netdev_ops;
> pci_set_drvdata(pdev, dev);
>
> - if (register_netdev(dev)) {
> + rc = register_netdev(dev);
> + if (rc < 0) {
> pr_err("%s: netdevice registration failed\n", __func__);
> goto reg_fail;
> }
> @@ -273,17 +283,21 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_
> spin_unlock_irqrestore(&private->lock,flags);
>
> trigger_receive(private);
> -
> - return 0;
> +out:
> + return rc;
>
> reg_fail:
> - kfree(private->tx_buffer);
> + pci_set_drvdata(pdev, NULL);
> + dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle);
> tx_buf_fail:
> - kfree(private->rx_buffer);
> + dma_free_coherent(d, 8192, private->rx_buffer, private->rx_dma_handle);
> rx_buf_fail:
> free_netdev(dev);
> -device_fail:
> - return -ENODEV;
> +err_release:
> + pci_release_regions(pdev);
> +err_disable:
> + pci_disable_device(pdev);
> + goto out;
> }
>
>
> @@ -297,14 +311,15 @@ static void __devexit xircom_remove(struct pci_dev *pdev)
> {
> struct net_device *dev = pci_get_drvdata(pdev);
> struct xircom_private *card = netdev_priv(dev);
> + struct device *d = &pdev->dev;
>
> - pci_free_consistent(pdev,8192,card->rx_buffer,card->rx_dma_handle);
> - pci_free_consistent(pdev,8192,card->tx_buffer,card->tx_dma_handle);
> -
> - release_region(dev->base_addr, 128);
> unregister_netdev(dev);
> - free_netdev(dev);
> pci_set_drvdata(pdev, NULL);
> + dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle);
> + dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle);
> + free_netdev(dev);
> + pci_release_regions(pdev);
> + pci_disable_device(pdev);
> }
>
> static irqreturn_t xircom_interrupt(int irq, void *dev_instance)
> --
> 1.7.7.6
>
^ permalink raw reply
* RE: [PATCH wireless-next] wireless: Remove unnecessary ; from while (0) macros
From: Bing Zhao @ 2012-04-04 0:13 UTC (permalink / raw)
To: Joe Perches, John W. Linville
Cc: Christian Lamparter, Brett Rudley, Roland Vossen,
Arend van Spriel, Franky (Zhenhui) Lin, Kan Yan, Larry Finger,
Chaoming Li,
linux-wireless-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, LKML
In-Reply-To: <1333489609.2695.14.camel@joe2Laptop>
> Semicolons are not necessary after macros that end in while (0).
> Remove them.
>
> Simplify the macros with tests of
> do { if (foo>size) memset1; else memset2;} while (0);
> to a single line memset(,,min_t(size_t, foo, size))
>
> Signed-off-by: Joe Perches <joe@perches.com>
> ---
> drivers/net/wireless/ath/carl9170/cmd.h | 6 +++---
> drivers/net/wireless/brcm80211/brcmsmac/d11.h | 2 +-
> drivers/net/wireless/mwifiex/sdio.h | 8 ++++----
For mwifiex part,
Acked-by: Bing Zhao <bzhao@marvell.com>
Thanks,
Bing
> drivers/net/wireless/rtlwifi/rtl8192ce/trx.h | 7 +------
> drivers/net/wireless/rtlwifi/rtl8192de/trx.h | 8 ++------
> drivers/net/wireless/rtlwifi/rtl8192se/def.h | 7 +------
> drivers/net/wireless/rtlwifi/rtl8192se/fw.h | 6 +++---
> 7 files changed, 15 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/carl9170/cmd.h b/drivers/net/wireless/ath/carl9170/cmd.h
> index 885c427..65919c9 100644
> --- a/drivers/net/wireless/ath/carl9170/cmd.h
> +++ b/drivers/net/wireless/ath/carl9170/cmd.h
> @@ -114,7 +114,7 @@ __regwrite_out : \
>
> #define carl9170_regwrite_result() \
> __err; \
> -} while (0);
> +} while (0)
>
>
> #define carl9170_async_regwrite_get_buf() \
> @@ -126,7 +126,7 @@ do { \
> __err = -ENOMEM; \
> goto __async_regwrite_out; \
> } \
> -} while (0);
> +} while (0)
>
> #define carl9170_async_regwrite_begin(carl) \
> do { \
> @@ -169,6 +169,6 @@ __async_regwrite_out: \
>
> #define carl9170_async_regwrite_result() \
> __err; \
> -} while (0);
> +} while (0)
>
> #endif /* __CMD_H */
> diff --git a/drivers/net/wireless/brcm80211/brcmsmac/d11.h
> b/drivers/net/wireless/brcm80211/brcmsmac/d11.h
> index 1948cb2..3f659e0 100644
> --- a/drivers/net/wireless/brcm80211/brcmsmac/d11.h
> +++ b/drivers/net/wireless/brcm80211/brcmsmac/d11.h
> @@ -733,7 +733,7 @@ struct cck_phy_hdr {
> do { \
> plcp[1] = len & 0xff; \
> plcp[2] = ((len >> 8) & 0xff); \
> - } while (0);
> + } while (0)
>
> #define BRCMS_SET_MIMO_PLCP_AMPDU(plcp) (plcp[3] |= MIMO_PLCP_AMPDU)
> #define BRCMS_CLR_MIMO_PLCP_AMPDU(plcp) (plcp[3] &= ~MIMO_PLCP_AMPDU)
> diff --git a/drivers/net/wireless/mwifiex/sdio.h b/drivers/net/wireless/mwifiex/sdio.h
> index a3fb322..0ead152 100644
> --- a/drivers/net/wireless/mwifiex/sdio.h
> +++ b/drivers/net/wireless/mwifiex/sdio.h
> @@ -193,7 +193,7 @@
> a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt+1+(MAX_PORT - \
> a->mp_end_port))); \
> a->mpa_tx.pkt_cnt++; \
> -} while (0);
> +} while (0)
>
> /* SDIO Tx aggregation limit ? */
> #define MP_TX_AGGR_PKT_LIMIT_REACHED(a) \
> @@ -211,7 +211,7 @@
> a->mpa_tx.buf_len = 0; \
> a->mpa_tx.ports = 0; \
> a->mpa_tx.start_port = 0; \
> -} while (0);
> +} while (0)
>
> /* SDIO Rx aggregation limit ? */
> #define MP_RX_AGGR_PKT_LIMIT_REACHED(a) \
> @@ -242,7 +242,7 @@
> a->mpa_rx.skb_arr[a->mpa_rx.pkt_cnt] = skb; \
> a->mpa_rx.len_arr[a->mpa_rx.pkt_cnt] = skb->len; \
> a->mpa_rx.pkt_cnt++; \
> -} while (0);
> +} while (0)
>
> /* Reset SDIO Rx aggregation buffer parameters */
> #define MP_RX_AGGR_BUF_RESET(a) do { \
> @@ -250,7 +250,7 @@
> a->mpa_rx.buf_len = 0; \
> a->mpa_rx.ports = 0; \
> a->mpa_rx.start_port = 0; \
> -} while (0);
> +} while (0)
>
>
> /* data structure for SDIO MPA TX */
> diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
> b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
> index efb9ab2..c4adb97 100644
> --- a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
> +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
> @@ -530,12 +530,7 @@
> SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)
>
> #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
> -do { \
> - if (_size > TX_DESC_NEXT_DESC_OFFSET) \
> - memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
> - else \
> - memset(__pdesc, 0, _size); \
> -} while (0);
> + memset(__pdesc, 0, min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))
>
> struct rx_fwinfo_92c {
> u8 gain_trsw[4];
> diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/trx.h
> b/drivers/net/wireless/rtlwifi/rtl8192de/trx.h
> index 0dc736c..057a524 100644
> --- a/drivers/net/wireless/rtlwifi/rtl8192de/trx.h
> +++ b/drivers/net/wireless/rtlwifi/rtl8192de/trx.h
> @@ -530,12 +530,8 @@
> SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)
>
> #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
> -do { \
> - if (_size > TX_DESC_NEXT_DESC_OFFSET) \
> - memset((void *)__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
> - else \
> - memset((void *)__pdesc, 0, _size); \
> -} while (0);
> + memset((void *)__pdesc, 0, \
> + min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))
>
> /* For 92D early mode */
> #define SET_EARLYMODE_PKTNUM(__paddr, __value) \
> diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/def.h
> b/drivers/net/wireless/rtlwifi/rtl8192se/def.h
> index d1b0a1e..20afec6 100644
> --- a/drivers/net/wireless/rtlwifi/rtl8192se/def.h
> +++ b/drivers/net/wireless/rtlwifi/rtl8192se/def.h
> @@ -252,12 +252,7 @@
> * the desc is cleared. */
> #define TX_DESC_NEXT_DESC_OFFSET 36
> #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
> -do { \
> - if (_size > TX_DESC_NEXT_DESC_OFFSET) \
> - memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
> - else \
> - memset(__pdesc, 0, _size); \
> -} while (0);
> + memset(__pdesc, 0, min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))
>
> /* Rx Desc */
> #define RX_STATUS_DESC_SIZE 24
> diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/fw.h
> b/drivers/net/wireless/rtlwifi/rtl8192se/fw.h
> index b4afff6..d53f433 100644
> --- a/drivers/net/wireless/rtlwifi/rtl8192se/fw.h
> +++ b/drivers/net/wireless/rtlwifi/rtl8192se/fw.h
> @@ -345,7 +345,7 @@ enum fw_h2c_cmd {
> do { \
> udelay(1000); \
> rtlpriv->rtlhal.fwcmd_iomap &= (~_Bit); \
> - } while (0);
> + } while (0)
>
> #define FW_CMD_IO_UPDATE(rtlpriv, _val) \
> rtlpriv->rtlhal.fwcmd_iomap = _val;
> @@ -354,13 +354,13 @@ enum fw_h2c_cmd {
> do { \
> rtl_write_word(rtlpriv, LBUS_MON_ADDR, (u16)_val); \
> FW_CMD_IO_UPDATE(rtlpriv, _val); \
> - } while (0);
> + } while (0)
>
> #define FW_CMD_PARA_SET(rtlpriv, _val) \
> do { \
> rtl_write_dword(rtlpriv, LBUS_ADDR_MASK, _val); \
> rtlpriv->rtlhal.fwcmd_ioparam = _val; \
> - } while (0);
> + } while (0)
>
> #define FW_CMD_IO_QUERY(rtlpriv) \
> (u16)(rtlpriv->rtlhal.fwcmd_iomap)
>
^ permalink raw reply
* Re: [PATCH] tilepro ethernet driver: fix a few minor issues
From: David Miller @ 2012-04-03 23:48 UTC (permalink / raw)
To: cmetcalf; +Cc: joe, sfr, netdev, linux-kernel
In-Reply-To: <4F7B8884.7070901@tilera.com>
From: Chris Metcalf <cmetcalf@tilera.com>
Date: Tue, 3 Apr 2012 19:32:20 -0400
> David, I concur that it would be useful to make this canonical somewhere,
> since folks who are not aware of your preferences will obviously follow the
> CodingStyle document until corrected by you, which seems like a pain for
> you. I suspect a modified version of Joe's original CodingStyle change,
> along with a comparable change in checkpatch, is the most "scalable" solution.
I'll try to find time to address this.
^ permalink raw reply
* Re: [PATCH] net: lpc_eth: no need to reserve 8 extra bytes in rx skb
From: Roland Stigge @ 2012-04-03 23:42 UTC (permalink / raw)
To: David Miller; +Cc: eric.dumazet, netdev
In-Reply-To: <20120403.185813.669644861254543793.davem@davemloft.net>
On 04/04/12 00:58, David Miller wrote:
>> Why add curly braces around a single statement?
>
> Because that's how we roll for else statements homie, see CodingStyle
Oops :-) sorry you two!
Thanks,
Roland
^ permalink raw reply
* Re: [PATCH] tilepro ethernet driver: fix a few minor issues
From: Chris Metcalf @ 2012-04-03 23:32 UTC (permalink / raw)
To: Joe Perches; +Cc: David Miller, sfr, netdev, linux-kernel
In-Reply-To: <1333494088.2695.29.camel@joe2Laptop>
On 4/3/2012 7:01 PM, Joe Perches wrote:
> On Tue, 2012-04-03 at 18:40 -0400, David Miller wrote:
>> From: Stephen Rothwell <sfr@canb.auug.org.au>
>> Date: Wed, 4 Apr 2012 08:37:38 +1000
>>> On Tue, 03 Apr 2012 18:23:35 -0400 (EDT) David Miller <davem@davemloft.net> wrote:
>>>> Format the comment:
>>>> /* Like
>>>> * this.
>>>> */
>>>> not:
>>>> /*
>>>> * Like
>>>> * this.
>>>> */
>>> People may be confused because Documentation/CodingStyle says to use the
>>> latter ...
>> I refuse to be dragged into this conversation, I'm completely aware
>> of the exact situation and I've stated my peace on this time and time
>> again.
> I think you'd have less overall upset in yourself and in
> other people if you would do more than repeat yourself
> on patch submissions via mailing lists.
>
> To my knowledge when the comment block style was added to
> CodingStyle in 2006, you didn't mention anything about it.
>
> https://lkml.org/lkml/2006/12/7/41
>
> and I don't see any other mentions from you.
>
> When I suggested adding something specifically for net
> and drivers/net, you were at least dispraising.
>
> http://lists.openwall.net/netdev/2012/02/04/59
>
> I think it'd be useful to have this preference you have
> for block comment style written out somewhere other than
> the email archives.
Interesting back-story. Obviously it's the various sub-maintainers'
perquisite to request specific comment style, and if Linus doesn't push
back on the sub-maintainers, that's how it is.
David, I concur that it would be useful to make this canonical somewhere,
since folks who are not aware of your preferences will obviously follow the
CodingStyle document until corrected by you, which seems like a pain for
you. I suspect a modified version of Joe's original CodingStyle change,
along with a comparable change in checkpatch, is the most "scalable" solution.
--
Chris Metcalf, Tilera Corp.
http://www.tilera.com
^ permalink raw reply
* Re: [PATCH net] bnx2x: correction to firmware interface
From: Michael Chan @ 2012-04-03 23:06 UTC (permalink / raw)
To: David Miller; +Cc: yuvalmin, netdev, dmitry, eilong, bprakash
In-Reply-To: <20120403.190408.54610555291057345.davem@davemloft.net>
On Tue, 2012-04-03 at 19:04 -0400, David Miller wrote:
> From: "Yuval Mintz" <yuvalmin@broadcom.com>
> Date: Tue, 3 Apr 2012 13:07:11 +0300
>
> > Commit 621b4d6 updated the bnx2x driver to a new FW version, but lacked
> > a commit to a header file with changes to the firmware's interface.
> > The missing interface change causes iscsi and fcoe to misbehave with the
> > updated firmware.
> >
> > Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
> > Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
> > Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
> > CC: Michael Chan <mchan@broadcom.com>
> > CC: Bhanu Prakash Gollapudi <bprakash@broadcom.com>
>
> Applied, how far back do -stable releases need this fix?
>
No need to submit to any -stable release. This problem is present in
the current net tree and Linux tree only. Thanks.
^ permalink raw reply
* Re: [PATCH 3/3] netfilter: xt_CT: remove a compile warning
From: David Miller @ 2012-04-03 23:21 UTC (permalink / raw)
To: pablo; +Cc: penguin-kernel, netdev
In-Reply-To: <20120403145210.GA31196@1984>
From: Pablo Neira Ayuso <pablo@netfilter.org>
Date: Tue, 3 Apr 2012 16:52:10 +0200
>>From 0fca4d604c0898128014bc03ef965e0cf187a5e9 Mon Sep 17 00:00:00 2001
> From: Pablo Neira Ayuso <pablo@netfilter.org>
> Date: Tue, 3 Apr 2012 16:45:54 +0200
> Subject: [PATCH] netfilter: nf_conntrack: fix count leak in error path of __nf_conntrack_alloc
>
> We have to decrement the conntrack counter if we fail to access the
> zone extension.
>
> Reported-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Applied.
^ permalink raw reply
* Re: [PATCH 3/3] netfilter: xt_CT: remove a compile warning
From: David Miller @ 2012-04-03 23:20 UTC (permalink / raw)
To: pablo; +Cc: penguin-kernel, netdev
In-Reply-To: <20120403130620.GA15385@1984>
From: Pablo Neira Ayuso <pablo@netfilter.org>
Date: Tue, 3 Apr 2012 15:06:20 +0200
>>From 96a1ee814eef63a917e2a0af7a70bbf85511d285 Mon Sep 17 00:00:00 2001
> From: Pablo Neira Ayuso <pablo@netfilter.org>
> Date: Tue, 3 Apr 2012 14:50:07 +0200
> Subject: [PATCH] netfilter: xt_CT: fix missing put timeout object in error path
>
> The error path misses putting the timeout object. This patch adds
> new function xt_ct_tg_timeout_put() to put the timeout object.
>
> Reported-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Applied.
^ permalink raw reply
* Re: [PATCH 3/3] netfilter: xt_CT: remove a compile warning
From: David Miller @ 2012-04-03 23:17 UTC (permalink / raw)
To: pablo; +Cc: penguin-kernel, netdev
In-Reply-To: <20120403103903.GA20689@1984>
From: Pablo Neira Ayuso <pablo@netfilter.org>
Date: Tue, 3 Apr 2012 12:39:03 +0200
>>From e21e9622a46a60bd2b8dfb9791bb63dfdd4940d7 Mon Sep 17 00:00:00 2001
> From: Pablo Neira Ayuso <pablo@netfilter.org>
> Date: Tue, 3 Apr 2012 12:32:15 +0200
> Subject: [PATCH] netfilter: xt_CT: allocation has to be GFP_ATOMIC under rcu_read_lock section
>
> Reported-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Applied.
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox