* Re: [net-next 1/4 (V3)] net: ethtool: add the EEE support
From: Ben Hutchings @ 2012-04-12 22:26 UTC (permalink / raw)
To: Giuseppe CAVALLARO; +Cc: netdev, rayagond, davem
In-Reply-To: <1333704559-11251-2-git-send-email-peppe.cavallaro@st.com>
On Fri, 2012-04-06 at 11:29 +0200, Giuseppe CAVALLARO wrote:
> This patch adds two new functions to detect if Energy-Efficient
> Ethernet (EEE) is supported and the way to enable/disable it.
>
> As Ben said, it is certainly necessary to distinguish:
>
> a. PHY is advertising EEE from
> b. Link partner is advertising EEE
> or
> c. EEE will be used (= a && b)
>
> The logic behind this code, is that .get_eee will pass
> to the user-space if the EEE is actually used and available (so point c).
> The .set_eee should used to force the MAC to disable/enable the EEE (if
> actually supported by MAC+PHY).
[...]
What I meant is that userland should be able to find out (a), and,
*separately*, either (b) or (c). That is, there must be at least 2
separate flags for this. In fact, I explicitly requested you define
supported/advertising/lp_advertising bitmasks for EEE link modes just
like we have for autonegotiation. But you've made no substantive
changes in response to my review, aside from dropping the added field in
ethtool_cmd.
What you're submitting just isn't good enough for a generic interface,
as the ethtool API is supposed to be. It's not even a good interface to
your driver.
Ben.
--
Ben Hutchings, Staff Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.
^ permalink raw reply
* [PATCH] ks8851: Fix missing mutex_lock/unlock
From: mjr @ 2012-04-12 23:15 UTC (permalink / raw)
To: fbl; +Cc: davem, sboyd, ben, bhutchings, netdev, Matt Renzelmann
From: Matt Renzelmann <mjr@cs.wisc.edu>
All calls to ks8851_rdreg* and ks8851_wrreg* should be protected with
the driver's lock mutex. A spurious interrupt may otherwise cause a
crash. Thanks to Stephen Boyd, Flavio Leitner, and Ben Hutchings for
feedback.
Signed-off-by: Matt Renzelmann <mjr@cs.wisc.edu>
---
This modified version incorporates Ben Hutchings' bugfix by removing
the incorrect call to CIDER_REV_GET.
drivers/net/ethernet/micrel/ks8851.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/micrel/ks8851.c b/drivers/net/ethernet/micrel/ks8851.c
index c722aa6..e5dc075 100644
--- a/drivers/net/ethernet/micrel/ks8851.c
+++ b/drivers/net/ethernet/micrel/ks8851.c
@@ -1418,6 +1418,7 @@ static int __devinit ks8851_probe(struct spi_device *spi)
struct net_device *ndev;
struct ks8851_net *ks;
int ret;
+ unsigned cider;
ndev = alloc_etherdev(sizeof(struct ks8851_net));
if (!ndev)
@@ -1484,8 +1485,8 @@ static int __devinit ks8851_probe(struct spi_device *spi)
ks8851_soft_reset(ks, GRR_GSR);
/* simple check for a valid chip being connected to the bus */
-
- if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) {
+ cider = ks8851_rdreg16(ks, KS_CIDER);
+ if ((cider & ~CIDER_REV_MASK) != CIDER_ID) {
dev_err(&spi->dev, "failed to read device ID\n");
ret = -ENODEV;
goto err_id;
@@ -1516,8 +1517,7 @@ static int __devinit ks8851_probe(struct spi_device *spi)
}
netdev_info(ndev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n",
- CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
- ndev->dev_addr, ndev->irq,
+ CIDER_REV_GET(cider), ndev->dev_addr, ndev->irq,
ks->rc_ccr & CCR_EEPROM ? "has" : "no");
return 0;
--
1.7.5.4
^ permalink raw reply related
* Re: [PATCH 6/6] tilegx network driver: initial support
From: Chris Metcalf @ 2012-04-12 23:23 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linux-kernel, netdev
In-Reply-To: <201204101042.39877.arnd@arndb.de>
On 4/10/2012 6:42 AM, Arnd Bergmann wrote:
> On Monday 09 April 2012, Chris Metcalf wrote:
>> On 4/9/2012 9:49 AM, Arnd Bergmann wrote:
>>> On Friday 06 April 2012, Chris Metcalf wrote:
>>>> This change adds support for the tilegx network driver based on the
>>>> GXIO IORPC support in the tilegx software stack, using the on-chip
>>>> mPIPE packet processing engine.
>>>>
>>>> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
>>>> ---
>>>> drivers/net/ethernet/tile/Kconfig | 1 +
>>>> drivers/net/ethernet/tile/Makefile | 4 +-
>>>> drivers/net/ethernet/tile/tilegx.c | 2045 ++++++++++++++++++++++++++++++++++++
>>>> 3 files changed, 2048 insertions(+), 2 deletions(-)
>>>> create mode 100644 drivers/net/ethernet/tile/tilegx.c
>>>
>> The actual author would rather not publish his name (I just double-checked
>> with him).
> Hmm, it doesn't look all that bad actually, the comments I had are just for
> small details.
FWIW, the author's preference doesn't have to do with the code quality, but
for his own reasons.
>>>> +/* The actual devices. */
>>>> +static struct net_device *tile_net_devs[TILE_NET_DEVS];
>>>> +
>>>> +/* The device for a given channel. HACK: We use "32", not
>>>> + * TILE_NET_CHANNELS, because it is fairly subtle that the 5 bit
>>>> + * "idesc.channel" field never exceeds TILE_NET_CHANNELS.
>>>> + */
>>>> +static struct net_device *tile_net_devs_for_channel[32];
>>> When you need to keep a list or array of device structures in a driver, you're
>>> usually doing something very wrong. The convention is to just pass the pointer
>>> around to where you need it.
>> We need "tile_net_devs_for_channel" because we share a single hardware
>> queue for all devices, and each packet's metadata contains a "channel"
>> value which indicates the device.
>
> Ok, but please remove tile_net_devs then.
> I think a better abstraction for tile_net_devs_for_channel would be
> some interface that lets you add private data to a channel so when
> you get data from a channel, you can extract that pointer from the driver
> using the channel.
I think what would be clearer is to document how and why we are using this
additional data structure. We do access via both arrays where it is
efficient to do so, so getting rid of either of them doesn't seem right.
Let's keep the "normal" tile_net_devs[] as is, indexed by devno, and make
the tile_net_devs_for_channel[] more abstracted by using the following code:
/*
* Provide support for efficiently mapping a channel to the device
* that is using that channel, or NULL if none. The pointers in this
* array are only non-NULL when pointing to active tilegx net_device
* structures, and they are cleared before the struture itself is
* released.
*
* HACK: We use "32", not TILE_NET_CHANNELS, because it is fairly
* subtle that the 5 bit "idesc.channel" field never exceeds
* TILE_NET_CHANNELS.
*/
static struct net_device *channel_to_dev[32];
static void bychannel_add(struct net_device *dev)
{
struct tile_net_priv *priv = netdev_priv(dev);
BUG_ON(channel_to_dev[priv->channel] != NULL);
channel_to_dev[priv->channel] = dev;
}
static void bychannel_delete(struct net_device *dev)
{
struct tile_net_priv *priv = netdev_priv(dev);
channel_to_dev[priv->channel] = NULL;
}
static inline struct net_device *bychannel_lookup(int channel)
{
return channel_to_dev[channel];
}
We then call bychannel_add() in the open method, and bychannel_delete() in
the close method, so it's clear that the pointers have appropriate lifetimes.
> Don't you already have a per-channel data structure?
Nope.
>> /*
>> * The on-chip I/O hardware on tilegx is configured with VA=PA for the
>> * kernel's PA range. The low-level APIs and field names use "va" and
>> * "void *" nomenclature, to be consistent with the general notion
>> * that the addresses in question are virtualizable, but in the kernel
>> * context we are actually manipulating PA values. To allow readers
>> * of the code to understand what's happening, we direct their
>> * attention to this comment by using the following two no-op functions.
>> */
>> static inline unsigned long pa_to_tile_io_addr(phys_addr_t pa)
>> {
>> BUILD_BUG_ON(sizeof(phys_addr_t) != sizeof(unsigned long));
>> return pa;
>> }
>> static inline phys_addr_t tile_io_addr_to_pa(unsigned long tile_io_addr)
>> {
>> return tile_io_addr;
>> }
>>
>> Then the individual uses in the network driver are just things like
>> "edesc_head.va = pa_to_tile_io_addr(__pa(va))" or "va =
>> __va(tile_io_addr_to_pa((unsigned long)gxio_mpipe_idesc_get_va(idesc)))"
>> which I think is a little clearer.
> Yes, although I would probably add a typedef for tile_io_addr and pass
> the virtual address in and out these helper functions.
Good ideas, done.
> For added clarity, you could make the interface look like dma_map_single(),
> which requires adding an empty unmap() function as well -- that would
> make it obvious where that data is actually used. Why do you require
> the reverse map anyway? Normally you only need to pass a bus address to
> the device but don't need to translate that back into a virtual address
> because you already had that in the beginning.
We need the reverse map since the hardware hands us an "idesc" which has
just the tile_io_addr value in it, so we need to map it back to a va to
deal with it.
I don't think the map/unmap abstraction is too helpful here, since we're
assuming that memory is all fully-mapped, as it always is on GX.
>>>> + /* Compute the "ip checksum". */
>>>> + jsum = isum_hack + htons(s_len - eh_len) + htons(id);
>>>> + jsum = __insn_v2sadu(jsum, 0);
>>>> + jsum = __insn_v2sadu(jsum, 0);
>>>> + jsum = (0xFFFF ^ jsum);
>>>> + jh->check = jsum;
>>>> +
>>>> + /* Update the tcp "seq". */
>>>> + uh->seq = htonl(seq);
>>>> +
>>>> + /* Update some flags. */
>>>> + if (!final)
>>>> + uh->fin = uh->psh = 0;
>>>> +
>>>> + /* Compute the tcp pseudo-header checksum. */
>>>> + usum = tsum_hack + htons(s_len);
>>>> + usum = __insn_v2sadu(usum, 0);
>>>> + usum = __insn_v2sadu(usum, 0);
>>>> + uh->check = usum;
>>> Why to you open-code the ip checksum functions here? Normally the stack takes
>>> care of this by calling the functions you already provide in
>>> arch/tile/lib/checksum.c
>> If there is a way to do TSO without this, we'd be happy to hear it, but
>> it's not clear how it would be possible. We are only computing a PARTIAL
>> checksum here, and letting the hardware compute the "full" checksum.
> Sounds like you're looking for csum_partial() ;-)
Well, that's a pretty heavy-weight operation on memory. Here we're just
updating from a few values held in registers, more or less. csum_partial()
didn't seem like a good fit. What I've done is move the longto16() routine
from checksum.c to <asm/checksum.h> and rename it csum_long(), then use it
like this, e.g. for the "usum" block above:
/* Compute the tcp pseudo-header checksum. */
uh->check = csum_long(tsum_hack + htons(s_len));
--
Chris Metcalf, Tilera Corp.
http://www.tilera.com
^ permalink raw reply
* Re: pull request: wireless-next 2012-04-12
From: David Miller @ 2012-04-13 0:12 UTC (permalink / raw)
To: linville-2XuSBdqkA4R54TAoqtyWWQ
Cc: linux-wireless-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20120412195520.GC21495-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org>
From: "John W. Linville" <linville-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org>
Date: Thu, 12 Apr 2012 15:55:20 -0400
> Welcome to the first wireless pull request for the 3.5 era! :-)
>
> Highlights of this batch include some mac80211 refactoring and
> enhancements, a number of iwlwifi updates, some ath9k updates
> (including a DFS pattern detector), and various other updates to
> rtlwifi, mwifiex, and various other drivers. Overall, nothing too
> unusual...
>
> Please let me know if there are problems!
Pulled, thanks John.
--
To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH 00/37] atl1c: update hardware settings
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
This update contains a serial of patches,
most of them are hardware settings related.
register definitions are refined for each patch.
The patches are for following main purpose:
1. improve the PCI Express Interface stability.
2. improve the PHY Link stability.
3. improve the power consumption, like ASPM and PHY Hibernation.
4. imporve the throughput, get same result with alx driver as shown
in http://linuxfoundation.org/collaborate/workgroups/networking/alx
Following NICs are tested:
AR8131/AR8132/AR8151A/AR8152A/AR8152B
These patches have addressed all sparse and checkpatch warnings.
xiong (37):
atl1c: update author contact info & company/driver desciption
atl1c: remove multiple-RX-Q code
atl1c: remove HDS register
atl1c: remove VPD register
atl1c: remove SMB/CMB DMA related code
atl1c: split 2 32bit registers of TPD to 4 16bit registers
atl1c: remove code related to rxq 1/2/3
atl1c: wrong register used to stop TXQ
atl1c: correct wrong definition of REG_DMA_CTRL
atl1c: remove dmaw_block
atl1c: using fixed TXQ configuration for l2cb and l1c
atl1c: restore max-read-request-size in Device Conrol Register
atl1c: threshold for ASPM is changed based on chip capability
atl1c: add module parameter for l1c_wait_until_idle
atl1c: update right threshold for TSO
atl1c: remove dmar_dly_cnt and dmaw_dly_cnt
atl1c: clear PCIE error status in atl1c_reset_pcie
atl1c: refine reg definition of REG_MASTER_CTRL
atl1c: clear bit MASTER_CTRL_CLK_SEL_DIS in atl1c_pcie_patch
atl1c: refine/update ASPM configuration
atl1c: refine atl1c_pcie_patch
atl1c: fix WoL(magic) issue for l2cb 1.1
atl1c: remove MDIO_REG_ADDR_MASK in atl1c_mdio_read/write
atl1c: remove REG_PHY_STATUS
atl1c: refine phy-register read/write function
atl1c: remove PHY contrl in atl1c_reset_pcie
atl1c: refine SERDES-clock related code
atl1c: remove PHY polling from atl1c_open
atl1c: update PHY reset related routine
atl1c: remove PHY reset/init for link down event
atl1c: add function atl1c_power_saving
atl1c: refine start/enable code for MAC module
atl1c: add PHY link event(up/down) patch
atl1c: clear WoL status when reset pcie
atl1c: remove code of closing register writable attribution
atl1c: refine mac address related code
atl1c: cancel task when interface closed
drivers/net/ethernet/atheros/atl1c/atl1c.h | 57 +-
drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c | 3 +-
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c | 563 ++++++++----
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 999 ++++++++++++--------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 913 +++++++-----------
5 files changed, 1339 insertions(+), 1196 deletions(-)
--
1.7.7
^ permalink raw reply
* [PATCH 01/37] atl1c: update author contact info & company/driver desciption
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
replace unavailable email of the author since he left with a mail-list.
update company info as well, Atheros was acquired by Qualcomm.
insert "100" to driver description since it support 100M controller.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 1ef0c92..1f1f9eb 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -54,8 +54,9 @@ static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
};
MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
-MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
-MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
+MODULE_AUTHOR("Jie Yang");
+MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
+MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(ATL1C_DRV_VERSION);
--
1.7.7
^ permalink raw reply related
* [PATCH 02/37] atl1c: remove multiple-RX-Q code
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
the multiple-RX-Q in hardware doesn't work,
all related register definition & code are removed.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c.h | 22 +--
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 36 ----
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 216 +++++++----------------
3 files changed, 65 insertions(+), 209 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h
index ca70e16..c725ee5 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c.h
@@ -297,20 +297,6 @@ enum atl1c_dma_req_block {
atl1c_dma_req_4096 = 5
};
-enum atl1c_rss_mode {
- atl1c_rss_mode_disable = 0,
- atl1c_rss_sig_que = 1,
- atl1c_rss_mul_que_sig_int = 2,
- atl1c_rss_mul_que_mul_int = 4,
-};
-
-enum atl1c_rss_type {
- atl1c_rss_disable = 0,
- atl1c_rss_ipv4 = 1,
- atl1c_rss_ipv4_tcp = 2,
- atl1c_rss_ipv6 = 4,
- atl1c_rss_ipv6_tcp = 8
-};
enum atl1c_nic_type {
athr_l1c = 0,
@@ -451,9 +437,6 @@ struct atl1c_hw {
u16 tpd_thresh;
u8 tpd_burst; /* Number of TPD to prefetch in cache-aligned burst. */
u8 rfd_burst;
- enum atl1c_rss_type rss_type;
- enum atl1c_rss_mode rss_mode;
- u8 rss_hash_bits;
u32 base_cpu;
u32 indirect_tab;
u8 mac_addr[ETH_ALEN];
@@ -586,11 +569,10 @@ struct atl1c_adapter {
/* All Descriptor memory */
struct atl1c_ring_header ring_header;
struct atl1c_tpd_ring tpd_ring[AT_MAX_TRANSMIT_QUEUE];
- struct atl1c_rfd_ring rfd_ring[AT_MAX_RECEIVE_QUEUE];
- struct atl1c_rrd_ring rrd_ring[AT_MAX_RECEIVE_QUEUE];
+ struct atl1c_rfd_ring rfd_ring;
+ struct atl1c_rrd_ring rrd_ring;
struct atl1c_cmb cmb;
struct atl1c_smb smb;
- int num_rx_queues;
u32 bd_number; /* board number;*/
};
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index 655fc6c..855aca0 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -461,17 +461,11 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define REG_SMB_BASE_ADDR_HI 0x1548
#define REG_SMB_BASE_ADDR_LO 0x154C
#define REG_RFD0_HEAD_ADDR_LO 0x1550
-#define REG_RFD1_HEAD_ADDR_LO 0x1554
-#define REG_RFD2_HEAD_ADDR_LO 0x1558
-#define REG_RFD3_HEAD_ADDR_LO 0x155C
#define REG_RFD_RING_SIZE 0x1560
#define RFD_RING_SIZE_MASK 0x0FFF
#define REG_RX_BUF_SIZE 0x1564
#define RX_BUF_SIZE_MASK 0xFFFF
#define REG_RRD0_HEAD_ADDR_LO 0x1568
-#define REG_RRD1_HEAD_ADDR_LO 0x156C
-#define REG_RRD2_HEAD_ADDR_LO 0x1570
-#define REG_RRD3_HEAD_ADDR_LO 0x1574
#define REG_RRD_RING_SIZE 0x1578
#define RRD_RING_SIZE_MASK 0x0FFF
#define REG_HTPD_HEAD_ADDR_LO 0x157C
@@ -480,30 +474,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define TPD_RING_SIZE_MASK 0xFFFF
#define REG_CMB_BASE_ADDR_LO 0x1588
-/* RSS about */
-#define REG_RSS_KEY0 0x14B0
-#define REG_RSS_KEY1 0x14B4
-#define REG_RSS_KEY2 0x14B8
-#define REG_RSS_KEY3 0x14BC
-#define REG_RSS_KEY4 0x14C0
-#define REG_RSS_KEY5 0x14C4
-#define REG_RSS_KEY6 0x14C8
-#define REG_RSS_KEY7 0x14CC
-#define REG_RSS_KEY8 0x14D0
-#define REG_RSS_KEY9 0x14D4
-#define REG_IDT_TABLE0 0x14E0
-#define REG_IDT_TABLE1 0x14E4
-#define REG_IDT_TABLE2 0x14E8
-#define REG_IDT_TABLE3 0x14EC
-#define REG_IDT_TABLE4 0x14F0
-#define REG_IDT_TABLE5 0x14F4
-#define REG_IDT_TABLE6 0x14F8
-#define REG_IDT_TABLE7 0x14FC
-#define REG_IDT_TABLE REG_IDT_TABLE0
-#define REG_RSS_HASH_VALUE 0x15B0
-#define REG_RSS_HASH_FLAG 0x15B4
-#define REG_BASE_CPU_NUMBER 0x15B8
-
/* TXQ Control Register */
#define REG_TXQ_CTRL 0x1590
#define TXQ_NUM_TPD_BURST_MASK 0xF
@@ -608,9 +578,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
/* Mail box */
#define MB_RFDX_PROD_IDX_MASK 0xFFFF
#define REG_MB_RFD0_PROD_IDX 0x15E0
-#define REG_MB_RFD1_PROD_IDX 0x15E4
-#define REG_MB_RFD2_PROD_IDX 0x15E8
-#define REG_MB_RFD3_PROD_IDX 0x15EC
#define MB_PRIO_PROD_IDX_MASK 0xFFFF
#define REG_MB_PRIO_PROD_IDX 0x15F0
@@ -625,9 +592,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define REG_MB_RFD01_CONS_IDX 0x15F8
#define MB_RFD0_CONS_IDX_MASK 0x0000FFFF
#define MB_RFD1_CONS_IDX_MASK 0xFFFF0000
-#define REG_MB_RFD23_CONS_IDX 0x15FC
-#define MB_RFD2_CONS_IDX_MASK 0x0000FFFF
-#define MB_RFD3_CONS_IDX_MASK 0xFFFF0000
/* Interrupt Status Register */
#define REG_ISR 0x1600
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 1f1f9eb..226be99 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -66,7 +66,7 @@ static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
-static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
+static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
int *work_done, int work_to_do);
static int atl1c_up(struct atl1c_adapter *adapter);
static void atl1c_down(struct atl1c_adapter *adapter);
@@ -75,29 +75,6 @@ static const u16 atl1c_pay_load_size[] = {
128, 256, 512, 1024, 2048, 4096,
};
-static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
-{
- REG_MB_RFD0_PROD_IDX,
- REG_MB_RFD1_PROD_IDX,
- REG_MB_RFD2_PROD_IDX,
- REG_MB_RFD3_PROD_IDX
-};
-
-static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
-{
- REG_RFD0_HEAD_ADDR_LO,
- REG_RFD1_HEAD_ADDR_LO,
- REG_RFD2_HEAD_ADDR_LO,
- REG_RFD3_HEAD_ADDR_LO
-};
-
-static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
-{
- REG_RRD0_HEAD_ADDR_LO,
- REG_RRD1_HEAD_ADDR_LO,
- REG_RRD2_HEAD_ADDR_LO,
- REG_RRD3_HEAD_ADDR_LO
-};
static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
@@ -730,9 +707,8 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
device_set_wakeup_enable(&pdev->dev, false);
adapter->link_speed = SPEED_0;
adapter->link_duplex = FULL_DUPLEX;
- adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
adapter->tpd_ring[0].count = 1024;
- adapter->rfd_ring[0].count = 512;
+ adapter->rfd_ring.count = 512;
hw->vendor_id = pdev->vendor;
hw->device_id = pdev->device;
@@ -751,14 +727,6 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
hw->phy_configured = false;
hw->preamble_len = 7;
hw->max_frame_size = adapter->netdev->mtu;
- if (adapter->num_rx_queues < 2) {
- hw->rss_type = atl1c_rss_disable;
- hw->rss_mode = atl1c_rss_mode_disable;
- } else {
- hw->rss_type = atl1c_rss_ipv4;
- hw->rss_mode = atl1c_rss_mul_que_mul_int;
- hw->rss_hash_bits = 16;
- }
hw->autoneg_advertised = ADVERTISED_Autoneg;
hw->indirect_tab = 0xE4E4E4E4;
hw->base_cpu = 0;
@@ -852,24 +820,22 @@ static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
*/
static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
{
- struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
- struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
+ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
+ struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
struct atl1c_buffer *buffer_info;
struct pci_dev *pdev = adapter->pdev;
- int i, j;
+ int j;
- for (i = 0; i < adapter->num_rx_queues; i++) {
- for (j = 0; j < rfd_ring[i].count; j++) {
- buffer_info = &rfd_ring[i].buffer_info[j];
- atl1c_clean_buffer(pdev, buffer_info, 0);
- }
- /* zero out the descriptor ring */
- memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
- rfd_ring[i].next_to_clean = 0;
- rfd_ring[i].next_to_use = 0;
- rrd_ring[i].next_to_use = 0;
- rrd_ring[i].next_to_clean = 0;
+ for (j = 0; j < rfd_ring->count; j++) {
+ buffer_info = &rfd_ring->buffer_info[j];
+ atl1c_clean_buffer(pdev, buffer_info, 0);
}
+ /* zero out the descriptor ring */
+ memset(rfd_ring->desc, 0, rfd_ring->size);
+ rfd_ring->next_to_clean = 0;
+ rfd_ring->next_to_use = 0;
+ rrd_ring->next_to_use = 0;
+ rrd_ring->next_to_clean = 0;
}
/*
@@ -878,8 +844,8 @@ static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
{
struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
- struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
- struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
+ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
+ struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
struct atl1c_buffer *buffer_info;
int i, j;
@@ -891,15 +857,13 @@ static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
ATL1C_SET_BUFFER_STATE(&buffer_info[i],
ATL1C_BUFFER_FREE);
}
- for (i = 0; i < adapter->num_rx_queues; i++) {
- rfd_ring[i].next_to_use = 0;
- rfd_ring[i].next_to_clean = 0;
- rrd_ring[i].next_to_use = 0;
- rrd_ring[i].next_to_clean = 0;
- for (j = 0; j < rfd_ring[i].count; j++) {
- buffer_info = &rfd_ring[i].buffer_info[j];
- ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
- }
+ rfd_ring->next_to_use = 0;
+ rfd_ring->next_to_clean = 0;
+ rrd_ring->next_to_use = 0;
+ rrd_ring->next_to_clean = 0;
+ for (j = 0; j < rfd_ring->count; j++) {
+ buffer_info = &rfd_ring->buffer_info[j];
+ ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
}
}
@@ -936,27 +900,23 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
{
struct pci_dev *pdev = adapter->pdev;
struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
- struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
- struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
+ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
+ struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
struct atl1c_ring_header *ring_header = &adapter->ring_header;
- int num_rx_queues = adapter->num_rx_queues;
int size;
int i;
int count = 0;
int rx_desc_count = 0;
u32 offset = 0;
- rrd_ring[0].count = rfd_ring[0].count;
+ rrd_ring->count = rfd_ring->count;
for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
tpd_ring[i].count = tpd_ring[0].count;
- for (i = 1; i < adapter->num_rx_queues; i++)
- rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
-
/* 2 tpd queue, one high priority queue,
* another normal priority queue */
size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
- rfd_ring->count * num_rx_queues);
+ rfd_ring->count);
tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
if (unlikely(!tpd_ring->buffer_info)) {
dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
@@ -969,12 +929,11 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
count += tpd_ring[i].count;
}
- for (i = 0; i < num_rx_queues; i++) {
- rfd_ring[i].buffer_info =
- (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
- count += rfd_ring[i].count;
- rx_desc_count += rfd_ring[i].count;
- }
+ rfd_ring->buffer_info =
+ (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
+ count += rfd_ring->count;
+ rx_desc_count += rfd_ring->count;
+
/*
* real ring DMA buffer
* each ring/block may need up to 8 bytes for alignment, hence the
@@ -985,7 +944,7 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
sizeof(struct atl1c_hw_stats) +
- 8 * 4 + 8 * 2 * num_rx_queues;
+ 8 * 4 + 8 * 2;
ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
&ring_header->dma);
@@ -1006,22 +965,17 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
offset += roundup(tpd_ring[i].size, 8);
}
/* init RFD ring */
- for (i = 0; i < num_rx_queues; i++) {
- rfd_ring[i].dma = ring_header->dma + offset;
- rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
- rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
- rfd_ring[i].count;
- offset += roundup(rfd_ring[i].size, 8);
- }
+ rfd_ring->dma = ring_header->dma + offset;
+ rfd_ring->desc = (u8 *) ring_header->desc + offset;
+ rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
+ offset += roundup(rfd_ring->size, 8);
/* init RRD ring */
- for (i = 0; i < num_rx_queues; i++) {
- rrd_ring[i].dma = ring_header->dma + offset;
- rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
- rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
- rrd_ring[i].count;
- offset += roundup(rrd_ring[i].size, 8);
- }
+ rrd_ring->dma = ring_header->dma + offset;
+ rrd_ring->desc = (u8 *) ring_header->desc + offset;
+ rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
+ rrd_ring->count;
+ offset += roundup(rrd_ring->size, 8);
adapter->smb.dma = ring_header->dma + offset;
adapter->smb.smb = (u8 *)ring_header->desc + offset;
@@ -1035,15 +989,12 @@ err_nomem:
static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
{
struct atl1c_hw *hw = &adapter->hw;
- struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
- adapter->rfd_ring;
- struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
- adapter->rrd_ring;
+ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
+ struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
adapter->tpd_ring;
struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
- int i;
u32 data;
/* TPD */
@@ -1063,22 +1014,20 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
/* RFD */
AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
- (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
- for (i = 0; i < adapter->num_rx_queues; i++)
- AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
- (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
+ (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
+ AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
+ (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
- rfd_ring[0].count & RFD_RING_SIZE_MASK);
+ rfd_ring->count & RFD_RING_SIZE_MASK);
AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
/* RRD */
- for (i = 0; i < adapter->num_rx_queues; i++)
- AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
- (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
+ AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
+ (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
- (rrd_ring[0].count & RRD_RING_SIZE_MASK));
+ (rrd_ring->count & RRD_RING_SIZE_MASK));
/* CMB */
AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
@@ -1152,21 +1101,7 @@ static void atl1c_configure_rx(struct atl1c_adapter *adapter)
if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
- if (hw->rss_type == atl1c_rss_ipv4)
- rxq_ctrl_data |= RSS_HASH_IPV4;
- if (hw->rss_type == atl1c_rss_ipv4_tcp)
- rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
- if (hw->rss_type == atl1c_rss_ipv6)
- rxq_ctrl_data |= RSS_HASH_IPV6;
- if (hw->rss_type == atl1c_rss_ipv6_tcp)
- rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
- if (hw->rss_type != atl1c_rss_disable)
- rxq_ctrl_data |= RRS_HASH_CTRL_EN;
- rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
- RSS_MODE_SHIFT;
- rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
- RSS_HASH_BITS_SHIFT;
if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
@@ -1174,14 +1109,6 @@ static void atl1c_configure_rx(struct atl1c_adapter *adapter)
AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
}
-static void atl1c_configure_rss(struct atl1c_adapter *adapter)
-{
- struct atl1c_hw *hw = &adapter->hw;
-
- AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
- AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
-}
-
static void atl1c_configure_dma(struct atl1c_adapter *adapter)
{
struct atl1c_hw *hw = &adapter->hw;
@@ -1253,19 +1180,6 @@ static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
u32 data;
AT_READ_REG(hw, REG_RXQ_CTRL, &data);
- switch (hw->adapter->num_rx_queues) {
- case 4:
- data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
- break;
- case 3:
- data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
- break;
- case 2:
- data |= RXQ1_CTRL_EN;
- break;
- default:
- break;
- }
data |= RXQ_CTRL_EN;
AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
}
@@ -1544,7 +1458,6 @@ static int atl1c_configure(struct atl1c_adapter *adapter)
atl1c_configure_tx(adapter);
atl1c_configure_rx(adapter);
- atl1c_configure_rss(adapter);
atl1c_configure_dma(adapter);
return 0;
@@ -1747,9 +1660,9 @@ static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
skb_checksum_none_assert(skb);
}
-static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
+static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
{
- struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
+ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
struct pci_dev *pdev = adapter->pdev;
struct atl1c_buffer *buffer_info, *next_info;
struct sk_buff *skb;
@@ -1801,7 +1714,7 @@ static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid
/* TODO: update mailbox here */
wmb();
rfd_ring->next_to_use = rfd_next_to_use;
- AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
+ AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
}
@@ -1840,7 +1753,7 @@ static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
rfd_ring->next_to_clean = rfd_index;
}
-static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
+static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
int *work_done, int work_to_do)
{
u16 rfd_num, rfd_index;
@@ -1848,8 +1761,8 @@ static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
u16 length;
struct pci_dev *pdev = adapter->pdev;
struct net_device *netdev = adapter->netdev;
- struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
- struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
+ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
+ struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
struct sk_buff *skb;
struct atl1c_recv_ret_status *rrs;
struct atl1c_buffer *buffer_info;
@@ -1915,7 +1828,7 @@ rrs_checked:
count++;
}
if (count)
- atl1c_alloc_rx_buffer(adapter, que);
+ atl1c_alloc_rx_buffer(adapter);
}
/*
@@ -1932,7 +1845,7 @@ static int atl1c_clean(struct napi_struct *napi, int budget)
if (!netif_carrier_ok(adapter->netdev))
goto quit_polling;
/* just enable one RXQ */
- atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
+ atl1c_clean_rx_irq(adapter, &work_done, budget);
if (work_done < budget) {
quit_polling:
@@ -2334,19 +2247,16 @@ static int atl1c_up(struct atl1c_adapter *adapter)
struct net_device *netdev = adapter->netdev;
int num;
int err;
- int i;
netif_carrier_off(netdev);
atl1c_init_ring_ptrs(adapter);
atl1c_set_multi(netdev);
atl1c_restore_vlan(adapter);
- for (i = 0; i < adapter->num_rx_queues; i++) {
- num = atl1c_alloc_rx_buffer(adapter, i);
- if (unlikely(num == 0)) {
- err = -ENOMEM;
- goto err_alloc_rx;
- }
+ num = atl1c_alloc_rx_buffer(adapter);
+ if (unlikely(num == 0)) {
+ err = -ENOMEM;
+ goto err_alloc_rx;
}
if (atl1c_configure(adapter)) {
--
1.7.7
^ permalink raw reply related
* [PATCH 03/37] atl1c: remove HDS register
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
remove HDS register as it doesn't exist in hardware.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 7 -------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 2 --
2 files changed, 0 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index 855aca0..c22d698 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -669,13 +669,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define REG_INT_RETRIG_TIMER 0x1608
#define INT_RETRIG_TIMER_MASK 0xFFFF
-#define REG_HDS_CTRL 0x160C
-#define HDS_CTRL_EN 0x0001
-#define HDS_CTRL_BACKFILLSIZE_SHIFT 8
-#define HDS_CTRL_BACKFILLSIZE_MASK 0x0FFF
-#define HDS_CTRL_MAX_HDRSIZE_SHIFT 20
-#define HDS_CTRL_MAC_HDRSIZE_MASK 0x0FFF
-
#define REG_MAC_RX_STATUS_BIN 0x1700
#define REG_MAC_RX_STATUS_END 0x175c
#define REG_MAC_TX_STATUS_BIN 0x1760
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 226be99..885e892 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1453,8 +1453,6 @@ static int atl1c_configure(struct atl1c_adapter *adapter)
/* set MTU */
AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
VLAN_HLEN + ETH_FCS_LEN);
- /* HDS, disable */
- AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
atl1c_configure_tx(adapter);
atl1c_configure_rx(adapter);
--
1.7.7
^ permalink raw reply related
* [PATCH 04/37] atl1c: remove VPD register
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
VPD register is only used for L1(devid=PCI_DEVICE_ID_ATTANSIC_L1) to
access external NV-memory.
l1c & later chip doesn't use it any more.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c | 1 -
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 11 -----------
2 files changed, 0 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c b/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c
index 0a9326a..ce63615 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c
@@ -142,7 +142,6 @@ static void atl1c_get_regs(struct net_device *netdev,
memset(p, 0, AT_REGS_LEN);
regs->version = 0;
- AT_READ_REG(hw, REG_VPD_CAP, p++);
AT_READ_REG(hw, REG_PM_CTRL, p++);
AT_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL, p++);
AT_READ_REG(hw, REG_TWSI_CTRL, p++);
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index c22d698..f5c7473 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -59,17 +59,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define LINK_CTRL_L1_EN 0x02
#define LINK_CTRL_EXT_SYNC 0x80
-#define REG_VPD_CAP 0x6C
-#define VPD_CAP_ID_MASK 0xff
-#define VPD_CAP_ID_SHIFT 0
-#define VPD_CAP_NEXT_PTR_MASK 0xFF
-#define VPD_CAP_NEXT_PTR_SHIFT 8
-#define VPD_CAP_VPD_ADDR_MASK 0x7FFF
-#define VPD_CAP_VPD_ADDR_SHIFT 16
-#define VPD_CAP_VPD_FLAG 0x80000000
-
-#define REG_VPD_DATA 0x70
-
#define REG_PCIE_UC_SEVERITY 0x10C
#define PCIE_UC_SERVRITY_TRN 0x00000001
#define PCIE_UC_SERVRITY_DLP 0x00000010
--
1.7.7
^ permalink raw reply related
* [PATCH 05/37] atl1c: remove SMB/CMB DMA related code
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
l1c & later chips don't support DMA for SMB.
CMB is removed from hardware.
reg(15C8) is used to trig interrupt by tpd threshold.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c.h | 19 +------------
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 10 +-----
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 34 ++---------------------
3 files changed, 6 insertions(+), 57 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h
index c725ee5..f8628bc 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c.h
@@ -426,10 +426,6 @@ struct atl1c_hw {
#define ATL1C_FPGA_VERSION 0x8000
u16 link_cap_flags;
#define ATL1C_LINK_CAP_1000M 0x0001
- u16 cmb_tpd;
- u16 cmb_rrd;
- u16 cmb_rx_timer; /* 2us resolution */
- u16 cmb_tx_timer;
u32 smb_timer;
u16 rrd_thresh; /* Threshold of number of RRD produced to trigger
@@ -449,8 +445,7 @@ struct atl1c_hw {
/*
* atl1c_ring_header represents a single, contiguous block of DMA space
- * mapped for the three descriptor rings (tpd, rfd, rrd) and the two
- * message blocks (cmb, smb) described below
+ * mapped for the three descriptor rings (tpd, rfd, rrd) described below
*/
struct atl1c_ring_header {
void *desc; /* virtual address */
@@ -524,16 +519,6 @@ struct atl1c_rrd_ring {
u16 next_to_clean;
};
-struct atl1c_cmb {
- void *cmb;
- dma_addr_t dma;
-};
-
-struct atl1c_smb {
- void *smb;
- dma_addr_t dma;
-};
-
/* board specific private data structure */
struct atl1c_adapter {
struct net_device *netdev;
@@ -571,8 +556,6 @@ struct atl1c_adapter {
struct atl1c_tpd_ring tpd_ring[AT_MAX_TRANSMIT_QUEUE];
struct atl1c_rfd_ring rfd_ring;
struct atl1c_rrd_ring rrd_ring;
- struct atl1c_cmb cmb;
- struct atl1c_smb smb;
u32 bd_number; /* board number;*/
};
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index f5c7473..caff2ae 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -447,8 +447,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
*/
#define REG_RX_BASE_ADDR_HI 0x1540
#define REG_TX_BASE_ADDR_HI 0x1544
-#define REG_SMB_BASE_ADDR_HI 0x1548
-#define REG_SMB_BASE_ADDR_LO 0x154C
#define REG_RFD0_HEAD_ADDR_LO 0x1550
#define REG_RFD_RING_SIZE 0x1560
#define RFD_RING_SIZE_MASK 0x0FFF
@@ -461,7 +459,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define REG_NTPD_HEAD_ADDR_LO 0x1580
#define REG_TPD_RING_SIZE 0x1584
#define TPD_RING_SIZE_MASK 0xFFFF
-#define REG_CMB_BASE_ADDR_LO 0x1588
/* TXQ Control Register */
#define REG_TXQ_CTRL 0x1590
@@ -556,13 +553,10 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define MAC_CTRL_SMB_DIS 0x1000000
#define DMA_CTRL_SMB_NOW 0x80000000
-/* CMB/SMB Control Register */
+/* INT-triggle/SMB Control Register */
#define REG_SMB_STAT_TIMER 0x15C4 /* 2us resolution */
#define SMB_STAT_TIMER_MASK 0xFFFFFF
-#define REG_CMB_TPD_THRESH 0x15C8
-#define CMB_TPD_THRESH_MASK 0xFFFF
-#define REG_CMB_TX_TIMER 0x15CC /* 2us resolution */
-#define CMB_TX_TIMER_MASK 0xFFFF
+#define REG_TINT_TPD_THRESH 0x15C8 /* tpd th to trig intrrupt */
/* Mail box */
#define MB_RFDX_PROD_IDX_MASK 0xFFFF
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 885e892..ceb9df5 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -733,8 +733,6 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
hw->ict = 50000; /* 100ms */
hw->smb_timer = 200000; /* 400ms */
- hw->cmb_tpd = 4;
- hw->cmb_tx_timer = 1; /* 2 us */
hw->rx_imt = 200;
hw->tx_imt = 1000;
@@ -943,8 +941,7 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
- sizeof(struct atl1c_hw_stats) +
- 8 * 4 + 8 * 2;
+ 8 * 4;
ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
&ring_header->dma);
@@ -977,8 +974,6 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
rrd_ring->count;
offset += roundup(rrd_ring->size, 8);
- adapter->smb.dma = ring_header->dma + offset;
- adapter->smb.smb = (u8 *)ring_header->desc + offset;
return 0;
err_nomem:
@@ -993,8 +988,6 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
adapter->tpd_ring;
- struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
- struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
u32 data;
/* TPD */
@@ -1029,14 +1022,6 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
(rrd_ring->count & RRD_RING_SIZE_MASK));
- /* CMB */
- AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
-
- /* SMB */
- AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
- (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
- AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
- (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
if (hw->nic_type == athr_l2c_b) {
AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
@@ -1115,12 +1100,6 @@ static void atl1c_configure_dma(struct atl1c_adapter *adapter)
u32 dma_ctrl_data;
dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
- if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
- dma_ctrl_data |= DMA_CTRL_CMB_EN;
- if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
- dma_ctrl_data |= DMA_CTRL_SMB_EN;
- else
- dma_ctrl_data |= MAC_CTRL_SMB_DIS;
switch (hw->dma_order) {
case atl1c_dma_ord_in:
@@ -1440,16 +1419,9 @@ static int atl1c_configure(struct atl1c_adapter *adapter)
master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
- if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
- AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
- hw->cmb_tpd & CMB_TPD_THRESH_MASK);
- AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
- hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
- }
+ AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
+ hw->smb_timer & SMB_STAT_TIMER_MASK);
- if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
- AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
- hw->smb_timer & SMB_STAT_TIMER_MASK);
/* set MTU */
AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
VLAN_HLEN + ETH_FCS_LEN);
--
1.7.7
^ permalink raw reply related
* [PATCH 06/37] atl1c: split 2 32bit registers of TPD to 4 16bit registers
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
TPD producer/consumer index is 16bit wide.
16bit read/write reduce the dependency of the 2 tpd rings (hi and lo)
rename reg(157C/1580) to keep name coninsistency.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c.h | 10 +++++-
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 17 ++++-------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 34 +++++-----------------
3 files changed, 22 insertions(+), 39 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h
index f8628bc..16a5c7a 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c.h
@@ -583,8 +583,14 @@ struct atl1c_adapter {
#define AT_WRITE_REGW(a, reg, value) (\
writew((value), ((a)->hw_addr + reg)))
-#define AT_READ_REGW(a, reg) (\
- readw((a)->hw_addr + reg))
+#define AT_READ_REGW(a, reg, pdata) do { \
+ if (unlikely((a)->hibernate)) { \
+ readw((a)->hw_addr + reg); \
+ *(u16 *)pdata = readw((a)->hw_addr + reg); \
+ } else { \
+ *(u16 *)pdata = readw((a)->hw_addr + reg); \
+ } \
+ } while (0)
#define AT_WRITE_REG_ARRAY(a, reg, offset, value) ( \
writel((value), (((a)->hw_addr + reg) + ((offset) << 2))))
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index caff2ae..ca45fad 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -455,8 +455,8 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define REG_RRD0_HEAD_ADDR_LO 0x1568
#define REG_RRD_RING_SIZE 0x1578
#define RRD_RING_SIZE_MASK 0x0FFF
-#define REG_HTPD_HEAD_ADDR_LO 0x157C
-#define REG_NTPD_HEAD_ADDR_LO 0x1580
+#define REG_TPD_PRI1_ADDR_LO 0x157C
+#define REG_TPD_PRI0_ADDR_LO 0x1580
#define REG_TPD_RING_SIZE 0x1584
#define TPD_RING_SIZE_MASK 0xFFFF
@@ -562,15 +562,10 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define MB_RFDX_PROD_IDX_MASK 0xFFFF
#define REG_MB_RFD0_PROD_IDX 0x15E0
-#define MB_PRIO_PROD_IDX_MASK 0xFFFF
-#define REG_MB_PRIO_PROD_IDX 0x15F0
-#define MB_HTPD_PROD_IDX_SHIFT 0
-#define MB_NTPD_PROD_IDX_SHIFT 16
-
-#define MB_PRIO_CONS_IDX_MASK 0xFFFF
-#define REG_MB_PRIO_CONS_IDX 0x15F4
-#define MB_HTPD_CONS_IDX_SHIFT 0
-#define MB_NTPD_CONS_IDX_SHIFT 16
+#define REG_TPD_PRI1_PIDX 0x15F0 /* 16bit,hi-tpd producer idx */
+#define REG_TPD_PRI0_PIDX 0x15F2 /* 16bit,lo-tpd producer idx */
+#define REG_TPD_PRI1_CIDX 0x15F4 /* 16bit,hi-tpd consumer idx */
+#define REG_TPD_PRI0_CIDX 0x15F6 /* 16bit,lo-tpd consumer idx */
#define REG_MB_RFD01_CONS_IDX 0x15F8
#define MB_RFD0_CONS_IDX_MASK 0x0000FFFF
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index ceb9df5..c7d7640 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -995,10 +995,10 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
(u32)((tpd_ring[atl1c_trans_normal].dma &
AT_DMA_HI_ADDR_MASK) >> 32));
/* just enable normal priority TX queue */
- AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
+ AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
(u32)(tpd_ring[atl1c_trans_normal].dma &
AT_DMA_LO_ADDR_MASK));
- AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
+ AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
(u32)(tpd_ring[atl1c_trans_high].dma &
AT_DMA_LO_ADDR_MASK));
AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
@@ -1519,16 +1519,11 @@ static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
struct pci_dev *pdev = adapter->pdev;
u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
u16 hw_next_to_clean;
- u16 shift;
- u32 data;
+ u16 reg;
- if (type == atl1c_trans_high)
- shift = MB_HTPD_CONS_IDX_SHIFT;
- else
- shift = MB_NTPD_CONS_IDX_SHIFT;
+ reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
- AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
- hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
+ AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
while (next_to_clean != hw_next_to_clean) {
buffer_info = &tpd_ring->buffer_info[next_to_clean];
@@ -2090,23 +2085,10 @@ static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
{
struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
- u32 prod_data;
+ u16 reg;
- AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
- switch (type) {
- case atl1c_trans_high:
- prod_data &= 0xFFFF0000;
- prod_data |= tpd_ring->next_to_use & 0xFFFF;
- break;
- case atl1c_trans_normal:
- prod_data &= 0x0000FFFF;
- prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
- break;
- default:
- break;
- }
- wmb();
- AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
+ reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
+ AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
}
static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
--
1.7.7
^ permalink raw reply related
* [PATCH 07/37] atl1c: remove code related to rxq 1/2/3
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
remove code related to rxq 1/2/3 since multi-q not support.
refine REG_RXQ_CTRL definition as well.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 29 +++++++++-------------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 3 +-
2 files changed, 13 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index ca45fad..18c1f18 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -493,26 +493,21 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define ASPM_THRUPUT_LIMIT_NO 0x00
#define ASPM_THRUPUT_LIMIT_1M 0x01
#define ASPM_THRUPUT_LIMIT_10M 0x02
-#define ASPM_THRUPUT_LIMIT_100M 0x04
-#define RXQ1_CTRL_EN 0x10
-#define RXQ2_CTRL_EN 0x20
-#define RXQ3_CTRL_EN 0x40
-#define IPV6_CHKSUM_CTRL_EN 0x80
-#define RSS_HASH_BITS_MASK 0x00FF
-#define RSS_HASH_BITS_SHIFT 8
-#define RSS_HASH_IPV4 0x10000
-#define RSS_HASH_IPV4_TCP 0x20000
-#define RSS_HASH_IPV6 0x40000
-#define RSS_HASH_IPV6_TCP 0x80000
+#define ASPM_THRUPUT_LIMIT_100M 0x03
+#define IPV6_CHKSUM_CTRL_EN BIT(7)
#define RXQ_RFD_BURST_NUM_MASK 0x003F
#define RXQ_RFD_BURST_NUM_SHIFT 20
-#define RSS_MODE_MASK 0x0003
+#define RXQ_NUM_RFD_PREF_DEF 8
+#define RSS_MODE_MASK 3UL
#define RSS_MODE_SHIFT 26
-#define RSS_NIP_QUEUE_SEL_MASK 0x1
-#define RSS_NIP_QUEUE_SEL_SHIFT 28
-#define RRS_HASH_CTRL_EN 0x20000000
-#define RX_CUT_THRU_EN 0x40000000
-#define RXQ_CTRL_EN 0x80000000
+#define RSS_MODE_DIS 0
+#define RSS_MODE_SQSI 1
+#define RSS_MODE_MQSI 2
+#define RSS_MODE_MQMI 3
+#define RSS_NIP_QUEUE_SEL BIT(28) /* 0:q0, 1:table */
+#define RRS_HASH_CTRL_EN BIT(29)
+#define RX_CUT_THRU_EN BIT(30)
+#define RXQ_CTRL_EN BIT(31)
#define REG_RFD_FREE_THRESH 0x15A4
#define RFD_FREE_THRESH_MASK 0x003F
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index c7d7640..ca1259d 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1137,8 +1137,7 @@ static int atl1c_stop_mac(struct atl1c_hw *hw)
u32 data;
AT_READ_REG(hw, REG_RXQ_CTRL, &data);
- data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
- RXQ3_CTRL_EN | RXQ_CTRL_EN);
+ data &= ~RXQ_CTRL_EN;
AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
AT_READ_REG(hw, REG_TXQ_CTRL, &data);
--
1.7.7
^ permalink raw reply related
* [PATCH 08/37] atl1c: wrong register used to stop TXQ
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
function atl1c_stop_mac uses wrong register of REG_TWSI_CTRL
to stop mac, replace it with REG_TXQ_CTRL.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index ca1259d..b36c033 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1142,7 +1142,7 @@ static int atl1c_stop_mac(struct atl1c_hw *hw)
AT_READ_REG(hw, REG_TXQ_CTRL, &data);
data &= ~TXQ_CTRL_EN;
- AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
+ AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
atl1c_wait_until_idle(hw);
--
1.7.7
^ permalink raw reply related
* [PATCH 09/37] atl1c: correct wrong definition of REG_DMA_CTRL
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
some fields of REG_DMA_CTRL(15C0) are wrong, replace with the newest one.
haredware uses fixed dma-write-block size, remove dmaw_block related code
in function atl1c_configure_dma.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 46 +++++++++++++---------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 29 ++------------
2 files changed, 32 insertions(+), 43 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index 18c1f18..f502b4d 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -25,6 +25,12 @@
#include <linux/types.h>
#include <linux/mii.h>
+#define FIELD_GETX(_x, _name) ((_x) >> (_name##_SHIFT) & (_name##_MASK))
+#define FIELD_SETX(_x, _name, _v) \
+(((_x) & ~((_name##_MASK) << (_name##_SHIFT))) |\
+(((_v) & (_name##_MASK)) << (_name##_SHIFT)))
+#define FIELDX(_name, _v) (((_v) & (_name##_MASK)) << (_name##_SHIFT))
+
struct atl1c_adapter;
struct atl1c_hw;
@@ -528,25 +534,27 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define RXD_DMA_DOWN_TIMER_SHIFT 16
/* DMA Engine Control Register */
-#define REG_DMA_CTRL 0x15C0
-#define DMA_CTRL_DMAR_IN_ORDER 0x1
-#define DMA_CTRL_DMAR_ENH_ORDER 0x2
-#define DMA_CTRL_DMAR_OUT_ORDER 0x4
-#define DMA_CTRL_RCB_VALUE 0x8
-#define DMA_CTRL_DMAR_BURST_LEN_MASK 0x0007
-#define DMA_CTRL_DMAR_BURST_LEN_SHIFT 4
-#define DMA_CTRL_DMAW_BURST_LEN_MASK 0x0007
-#define DMA_CTRL_DMAW_BURST_LEN_SHIFT 7
-#define DMA_CTRL_DMAR_REQ_PRI 0x400
-#define DMA_CTRL_DMAR_DLY_CNT_MASK 0x001F
-#define DMA_CTRL_DMAR_DLY_CNT_SHIFT 11
-#define DMA_CTRL_DMAW_DLY_CNT_MASK 0x000F
-#define DMA_CTRL_DMAW_DLY_CNT_SHIFT 16
-#define DMA_CTRL_CMB_EN 0x100000
-#define DMA_CTRL_SMB_EN 0x200000
-#define DMA_CTRL_CMB_NOW 0x400000
-#define MAC_CTRL_SMB_DIS 0x1000000
-#define DMA_CTRL_SMB_NOW 0x80000000
+#define REG_DMA_CTRL 0x15C0
+#define DMA_CTRL_SMB_NOW BIT(31)
+#define DMA_CTRL_WPEND_CLR BIT(30)
+#define DMA_CTRL_RPEND_CLR BIT(29)
+#define DMA_CTRL_WDLY_CNT_MASK 0xFUL
+#define DMA_CTRL_WDLY_CNT_SHIFT 16
+#define DMA_CTRL_WDLY_CNT_DEF 4
+#define DMA_CTRL_RDLY_CNT_MASK 0x1FUL
+#define DMA_CTRL_RDLY_CNT_SHIFT 11
+#define DMA_CTRL_RDLY_CNT_DEF 15
+#define DMA_CTRL_RREQ_PRI_DATA BIT(10) /* 0:tpd, 1:data */
+#define DMA_CTRL_WREQ_BLEN_MASK 7UL
+#define DMA_CTRL_WREQ_BLEN_SHIFT 7
+#define DMA_CTRL_RREQ_BLEN_MASK 7UL
+#define DMA_CTRL_RREQ_BLEN_SHIFT 4
+#define L1C_CTRL_DMA_RCB_LEN128 BIT(3) /* 0:64bytes,1:128bytes */
+#define DMA_CTRL_RORDER_MODE_MASK 7UL
+#define DMA_CTRL_RORDER_MODE_SHIFT 0
+#define DMA_CTRL_RORDER_MODE_OUT 4
+#define DMA_CTRL_RORDER_MODE_ENHANCE 2
+#define DMA_CTRL_RORDER_MODE_IN 1
/* INT-triggle/SMB Control Register */
#define REG_SMB_STAT_TIMER 0x15C4 /* 2us resolution */
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index b36c033..1ce48d0 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1099,30 +1099,11 @@ static void atl1c_configure_dma(struct atl1c_adapter *adapter)
struct atl1c_hw *hw = &adapter->hw;
u32 dma_ctrl_data;
- dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
-
- switch (hw->dma_order) {
- case atl1c_dma_ord_in:
- dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
- break;
- case atl1c_dma_ord_enh:
- dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
- break;
- case atl1c_dma_ord_out:
- dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
- break;
- default:
- break;
- }
-
- dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
- << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
- dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
- << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
- dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
- << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
- dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
- << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
+ dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
+ DMA_CTRL_RREQ_PRI_DATA |
+ FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
+ FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
+ FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
}
--
1.7.7
^ permalink raw reply related
* [PATCH 10/37] atl1c: remove dmaw_block
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
dmaw_block is never used in the driver, remove it.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c.h | 1 -
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 4 ----
2 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h
index 16a5c7a..6e5ae89 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c.h
@@ -374,7 +374,6 @@ struct atl1c_hw {
enum atl1c_dma_order dma_order;
enum atl1c_dma_rcb rcb_value;
enum atl1c_dma_req_block dmar_block;
- enum atl1c_dma_req_block dmaw_block;
u16 device_id;
u16 vendor_id;
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 1ce48d0..d6ebaa4 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -740,7 +740,6 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
hw->rfd_burst = 8;
hw->dma_order = atl1c_dma_ord_out;
hw->dmar_block = atl1c_dma_req_1024;
- hw->dmaw_block = atl1c_dma_req_1024;
hw->dmar_dly_cnt = 15;
hw->dmaw_dly_cnt = 4;
@@ -1056,9 +1055,6 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter)
AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
(tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
- max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
- DEVICE_CTRL_MAX_PAYLOAD_MASK;
- hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
DEVICE_CTRL_MAX_RREQ_SZ_MASK;
hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
--
1.7.7
^ permalink raw reply related
* [PATCH 11/37] atl1c: using fixed TXQ configuration for l2cb and l1c
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
using fixed TXQ config for l2cb and l1c regardless dmar_block
to make tx-DMA more stable.
register REG_TXQ_CTRL is refined as well.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 34 +++++++++++++++++------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 13 ++-------
2 files changed, 28 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index f502b4d..a0b56ef 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -467,15 +467,31 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define TPD_RING_SIZE_MASK 0xFFFF
/* TXQ Control Register */
-#define REG_TXQ_CTRL 0x1590
-#define TXQ_NUM_TPD_BURST_MASK 0xF
-#define TXQ_NUM_TPD_BURST_SHIFT 0
-#define TXQ_CTRL_IP_OPTION_EN 0x10
-#define TXQ_CTRL_EN 0x20
-#define TXQ_CTRL_ENH_MODE 0x40
-#define TXQ_CTRL_LS_8023_EN 0x80
-#define TXQ_TXF_BURST_NUM_SHIFT 16
-#define TXQ_TXF_BURST_NUM_MASK 0xFFFF
+#define REG_TXQ_CTRL 0x1590
+#define TXQ_TXF_BURST_NUM_MASK 0xFFFFUL
+#define TXQ_TXF_BURST_NUM_SHIFT 16
+#define L1C_TXQ_TXF_BURST_PREF 0x200
+#define L2CB_TXQ_TXF_BURST_PREF 0x40
+#define TXQ_CTRL_PEDING_CLR BIT(8)
+#define TXQ_CTRL_LS_8023_EN BIT(7)
+#define TXQ_CTRL_ENH_MODE BIT(6)
+#define TXQ_CTRL_EN BIT(5)
+#define TXQ_CTRL_IP_OPTION_EN BIT(4)
+#define TXQ_NUM_TPD_BURST_MASK 0xFUL
+#define TXQ_NUM_TPD_BURST_SHIFT 0
+#define TXQ_NUM_TPD_BURST_DEF 5
+#define TXQ_CFGV (\
+ FIELDX(TXQ_NUM_TPD_BURST, TXQ_NUM_TPD_BURST_DEF) |\
+ TXQ_CTRL_ENH_MODE |\
+ TXQ_CTRL_LS_8023_EN |\
+ TXQ_CTRL_IP_OPTION_EN)
+#define L1C_TXQ_CFGV (\
+ TXQ_CFGV |\
+ FIELDX(TXQ_TXF_BURST_NUM, L1C_TXQ_TXF_BURST_PREF))
+#define L2CB_TXQ_CFGV (\
+ TXQ_CFGV |\
+ FIELDX(TXQ_TXF_BURST_NUM, L2CB_TXQ_TXF_BURST_PREF))
+
/* Jumbo packet Threshold for task offload */
#define REG_TX_TSO_OFFLOAD_THRESH 0x1594 /* In 8-bytes */
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index d6ebaa4..8e737a5 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1049,7 +1049,6 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter)
u32 max_pay_load;
u16 tx_offload_thresh;
u32 txq_ctrl_data;
- u32 max_pay_load_data;
tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
@@ -1059,15 +1058,9 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter)
DEVICE_CTRL_MAX_RREQ_SZ_MASK;
hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
- txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
- TXQ_NUM_TPD_BURST_SHIFT;
- if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
- txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
- max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
- TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
- if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
- max_pay_load_data >>= 1;
- txq_ctrl_data |= max_pay_load_data;
+ txq_ctrl_data =
+ hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
+ L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
}
--
1.7.7
^ permalink raw reply related
* [PATCH 12/37] atl1c: restore max-read-request-size in Device Conrol Register
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
in some platforms, we found the max-read-request-size in Device Control
Register is set to 0 by (BIOS?) during bootup, this will cause the
performance(throughput) very bad.
Restore it to a min-value.
register definition of REG_DEVICE_CTRL is refined as well.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 21 ++++++++++++++++-----
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 18 +++++++++++++-----
2 files changed, 29 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index a0b56ef..590ad3d 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -54,11 +54,22 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define DEVICE_CAP_MAX_PAYLOAD_MASK 0x7
#define DEVICE_CAP_MAX_PAYLOAD_SHIFT 0
-#define REG_DEVICE_CTRL 0x60
-#define DEVICE_CTRL_MAX_PAYLOAD_MASK 0x7
-#define DEVICE_CTRL_MAX_PAYLOAD_SHIFT 5
-#define DEVICE_CTRL_MAX_RREQ_SZ_MASK 0x7
-#define DEVICE_CTRL_MAX_RREQ_SZ_SHIFT 12
+#define REG_DEVICE_CTRL 0x60 /* 16bit */
+#define DEVICE_CTRL_MAX_RREQ_SZ_MASK 7U
+#define DEVICE_CTRL_MAX_RREQ_SZ_SHIFT 12
+#define DEVICE_CTRL_MAXRRS_MIN 2
+#define DEVICE_CTRL_NOSNP_EN BIT(11)
+#define DEVICE_CTRL_AUXPWR_EN BIT(10)
+#define DEVICE_CTRL_PHANTOM_EN BIT(9)
+#define DEVICE_CTRL_EXTAG_EN BIT(8)
+#define DEVICE_CTRL_MAX_PAYLOAD_MASK 7U
+#define DEVICE_CTRL_MAX_PAYLOAD_SHIFT 5
+#define DEVICE_CTRL_RELORD_EN BIT(4)
+#define DEVICE_CTRL_URR_EN BIT(3)
+#define DEVICE_CTRL_FERR_EN BIT(2)
+#define DEVICE_CTRL_NFERR_EN BIT(1)
+#define DEVICE_CTRL_CERR_EN BIT(0)
+
#define REG_LINK_CTRL 0x68
#define LINK_CTRL_L0S_EN 0x01
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 8e737a5..18c91b6 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1045,7 +1045,7 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
static void atl1c_configure_tx(struct atl1c_adapter *adapter)
{
struct atl1c_hw *hw = &adapter->hw;
- u32 dev_ctrl_data;
+ u16 dev_ctrl_data;
u32 max_pay_load;
u16 tx_offload_thresh;
u32 txq_ctrl_data;
@@ -1053,11 +1053,19 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter)
tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
(tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
- AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
- max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
- DEVICE_CTRL_MAX_RREQ_SZ_MASK;
+ AT_READ_REGW(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
+ max_pay_load = FIELD_GETX(dev_ctrl_data, DEVICE_CTRL_MAX_RREQ_SZ);
hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
-
+ /*
+ * if BIOS had changed the dam-read-max-length to an invalid value,
+ * restore it to default value
+ */
+ if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
+ dev_ctrl_data = FIELD_SETX(dev_ctrl_data,
+ DEVICE_CTRL_MAX_RREQ_SZ, DEVICE_CTRL_MAXRRS_MIN);
+ AT_WRITE_REGW(hw, REG_DEVICE_CTRL, dev_ctrl_data);
+ hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
+ }
txq_ctrl_data =
hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
--
1.7.7
^ permalink raw reply related
* [PATCH 13/37] atl1c: threshold for ASPM is changed based on chip capability
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
threshold setting to control ASPM for diff chips are different.
currently, all gigabit-capability chips have limited-ASPM under
100M throughput.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 18c91b6..8228aa7 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1084,9 +1084,10 @@ static void atl1c_configure_rx(struct atl1c_adapter *adapter)
if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
- if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
- rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
- ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
+ /* aspm for gigabit */
+ if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
+ rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
+ ASPM_THRUPUT_LIMIT_100M);
AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
}
--
1.7.7
^ permalink raw reply related
* [PATCH 15/37] atl1c: update right threshold for TSO
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
atl1c_configure_tx used a wrong value of MAX_TX_OFFLOAD_THRESH(9KB)
for TSO threshold.
the right value should be 7KB
Fast Ethernet controller doesn't support Jumbo frame.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c.h | 2 --
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 1 +
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 11 ++++++++---
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h
index 6e5ae89..9f4fc41 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c.h
@@ -74,8 +74,6 @@
#define AT_RX_BUF_SIZE (ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)
#define MAX_JUMBO_FRAME_SIZE (6*1024)
-#define MAX_TSO_FRAME_SIZE (7*1024)
-#define MAX_TX_OFFLOAD_THRESH (9*1024)
#define AT_MAX_RECEIVE_QUEUE 4
#define AT_DEF_RECEIVE_QUEUE 1
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index ec68611..b9fa854 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -515,6 +515,7 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
/* Jumbo packet Threshold for task offload */
#define REG_TX_TSO_OFFLOAD_THRESH 0x1594 /* In 8-bytes */
#define TX_TSO_OFFLOAD_THRESH_MASK 0x07FF
+#define MAX_TSO_FRAME_SIZE (7*1024)
#define REG_TXF_WATER_MARK 0x1598 /* In 8-bytes */
#define TXF_WATER_MARK_MASK 0x0FFF
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 141fe67..0b15e1f 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -501,11 +501,16 @@ static int atl1c_set_features(struct net_device *netdev,
static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
+ struct atl1c_hw *hw = &adapter->hw;
int old_mtu = netdev->mtu;
int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
- if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
- (max_frame > MAX_JUMBO_FRAME_SIZE)) {
+ /* Fast Etherent controller doesn't support Jumbo packet */
+ if (((hw->nic_type == athr_l2c ||
+ hw->nic_type == athr_l2c_b ||
+ hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
+ max_frame < ETH_ZLEN + ETH_FCS_LEN ||
+ max_frame > MAX_JUMBO_FRAME_SIZE) {
if (netif_msg_link(adapter))
dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
return -EINVAL;
@@ -1050,7 +1055,7 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter)
u16 tx_offload_thresh;
u32 txq_ctrl_data;
- tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
+ tx_offload_thresh = MAX_TSO_FRAME_SIZE;
AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
(tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
AT_READ_REGW(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
--
1.7.7
^ permalink raw reply related
* [PATCH 17/37] atl1c: clear PCIE error status in atl1c_reset_pcie
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
clear PCIE error status (error log is write-1-clear).
Reg definition of REG_PCIE_UC_SEVERITY is refined as well.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 34 +++++++++++++++-------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 5 ++-
2 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index b9fa854..a4fd36e 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -70,6 +70,18 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define DEVICE_CTRL_NFERR_EN BIT(1)
#define DEVICE_CTRL_CERR_EN BIT(0)
+#define REG_DEVICE_STAT 0x62 /* 16bit */
+#define DEVICE_STAT_XS_PEND BIT(5)
+#define DEVICE_STAT_AUXPWR BIT(4)
+#define DEVICE_STAT_UR BIT(3)
+#define DEVICE_STAT_FERR BIT(2)
+#define DEVICE_STAT_NFERR BIT(1)
+#define DEVICE_STAT_CERR BIT(0)
+#define DEVICE_STAT_ERR (\
+ DEVICE_STAT_UR |\
+ DEVICE_STAT_FERR |\
+ DEVICE_STAT_NFERR |\
+ DEVICE_STAT_CERR)
#define REG_LINK_CTRL 0x68
#define LINK_CTRL_L0S_EN 0x01
@@ -77,17 +89,17 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define LINK_CTRL_EXT_SYNC 0x80
#define REG_PCIE_UC_SEVERITY 0x10C
-#define PCIE_UC_SERVRITY_TRN 0x00000001
-#define PCIE_UC_SERVRITY_DLP 0x00000010
-#define PCIE_UC_SERVRITY_PSN_TLP 0x00001000
-#define PCIE_UC_SERVRITY_FCP 0x00002000
-#define PCIE_UC_SERVRITY_CPL_TO 0x00004000
-#define PCIE_UC_SERVRITY_CA 0x00008000
-#define PCIE_UC_SERVRITY_UC 0x00010000
-#define PCIE_UC_SERVRITY_ROV 0x00020000
-#define PCIE_UC_SERVRITY_MLFP 0x00040000
-#define PCIE_UC_SERVRITY_ECRC 0x00080000
-#define PCIE_UC_SERVRITY_UR 0x00100000
+#define PCIE_UC_SEVERITY_UR BIT(20)
+#define PCIE_UC_SERVRITY_ECRC BIT(19)
+#define PCIE_UC_SERVRITY_MLFP BIT(18)
+#define PCIE_UC_SERVRITY_ROV BIT(17)
+#define PCIE_UC_SERVRITY_UC BIT(16)
+#define PCIE_UC_SERVRITY_CA BIT(15)
+#define PCIE_UC_SERVRITY_CPL_TO BIT(14)
+#define PCIE_UC_SERVRITY_FCP BIT(13)
+#define PCIE_UC_SERVRITY_PSN_TLP BIT(12)
+#define PCIE_UC_SERVRITY_DLP BIT(4)
+#define PCIE_UC_SERVRITY_TRN BIT(0)
#define REG_DEV_SERIALNUM_CTRL 0x200
#define REG_DEV_MAC_SEL_MASK 0x0 /* 0:EUI; 1:MAC */
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 4a0d26c..9295aee 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -125,9 +125,10 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
* Mask some pcie error bits
*/
AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
- data &= ~PCIE_UC_SERVRITY_DLP;
- data &= ~PCIE_UC_SERVRITY_FCP;
+ data &= ~(PCIE_UC_SERVRITY_DLP | PCIE_UC_SERVRITY_FCP);
AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
+ /* clear error status */
+ AT_WRITE_REGW(hw, REG_DEVICE_STAT, DEVICE_STAT_ERR);
AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
data &= ~LTSSM_ID_EN_WRO;
--
1.7.7
^ permalink raw reply related
* [PATCH 18/37] atl1c: refine reg definition of REG_MASTER_CTRL
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
refine/update register REG_MASTER_CTRL definition according with
hardware spec.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 41 +++++++++++++----------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 2 +-
2 files changed, 24 insertions(+), 19 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index a4fd36e..8246c29 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -188,26 +188,31 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define REG_LTSSM_ID_CTRL 0x12FC
#define LTSSM_ID_EN_WRO 0x1000
+
+
/* Selene Master Control Register */
#define REG_MASTER_CTRL 0x1400
-#define MASTER_CTRL_SOFT_RST 0x1
-#define MASTER_CTRL_TEST_MODE_MASK 0x3
-#define MASTER_CTRL_TEST_MODE_SHIFT 2
-#define MASTER_CTRL_BERT_START 0x10
-#define MASTER_CTRL_OOB_DIS_OFF 0x40
-#define MASTER_CTRL_SA_TIMER_EN 0x80
-#define MASTER_CTRL_MTIMER_EN 0x100
-#define MASTER_CTRL_MANUAL_INT 0x200
-#define MASTER_CTRL_TX_ITIMER_EN 0x400
-#define MASTER_CTRL_RX_ITIMER_EN 0x800
-#define MASTER_CTRL_CLK_SEL_DIS 0x1000
-#define MASTER_CTRL_CLK_SWH_MODE 0x2000
-#define MASTER_CTRL_INT_RDCLR 0x4000
-#define MASTER_CTRL_REV_NUM_SHIFT 16
-#define MASTER_CTRL_REV_NUM_MASK 0xff
-#define MASTER_CTRL_DEV_ID_SHIFT 24
-#define MASTER_CTRL_DEV_ID_MASK 0x7f
-#define MASTER_CTRL_OTP_SEL 0x80000000
+#define MASTER_CTRL_OTP_SEL BIT(31)
+#define MASTER_DEV_NUM_MASK 0x7FUL
+#define MASTER_DEV_NUM_SHIFT 24
+#define MASTER_REV_NUM_MASK 0xFFUL
+#define MASTER_REV_NUM_SHIFT 16
+#define MASTER_CTRL_INT_RDCLR BIT(14)
+#define MASTER_CTRL_CLK_SEL_DIS BIT(12) /* 1:alwys sel pclk from
+ * serdes, not sw to 25M */
+#define MASTER_CTRL_RX_ITIMER_EN BIT(11) /* IRQ MODURATION FOR RX */
+#define MASTER_CTRL_TX_ITIMER_EN BIT(10) /* MODURATION FOR TX/RX */
+#define MASTER_CTRL_MANU_INT BIT(9) /* SOFT MANUAL INT */
+#define MASTER_CTRL_MANUTIMER_EN BIT(8)
+#define MASTER_CTRL_SA_TIMER_EN BIT(7) /* SYS ALIVE TIMER EN */
+#define MASTER_CTRL_OOB_DIS BIT(6) /* OUT OF BOX DIS */
+#define MASTER_CTRL_WAKEN_25M BIT(5) /* WAKE WO. PCIE CLK */
+#define MASTER_CTRL_BERT_START BIT(4)
+#define MASTER_PCIE_TSTMOD_MASK 3UL
+#define MASTER_PCIE_TSTMOD_SHIFT 2
+#define MASTER_PCIE_RST BIT(1)
+#define MASTER_CTRL_SOFT_RST BIT(0) /* RST MAC & DMA */
+#define DMA_MAC_RST_TO 50
/* Timer Initial Value Register */
#define REG_MANUAL_TIMER_INIT 0x1404
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 9295aee..4fc824d 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -1177,7 +1177,7 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)
* clearing, and should clear within a microsecond.
*/
AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
- master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
+ master_ctrl_data |= MASTER_CTRL_OOB_DIS;
AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
& 0xFFFF));
--
1.7.7
^ permalink raw reply related
* [PATCH 19/37] atl1c: clear bit MASTER_CTRL_CLK_SEL_DIS in atl1c_pcie_patch
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
bit MASTER_CTRL_CLK_SEL_DIS could be set before enter suspend
clear it after resume to enable pclk(PCIE clock) switch to
low frequency(25M) in some circumstances to save power.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 4fc824d..ddffc48 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -80,7 +80,12 @@ static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
static void atl1c_pcie_patch(struct atl1c_hw *hw)
{
- u32 data;
+ u32 mst_data, data;
+
+ /* pclk sel could switch to 25M */
+ AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
+ mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
+ AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
data |= PCIE_PHYMISC_FORCE_RCV_DET;
--
1.7.7
^ permalink raw reply related
* [PATCH 21/37] atl1c: refine atl1c_pcie_patch
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
bit PCIE_PHYMISC_FORCE_RCV_DET is only for l1c&l2c to fix WoL issue,
other chips set bit5 of REG_MASTER_CTRL --- this way could save more
power than the former, and the bit should be kept all time.
l2cb 1.x has special setting for L0S/L1
l2cb 1.x & l1d 1.x should clear Vendor Message on some platforms,
otherwise it will cause the root complex hang.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 17 ++++++--
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 49 +++++++++++++++++------
2 files changed, 48 insertions(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index 3a5e451..aafe4ff 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -136,17 +136,24 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
#define PCIE_DEV_MISC_SERDES_SEL_DIN 0x10
#define REG_PCIE_PHYMISC 0x1000
-#define PCIE_PHYMISC_FORCE_RCV_DET 0x4
+#define PCIE_PHYMISC_FORCE_RCV_DET BIT(2)
+#define PCIE_PHYMISC_NFTS_MASK 0xFFUL
+#define PCIE_PHYMISC_NFTS_SHIFT 16
#define REG_PCIE_PHYMISC2 0x1004
-#define PCIE_PHYMISC2_SERDES_CDR_MASK 0x3
-#define PCIE_PHYMISC2_SERDES_CDR_SHIFT 16
-#define PCIE_PHYMISC2_SERDES_TH_MASK 0x3
-#define PCIE_PHYMISC2_SERDES_TH_SHIFT 18
+#define PCIE_PHYMISC2_L0S_TH_MASK 0x3UL
+#define PCIE_PHYMISC2_L0S_TH_SHIFT 18
+#define L2CB1_PCIE_PHYMISC2_L0S_TH 3
+#define PCIE_PHYMISC2_CDR_BW_MASK 0x3UL
+#define PCIE_PHYMISC2_CDR_BW_SHIFT 16
+#define L2CB1_PCIE_PHYMISC2_CDR_BW 3
#define REG_TWSI_DEBUG 0x1108
#define TWSI_DEBUG_DEV_EXIST 0x20000000
+#define REG_DMA_DBG 0x1114
+#define DMA_DBG_VENDOR_MSG BIT(0)
+
#define REG_EEPROM_CTRL 0x12C0
#define EEPROM_CTRL_DATA_HI_MASK 0xFFFF
#define EEPROM_CTRL_DATA_HI_SHIFT 0
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 8890e7f..8955810 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -87,20 +87,37 @@ static void atl1c_pcie_patch(struct atl1c_hw *hw)
mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
- AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
- data |= PCIE_PHYMISC_FORCE_RCV_DET;
- AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
-
+ /* WoL/PCIE related settings */
+ if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
+ AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
+ data |= PCIE_PHYMISC_FORCE_RCV_DET;
+ AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
+ } else { /* new dev set bit5 of MASTER */
+ if (!(mst_data & MASTER_CTRL_WAKEN_25M))
+ AT_WRITE_REG(hw, REG_MASTER_CTRL,
+ mst_data | MASTER_CTRL_WAKEN_25M);
+ }
+ /* aspm/PCIE setting only for l2cb 1.0 */
if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
-
- data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
- PCIE_PHYMISC2_SERDES_CDR_SHIFT);
- data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
- data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
- PCIE_PHYMISC2_SERDES_TH_SHIFT);
- data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
+ data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
+ L2CB1_PCIE_PHYMISC2_CDR_BW);
+ data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
+ L2CB1_PCIE_PHYMISC2_L0S_TH);
AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
+ /* extend L1 sync timer */
+ AT_READ_REG(hw, REG_LINK_CTRL, &data);
+ data |= LINK_CTRL_EXT_SYNC;
+ AT_WRITE_REG(hw, REG_LINK_CTRL, data);
+ }
+ /* l2cb 1.x & l1d 1.x */
+ if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
+ AT_READ_REG(hw, REG_PM_CTRL, &data);
+ data |= PM_CTRL_L0S_BUFSRX_EN;
+ AT_WRITE_REG(hw, REG_PM_CTRL, data);
+ /* clear vendor msg */
+ AT_READ_REG(hw, REG_DMA_DBG, &data);
+ AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
}
}
@@ -1179,8 +1196,8 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)
*/
AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
master_ctrl_data |= MASTER_CTRL_OOB_DIS;
- AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
- & 0xFFFF));
+ AT_WRITE_REG(hw, REG_MASTER_CTRL,
+ master_ctrl_data | MASTER_CTRL_SOFT_RST);
AT_WRITE_FLUSH(hw);
msleep(10);
@@ -1192,6 +1209,8 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)
" disabled for 10ms second\n");
return -1;
}
+ AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
+
return 0;
}
@@ -1336,6 +1355,10 @@ static int atl1c_configure(struct atl1c_adapter *adapter)
u32 intr_modrt_data;
u32 data;
+ AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
+ master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
+ MASTER_CTRL_RX_ITIMER_EN |
+ MASTER_CTRL_INT_RDCLR);
/* clear interrupt status */
AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
/* Clear any WOL status */
--
1.7.7
^ permalink raw reply related
* [PATCH 22/37] atl1c: fix WoL(magic) issue for l2cb 1.1
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
l2cb 1.1 hardware has a bug for magic wakeup,
the workaround is to add pattern enable.
WoL related registers are refined as well.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h | 71 ++++++++++++++--------
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 9 ++-
2 files changed, 52 insertions(+), 28 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
index aafe4ff..eaa1760 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
@@ -444,34 +444,53 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
/* Wake-On-Lan control register */
#define REG_WOL_CTRL 0x14a0
-#define WOL_PATTERN_EN 0x00000001
-#define WOL_PATTERN_PME_EN 0x00000002
-#define WOL_MAGIC_EN 0x00000004
-#define WOL_MAGIC_PME_EN 0x00000008
-#define WOL_LINK_CHG_EN 0x00000010
-#define WOL_LINK_CHG_PME_EN 0x00000020
-#define WOL_PATTERN_ST 0x00000100
-#define WOL_MAGIC_ST 0x00000200
-#define WOL_LINKCHG_ST 0x00000400
-#define WOL_CLK_SWITCH_EN 0x00008000
-#define WOL_PT0_EN 0x00010000
-#define WOL_PT1_EN 0x00020000
-#define WOL_PT2_EN 0x00040000
-#define WOL_PT3_EN 0x00080000
-#define WOL_PT4_EN 0x00100000
-#define WOL_PT5_EN 0x00200000
-#define WOL_PT6_EN 0x00400000
+#define WOL_PT7_MATCH BIT(31)
+#define WOL_PT6_MATCH BIT(30)
+#define WOL_PT5_MATCH BIT(29)
+#define WOL_PT4_MATCH BIT(28)
+#define WOL_PT3_MATCH BIT(27)
+#define WOL_PT2_MATCH BIT(26)
+#define WOL_PT1_MATCH BIT(25)
+#define WOL_PT0_MATCH BIT(24)
+#define WOL_PT7_EN BIT(23)
+#define WOL_PT6_EN BIT(22)
+#define WOL_PT5_EN BIT(21)
+#define WOL_PT4_EN BIT(20)
+#define WOL_PT3_EN BIT(19)
+#define WOL_PT2_EN BIT(18)
+#define WOL_PT1_EN BIT(17)
+#define WOL_PT0_EN BIT(16)
+#define WOL_LNKCHG_ST BIT(10)
+#define WOL_MAGIC_ST BIT(9)
+#define WOL_PATTERN_ST BIT(8)
+#define WOL_OOB_EN BIT(6)
+#define WOL_LINK_CHG_PME_EN BIT(5)
+#define WOL_LINK_CHG_EN BIT(4)
+#define WOL_MAGIC_PME_EN BIT(3)
+#define WOL_MAGIC_EN BIT(2)
+#define WOL_PATTERN_PME_EN BIT(1)
+#define WOL_PATTERN_EN BIT(0)
/* WOL Length ( 2 DWORD ) */
-#define REG_WOL_PATTERN_LEN 0x14a4
-#define WOL_PT_LEN_MASK 0x7f
-#define WOL_PT0_LEN_SHIFT 0
-#define WOL_PT1_LEN_SHIFT 8
-#define WOL_PT2_LEN_SHIFT 16
-#define WOL_PT3_LEN_SHIFT 24
-#define WOL_PT4_LEN_SHIFT 0
-#define WOL_PT5_LEN_SHIFT 8
-#define WOL_PT6_LEN_SHIFT 16
+#define REG_WOL_PTLEN1 0x14A4
+#define WOL_PTLEN1_3_MASK 0xFFUL
+#define WOL_PTLEN1_3_SHIFT 24
+#define WOL_PTLEN1_2_MASK 0xFFUL
+#define WOL_PTLEN1_2_SHIFT 16
+#define WOL_PTLEN1_1_MASK 0xFFUL
+#define WOL_PTLEN1_1_SHIFT 8
+#define WOL_PTLEN1_0_MASK 0xFFUL
+#define WOL_PTLEN1_0_SHIFT 0
+
+#define REG_WOL_PTLEN2 0x14A8
+#define WOL_PTLEN2_7_MASK 0xFFUL
+#define WOL_PTLEN2_7_SHIFT 24
+#define WOL_PTLEN2_6_MASK 0xFFUL
+#define WOL_PTLEN2_6_SHIFT 16
+#define WOL_PTLEN2_5_MASK 0xFFUL
+#define WOL_PTLEN2_5_SHIFT 8
+#define WOL_PTLEN2_4_MASK 0xFFUL
+#define WOL_PTLEN2_4_SHIFT 0
/* Internal SRAM Partition Register */
#define RFDX_HEAD_ADDR_MASK 0x03FF
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 8955810..8836c84 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -2353,9 +2353,14 @@ static int atl1c_suspend(struct device *dev)
mac_ctrl_data |= MAC_CTRL_DUPLX;
/* turn on magic packet wol */
- if (wufc & AT_WUFC_MAG)
+ if (wufc & AT_WUFC_MAG) {
wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
-
+ if (hw->nic_type == athr_l2c_b &&
+ hw->revision_id == L2CB_V11) {
+ wol_ctrl_data |=
+ WOL_PATTERN_EN | WOL_PATTERN_PME_EN;
+ }
+ }
if (wufc & AT_WUFC_LNKC) {
wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
/* only link up can wake up */
--
1.7.7
^ permalink raw reply related
* [PATCH 23/37] atl1c: remove MDIO_REG_ADDR_MASK in atl1c_mdio_read/write
From: xiong @ 2012-04-13 0:14 UTC (permalink / raw)
To: davem, netdev, linux-kernel; +Cc: qca-linux-team, nic-devel, xiong
In-Reply-To: <1334276102-15866-1-git-send-email-xiong@qca.qualcomm.com>
MDIO_REG_ADDR_MASK is already applied in function
atl1c_write_phy_reg and atl1c_read_phy_reg
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
---
drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 8836c84..6534963 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -569,7 +569,7 @@ static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
struct atl1c_adapter *adapter = netdev_priv(netdev);
u16 result;
- atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
+ atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
return result;
}
@@ -578,7 +578,7 @@ static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
{
struct atl1c_adapter *adapter = netdev_priv(netdev);
- atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
+ atl1c_write_phy_reg(&adapter->hw, reg_num, val);
}
/*
--
1.7.7
^ permalink raw reply related
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