* [PATCH net-next 1/7] sch_netem: clear old clgstate when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
In-Reply-To: <1392366970-11592-1-git-send-email-yangyingliang@huawei.com>
If we set a netem qdisc with clgstate options, while we
use "#tc qdisc replace ..." that without clgstate options
to replace the old qdisc, the old clgstate's value is still
there. We need clear these values after qdisc's replaced.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
net/sched/sch_netem.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index 4fced67..6f2cc04 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -845,6 +845,7 @@ static int netem_change(struct Qdisc *sch, struct nlattr *opt)
}
} else {
q->loss_model = CLG_RANDOM;
+ memset(&q->clg, 0, sizeof(q->clg));
}
if (tb[TCA_NETEM_DELAY_DIST]) {
--
1.8.0
^ permalink raw reply related
* [PATCH net-next 2/7] sch_netem: clear old dist table when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
In-Reply-To: <1392366970-11592-1-git-send-email-yangyingliang@huawei.com>
If we set a netem qdisc with dist table option, while we
use "#tc qdisc replace ..." that without dist table option
to replace the old qdisc, the old dist table is still there.
We need clear dist table after qdisc's replaced.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
net/sched/sch_netem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index 6f2cc04..fd2206d 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -859,6 +859,9 @@ static int netem_change(struct Qdisc *sch, struct nlattr *opt)
q->loss_model = old_loss_model;
return ret;
}
+ } else {
+ dist_free(q->delay_dist);
+ q->delay_dist = NULL;
}
sch->limit = qopt->limit;
--
1.8.0
^ permalink raw reply related
* [PATCH net-next 0/7] clear old options when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
I've added a netem qdisc with rate option, then I replace this qdisc
without rate option but with latency option. The rate option is still
there.
E.g.
# tc qdisc add dev eth4 handle 1: root netem rate 10mbit
# tc qdisc show
qdisc netem 1: dev eth4 root refcnt 2 limit 1000 rate 10Mbit
# tc qdisc replace dev eth4 handle 1: root netem latency 10ms
# tc qdisc show
qdisc netem 1: dev eth4 root refcnt 2 limit 1000 delay 10.0ms rate 10Mbit
The old options need be cleared after the qdisc is replaced.
Yang Yingliang (7):
sch_netem: clear old clgstate when old qdisc's replaced
sch_netem: clear old dist table when old qdisc's replaced
sch_netem: clear old reorder when old qdisc's replaced
sch_netem: clear old correlation when old qdisc's replaced
sch_netem: clear old corrupt when old qdisc's replaced
sch_netem: clear old rate when old qdisc's replaced
sch_netem: clear old ecn when old qdisc's replaced
net/sched/sch_netem.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
--
1.8.0
^ permalink raw reply
* [PATCH net-next 5/7] sch_netem: clear old corrupt when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
In-Reply-To: <1392366970-11592-1-git-send-email-yangyingliang@huawei.com>
If we set a netem qdisc with corrupt option, while we
use "#tc qdisc replace ..." that without corrupt option
to replace the old qdisc, the old corrupt is still there.
We need clear old corrupt after qdisc's replaced.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
net/sched/sch_netem.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index 33e7cef..2f630e9 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -732,6 +732,12 @@ static void get_corrupt(struct netem_sched_data *q, const struct nlattr *attr)
init_crandom(&q->corrupt_cor, r->correlation);
}
+static void corrupt_reset(struct netem_sched_data *q)
+{
+ q->corrupt = 0;
+ memset(&q->corrupt_cor, 0, sizeof(struct crndstate));
+}
+
static void get_rate(struct netem_sched_data *q, const struct nlattr *attr)
{
const struct tc_netem_rate *r = nla_data(attr);
@@ -907,6 +913,8 @@ static int netem_change(struct Qdisc *sch, struct nlattr *opt)
if (tb[TCA_NETEM_CORRUPT])
get_corrupt(q, tb[TCA_NETEM_CORRUPT]);
+ else
+ corrupt_reset(q);
if (tb[TCA_NETEM_RATE])
get_rate(q, tb[TCA_NETEM_RATE]);
--
1.8.0
^ permalink raw reply related
* [PATCH net-next 4/7] sch_netem: clear old correlation when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
In-Reply-To: <1392366970-11592-1-git-send-email-yangyingliang@huawei.com>
If we set a netem qdisc with correlation option, while we
use "#tc qdisc replace ..." that without correlation option
to replace the old qdisc, the old correlation is still there.
We need clear old correlation after qdisc's replaced.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
net/sched/sch_netem.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index bb06dd8..33e7cef 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -703,6 +703,13 @@ static void get_correlation(struct netem_sched_data *q, const struct nlattr *att
init_crandom(&q->dup_cor, c->dup_corr);
}
+static void correlation_reset(struct netem_sched_data *q)
+{
+ memset(&q->delay_cor, 0, sizeof(struct crndstate));
+ memset(&q->loss_cor, 0, sizeof(struct crndstate));
+ memset(&q->dup_cor, 0, sizeof(struct crndstate));
+}
+
static void get_reorder(struct netem_sched_data *q, const struct nlattr *attr)
{
const struct tc_netem_reorder *r = nla_data(attr);
@@ -890,6 +897,8 @@ static int netem_change(struct Qdisc *sch, struct nlattr *opt)
if (tb[TCA_NETEM_CORR])
get_correlation(q, tb[TCA_NETEM_CORR]);
+ else
+ correlation_reset(q);
if (tb[TCA_NETEM_REORDER])
get_reorder(q, tb[TCA_NETEM_REORDER]);
--
1.8.0
^ permalink raw reply related
* [PATCH net-next 3/7] sch_netem: clear old reorder when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
In-Reply-To: <1392366970-11592-1-git-send-email-yangyingliang@huawei.com>
If we set a netem qdisc with reorder option, while we
use "#tc qdisc replace ..." that without reorder option
to replace the old qdisc, the old reorder is still there.
We need clear old reorder after qdisc's replaced.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
net/sched/sch_netem.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index fd2206d..bb06dd8 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -711,6 +711,12 @@ static void get_reorder(struct netem_sched_data *q, const struct nlattr *attr)
init_crandom(&q->reorder_cor, r->correlation);
}
+static void reorder_reset(struct netem_sched_data *q)
+{
+ q->reorder = 0;
+ memset(&q->reorder_cor, 0, sizeof(struct crndstate));
+}
+
static void get_corrupt(struct netem_sched_data *q, const struct nlattr *attr)
{
const struct tc_netem_corrupt *r = nla_data(attr);
@@ -879,12 +885,16 @@ static int netem_change(struct Qdisc *sch, struct nlattr *opt)
*/
if (q->gap)
q->reorder = ~0;
+ else
+ q->reorder = 0;
if (tb[TCA_NETEM_CORR])
get_correlation(q, tb[TCA_NETEM_CORR]);
if (tb[TCA_NETEM_REORDER])
get_reorder(q, tb[TCA_NETEM_REORDER]);
+ else
+ reorder_reset(q);
if (tb[TCA_NETEM_CORRUPT])
get_corrupt(q, tb[TCA_NETEM_CORRUPT]);
--
1.8.0
^ permalink raw reply related
* [PATCH net-next 7/7] sch_netem: clear old ecn when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
In-Reply-To: <1392366970-11592-1-git-send-email-yangyingliang@huawei.com>
If we set a netem qdisc with ecn option, while we
use "#tc qdisc replace ..." that without ecn option
to replace the old qdisc, the old ecn is still there.
We need clear old ecn after qdisc's replaced.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
net/sched/sch_netem.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index 92f6ba6..52ae2ef 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -936,6 +936,8 @@ static int netem_change(struct Qdisc *sch, struct nlattr *opt)
if (tb[TCA_NETEM_ECN])
q->ecn = nla_get_u32(tb[TCA_NETEM_ECN]);
+ else
+ q->ecn = 0;
return ret;
}
--
1.8.0
^ permalink raw reply related
* [PATCH net-next 6/7] sch_netem: clear old rate when old qdisc's replaced
From: Yang Yingliang @ 2014-02-14 8:36 UTC (permalink / raw)
To: netdev; +Cc: davem, stephen
In-Reply-To: <1392366970-11592-1-git-send-email-yangyingliang@huawei.com>
If we set a netem qdisc with rate option, while we
use "#tc qdisc replace ..." that without rate option
to replace the old qdisc, the old rate is still there.
We need clear old rate after qdisc's replaced.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
net/sched/sch_netem.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index 2f630e9..92f6ba6 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -752,6 +752,15 @@ static void get_rate(struct netem_sched_data *q, const struct nlattr *attr)
q->cell_size_reciprocal = (struct reciprocal_value) { 0 };
}
+static void rate_reset(struct netem_sched_data *q)
+{
+ q->rate = 0;
+ q->packet_overhead = 0;
+ q->cell_size = 0;
+ q->cell_size_reciprocal = (struct reciprocal_value) { 0 };
+ q->cell_overhead = 0;
+}
+
static int get_loss_clg(struct netem_sched_data *q, const struct nlattr *attr)
{
const struct nlattr *la;
@@ -918,6 +927,8 @@ static int netem_change(struct Qdisc *sch, struct nlattr *opt)
if (tb[TCA_NETEM_RATE])
get_rate(q, tb[TCA_NETEM_RATE]);
+ else
+ rate_reset(q);
if (tb[TCA_NETEM_RATE64])
q->rate = max_t(u64, q->rate,
--
1.8.0
^ permalink raw reply related
* Re: [PATCH v2] can: xilinx CAN controller support.
From: Michal Simek @ 2014-02-14 8:55 UTC (permalink / raw)
To: Marc Kleine-Budde
Cc: Kedareswara rao Appana, wg, michal.simek, grant.likely, robh+dt,
linux-can, netdev, linux-arm-kernel, linux-kernel, devicetree,
Kedareswara rao Appana
In-Reply-To: <52FD1B16.6020600@pengutronix.de>
[-- Attachment #1: Type: text/plain, Size: 1149 bytes --]
Hi Marc,
>> + int waiting_ech_skb_num;
>> + int xcan_echo_skb_max_tx;
>> + int xcan_echo_skb_max_rx;
>> + struct napi_struct napi;
>> + spinlock_t ech_skb_lock;
>> + u32 (*read_reg)(const struct xcan_priv *priv, int reg);
>> + void (*write_reg)(const struct xcan_priv *priv, int reg, u32 val);
>
> Please remove read_reg, write_reg, as long as there isn't any BE support
> in the driver, call them directly.
That's not entirely truth. If you look at Microblaze then you will see
that Microblaze can be BE and LE.
There is just missing endian detection which we will add to the next version.
But because MB io helper functions are broken for a while you should be
able to use this driver on both endianess.
btw: I would prefer to use ioread32 and ioread32be instead of readl.
Is it OK for you?
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
^ permalink raw reply
* Re: [PATCH v2] can: xilinx CAN controller support.
From: Marc Kleine-Budde @ 2014-02-14 9:04 UTC (permalink / raw)
To: monstr
Cc: Kedareswara rao Appana, wg, michal.simek, grant.likely, robh+dt,
linux-can, netdev, linux-arm-kernel, linux-kernel, devicetree,
Kedareswara rao Appana
In-Reply-To: <52FDD9FE.8040908@monstr.eu>
[-- Attachment #1: Type: text/plain, Size: 1431 bytes --]
On 02/14/2014 09:55 AM, Michal Simek wrote:
> Hi Marc,
>
>>> + int waiting_ech_skb_num;
>>> + int xcan_echo_skb_max_tx;
>>> + int xcan_echo_skb_max_rx;
>>> + struct napi_struct napi;
>>> + spinlock_t ech_skb_lock;
>>> + u32 (*read_reg)(const struct xcan_priv *priv, int reg);
>>> + void (*write_reg)(const struct xcan_priv *priv, int reg, u32 val);
>>
>> Please remove read_reg, write_reg, as long as there isn't any BE support
>> in the driver, call them directly.
>
> That's not entirely truth. If you look at Microblaze then you will see
> that Microblaze can be BE and LE.
> There is just missing endian detection which we will add to the next version.
As far as I know the endianess of the kernel is fixed and known during
compile time. Correct me if I'm wrong. So there is no need for a runtime
detection of the endianess and so no need for {read,write}_reg function
pointers.
> But because MB io helper functions are broken for a while you should be
> able to use this driver on both endianess.
>
> btw: I would prefer to use ioread32 and ioread32be instead of readl.
> Is it OK for you?
Make it so. :)
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 242 bytes --]
^ permalink raw reply
* Re: [PATCH v3 0/3] dp83640: Get pin and master/slave configuration from DT
From: Richard Cochran @ 2014-02-14 9:06 UTC (permalink / raw)
To: David Miller
Cc: stefan.sorensen-usnHOLptxrsHrNJx0XZkJA,
grant.likely-QSEj5FYQhm4dnm+yROfE0A,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20140213.173957.2126489785330496380.davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
On Thu, Feb 13, 2014 at 05:39:57PM -0500, David Miller wrote:
> You'll have to code this in a way such that people who currently specify
> this parameter keep working.
So, do module parameters count as user land ABI?
[ In any case, for this module, there must be a way to retain the
parameters and still offer DT, and letting DT have precedence. ]
People want to be able to configure the auxiliary functions on the
pins of their PTP devices. My preference for supporting this is:
1. additional ioctl on the PTP character device
2. ethtool ioctl
3. DT and/or ACPI
The first option seems best because that is how you activate the
auxiliary functions. I am working on something in this direction.
Can't we just drop the DT idea altogther?
> If you don't like it, be angry at whoever added this module parameter
> in the first place, not me. Module parameters are 99 times out of 100
> not the right way to configure something, really.
Yeah, I am the one, be angry with me.
Sorry,
Richard
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^ permalink raw reply
* Re: [PATCH v2] can: xilinx CAN controller support.
From: Michal Simek @ 2014-02-14 9:13 UTC (permalink / raw)
To: Marc Kleine-Budde
Cc: monstr, Kedareswara rao Appana, wg, michal.simek, grant.likely,
robh+dt, linux-can, netdev, linux-arm-kernel, linux-kernel,
devicetree, Kedareswara rao Appana
In-Reply-To: <52FDDC24.8070805@pengutronix.de>
[-- Attachment #1: Type: text/plain, Size: 1900 bytes --]
On 02/14/2014 10:04 AM, Marc Kleine-Budde wrote:
> On 02/14/2014 09:55 AM, Michal Simek wrote:
>> Hi Marc,
>>
>>>> + int waiting_ech_skb_num;
>>>> + int xcan_echo_skb_max_tx;
>>>> + int xcan_echo_skb_max_rx;
>>>> + struct napi_struct napi;
>>>> + spinlock_t ech_skb_lock;
>>>> + u32 (*read_reg)(const struct xcan_priv *priv, int reg);
>>>> + void (*write_reg)(const struct xcan_priv *priv, int reg, u32 val);
>>>
>>> Please remove read_reg, write_reg, as long as there isn't any BE support
>>> in the driver, call them directly.
>>
>> That's not entirely truth. If you look at Microblaze then you will see
>> that Microblaze can be BE and LE.
>> There is just missing endian detection which we will add to the next version.
>
> As far as I know the endianess of the kernel is fixed and known during
> compile time. Correct me if I'm wrong. So there is no need for a runtime
> detection of the endianess and so no need for {read,write}_reg function
> pointers.
Endianess of the kernel is fixed and know during compile time
but what it is not fixed is endianess of that IP at compile time.
On fpga you can use bridges, partial reconfiguration, etc where
the only solution which is run-time endian detection via registers.
For example: drivers/block/xsysace.c, drivers/spi/spi-xilinx.c, etc
>> But because MB io helper functions are broken for a while you should be
>> able to use this driver on both endianess.
>>
>> btw: I would prefer to use ioread32 and ioread32be instead of readl.
>> Is it OK for you?
>
> Make it so. :)
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 263 bytes --]
^ permalink raw reply
* [PATCH 4/6] bonding:fix checkpatch warnings braces {}
From: Wangyufen @ 2014-02-14 9:15 UTC (permalink / raw)
To: davem; +Cc: netdev
In-Reply-To: <1392369317-8072-1-git-send-email-wangyufen@huawei.com>
From: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
---
drivers/net/bonding/bond_alb.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index a1d4e7a..cde39f0 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -518,9 +518,8 @@ static void rlb_update_client(struct rlb_client_info *client_info)
{
int i;
- if (!client_info->slave) {
+ if (!client_info->slave)
return;
- }
for (i = 0; i < RLB_ARP_BURST_SIZE; i++) {
struct sk_buff *skb;
@@ -568,9 +567,8 @@ static void rlb_update_rx_clients(struct bonding *bond)
client_info = &(bond_info->rx_hashtbl[hash_index]);
if (client_info->ntt) {
rlb_update_client(client_info);
- if (bond_info->rlb_update_retry_counter == 0) {
+ if (bond_info->rlb_update_retry_counter == 0)
client_info->ntt = 0;
- }
}
}
@@ -764,9 +762,8 @@ static struct slave *rlb_arp_xmit(struct sk_buff *skb, struct bonding *bond)
* rx channel
*/
tx_slave = rlb_choose_channel(skb, bond);
- if (tx_slave) {
+ if (tx_slave)
memcpy(arp->mac_src, tx_slave->dev->dev_addr, ETH_ALEN);
- }
pr_debug("Server sent ARP Reply packet\n");
} else if (arp->op_code == htons(ARPOP_REQUEST)) {
/* Create an entry in the rx_hashtbl for this client as a
@@ -818,9 +815,8 @@ static void rlb_rebalance(struct bonding *bond)
}
/* update the team's flag only after the whole iteration */
- if (ntt) {
+ if (ntt)
bond_info->rx_ntt = 1;
- }
_unlock_rx_hashtbl_bh(bond);
}
@@ -951,9 +947,8 @@ static int rlb_initialize(struct bonding *bond)
bond_info->rx_hashtbl_used_head = RLB_NULL_INDEX;
- for (i = 0; i < RLB_HASH_TABLE_SIZE; i++) {
+ for (i = 0; i < RLB_HASH_TABLE_SIZE; i++)
rlb_init_table_entry(bond_info->rx_hashtbl + i);
- }
_unlock_rx_hashtbl_bh(bond);
@@ -1324,9 +1319,8 @@ int bond_alb_initialize(struct bonding *bond, int rlb_enabled)
int res;
res = tlb_initialize(bond);
- if (res) {
+ if (res)
return res;
- }
if (rlb_enabled) {
bond->alb_info.rlb_enabled = 1;
--
1.7.12
^ permalink raw reply related
* [PATCH 0/6] bonding:fix checkpatch errors or warning.
From: Wangyufen @ 2014-02-14 9:15 UTC (permalink / raw)
To: davem; +Cc: netdev
From: Wang Yufen <wangyufen@huawei.com>
Wang Yufen (6):
bonding:fix checkpatch errors with foo* bar|foo * bar
bonding:fix checkpatch errors comments and space
bonding:fix checkpatch warnings braces {}
bonding:fix checkpatch warnings braces {}
bonding:fix checkpatch warnings braces {}
bonding:fix checkpatch warnings braces {}
drivers/net/bonding/bond_alb.c | 83 +++---
1 file changed, 30 insertions(+), 53 deletions(-)
--
1.7.12
^ permalink raw reply
* [PATCH 1/6] bonding:fix checkpatch errors with foo* bar|foo * bar
From: Wangyufen @ 2014-02-14 9:15 UTC (permalink / raw)
To: davem; +Cc: netdev
In-Reply-To: <1392369317-8072-1-git-send-email-wangyufen@huawei.com>
From: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
---
drivers/net/bonding/bond_alb.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index a2c4747..b3b26b0 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -329,7 +329,7 @@ static void rlb_update_entry_from_arp(struct bonding *bond, struct arp_pkt *arp)
_lock_rx_hashtbl_bh(bond);
- hash_index = _simple_hash((u8*)&(arp->ip_src), sizeof(arp->ip_src));
+ hash_index = _simple_hash((u8 *)&(arp->ip_src), sizeof(arp->ip_src));
client_info = &(bond_info->rx_hashtbl[hash_index]);
if ((client_info->assigned) &&
@@ -923,7 +923,7 @@ static void rlb_src_link(struct bonding *bond, u32 ip_src_hash, u32 ip_dst_hash)
static void rlb_purge_src_ip(struct bonding *bond, struct arp_pkt *arp)
{
struct alb_bond_info *bond_info = &(BOND_ALB_INFO(bond));
- u32 ip_src_hash = _simple_hash((u8*)&(arp->ip_src), sizeof(arp->ip_src));
+ u32 ip_src_hash = _simple_hash((u8 *)&(arp->ip_src), sizeof(arp->ip_src));
u32 index;
_lock_rx_hashtbl_bh(bond);
@@ -1436,7 +1436,7 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)
break;
}
- hash_start = (char*)eth_data->h_dest;
+ hash_start = (char *)eth_data->h_dest;
hash_size = ETH_ALEN;
break;
case ETH_P_ARP:
--
1.7.12
^ permalink raw reply related
* [PATCH 6/6] bonding:fix checkpatch warnings braces {}
From: Wangyufen @ 2014-02-14 9:15 UTC (permalink / raw)
To: davem; +Cc: netdev
In-Reply-To: <1392369317-8072-1-git-send-email-wangyufen@huawei.com>
From: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
---
drivers/net/bonding/bond_alb.c | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index e7a4600..a212860 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -1627,9 +1627,8 @@ void bond_alb_handle_link_change(struct bonding *bond, struct slave *slave, char
if (link == BOND_LINK_DOWN) {
tlb_clear_slave(bond, slave, 0);
- if (bond->alb_info.rlb_enabled) {
+ if (bond->alb_info.rlb_enabled)
rlb_clear_slave(bond, slave);
- }
} else if (link == BOND_LINK_UP) {
/* order a rebalance ASAP */
bond_info->tx_rebalance_counter = BOND_TLB_REBALANCE_TICKS;
@@ -1741,14 +1740,12 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr)
struct slave *swap_slave;
int res;
- if (!is_valid_ether_addr(sa->sa_data)) {
+ if (!is_valid_ether_addr(sa->sa_data))
return -EADDRNOTAVAIL;
- }
res = alb_set_mac_address(bond, addr);
- if (res) {
+ if (res)
return res;
- }
memcpy(bond_dev->dev_addr, sa->sa_data, bond_dev->addr_len);
@@ -1756,9 +1753,8 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr)
* Otherwise we'll need to pass the new address to it and handle
* duplications.
*/
- if (!bond->curr_active_slave) {
+ if (!bond->curr_active_slave)
return 0;
- }
swap_slave = bond_slave_has_mac(bond, bond_dev->dev_addr);
@@ -1782,8 +1778,7 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr)
void bond_alb_clear_vlan(struct bonding *bond, unsigned short vlan_id)
{
- if (bond->alb_info.rlb_enabled) {
+ if (bond->alb_info.rlb_enabled)
rlb_clear_vlan(bond, vlan_id);
- }
}
--
1.7.12
^ permalink raw reply related
* [PATCH 2/6] bonding:fix checkpatch errors comments and space
From: Wangyufen @ 2014-02-14 9:15 UTC (permalink / raw)
To: davem; +Cc: netdev
In-Reply-To: <1392369317-8072-1-git-send-email-wangyufen@huawei.com>
From: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
---
drivers/net/bonding/bond_alb.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index b3b26b0..af5ea21 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -610,10 +610,10 @@ static void rlb_req_update_slave_clients(struct bonding *bond, struct slave *sla
}
}
- // update the team's flag only after the whole iteration
+ /* update the team's flag only after the whole iteration */
if (ntt) {
bond_info->rx_ntt = 1;
- //fasten the change
+ /* fasten the change */
bond_info->rlb_update_retry_counter = RLB_UPDATE_RETRY;
}
@@ -771,7 +771,7 @@ static struct slave *rlb_arp_xmit(struct sk_buff *skb, struct bonding *bond)
*/
tx_slave = rlb_choose_channel(skb, bond);
if (tx_slave) {
- memcpy(arp->mac_src,tx_slave->dev->dev_addr, ETH_ALEN);
+ memcpy(arp->mac_src, tx_slave->dev->dev_addr, ETH_ALEN);
}
pr_debug("Server sent ARP Reply packet\n");
} else if (arp->op_code == htons(ARPOP_REQUEST)) {
--
1.7.12
^ permalink raw reply related
* [PATCH 5/6] bonding:fix checkpatch warnings braces {}
From: Wangyufen @ 2014-02-14 9:15 UTC (permalink / raw)
To: davem; +Cc: netdev
In-Reply-To: <1392369317-8072-1-git-send-email-wangyufen@huawei.com>
From: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
---
drivers/net/bonding/bond_alb.c | 20 +++++++-------------
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index cde39f0..e7a4600 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -1343,9 +1343,8 @@ void bond_alb_deinitialize(struct bonding *bond)
tlb_deinitialize(bond);
- if (bond_info->rlb_enabled) {
+ if (bond_info->rlb_enabled)
rlb_deinitialize(bond);
- }
}
int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)
@@ -1429,9 +1428,8 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)
break;
case ETH_P_ARP:
do_tx_balance = 0;
- if (bond_info->rlb_enabled) {
+ if (bond_info->rlb_enabled)
tx_slave = rlb_arp_xmit(skb, bond);
- }
break;
default:
do_tx_balance = 0;
@@ -1565,11 +1563,10 @@ void bond_alb_monitor(struct work_struct *work)
--bond_info->rlb_update_delay_counter;
} else {
rlb_update_rx_clients(bond);
- if (bond_info->rlb_update_retry_counter) {
+ if (bond_info->rlb_update_retry_counter)
--bond_info->rlb_update_retry_counter;
- } else {
+ else
bond_info->rx_ntt = 0;
- }
}
}
}
@@ -1586,23 +1583,20 @@ int bond_alb_init_slave(struct bonding *bond, struct slave *slave)
int res;
res = alb_set_slave_mac_addr(slave, slave->perm_hwaddr);
- if (res) {
+ if (res)
return res;
- }
res = alb_handle_addr_collision_on_attach(bond, slave);
- if (res) {
+ if (res)
return res;
- }
tlb_init_slave(slave);
/* order a rebalance ASAP */
bond->alb_info.tx_rebalance_counter = BOND_TLB_REBALANCE_TICKS;
- if (bond->alb_info.rlb_enabled) {
+ if (bond->alb_info.rlb_enabled)
bond->alb_info.rlb_rebalance = 1;
- }
return 0;
}
--
1.7.12
^ permalink raw reply related
* Re: [PATCH v2] can: xilinx CAN controller support.
From: Marc Kleine-Budde @ 2014-02-14 9:16 UTC (permalink / raw)
To: monstr
Cc: Kedareswara rao Appana, wg, michal.simek, grant.likely, robh+dt,
linux-can, netdev, linux-arm-kernel, linux-kernel, devicetree,
Kedareswara rao Appana
In-Reply-To: <52FDDE30.8020405@monstr.eu>
[-- Attachment #1: Type: text/plain, Size: 1203 bytes --]
On 02/14/2014 10:13 AM, Michal Simek wrote:
>>> That's not entirely truth. If you look at Microblaze then you will see
>>> that Microblaze can be BE and LE.
>>> There is just missing endian detection which we will add to the next version.
>>
>> As far as I know the endianess of the kernel is fixed and known during
>> compile time. Correct me if I'm wrong. So there is no need for a runtime
>> detection of the endianess and so no need for {read,write}_reg function
>> pointers.
>
> Endianess of the kernel is fixed and know during compile time
> but what it is not fixed is endianess of that IP at compile time.
>
> On fpga you can use bridges, partial reconfiguration, etc where
> the only solution which is run-time endian detection via registers.
>
> For example: drivers/block/xsysace.c, drivers/spi/spi-xilinx.c, etc
Okay, now I get it. You can make it more complex then it used to be :D
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 242 bytes --]
^ permalink raw reply
* [PATCH 3/6] bonding:fix checkpatch warnings braces {}
From: Wangyufen @ 2014-02-14 9:15 UTC (permalink / raw)
To: davem; +Cc: netdev
In-Reply-To: <1392369317-8072-1-git-send-email-wangyufen@huawei.com>
From: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
---
drivers/net/bonding/bond_alb.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index af5ea21..a1d4e7a 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -93,9 +93,8 @@ static inline u8 _simple_hash(const u8 *hash_start, int hash_size)
int i;
u8 hash = 0;
- for (i = 0; i < hash_size; i++) {
+ for (i = 0; i < hash_size; i++)
hash ^= hash_start[i];
- }
return hash;
}
@@ -190,9 +189,8 @@ static int tlb_initialize(struct bonding *bond)
bond_info->tx_hashtbl = new_hashtbl;
- for (i = 0; i < TLB_HASH_TABLE_SIZE; i++) {
+ for (i = 0; i < TLB_HASH_TABLE_SIZE; i++)
tlb_init_table_entry(&bond_info->tx_hashtbl[i], 0);
- }
_unlock_tx_hashtbl_bh(bond);
@@ -264,9 +262,8 @@ static struct slave *__tlb_choose_channel(struct bonding *bond, u32 hash_index,
hash_table[hash_index].next = next_index;
hash_table[hash_index].prev = TLB_NULL_INDEX;
- if (next_index != TLB_NULL_INDEX) {
+ if (next_index != TLB_NULL_INDEX)
hash_table[next_index].prev = hash_index;
- }
slave_info->head = hash_index;
slave_info->load +=
@@ -274,9 +271,8 @@ static struct slave *__tlb_choose_channel(struct bonding *bond, u32 hash_index,
}
}
- if (assigned_slave) {
+ if (assigned_slave)
hash_table[hash_index].tx_bytes += skb_len;
- }
return assigned_slave;
}
@@ -451,9 +447,8 @@ static struct slave *__rlb_next_rx_slave(struct bonding *bond)
*/
static void rlb_teach_disabled_mac_on_primary(struct bonding *bond, u8 addr[])
{
- if (!bond->curr_active_slave) {
+ if (!bond->curr_active_slave)
return;
- }
if (!bond->alb_info.primary_is_promisc) {
if (!dev_set_promiscuity(bond->curr_active_slave->dev, 1))
@@ -513,9 +508,8 @@ static void rlb_clear_slave(struct bonding *bond, struct slave *slave)
write_lock_bh(&bond->curr_slave_lock);
- if (slave != bond->curr_active_slave) {
+ if (slave != bond->curr_active_slave)
rlb_teach_disabled_mac_on_primary(bond, slave->dev->dev_addr);
- }
write_unlock_bh(&bond->curr_slave_lock);
}
--
1.7.12
^ permalink raw reply related
* Re: [PATCH net-next v5 00/10] Support for the Broadcom GENET driver
From: Richard Cochran @ 2014-02-14 9:19 UTC (permalink / raw)
To: Florian Fainelli
Cc: David Miller, netdev, devicetree, cernekee, mark.rutland, romieu
In-Reply-To: <52FDC094.1020104@gmail.com>
On Thu, Feb 13, 2014 at 11:07:00PM -0800, Florian Fainelli wrote:
> Le 13/02/2014 21:29, David Miller a écrit :
> >Series applied, thanks.
>
> Great, thanks David!
Sorry for the late comment, but how about adding a call to
skb_tx_timestamp(), in order to support so_timestamping?
Thanks,
Richard
^ permalink raw reply
* Re: [PATCH 08/14] net: axienet: Removed checkpatch errors/warnings
From: Michal Simek @ 2014-02-14 9:21 UTC (permalink / raw)
To: Joe Perches
Cc: Michal Simek, netdev, Srikanth Thokala, Srikanth Thokala,
Michal Simek, Anirudha Sarangi, John Linn, linux-arm-kernel,
linux-kernel
In-Reply-To: <1392306707.2214.65.camel@joe-AO722>
On 02/13/2014 04:51 PM, Joe Perches wrote:
> On Thu, 2014-02-13 at 08:19 +0100, Michal Simek wrote:
>> On 02/13/2014 01:31 AM, Joe Perches wrote:
>>> On Wed, 2014-02-12 at 16:55 +0100, Michal Simek wrote:
>
> Hi again Michal.
>
>>>> + netdev_warn(lp->ndev,
>>>> + "Could not find clock ethernet controller property.");
>>>
>>> here too. (and alignment)
>>
>> This is problematic. I would like to keep 80 char limits and keeping
>> this align just break it. That's why I was using tab alignment.
>> Probably the solution is just to shorten message.
>
> (overly long, tiresomely trivial stuff below)
>
> Your choice. I'm not an 80 column zealot but
> please don't shorten the message just to fit
> 80 columns if it impacts intelligibility.
I am trying to keep 80 chars and follow subsystem
standards.
> Generally, I'd write this something like:
>
> netdev_warn(lp->ndev,
> "Could not find clock ethernet controller property\n");
>
> (without the period) which is 83 columns.
ok.
> checkpatch makes exceptions for 80 column line
> length maximums for format strings.
yes but testing systems reports it because that 80 chars
is still default value.
>
> I've no real issue if you indent it back one.
>
> fyi: this is 77 columns
>
> netdev_warn(lp->ndev,
> "No clock ethernet controller property found\n");
>
> About the message itself.
>
> You dropped the "axienet_mdio_setup" function name.
>
> I believe the dmesg output will look something like:
>
> xilinx_temac 0000:01:00.0 (unregistered net_device): Could not find clock ethernet controller property.
> xilinx_temac 0000:01:00.0 (unregistered net_device): Setting MDIO clock divisor to default 29
>
> Because these 2 messages are effectively linked,
> my preference would be to emit them on a single line,
>
> Something like:
>
> xilinx_temac 0000:01:00.0 (unregistered net_device): of_get_property("clock-frequency") not found - setting MDIO clock divisor to default 29
>
> or
>
> netdev_warn(lp->ndev,
> "of_get_property(\"clock-frequency\") not found - setting MDIO clock divisor to default %u\n",
> DEFAULT_CLOCK_DIVISOR);
>
But then you are breaking 80 char limits a lot.
Thanks,
Michal
^ permalink raw reply
* [PATCH] ipv4: use daddr to get inet_peer
From: Duan Jiong @ 2014-02-14 9:25 UTC (permalink / raw)
To: David Miller; +Cc: netdev, hannes
since commit 1d861aa4("inet: Minimize use of cached route inetpeer"),
ip_error() uses saddr to get inet_peer, so ip_error() and icmpv4_xrlim_allow()
use the same inet_peer to limit icmp error message twice.
In ip_error(), peer->rate_tokens is set to ip_rt_error_burst, but in
inet_peer_xrlim_allow() peer->rate_tokens is set to XRLIM_BURST_FACTOR.
XRLIM_BURST_FACTOR is defined to 6, so user seting ip_rt_error_burst makes
no sense.
In my opinion, the ip_rt_error_burst is used to limit icmp error messages
for daddr instead of saddr.
Signed-off-by: Duan Jiong <duanj.fnst@cn.fujitsu.com>
---
net/ipv4/route.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 25071b4..4da5588 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -933,7 +933,7 @@ static int ip_error(struct sk_buff *skb)
break;
}
- peer = inet_getpeer_v4(net->ipv4.peers, ip_hdr(skb)->saddr, 1);
+ peer = inet_getpeer_v4(net->ipv4.peers, ip_hdr(skb)->daddr, 1);
send = true;
if (peer) {
--
1.8.3.1
^ permalink raw reply related
* RE: [PATCH v2] can: xilinx CAN controller support.
From: Appana Durga Kedareswara Rao @ 2014-02-14 9:36 UTC (permalink / raw)
To: Marc Kleine-Budde, wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org,
Michal Simek,
grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
linux-can-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <52FD1B16.6020600-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Hi Marc,
> -----Original Message-----
> From: Marc Kleine-Budde [mailto:mkl@pengutronix.de]
> Sent: Friday, February 14, 2014 12:51 AM
> To: Appana Durga Kedareswara Rao; wg@grandegger.com; Michal Simek;
> grant.likely@linaro.org; robh+dt@kernel.org; linux-can@vger.kernel.org
> Cc: netdev@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; Appana Durga
> Kedareswara Rao
> Subject: Re: [PATCH v2] can: xilinx CAN controller support.
>
> On 02/12/2014 08:10 AM, Kedareswara rao Appana wrote:
> > This patch adds xilinx CAN controller support.
> > This driver supports both ZYNQ CANPS IP and Soft IP AXI CAN
> > controller.
> >
> > Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> > ---
> > This patch is rebased on the 3.14 rc2 kernel.
> > Changes for v2:
> > - Updated with the review comments.
> > - Removed unnecessary debug prints.
> > - included tx,rx fifo depths in ZYNQ CANPS case also.
> > ---
> > .../devicetree/bindings/net/can/xilinx_can.txt | 45 +
> > drivers/net/can/Kconfig | 7 +
> > drivers/net/can/Makefile | 1 +
> > drivers/net/can/xilinx_can.c | 1153 ++++++++++++++++++++
> > 4 files changed, 1206 insertions(+), 0 deletions(-) create mode
> > 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt
> > create mode 100644 drivers/net/can/xilinx_can.c
> >
> > diff --git a/Documentation/devicetree/bindings/net/can/xilinx_can.txt
> > b/Documentation/devicetree/bindings/net/can/xilinx_can.txt
> > new file mode 100644
> > index 0000000..0e57103
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/can/xilinx_can.txt
> > @@ -0,0 +1,45 @@
> > +Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings
> > +---------------------------------------------------------
> > +
> > +Required properties:
> > +- compatible : Should be "xlnx,zynq-can-1.00.a" for Zynq
> CAN
> > + controllers and "xlnx,axi-can-1.00.a" for Axi CAN
> > + controllers.
> > +- reg : Physical base address and size of the Axi CAN/Zynq
> > + CANPS registers map.
> > +- interrupts : Property with a value describing the interrupt
> > + number.
> > +- interrupt-parent : Must be core interrupt controller
> > +- clock-names : List of input clock names - "ref_clk",
> "aper_clk"
> > + (See clock bindings for details. Two clocks are
> > + required for Zynq CAN. For Axi CAN
> > + case it is one(ref_clk)).
> > +- clocks : Clock phandles (see clock bindings for details).
> > +- tx-fifo-depth : Can Tx fifo depth.
> > +- rx-fifo-depth : Can Rx fifo depth.
> > +
> > +
> > +Example:
> > +
> > +For Zynq CANPS Dts file:
> > + zynq_can_0: zynq-can@e0008000 {
> > + compatible = "xlnx,zynq-can-1.00.a";
> > + clocks = <&clkc 19>, <&clkc 36>;
> > + clock-names = "ref_clk", "aper_clk";
> > + reg = <0xe0008000 0x1000>;
> > + interrupts = <0 28 4>;
> > + interrupt-parent = <&intc>;
> > + tx-fifo-depth = <0x40>;
> > + rx-fifo-depth = <0x40>;
> > + };
> > +For Axi CAN Dts file:
> > + axi_can_0: axi-can@40000000 {
> > + compatible = "xlnx,axi-can-1.00.a";
> > + clocks = <&clkc 0>;
> > + clock-names = "ref_clk" ;
> > + reg = <0x40000000 0x10000>;
> > + interrupt-parent = <&intc>;
> > + interrupts = <0 59 1>;
> > + tx-fifo-depth = <0x40>;
> > + rx-fifo-depth = <0x40>;
> > + };
> > diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig index
> > 9e7d95d..b180239 100644
> > --- a/drivers/net/can/Kconfig
> > +++ b/drivers/net/can/Kconfig
> > @@ -125,6 +125,13 @@ config CAN_GRCAN
> > endian syntheses of the cores would need some modifications on
> > the hardware level to work.
> >
> > +config CAN_XILINXCAN
> > + tristate "Xilinx CAN"
> > + depends on ARCH_ZYNQ || MICROBLAZE
> > + ---help---
> > + Xilinx CAN driver. This driver supports both soft AXI CAN IP and
> > + Zynq CANPS IP.
> > +
> > source "drivers/net/can/mscan/Kconfig"
> >
> > source "drivers/net/can/sja1000/Kconfig"
> > diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile index
> > c744039..0b8e11e 100644
> > --- a/drivers/net/can/Makefile
> > +++ b/drivers/net/can/Makefile
> > @@ -25,5 +25,6 @@ obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-
> ican3.o
> > obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o
> > obj-$(CONFIG_PCH_CAN) += pch_can.o
> > obj-$(CONFIG_CAN_GRCAN) += grcan.o
> > +obj-$(CONFIG_CAN_XILINXCAN) += xilinx_can.o
> >
> > ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG diff --git
> > a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c new file
> > mode 100644 index 0000000..642e6b4
> > --- /dev/null
> > +++ b/drivers/net/can/xilinx_can.c
> > @@ -0,0 +1,1153 @@
> > +/* Xilinx CAN device driver
> > + *
> > + * Copyright (C) 2012 - 2014 Xilinx, Inc.
> > + * Copyright (C) 2009 PetaLogix. All rights reserved.
> > + *
> > + * Description:
> > + * This driver is developed for Axi CAN IP and for Zynq CANPS Controller.
> > + * This program is free software: you can redistribute it and/or
> > +modify
> > + * it under the terms of the GNU General Public License as published
> > +by
> > + * the Free Software Foundation, either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/errno.h>
> > +#include <linux/init.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/io.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/netdevice.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/skbuff.h>
> > +#include <linux/string.h>
> > +#include <linux/types.h>
> > +#include <linux/can/dev.h>
> > +#include <linux/can/error.h>
> > +#include <linux/can/led.h>
> > +
> > +#define DRIVER_NAME "XILINX_CAN"
> > +
> > +/* CAN registers set */
> > +#define XCAN_SRR_OFFSET 0x00 /* Software reset */
> > +#define XCAN_MSR_OFFSET 0x04 /* Mode select */
> > +#define XCAN_BRPR_OFFSET 0x08 /* Baud rate prescaler */
> > +#define XCAN_BTR_OFFSET 0x0C /* Bit timing */
> > +#define XCAN_ECR_OFFSET 0x10 /* Error counter */
> > +#define XCAN_ESR_OFFSET 0x14 /* Error status */
> > +#define XCAN_SR_OFFSET 0x18 /* Status */
> > +#define XCAN_ISR_OFFSET 0x1C /* Interrupt status */
> > +#define XCAN_IER_OFFSET 0x20 /* Interrupt enable */
> > +#define XCAN_ICR_OFFSET 0x24 /* Interrupt clear */
> > +#define XCAN_TXFIFO_ID_OFFSET 0x30 /* TX FIFO ID */
> > +#define XCAN_TXFIFO_DLC_OFFSET 0x34 /* TX FIFO DLC */
> > +#define XCAN_TXFIFO_DW1_OFFSET 0x38 /* TX FIFO Data
> Word 1 */
> > +#define XCAN_TXFIFO_DW2_OFFSET 0x3C /* TX FIFO Data
> Word 2 */
> > +#define XCAN_RXFIFO_ID_OFFSET 0x50 /* RX FIFO ID */
> > +#define XCAN_RXFIFO_DLC_OFFSET 0x54 /* RX FIFO DLC */
> > +#define XCAN_RXFIFO_DW1_OFFSET 0x58 /* RX FIFO Data
> Word 1 */
> > +#define XCAN_RXFIFO_DW2_OFFSET 0x5C /* RX FIFO Data
> Word 2 */
>
> Can you define all register offsets via an enum please.
>
Ok
> > +/* CAN register bit masks - XCAN_<REG>_<BIT>_MASK */
> > +#define XCAN_SRR_CEN_MASK 0x00000002 /* CAN enable */
> > +#define XCAN_SRR_RESET_MASK 0x00000001 /* Soft Reset the
> CAN core */
> > +#define XCAN_MSR_LBACK_MASK 0x00000002 /* Loop back
> mode select */
> > +#define XCAN_MSR_SLEEP_MASK 0x00000001 /* Sleep mode
> select */
> > +#define XCAN_BRPR_BRP_MASK 0x000000FF /* Baud rate
> prescaler */
> > +#define XCAN_BTR_SJW_MASK 0x00000180 /* Synchronous
> jump width */
> > +#define XCAN_BTR_TS2_MASK 0x00000070 /* Time segment
> 2 */
> > +#define XCAN_BTR_TS1_MASK 0x0000000F /* Time segment
> 1 */
> > +#define XCAN_ECR_REC_MASK 0x0000FF00 /* Receive error
> counter */
> > +#define XCAN_ECR_TEC_MASK 0x000000FF /* Transmit error
> counter */
> > +#define XCAN_ESR_ACKER_MASK 0x00000010 /* ACK error */
> > +#define XCAN_ESR_BERR_MASK 0x00000008 /* Bit error */
> > +#define XCAN_ESR_STER_MASK 0x00000004 /* Stuff error */
> > +#define XCAN_ESR_FMER_MASK 0x00000002 /* Form error */
> > +#define XCAN_ESR_CRCER_MASK 0x00000001 /* CRC error */
> > +#define XCAN_SR_TXFLL_MASK 0x00000400 /* TX FIFO is full
> */
> > +#define XCAN_SR_ESTAT_MASK 0x00000180 /* Error status */
> > +#define XCAN_SR_ERRWRN_MASK 0x00000040 /* Error warning
> */
> > +#define XCAN_SR_NORMAL_MASK 0x00000008 /* Normal mode
> */
> > +#define XCAN_SR_LBACK_MASK 0x00000002 /* Loop back
> mode */
> > +#define XCAN_SR_CONFIG_MASK 0x00000001 /* Configuration
> mode */
> > +#define XCAN_IXR_TXFEMP_MASK 0x00004000 /* TX FIFO Empty
> */
> > +#define XCAN_IXR_WKUP_MASK 0x00000800 /* Wake up
> interrupt */
> > +#define XCAN_IXR_SLP_MASK 0x00000400 /* Sleep
> interrupt */
> > +#define XCAN_IXR_BSOFF_MASK 0x00000200 /* Bus off
> interrupt */
> > +#define XCAN_IXR_ERROR_MASK 0x00000100 /* Error interrupt
> */
> > +#define XCAN_IXR_RXNEMP_MASK 0x00000080 /* RX FIFO
> NotEmpty intr */
> > +#define XCAN_IXR_RXOFLW_MASK 0x00000040 /* RX FIFO
> Overflow intr */
> > +#define XCAN_IXR_RXOK_MASK 0x00000010 /* Message
> received intr */
> > +#define XCAN_IXR_TXOK_MASK 0x00000002 /* TX successful
> intr */
> > +#define XCAN_IXR_ARBLST_MASK 0x00000001 /* Arbitration
> lost intr */
> > +#define XCAN_IDR_ID1_MASK 0xFFE00000 /* Standard msg
> identifier */
> > +#define XCAN_IDR_SRR_MASK 0x00100000 /* Substitute
> remote TXreq */
> > +#define XCAN_IDR_IDE_MASK 0x00080000 /* Identifier
> extension */
> > +#define XCAN_IDR_ID2_MASK 0x0007FFFE /* Extended
> message ident */
> > +#define XCAN_IDR_RTR_MASK 0x00000001 /* Remote TX
> request */
> > +#define XCAN_DLCR_DLC_MASK 0xF0000000 /* Data length
> code */
> > +
Need to use BIT() Macro for the Masks?
> > +#define XCAN_INTR_ALL (XCAN_IXR_TXOK_MASK |
> XCAN_IXR_BSOFF_MASK |\
> > + XCAN_IXR_WKUP_MASK |
> XCAN_IXR_SLP_MASK | \
> > + XCAN_IXR_RXNEMP_MASK |
> XCAN_IXR_ERROR_MASK | \
> > + XCAN_IXR_ARBLST_MASK |
> XCAN_IXR_RXOK_MASK)
> > +
> > +/* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */
> > +#define XCAN_BTR_SJW_SHIFT 7 /* Synchronous jump width
> */
> > +#define XCAN_BTR_TS2_SHIFT 4 /* Time segment 2 */
> > +#define XCAN_IDR_ID1_SHIFT 21 /* Standard Messg
> Identifier */
> > +#define XCAN_IDR_ID2_SHIFT 1 /* Extended Message
> Identifier */
> > +#define XCAN_DLCR_DLC_SHIFT 28 /* Data length code */
> > +#define XCAN_ESR_REC_SHIFT 8 /* Rx Error Count */
> > +
> > +/* CAN frame length constants */
> > +#define XCAN_ECHO_SKB_MAX 64
> > +#define XCAN_FRAME_MAX_DATA_LEN 8
> > +#define XCAN_TIMEOUT (50 * HZ)
>
> This is 50 seconds, is this intentional?
>
Sorry will make it as 1*HZ.
> > +
> > +/**
> > + * struct xcan_priv - This definition define CAN driver instance
> > + * @can: CAN private data structure.
> > + * @open_time: For holding timeout values
>
> Please remove open_time completely from the driver.
Ok
>
> > + * @waiting_ech_skb_index: Pointer for skb
> > + * @ech_skb_next: This tell the next packet in the queue
> > + * @waiting_ech_skb_num: Gives the number of packets waiting
> > + * @xcan_echo_skb_max_tx: Maximum number packets the driver
> can send
> > + * @xcan_echo_skb_max_rx: Maximum number packets the driver
> can receive
> > + * @napi: NAPI structure
> > + * @ech_skb_lock: For spinlock purpose
> > + * @read_reg: For reading data from CAN registers
> > + * @write_reg: For writing data to CAN registers
> > + * @dev: Network device data structure
> > + * @reg_base: Ioremapped address to registers
> > + * @irq_flags: For request_irq()
> > + * @aperclk: Pointer to struct clk
> > + * @devclk: Pointer to struct clk
> > + */
> > +struct xcan_priv {
> > + struct can_priv can;
> > + int open_time;
> > + int waiting_ech_skb_index;
> > + int ech_skb_next;
>
> please make them:
>
> unsigned int tx_head;
> unsigned int tx_tail;
>
> I'll explain how to use them later. Have a look at the ti_hecc driver.
Ok
>
> > + int waiting_ech_skb_num;
> > + int xcan_echo_skb_max_tx;
> > + int xcan_echo_skb_max_rx;
> > + struct napi_struct napi;
> > + spinlock_t ech_skb_lock;
> > + u32 (*read_reg)(const struct xcan_priv *priv, int reg);
> > + void (*write_reg)(const struct xcan_priv *priv, int reg, u32 val);
>
> Please remove read_reg, write_reg, as long as there isn't any BE support in
> the driver, call them directly.
>
As per yours and Michal discussion I am keeping this here (endianess of the IP is not fixed at compile time).
> > + struct net_device *dev;
> > + void __iomem *reg_base;
> > + unsigned long irq_flags;
> > + struct clk *aperclk;
> > + struct clk *devclk;
> > +};
> > +
> > +/* CAN Bittiming constants as per Xilinx CAN specs */ static const
> > +struct can_bittiming_const xcan_bittiming_const = {
> > + .name = DRIVER_NAME,
> > + .tseg1_min = 1,
> > + .tseg1_max = 16,
> > + .tseg2_min = 1,
> > + .tseg2_max = 8,
> > + .sjw_max = 4,
> > + .brp_min = 1,
> > + .brp_max = 256,
> > + .brp_inc = 1,
> > +};
> > +
> > +/**
> > + * xcan_write_reg - Write a value to the device register
> > + * @priv: Driver private data structure
> > + * @reg: Register offset
> > + * @val: Value to write at the Register offset
> > + *
> > + * Write data to the paricular CAN register */ static void
> > +xcan_write_reg(const struct xcan_priv *priv, int reg, u32 val)
>
> Please use the enum for instead of an int for the reg.
Ok
>
> > +{
> > + writel(val, priv->reg_base + reg);
> > +}
> > +
> > +/**
> > + * xcan_read_reg - Read a value from the device register
> > + * @priv: Driver private data structure
> > + * @reg: Register offset
> > + *
> > + * Read data from the particular CAN register
> > + * Return: value read from the CAN register */ static u32
> > +xcan_read_reg(const struct xcan_priv *priv, int reg) {
>
> same here
Ok
>
> > + return readl(priv->reg_base + reg);
> > +}
> > +
> > +/**
> > + * set_reset_mode - Resets the CAN device mode
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * This is the driver reset mode routine.The driver
> > + * enters into configuration mode.
> > + *
> > + * Return: 0 on success and failure value on error */ static int
> > +set_reset_mode(struct net_device *ndev) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + unsigned long timeout;
> > +
> > + priv->can.state = CAN_STATE_STOPPED;
> > +
> > + timeout = jiffies + XCAN_TIMEOUT;
> > + while (!(priv->read_reg(priv, XCAN_SR_OFFSET) &
> XCAN_SR_CONFIG_MASK)) {
> > + if (time_after(jiffies, timeout)) {
> > + netdev_warn(ndev, "timedout waiting for config
> mode\n");
> > + return -ETIMEDOUT;
> > + }
> > + usleep_range(500, 10000);
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * xcan_set_bittiming - CAN set bit timing routine
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * This is the driver set bittiming routine.
> > + * Return: 0 on success and failure value on error */ static int
> > +xcan_set_bittiming(struct net_device *ndev) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + struct can_bittiming *bt = &priv->can.bittiming;
> > + u32 btr0, btr1;
> > + u32 is_config_mode;
> > +
> > + /* Check whether Xilinx CAN is in configuration mode.
> > + * It cannot set bit timing if Xilinx CAN is not in configuration mode.
> > + */
> > + is_config_mode = priv->read_reg(priv, XCAN_SR_OFFSET) &
> > + XCAN_SR_CONFIG_MASK;
> > + if (!is_config_mode) {
> > + netdev_alert(ndev,
> > + "Cannot set bittiming can is not in config mode\n");
> > + return -EPERM;
> > + }
> > +
> > + /* Setting Baud Rate prescalar value in BRPR Register */
> > + btr0 = (bt->brp - 1) & XCAN_BRPR_BRP_MASK;
> > +
> > + /* Setting Time Segment 1 in BTR Register */
> > + btr1 = (bt->prop_seg + bt->phase_seg1 - 1) & XCAN_BTR_TS1_MASK;
> > +
> > + /* Setting Time Segment 2 in BTR Register */
> > + btr1 |= ((bt->phase_seg2 - 1) << XCAN_BTR_TS2_SHIFT) &
> > + XCAN_BTR_TS2_MASK;
> > +
> > + /* Setting Synchronous jump width in BTR Register */
> > + btr1 |= ((bt->sjw - 1) << XCAN_BTR_SJW_SHIFT) &
> XCAN_BTR_SJW_MASK;
>
> All the masking should not be needed, as the bit timing is calculated within
> the bounds you specified.
Ok
>
> > + priv->write_reg(priv, XCAN_BRPR_OFFSET, btr0);
> > + priv->write_reg(priv, XCAN_BTR_OFFSET, btr1);
> > +
> > + netdev_dbg(ndev, "BRPR=0x%08x, BTR=0x%08x\n",
> > + priv->read_reg(priv, XCAN_BRPR_OFFSET),
> > + priv->read_reg(priv, XCAN_BTR_OFFSET));
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * xcan_start - This the drivers start routine
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * This is the drivers start routine.
> > + * Based on the State of the CAN device it puts
> > + * the CAN device into a proper mode.
> > + *
> > + * Return: 0 on success and failure value on error */ static int
> > +xcan_start(struct net_device *ndev)
>
> Please name the function xcan_chip_start(), to for a common naming like
> the flexcan and at91 driver.
>
OK
> > +{
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + u32 err;
> > + unsigned long timeout;
> > +
> > + /* Check if it is in reset mode */
> > + if (priv->can.state != CAN_STATE_STOPPED)
>
> Don't depend on any state here, I suggest to do a softreset (or
> equivalent) of you CAN core and configure everything.
>
Ok
> > + err = set_reset_mode(ndev);
> > + if (err < 0)
> > + return err;
> > +
> > + /* Enable interrupts */
> > + priv->write_reg(priv, XCAN_IER_OFFSET, XCAN_INTR_ALL);
> > +
> > + /* Check whether it is loopback mode or normal mode */
> > + if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
> > + /* Put device into loopback mode */
> > + priv->write_reg(priv, XCAN_MSR_OFFSET,
> XCAN_MSR_LBACK_MASK);
> > + else
> > + /* The device is in normal mode */
> > + priv->write_reg(priv, XCAN_MSR_OFFSET, 0);
> > +
> > + if (priv->can.state == CAN_STATE_STOPPED) {
> > + /* Enable Xilinx CAN */
> > + priv->write_reg(priv, XCAN_SRR_OFFSET,
> XCAN_SRR_CEN_MASK);
> > + priv->can.state = CAN_STATE_ERROR_ACTIVE;
> > + timeout = jiffies + XCAN_TIMEOUT;
> > + if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
> > + while ((priv->read_reg(priv, XCAN_SR_OFFSET)
> > + & XCAN_SR_LBACK_MASK) == 0) {
> > + if (time_after(jiffies, timeout)) {
> > + netdev_warn(ndev,
> > + "timedout for loopback
> mode\n");
> > + return -ETIMEDOUT;
> > + }
> > + usleep_range(500, 10000);
> > + }
> > + } else {
> > + while ((priv->read_reg(priv, XCAN_SR_OFFSET)
> > + & XCAN_SR_NORMAL_MASK) == 0) {
> > + if (time_after(jiffies, timeout)) {
> > + netdev_warn(ndev,
> > + "timedout for normal
> mode\n");
> > + return -ETIMEDOUT;
> > + }
> > + usleep_range(500, 10000);
> > + }
> > + }
> > + netdev_dbg(ndev, "status:#x%08x\n",
> > + priv->read_reg(priv, XCAN_SR_OFFSET));
> > + }
> > + priv->can.state = CAN_STATE_ERROR_ACTIVE;
> > + return 0;
> > +}
> > +
> > +/**
> > + * xcan_do_set_mode - This sets the mode of the driver
> > + * @ndev: Pointer to net_device structure
> > + * @mode: Tells the mode of the driver
> > + *
> > + * This check the drivers state and calls the
> > + * the corresponding modes to set.
> > + *
> > + * Return: 0 on success and failure value on error */ static int
> > +xcan_do_set_mode(struct net_device *ndev, enum can_mode mode) {
> > + int ret;
> > +
> > + switch (mode) {
> > + case CAN_MODE_START:
> > + ret = xcan_start(ndev);
> > + if (ret < 0)
> > + netdev_err(ndev, "xcan_start failed!\n");
> > + netif_wake_queue(ndev);
> > + break;
> > + default:
> > + ret = -EOPNOTSUPP;
> > + break;
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +/**
> > + * xcan_start_xmit - Starts the transmission
> > + * @skb: sk_buff pointer that contains data to be Txed
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * This function is invoked from upper layers to initiate
> > +transmission. This
> > + * function uses the next available free txbuff and populates their
> > +fields to
> > + * start the transmission.
> > + *
> > + * Return: 0 on success and failure value on error */ static int
> > +xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + struct net_device_stats *stats = &ndev->stats;
> > + struct can_frame *cf = (struct can_frame *)skb->data;
> > + u32 id, dlc, data[2] = {0, 0}, rtr = 0;
>
> I think you can drop the rtr varibale and use cf->can_id & CAN_RTR_FLAG
> instead.
>
OK
> > + unsigned long flags;
> > +
> > + if (can_dropped_invalid_skb(ndev, skb))
> > + return NETDEV_TX_OK;
> > +
> > + /* Watch carefully on the bit sequence */
> > + if (cf->can_id & CAN_EFF_FLAG) {
> > + /* Extended CAN ID format */
> > + id = ((cf->can_id & CAN_EFF_MASK) << XCAN_IDR_ID2_SHIFT)
> &
> > + XCAN_IDR_ID2_MASK;
> > + id |= (((cf->can_id & CAN_EFF_MASK) >>
> > + (CAN_EFF_ID_BITS-CAN_SFF_ID_BITS)) <<
> > + XCAN_IDR_ID1_SHIFT) & XCAN_IDR_ID1_MASK;
> > +
> > + /* The substibute remote TX request bit should be "1"
> > + * for extended frames as in the Xilinx CAN datasheet
> > + */
> > + id |= XCAN_IDR_IDE_MASK | XCAN_IDR_SRR_MASK;
> > +
> > + if (cf->can_id & CAN_RTR_FLAG) {
> > + /* Extended frames remote TX request */
> > + id |= XCAN_IDR_RTR_MASK;
> > + rtr = 1;
> > + }
> > + } else {
> > + /* Standard CAN ID format */
> > + id = ((cf->can_id & CAN_SFF_MASK) << XCAN_IDR_ID1_SHIFT)
> &
> > + XCAN_IDR_ID1_MASK;
> > +
> > + if (cf->can_id & CAN_RTR_FLAG) {
> > + /* Extended frames remote TX request */
> > + id |= XCAN_IDR_SRR_MASK;
> > + rtr = 1;
> > + }
> > + }
> > +
> > + dlc = (cf->can_dlc & 0xf) << XCAN_DLCR_DLC_SHIFT;
>
> No need to mask dlc, it's valid.
>
OK
> > +
> > + if (dlc > 0)
>
> You've copied my speudo code :)
> But you have to use (cf->can_dlc > 0) here, as dlc is the shifted value.
Yes :) I missed it will change
>
> > + data[0] = be32_to_cpup((__be32 *)(cf->data + 0));
> > + if (dlc > 4)
> > + data[1] = be32_to_cpup((__be32 *)(cf->data + 4));
> > +
> > + can_put_echo_skb(skb, ndev, priv->ech_skb_next);
>
> can_put_echo_skb(skb, ndev,
> priv->tx_head % priv->xcan_echo_skb_max_tx);
>
> priv->tx_head++;
>
Ok
> > +
> > + /* Write the Frame to Xilinx CAN TX FIFO */
> > + priv->write_reg(priv, XCAN_TXFIFO_ID_OFFSET, id);
> > + priv->write_reg(priv, XCAN_TXFIFO_DLC_OFFSET, dlc);
> > + if (!rtr) {
> > + priv->write_reg(priv, XCAN_TXFIFO_DW1_OFFSET, data[0]);
> > + priv->write_reg(priv, XCAN_TXFIFO_DW2_OFFSET, data[1]);
> > + stats->tx_bytes += cf->can_dlc;
>
> Please add a comment which write triggers the tx. What in case of the rtr?
> Which write triggers the tx then?
>
Ok Will Add
In RTR Case the below write triggers the trasmission
priv->write_reg(priv, XCAN_TXFIFO_DLC_OFFSET, dlc);
In Normal case this write
priv->write_reg(priv, XCAN_TXFIFO_DW2_OFFSET, data[1]);
Triggers the transmission.
In Btw: Due to the limitations in the IP( Tx DLC register is a write only Register)
I can't put this stats->tx_bytes += cf->can_dlc; in the tx interrupt routine.
> > + }
> > +
> > + priv->ech_skb_next = (priv->ech_skb_next + 1) %
> > + priv->xcan_echo_skb_max_tx;
>
> Please remove, it's not needed.
>
Ok
> > +
> > + spin_lock_irqsave(&priv->ech_skb_lock, flags);
> > + priv->waiting_ech_skb_num++;
> > + spin_unlock_irqrestore(&priv->ech_skb_lock, flags);
>
> All 3 not needed.
>
Ok
> > +
> > + /* Check if the TX buffer is full */
> > + if (priv->read_reg(priv, XCAN_SR_OFFSET) & XCAN_SR_TXFLL_MASK)
> {
> > + netif_stop_queue(ndev);
> > + netdev_err(ndev, "TX register is still full!\n");
> > + return NETDEV_TX_BUSY;
>
> If this is true, there is a Bug in the flow control. It should be moved to the
> beginning of the function, see at91_can's xmit function.
Yes this Condition Becomes true.
Will put the below check in the Beginning of this function
>
> /* Check if the TX buffer is full */
> if (unlikely(priv->read_reg(priv, XCAN_SR_OFFSET) &
> XCAN_SR_TXFLL_MASK)) {
> netif_stop_queue(ndev);
> netdev_err(ndev,
> "BUG!, TX FIFO full when queue awake!\n");
> return NETDEV_TX_BUSY;
> }
>
> > + } else if (priv->waiting_ech_skb_num == priv-
> >xcan_echo_skb_max_tx) {
> > + netif_stop_queue(ndev);
> > + netdev_err(ndev, "waiting:0x%08x, max:0x%08x\n",
> > + priv->waiting_ech_skb_num, priv-
> >xcan_echo_skb_max_tx);
> > + return NETDEV_TX_BUSY;
> > + }
>
> This is a the regular flow control function and must be called before a TX
> complete interrupt can trigger. Your tx-complete interrupt is probably
> always enabled?
>
Yes. The tx-completed interrupt always enabled.
> So here you check the fill level of the FIFO:
>
> if ((priv->tx_head - priv->tx_tail) ==
> priv->xcan_echo_skb_max_tx)
> netif_stop_queue(ndev);
>
> If it's full, stop the queue. The you trigger the tx, the tx complete interrupt
> gets called and the queue will be restarted.
>
Ok
> > +
> > + return NETDEV_TX_OK;
> > +}
> > +
> > +/**
> > + * xcan_rx - Is called from CAN isr to complete the received
> > + * frame processing
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * This function is invoked from the CAN isr(poll) to process the Rx
> > +frames. It
> > + * does minimal processing and invokes "netif_receive_skb" to
> > +complete further
> > + * processing.
> > + * Return: 0 on success and negative error value on error */ static
> > +int xcan_rx(struct net_device *ndev) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + struct net_device_stats *stats = &ndev->stats;
> > + struct can_frame *cf;
> > + struct sk_buff *skb;
> > + u32 id_xcan, dlc, data[2] = {0, 0}, rtr = 0;
> > +
> > + skb = alloc_can_skb(ndev, &cf);
> > + if (!skb)
> > + return -ENOMEM;
> > +
> > + /* Read a frame from Xilinx zynq CANPS */
> > + id_xcan = priv->read_reg(priv, XCAN_RXFIFO_ID_OFFSET);
> > + dlc = priv->read_reg(priv, XCAN_RXFIFO_DLC_OFFSET) &
> > +XCAN_DLCR_DLC_MASK;
>
> Better do the shift to dlc.
>
Ok
> > +
> > + /* Change Xilinx CAN data length format to socketCAN data format
> */
> > + cf->can_dlc = get_can_dlc((dlc & XCAN_DLCR_DLC_MASK) >>
> > + XCAN_DLCR_DLC_SHIFT);
>
> Then it's just: get_can_dlc(dlc);
Ok
>
> > +
> > + /* Change Xilinx CAN ID format to socketCAN ID format */
> > + if (id_xcan & XCAN_IDR_IDE_MASK) {
> > + /* The received frame is an Extended format frame */
> > + cf->can_id = (id_xcan & XCAN_IDR_ID1_MASK) >> 3;
> > + cf->can_id |= (id_xcan & XCAN_IDR_ID2_MASK) >>
> > + XCAN_IDR_ID2_SHIFT;
> > + cf->can_id |= CAN_EFF_FLAG;
> > + if (id_xcan & XCAN_IDR_RTR_MASK) {
> > + cf->can_id |= CAN_RTR_FLAG;
> > + rtr = 1;
> > + }
> > + } else {
> > + /* The received frame is a standard format frame */
> > + cf->can_id = (id_xcan & XCAN_IDR_ID1_MASK) >>
> > + XCAN_IDR_ID1_SHIFT;
> > + if (id_xcan & XCAN_IDR_RTR_MASK) {
> > + cf->can_id |= CAN_RTR_FLAG;
> > + rtr = 1;
> > + }
> > + }
> > +
> > + if (!rtr) {
> > + data[0] = priv->read_reg(priv, XCAN_RXFIFO_DW1_OFFSET);
> > + data[1] = priv->read_reg(priv, XCAN_RXFIFO_DW2_OFFSET);
> > +
> > + /* Change Xilinx CAN data format to socketCAN data format
> */
> > + *(__be32 *)(cf->data) = cpu_to_be32(data[0]);
> > + if (cf->can_dlc > 4)
> > + *(__be32 *)(cf->data + 4) = cpu_to_be32(data[1]);
> > + }
> > + can_led_event(ndev, CAN_LED_EVENT_RX);
> > +
> > + netif_receive_skb(skb);
> > +
> > + stats->rx_bytes += cf->can_dlc;
> > + stats->rx_packets++;
> > + return 0;
> > +}
> > +
> > +/**
> > + * xcan_err_interrupt - error frame Isr
> > + * @ndev: net_device pointer
> > + * @isr: interrupt status register value
> > + *
> > + * This is the CAN error interrupt and it will
> > + * check the the type of error and forward the error
> > + * frame to upper layers.
> > + */
> > +static void xcan_err_interrupt(struct net_device *ndev, u32 isr) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + struct net_device_stats *stats = &ndev->stats;
> > + struct can_frame *cf;
> > + struct sk_buff *skb;
> > + u32 err_status, status;
> > +
> > + skb = alloc_can_err_skb(ndev, &cf);
> > + if (!skb) {
> > + netdev_err(ndev, "alloc_can_err_skb() failed!\n");
> > + return;
> > + }
> > +
> > + err_status = priv->read_reg(priv, XCAN_ESR_OFFSET);
> > + priv->write_reg(priv, XCAN_ESR_OFFSET, err_status);
> > + status = priv->read_reg(priv, XCAN_SR_OFFSET);
> > +
> > + if (isr & XCAN_IXR_BSOFF_MASK) {
> > + priv->can.state = CAN_STATE_BUS_OFF;
> > + cf->can_id |= CAN_ERR_BUSOFF;
> > + priv->can.can_stats.bus_off++;
> > + /* Leave device in Config Mode in bus-off state */
> > + priv->write_reg(priv, XCAN_SRR_OFFSET,
> XCAN_SRR_RESET_MASK);
> > + can_bus_off(ndev);
> > + } else if ((status & XCAN_SR_ESTAT_MASK) ==
> XCAN_SR_ESTAT_MASK) {
> > + cf->can_id |= CAN_ERR_CRTL;
> > + priv->can.state = CAN_STATE_ERROR_PASSIVE;
> > + priv->can.can_stats.error_passive++;
> > + cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE |
> > + CAN_ERR_CRTL_TX_PASSIVE;
> > + } else if (status & XCAN_SR_ERRWRN_MASK) {
> > + cf->can_id |= CAN_ERR_CRTL;
> > + priv->can.state = CAN_STATE_ERROR_WARNING;
> > + priv->can.can_stats.error_warning++;
> > + cf->data[1] |= CAN_ERR_CRTL_RX_WARNING |
> > + CAN_ERR_CRTL_TX_WARNING;
> > + }
> > +
> > + /* Check for Arbitration lost interrupt */
> > + if (isr & XCAN_IXR_ARBLST_MASK) {
> > + cf->can_id |= CAN_ERR_LOSTARB;
> > + cf->data[0] = CAN_ERR_LOSTARB_UNSPEC;
> > + priv->can.can_stats.arbitration_lost++;
> > + }
> > +
> > + /* Check for RX FIFO Overflow interrupt */
> > + if (isr & XCAN_IXR_RXOFLW_MASK) {
> > + cf->can_id |= CAN_ERR_CRTL;
> > + cf->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;
> > + stats->rx_over_errors++;
> > + stats->rx_errors++;
> > + priv->write_reg(priv, XCAN_SRR_OFFSET,
> XCAN_SRR_RESET_MASK);
> > + }
> > +
> > + /* Check for error interrupt */
> > + if (isr & XCAN_IXR_ERROR_MASK) {
> > + cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
> > + cf->data[2] |= CAN_ERR_PROT_UNSPEC;
> > +
> > + /* Check for Ack error interrupt */
> > + if (err_status & XCAN_ESR_ACKER_MASK) {
> > + cf->can_id |= CAN_ERR_ACK;
> > + cf->data[3] |= CAN_ERR_PROT_LOC_ACK;
> > + stats->tx_errors++;
> > + }
> > +
> > + /* Check for Bit error interrupt */
> > + if (err_status & XCAN_ESR_BERR_MASK) {
> > + cf->can_id |= CAN_ERR_PROT;
> > + cf->data[2] = CAN_ERR_PROT_BIT;
> > + stats->tx_errors++;
> > + }
> > +
> > + /* Check for Stuff error interrupt */
> > + if (err_status & XCAN_ESR_STER_MASK) {
> > + cf->can_id |= CAN_ERR_PROT;
> > + cf->data[2] = CAN_ERR_PROT_STUFF;
> > + stats->rx_errors++;
> > + }
> > +
> > + /* Check for Form error interrupt */
> > + if (err_status & XCAN_ESR_FMER_MASK) {
> > + cf->can_id |= CAN_ERR_PROT;
> > + cf->data[2] = CAN_ERR_PROT_FORM;
> > + stats->rx_errors++;
> > + }
> > +
> > + /* Check for CRC error interrupt */
> > + if (err_status & XCAN_ESR_CRCER_MASK) {
> > + cf->can_id |= CAN_ERR_PROT;
> > + cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ |
> > + CAN_ERR_PROT_LOC_CRC_DEL;
> > + stats->rx_errors++;
> > + }
> > + priv->can.can_stats.bus_error++;
> > + }
> > +
> > + netif_rx(skb);
> > + stats->rx_packets++;
> > + stats->rx_bytes += cf->can_dlc;
> > +
> > + netdev_dbg(ndev, "%s: error status register:0x%x\n",
> > + __func__, priv->read_reg(priv, XCAN_ESR_OFFSET));
> }
> > +
> > +/**
> > + * xcan_state_interrupt - It will check the state of the CAN device
> > + * @ndev: net_device pointer
> > + * @isr: interrupt status register value
> > + *
> > + * This will checks the state of the CAN device
> > + * and puts the device into appropriate state.
> > + */
> > +static void xcan_state_interrupt(struct net_device *ndev, u32 isr) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > +
> > + /* Check for Sleep interrupt if set put CAN device in sleep state */
> > + if (isr & XCAN_IXR_SLP_MASK)
> > + priv->can.state = CAN_STATE_SLEEPING;
> > +
> > + /* Check for Wake up interrupt if set put CAN device in Active state
> */
> > + if (isr & XCAN_IXR_WKUP_MASK)
> > + priv->can.state = CAN_STATE_ERROR_ACTIVE; }
> > +
> > +/**
> > + * xcan_rx_poll - Poll routine for rx packets (NAPI)
> > + * @napi: napi structure pointer
> > + * @quota: Max number of rx packets to be processed.
> > + *
> > + * This is the poll routine for rx part.
> > + * It will process the packets maximux quota value.
> > + *
> > + * Return: number of packets received */ static int
> > +xcan_rx_poll(struct napi_struct *napi, int quota) {
> > + struct net_device *ndev = napi->dev;
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + u32 isr, ier;
> > + int work_done = 0;
> > +
> > + isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
> > + while ((isr & XCAN_IXR_RXNEMP_MASK) && (work_done < quota)) {
> > + if (isr & XCAN_IXR_RXOK_MASK) {
> > + priv->write_reg(priv, XCAN_ICR_OFFSET,
> > + XCAN_IXR_RXOK_MASK);
> > + if (xcan_rx(ndev) < 0)
> > + return work_done;
> > + work_done++;
> > + } else {
> > + priv->write_reg(priv, XCAN_ICR_OFFSET,
> > + XCAN_IXR_RXNEMP_MASK);
> > + break;
> > + }
>
> What does the XCAN_IXR_RXOK_MASK mean if it's send and undset?
XCAN_IXR_RXOK_MASK Means it is successfully received one packet
>
> > + priv->write_reg(priv, XCAN_ICR_OFFSET,
> XCAN_IXR_RXNEMP_MASK);
> > + isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
> > + }
> > +
> > + if (work_done < quota) {
> > + napi_complete(napi);
> > + ier = priv->read_reg(priv, XCAN_IER_OFFSET);
> > + ier |= (XCAN_IXR_RXOK_MASK |
> XCAN_IXR_RXNEMP_MASK);
> > + priv->write_reg(priv, XCAN_IER_OFFSET, ier);
>
> Is this a read-modify-write register? I mean will an interrupt get disabled, if
> you write a 0-bit in the IER register? What does the ICR register?
ISR- Interrupt Status Register (Read only register)
IER- Interrupt Enable Register(R/w register)
ICR- Interrupt Clear Register.(write only register)
The Interrupt Status Register (ISR) contains bits that are set when a particular interrupt condition occurs. If
the corresponding mask bit in the Interrupt Enable Register is set, an interrupt is generated.
Interrupt bits in the ISR can be cleared by writing to the Interrupt Clear Register
>
> > + }
> > + return work_done;
> > +}
> > +
> > +/**
> > + * xcan_tx_interrupt - Tx Done Isr
> > + * @ndev: net_device pointer
> > + */
> > +static void xcan_tx_interrupt(struct net_device *ndev) {
> > + unsigned long flags;
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + struct net_device_stats *stats = &ndev->stats;
> > + u32 processed = 0, txpackets;
> > +
> > + stats->tx_packets++;
> > + netdev_dbg(ndev, "%s: waiting total:%d,current:%d\n", __func__,
> > + priv->waiting_ech_skb_num, priv-
> >waiting_ech_skb_index);
> > +
> > + txpackets = priv->waiting_ech_skb_num;
> > +
> > + if (txpackets) {
> > + can_get_echo_skb(ndev, priv->waiting_ech_skb_index);
> > + priv->waiting_ech_skb_index =
> > + (priv->waiting_ech_skb_index + 1) %
> > + priv->xcan_echo_skb_max_tx;
> > + processed++;
> > + txpackets--;
> > + }
> > +
> > + spin_lock_irqsave(&priv->ech_skb_lock, flags);
> > + priv->waiting_ech_skb_num -= processed;
> > + spin_unlock_irqrestore(&priv->ech_skb_lock, flags);
>
> This all simplyfies to a:
> can_get_echo_skb(ndev, priv->tx_tail %
> priv->xcan_echo_skb_max_tx);
> priv->tx_tail++;
>
Ok
> I think you should add some kind of loop here, it there is more than one tx-
> complete per IRQ.
>
Ok
> > +
> > + netdev_dbg(ndev, "%s: waiting total:%d,current:%d\n", __func__,
> > + priv->waiting_ech_skb_num, priv-
> >waiting_ech_skb_index);
> > +
> > + netif_wake_queue(ndev);
> > +
> > + can_led_event(ndev, CAN_LED_EVENT_TX); }
> > +
> > +/**
> > + * xcan_interrupt - CAN Isr
> > + * @irq: irq number
> > + * @dev_id: device id poniter
> > + *
> > + * This is the xilinx CAN Isr. It checks for the type of interrupt
> > + * and invokes the corresponding ISR.
> > + *
> > + * Return:
> > + * IRQ_NONE - If CAN device is in sleep mode, IRQ_HANDLED otherwise
> > +*/ static irqreturn_t xcan_interrupt(int irq, void *dev_id) {
> > + struct net_device *ndev = (struct net_device *)dev_id;
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + u32 isr, ier;
> > +
> > + /* Get the interrupt status from Xilinx CAN */
> > + isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
> > + if (!isr)
> > + return IRQ_NONE;
> > +
> > + netdev_dbg(ndev, "%s: isr:#x%08x, err:#x%08x\n", __func__,
> > + isr, priv->read_reg(priv, XCAN_ESR_OFFSET));
> > +
> > + /* Check for the type of interrupt and Processing it */
> > + if (isr & (XCAN_IXR_SLP_MASK | XCAN_IXR_WKUP_MASK)) {
> > + priv->write_reg(priv, XCAN_ICR_OFFSET,
> (XCAN_IXR_SLP_MASK |
> > + XCAN_IXR_WKUP_MASK));
> > + xcan_state_interrupt(ndev, isr);
> > + }
> > +
> > + /* Check for Tx interrupt and Processing it */
> > + if (isr & XCAN_IXR_TXOK_MASK) {
> > + priv->write_reg(priv, XCAN_ICR_OFFSET,
> XCAN_IXR_TXOK_MASK);
> > + xcan_tx_interrupt(ndev);
> > + }
> > +
> > + /* Check for the type of error interrupt and Processing it */
> > + if (isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
> > + XCAN_IXR_BSOFF_MASK |
> XCAN_IXR_ARBLST_MASK)) {
> > + priv->write_reg(priv, XCAN_ICR_OFFSET,
> (XCAN_IXR_ERROR_MASK |
> > + XCAN_IXR_RXOFLW_MASK |
> XCAN_IXR_BSOFF_MASK |
> > + XCAN_IXR_ARBLST_MASK));
> > + xcan_err_interrupt(ndev, isr);
> > + }
> > +
> > + /* Check for the type of receive interrupt and Processing it */
> > + if (isr & (XCAN_IXR_RXNEMP_MASK | XCAN_IXR_RXOK_MASK)) {
> > + ier = priv->read_reg(priv, XCAN_IER_OFFSET);
> > + ier &= ~(XCAN_IXR_RXNEMP_MASK |
> XCAN_IXR_RXOK_MASK);
> > + priv->write_reg(priv, XCAN_IER_OFFSET, ier);
> > + napi_schedule(&priv->napi);
> > + }
> > + return IRQ_HANDLED;
> > +}
> > +
> > +/**
> > + * xcan_stop - Driver stop routine
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * This is the drivers stop routine. It will disable the
> > + * interrupts and put the device into configuration mode.
> > + */
> > +static void xcan_stop(struct net_device *ndev) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + u32 ier;
> > +
> > + /* Disable interrupts and leave the can in configuration mode */
> > + ier = priv->read_reg(priv, XCAN_IER_OFFSET);
> > + ier &= ~XCAN_INTR_ALL;
> > + priv->write_reg(priv, XCAN_IER_OFFSET, ier);
> > + priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK);
> > + priv->can.state = CAN_STATE_STOPPED; }
> > +
> > +/**
> > + * xcan_open - Driver open routine
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * This is the driver open routine.
> > + * Return: 0 on success and failure value on error */ static int
> > +xcan_open(struct net_device *ndev) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + int ret;
> > +
> > + ret = request_irq(ndev->irq, xcan_interrupt, priv->irq_flags,
> > + ndev->name, (void *)ndev);
> > + if (ret < 0) {
> > + netdev_err(ndev, "Irq allocation for CAN failed\n");
> > + return ret;
> > + }
> > +
> > + /* Set chip into reset mode */
> > + ret = set_reset_mode(ndev);
> > + if (ret < 0)
> > + netdev_err(ndev, "mode resetting failed failed!\n");
>
> Is this critical?
This condition usually won't fail.
But if the controller has a problems at the h/w level in that case putted this err print.
If you want me to change it as a warning will do
>
> > +
> > + /* Common open */
> > + ret = open_candev(ndev);
> > + if (ret)
> > + return ret;
>
> You should free the interrupt handler if this fails.
Ok
>
> > +
> > + ret = xcan_start(ndev);
> > + if (ret < 0)
> > + netdev_err(ndev, "xcan_start failed!\n");
> > +
> > +
> > + can_led_event(ndev, CAN_LED_EVENT_OPEN);
> > + napi_enable(&priv->napi);
> > + netif_start_queue(ndev);
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * xcan_close - Driver close routine
> > + * @ndev: Pointer to net_device structure
> > + *
> > + * Return: 0 always
> > + */
> > +static int xcan_close(struct net_device *ndev) {
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > +
> > + netif_stop_queue(ndev);
> > + napi_disable(&priv->napi);
> > + xcan_stop(ndev);
> > + free_irq(ndev->irq, ndev);
> > + close_candev(ndev);
> > +
> > + can_led_event(ndev, CAN_LED_EVENT_STOP);
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * xcan_get_berr_counter - error counter routine
> > + * @ndev: Pointer to net_device structure
> > + * @bec: Pointer to can_berr_counter structure
> > + *
> > + * This is the driver error counter routine.
> > + * Return: 0 always
> > + */
> > +static int xcan_get_berr_counter(const struct net_device *ndev,
> > + struct can_berr_counter *bec)
> > +{
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > +
> > + bec->txerr = priv->read_reg(priv, XCAN_ECR_OFFSET) &
> XCAN_ECR_TEC_MASK;
> > + bec->rxerr = ((priv->read_reg(priv, XCAN_ECR_OFFSET) &
> > + XCAN_ECR_REC_MASK) >> XCAN_ESR_REC_SHIFT);
> > + return 0;
> > +}
> > +
> > +static const struct net_device_ops xcan_netdev_ops = {
> > + .ndo_open = xcan_open,
> > + .ndo_stop = xcan_close,
> > + .ndo_start_xmit = xcan_start_xmit,
> > +};
> > +
> > +#ifdef CONFIG_PM_SLEEP
> > +/**
> > + * xcan_suspend - Suspend method for the driver
> > + * @_dev: Address of the platform_device structure
> > + *
> > + * Put the driver into low power mode.
> > + * Return: 0 always
> > + */
> > +static int xcan_suspend(struct device *_dev) {
> > + struct platform_device *pdev = container_of(_dev,
> > + struct platform_device, dev);
> > + struct net_device *ndev = platform_get_drvdata(pdev);
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > +
> > + if (netif_running(ndev)) {
> > + netif_stop_queue(ndev);
> > + netif_device_detach(ndev);
> > + }
> > +
> > + priv->write_reg(priv, XCAN_MSR_OFFSET,
> XCAN_MSR_SLEEP_MASK);
> > + priv->can.state = CAN_STATE_SLEEPING;
> > +
> > + clk_disable(priv->aperclk);
> > + clk_disable(priv->devclk);
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * xcan_resume - Resume from suspend
> > + * @dev: Address of the platformdevice structure
> > + *
> > + * Resume operation after suspend.
> > + * Return: 0 on success and failure value on error */ static int
> > +xcan_resume(struct device *dev) {
> > + struct platform_device *pdev = container_of(dev,
> > + struct platform_device, dev);
> > + struct net_device *ndev = platform_get_drvdata(pdev);
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > + int ret;
> > +
> > + ret = clk_enable(priv->aperclk);
> > + if (ret) {
> > + dev_err(dev, "Cannot enable clock.\n");
> > + return ret;
> > + }
> > + ret = clk_enable(priv->devclk);
> > + if (ret) {
> > + dev_err(dev, "Cannot enable clock.\n");
> > + return ret;
> > + }
> > +
> > + priv->write_reg(priv, XCAN_MSR_OFFSET, 0);
> > + priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_CEN_MASK);
> > + priv->can.state = CAN_STATE_ERROR_ACTIVE;
> > +
> > + if (netif_running(ndev)) {
> > + netif_device_attach(ndev);
> > + netif_start_queue(ndev);
> > + }
> > +
> > + return 0;
> > +}
> > +#endif
> > +
> > +static SIMPLE_DEV_PM_OPS(xcan_dev_pm_ops, xcan_suspend,
> xcan_resume);
> > +
> > +/**
> > + * xcan_probe - Platform registration call
> > + * @pdev: Handle to the platform device structure
> > + *
> > + * This function does all the memory allocation and registration for
> > +the CAN
> > + * device.
> > + *
> > + * Return: 0 on success and failure value on error */ static int
> > +xcan_probe(struct platform_device *pdev) {
> > + struct resource *res; /* IO mem resources */
> > + struct net_device *ndev;
> > + struct xcan_priv *priv;
> > + int ret, fifodep;
> > +
> > + /* Create a CAN device instance */
> > + ndev = alloc_candev(sizeof(struct xcan_priv),
> XCAN_ECHO_SKB_MAX);
> > + if (!ndev)
> > + return -ENOMEM;
> > +
> > + priv = netdev_priv(ndev);
> > + priv->dev = ndev;
> > + priv->can.bittiming_const = &xcan_bittiming_const;
> > + priv->can.do_set_bittiming = xcan_set_bittiming;
> > + priv->can.do_set_mode = xcan_do_set_mode;
> > + priv->can.do_get_berr_counter = xcan_get_berr_counter;
> > + priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
> > + CAN_CTRLMODE_BERR_REPORTING;
> > +
> > + /* Get IRQ for the device */
> > + ndev->irq = platform_get_irq(pdev, 0);
> > +
> > + spin_lock_init(&priv->ech_skb_lock);
> > + ndev->flags |= IFF_ECHO; /* We support local echo */
> > +
> > + platform_set_drvdata(pdev, ndev);
> > + SET_NETDEV_DEV(ndev, &pdev->dev);
> > + ndev->netdev_ops = &xcan_netdev_ops;
> > +
> > + /* Get the virtual base address for the device */
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + priv->reg_base = devm_ioremap_resource(&pdev->dev, res);
> > + if (IS_ERR(priv->reg_base)) {
> > + ret = PTR_ERR(priv->reg_base);
> > + goto err_free;
> > + }
> > + ndev->mem_start = res->start;
> > + ndev->mem_end = res->end;
> > +
> > + priv->write_reg = xcan_write_reg;
> > + priv->read_reg = xcan_read_reg;
> > +
> > + ret = of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
> > + &fifodep);
> > + if (ret < 0)
> > + goto err_free;
> > + priv->xcan_echo_skb_max_tx = fifodep;
> > +
> > + ret = of_property_read_u32(pdev->dev.of_node, "rx-fifo-depth",
> > + &fifodep);
> > + if (ret < 0)
> > + goto err_free;
> > + priv->xcan_echo_skb_max_rx = fifodep;
> > +
> > + /* Getting the CAN devclk info */
> > + priv->devclk = devm_clk_get(&pdev->dev, "ref_clk");
> > + if (IS_ERR(priv->devclk)) {
> > + dev_err(&pdev->dev, "Device clock not found.\n");
> > + ret = PTR_ERR(priv->devclk);
> > + goto err_free;
> > + }
> > +
> > + /* Check for type of CAN device */
> > + if (of_device_is_compatible(pdev->dev.of_node,
> > + "xlnx,zynq-can-1.00.a")) {
> > + priv->aperclk = devm_clk_get(&pdev->dev, "aper_clk");
> > + if (IS_ERR(priv->aperclk)) {
> > + dev_err(&pdev->dev, "aper clock not found\n");
> > + ret = PTR_ERR(priv->aperclk);
> > + goto err_free;
> > + }
> > + } else {
> > + priv->aperclk = priv->devclk;
> > + }
> > +
> > + ret = clk_prepare_enable(priv->devclk);
> > + if (ret) {
> > + dev_err(&pdev->dev, "unable to enable device clock\n");
> > + goto err_free;
> > + }
> > +
> > + ret = clk_prepare_enable(priv->aperclk);
> > + if (ret) {
> > + dev_err(&pdev->dev, "unable to enable aper clock\n");
> > + goto err_unprepar_disabledev;
> > + }
>
> Can you keep your clocks disaled if the interface is not up?
I didn't get it will you please explain?
Regards,
Kedar.
>
> > +
> > + priv->can.clock.freq = clk_get_rate(priv->devclk);
> > +
> > + netif_napi_add(ndev, &priv->napi, xcan_rx_poll,
> > + priv->xcan_echo_skb_max_rx);
> > + ret = register_candev(ndev);
> > + if (ret) {
> > + dev_err(&pdev->dev, "fail to register failed (err=%d)\n",
> ret);
> > + goto err_unprepar_disableaper;
> > + }
> > +
> > + devm_can_led_init(ndev);
> > + dev_info(&pdev->dev,
> > + "reg_base=0x%p irq=%d clock=%d, tx fifo
> depth:%d\n",
> > + priv->reg_base, ndev->irq, priv->can.clock.freq,
> > + priv->xcan_echo_skb_max_tx);
> > +
> > + return 0;
> > +
> > +err_unprepar_disableaper:
> > + clk_disable_unprepare(priv->aperclk);
> > +err_unprepar_disabledev:
> > + clk_disable_unprepare(priv->devclk);
> > +err_free:
> > + free_candev(ndev);
> > +
> > + return ret;
> > +}
> > +
> > +/**
> > + * xcan_remove - Unregister the device after releasing the resources
> > + * @pdev: Handle to the platform device structure
> > + *
> > + * This function frees all the resources allocated to the device.
> > + * Return: 0 always
> > + */
> > +static int xcan_remove(struct platform_device *pdev) {
> > + struct net_device *ndev = platform_get_drvdata(pdev);
> > + struct xcan_priv *priv = netdev_priv(ndev);
> > +
> > + if (set_reset_mode(ndev) < 0)
> > + netdev_err(ndev, "mode resetting failed!\n");
> > +
> > + unregister_candev(ndev);
> > + netif_napi_del(&priv->napi);
> > + clk_disable_unprepare(priv->aperclk);
> > + clk_disable_unprepare(priv->devclk);
> > +
> > + free_candev(ndev);
> > +
> > + return 0;
> > +}
> > +
> > +/* Match table for OF platform binding */ static struct of_device_id
> > +xcan_of_match[] = {
> > + { .compatible = "xlnx,zynq-can-1.00.a", },
> > + { .compatible = "xlnx,axi-can-1.00.a", },
> > + { /* end of list */ },
> > +};
> > +MODULE_DEVICE_TABLE(of, xcan_of_match);
> > +
> > +static struct platform_driver xcan_driver = {
> > + .probe = xcan_probe,
> > + .remove = xcan_remove,
> > + .driver = {
> > + .owner = THIS_MODULE,
> > + .name = DRIVER_NAME,
> > + .pm = &xcan_dev_pm_ops,
> > + .of_match_table = xcan_of_match,
> > + },
> > +};
> > +
> > +module_platform_driver(xcan_driver);
> > +
> > +MODULE_LICENSE("GPL");
> > +MODULE_AUTHOR("Xilinx Inc");
> > +MODULE_DESCRIPTION("Xilinx CAN interface");
> >
>
> Marc
>
> --
> Pengutronix e.K. | Marc Kleine-Budde |
> Industrial Linux Solutions | Phone: +49-231-2826-924 |
> Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
> Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
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^ permalink raw reply
* Re: [PATCH] ipv4: use daddr to get inet_peer
From: Hannes Frederic Sowa @ 2014-02-14 9:41 UTC (permalink / raw)
To: Duan Jiong; +Cc: David Miller, netdev
In-Reply-To: <52FDE10F.5010903@cn.fujitsu.com>
On Fri, Feb 14, 2014 at 05:25:35PM +0800, Duan Jiong wrote:
>
> since commit 1d861aa4("inet: Minimize use of cached route inetpeer"),
> ip_error() uses saddr to get inet_peer, so ip_error() and icmpv4_xrlim_allow()
> use the same inet_peer to limit icmp error message twice.
>
> In ip_error(), peer->rate_tokens is set to ip_rt_error_burst, but in
> inet_peer_xrlim_allow() peer->rate_tokens is set to XRLIM_BURST_FACTOR.
> XRLIM_BURST_FACTOR is defined to 6, so user seting ip_rt_error_burst makes
> no sense.
>
> In my opinion, the ip_rt_error_burst is used to limit icmp error messages
> for daddr instead of saddr.
Hmmm...
ip_error is a dst_input function, as such it gets called with the incoming
packet. saddr is the address we send the reply back (see
icmp_send->icmp_route_lookup).
Sorry, I don't think the patch is correct.
Bye,
Hannes
^ permalink raw reply
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